Merge branch 'zynqmp/master' into master

Merge ZynqMP branch to main xilinx U-Boot repository
and use only ona repo from now.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --cc drivers/mtd/nand/Makefile
index 8f65afdb3a38faeb48dde0b9ea1d6ad3e10b261e,4d1f25cf228bb212db515704eafc8e4603bad22a..94c50a98afa0a7f17f77c6681d3fa66fdce0a68d
--- 1/drivers/mtd/nand/Makefile
--- 2/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@@ -65,7 -65,7 +65,8 @@@ obj-$(CONFIG_NAND_OMAP_GPMC) += omap_gp
  obj-$(CONFIG_NAND_OMAP_ELM) += omap_elm.o
  obj-$(CONFIG_NAND_PLAT) += nand_plat.o
  obj-$(CONFIG_NAND_DOCG4) += docg4.o
 +obj-$(CONFIG_NAND_ZYNQ) += zynq_nand.o
+ obj-$(CONFIG_NAND_ZYNQMP) += arasan_nfc.o
  
  else  # minimal SPL drivers
  

diff --cc drivers/mtd/spi/sf_params.c
Simple merge

diff --cc drivers/mtd/spi/sf_probe.c
index ef626398d0ec6335678774b4485cc7d977255ccb,d8fce40709888d623855e0a96253f9b7ce93abd9..393947c61b5d5825af7f0a2525b8dd224a7e95d2
--- 1/drivers/mtd/spi/sf_probe.c
--- 2/drivers/mtd/spi/sf_probe.c
+++ b/drivers/mtd/spi/sf_probe.c
@@@ -207,40 -230,33 +243,61 @@@ static int spi_flash_validate_params(st
        }
  
        /* Not require to look for fastest only two write cmds yet */
 -      if (params->flags & WR_QPP && flash->spi->op_mode_tx & SPI_OPM_TX_QPP)
 -              flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
 -      else
 +      if ((params->flags & WR_QPP) &&
 +          (flash->spi->op_mode_tx & SPI_OPM_TX_QPP) &&
 +          (flash->spi->dio != SF_DUALIO_FLASH)) {
 +              if ((idcode[0] == SPI_FLASH_CFI_MFR_SPANSION) &&
 +                  (idcode[5] == SPI_FLASH_SPANSION_S25FS_FMLY))
 +                      flash->write_cmd = CMD_PAGE_PROGRAM;
 +              else
 +                      flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
 +      } else {
                /* Go for default supported write cmd */
                flash->write_cmd = CMD_PAGE_PROGRAM;
 +      }
 +
 +      /* Set the quad enable bit - only for quad commands */
 +      if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) ||
 +          (flash->read_cmd == CMD_READ_QUAD_IO_FAST) ||
 +          (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
 +              if (spi_flash_set_qeb(flash, idcode[0])) {
 +                      debug("SF: Fail to set QEB for %02x\n", idcode[0]);
 +                      return 0;
 +              }
 +#ifdef CONFIG_SF_DUAL_FLASH
 +              if (flash->dual_flash & SF_DUAL_STACKED_FLASH) {
 +                      flash->spi->flags |= SPI_XFER_U_PAGE;
 +                      if (spi_flash_set_qeb(flash, idcode[0])) {
 +                              debug("SF: Fail to set QEB Upper Flash %02x\n",
 +                                    idcode[0]);
 +                              return 0;
 +                      }
 +                      flash->spi->flags &= ~SPI_XFER_U_PAGE;
 +              }
 +#endif
 +      }
  
+       /* Set the quad enable bit - only for quad commands */
+       if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) ||
+           (flash->read_cmd == CMD_READ_QUAD_IO_FAST) ||
+           (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
+               if (spi_flash_set_qeb(flash, idcode[0])) {
+                       debug("SF: Fail to set QEB for %02x\n", idcode[0]);
+                       return 0;
+               }
+ #ifdef CONFIG_SF_DUAL_FLASH
+               if (flash->dual_flash & SF_DUAL_STACKED_FLASH) {
+                       flash->spi->flags |= SPI_XFER_U_PAGE;
+                       if (spi_flash_set_qeb(flash, idcode[0])) {
+                               debug("SF: Fail to set QEB Upper Flash %02x\n",
+                                     idcode[0]);
+                               return 0;
+                       }
+                       flash->spi->flags &= ~SPI_XFER_U_PAGE;
+               }
+ #endif
+       }
+ 
        /* Read dummy_byte: dummy byte is determined based on the
         * dummy cycles of a particular command.
         * Fast commands - dummy_byte = dummy_cycles/8
@@@ -380,7 -385,11 +441,11 @@@ static int spi_enable_wp_pin(struct spi
   */
  int spi_flash_probe_slave(struct spi_slave *spi, struct spi_flash *flash)
  {
 -      u8 idcode[5];
 +      u8 idcode[6];
+ #ifdef CONFIG_SPI_GENERIC
+       u8 idcode_up[5];
+       u8 i;
+ #endif
        int ret;
  
        /* Setup spi_slave */

diff --cc drivers/net/zynq_gem.c
index b0c5c949fdbcf087cc20e5fa6ca60de10475a06d,bae5bdad0f0bc1d603ed4d50bbcf9e379dcc42f9..6b316f0a752bd007f98517583550b289b2436325
--- 1/drivers/net/zynq_gem.c
--- 2/drivers/net/zynq_gem.c
+++ b/drivers/net/zynq_gem.c
@@@ -355,9 -348,11 +367,12 @@@ static int zynq_gem_init(struct eth_dev
                priv->init++;
        }
  
+ #ifdef CONFIG_TARGET_XILINX_ZYNQMP
+       if (!priv->init) {
+ #endif
        phy_detection(dev);
  
 +#ifdef CONFIG_PHYLIB
        /* interface - look at tsec */
        phydev = phy_connect(priv->bus, priv->phyaddr, dev,
                             PHY_INTERFACE_MODE_MII);
@@@ -394,47 -393,8 +413,48 @@@
        if (!priv->emio)
                zynq_slcr_gem_clk_setup(dev->iobase !=
                                        ZYNQ_GEM_BASEADDR0, clk_rate);
+ #endif
  
 +#else
 +      /* PHY Setup */
 +      phywrite(dev, priv->phyaddr, 22, 2);    /* page 2 */
 +
 +      /* rx clock transition when data stable */
 +      phywrite(dev, priv->phyaddr, 21, 0x3030);
 +
 +      phywrite(dev, priv->phyaddr, 22, 0);    /* page 0 */
 +
 +      u16 tmp;
 +
 +      /* link speed advertisement for autonegotiation */
 +      phyread(dev, priv->phyaddr, 4, &tmp);
 +      tmp |= 0xd80;           /* enable 100Mbps */
 +      tmp &= ~0x60;           /* disable 10 Mbps */
 +      phywrite(dev, priv->phyaddr, 4, tmp);
 +
 +      /* *disable* gigabit advertisement */
 +      phyread(dev, priv->phyaddr, 9, &tmp);
 +      tmp &= ~0x0300;
 +      phywrite(dev, priv->phyaddr, 9, tmp);
 +
 +      /* enable autonegotiation, set 100Mbps, full-duplex, restart aneg */
 +      phyread(dev, priv->phyaddr, 0, &tmp);
 +      phywrite(dev, priv->phyaddr, 0, 0x3300 | (tmp & 0x1F));
 +
 +      if (phy_rst(dev))
 +              return -1;
 +
 +      puts("\nWaiting for PHY to complete autonegotiation.");
 +      do {
 +              phyread(dev, priv->phyaddr, 1, &tmp);
 +      } while (tmp & (1 << 5));
 +
 +      puts("\nPHY claims autonegotiation complete...\n");
 +
 +      puts("GEM link speed is 100Mbps\n");
 +      writel(ZYNQ_GEM_NWCFG_INIT | ZYNQ_GEM_NWCFG_SPEED100, &regs->nwcfg);
 +#endif
 +
        setbits_le32(&regs->nwctrl, ZYNQ_GEM_NWCTRL_RXEN_MASK |
                                        ZYNQ_GEM_NWCTRL_TXEN_MASK);
  

diff --cc drivers/spi/Makefile
index 3ec6d17488ce0b8458ce1f13303c692f15c60489,fcdaf27959789ea049d02091ce49b9ded2d83fa6..5cc9af9b1aef5b095e33971ef9b547620c60b621
--- 1/drivers/spi/Makefile
--- 2/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@@ -48,5 -48,5 +48,6 @@@ obj-$(CONFIG_TEGRA114_SPI) += tegra114_
  obj-$(CONFIG_TI_QSPI) += ti_qspi.o
  obj-$(CONFIG_XILINX_SPI) += xilinx_spi.o
  obj-$(CONFIG_ZYNQ_SPI) += zynq_spi.o
 +obj-$(CONFIG_ZYNQ_QSPI) += zynq_qspi.o
+ obj-$(CONFIG_ZYNQMP_QSPI) += zynqmp_qspi.o
  obj-$(CONFIG_FSL_QSPI) += fsl_qspi.o

diff --cc include/spi.h
Simple merge