fpga: zynqpl: Do not place bitstream below 1MB

DMA doesn't work when src is placed below 1MB limit.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>

diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index f5dfdcc91413bcbf018b785c460df107c2f61475..160abc7b57be8863671b8a577b130ffda9d39054 100644 (file)
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -26,6 +26,7 @@
 #include <common.h>
 #include <asm/io.h>
 #include <zynqpl.h>
+#include <asm/sizes.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/sys_proto.h>
 
@@ -193,6 +194,12 @@ int zynq_load(Xilinx_desc *desc, const void *buf, size_t bsize)
                return FPGA_FAIL;
        }
 
+       if ((u32)buf < SZ_1M) {
+               printf("%s: Bitstream has to be placed up to 1MB (%x)\n",
+                      __func__, (u32)buf);
+               return FPGA_FAIL;
+       }
+
        if ((u32)buf != ALIGN((u32)buf, ARCH_DMA_MINALIGN)) {
                u32 *new_buf = (u32 *)ALIGN((u32)buf, ARCH_DMA_MINALIGN);