sunxi: dts: arm64: update devicetree files from Linux kernel tree

Sync the devicetree files from the official Linux kernel tree, v6.18-rc1.
This is covering Allwinner SoCs with 64-bit ARM cores.

The bulk is cosmetic changes: board model name changes, DT node renames,
whitespace fixes.
The actual changes are not dramatic: the CPU cores get their caches
described properly, some A64 video clocks get fixed, some A64 boards
describe the header pins for the WiFi module, the Pinephone adds an
alternative magnetometer used on some board revisions.
On the H5 side the microSD slots get marked as having no write-protect
detection, and the NanoPi Neo Plus2 board describes its regulators better.
The H6 boards switch from RSB to I2C for their PMIC connection.

As before, this omits the non-backwards compatible changes to the R_INTC
controller, to remain compatible with older kernels.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>

diff --git a/arch/arm/dts/sun50i-a64-pine64-lts.dts b/arch/arm/dts/sun50i-a64-pine64-lts.dts
index 596a25907432bc0d3223402f5e3b0d7c2d47750d..709fe650a360dccc3c5f69b359494f7b43eb480d 100644 (file)
--- a/arch/arm/dts/sun50i-a64-pine64-lts.dts
+++ b/arch/arm/dts/sun50i-a64-pine64-lts.dts
@@ -5,7 +5,7 @@
 #include "sun50i-a64-sopine-baseboard.dts"
 
 / {
-       model = "Pine64 LTS";
+       model = "Pine64 PINE A64 LTS";
        compatible = "pine64,pine64-lts", "allwinner,sun50i-r18",
                     "allwinner,sun50i-a64";
 

diff --git a/arch/arm/dts/sun50i-a64-pine64-plus.dts b/arch/arm/dts/sun50i-a64-pine64-plus.dts
index b54099b654c8a676998712adfa495eb5866baf40..026d843cd7e05df534b501a052606af8bfeec1cf 100644 (file)
--- a/arch/arm/dts/sun50i-a64-pine64-plus.dts
+++ b/arch/arm/dts/sun50i-a64-pine64-plus.dts
@@ -4,7 +4,7 @@
 #include "sun50i-a64-pine64.dts"
 
 / {
-       model = "Pine64+";
+       model = "Pine64 PINE A64+";
        compatible = "pine64,pine64-plus", "allwinner,sun50i-a64";
 
        /* TODO: Camera, touchscreen, etc. */

diff --git a/arch/arm/dts/sun50i-a64-pine64.dts b/arch/arm/dts/sun50i-a64-pine64.dts
index 329cf276561e896bbc193eb26208d4348e03c74d..a406e8f92d0ed41b053ccdc7b420c1e99f2c316e 100644 (file)
--- a/arch/arm/dts/sun50i-a64-pine64.dts
+++ b/arch/arm/dts/sun50i-a64-pine64.dts
@@ -9,7 +9,7 @@
 #include <dt-bindings/gpio/gpio.h>
 
 / {
-       model = "Pine64";
+       model = "Pine64 PINE A64";
        compatible = "pine64,pine64", "allwinner,sun50i-a64";
 
        aliases {
@@ -124,6 +124,17 @@
        status = "okay";
 };
 
+/* On Wifi/BT connector */
+&mmc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc1_pins>;
+       vmmc-supply = <&reg_dldo4>;
+       vqmmc-supply = <&reg_eldo1>;
+       bus-width = <4>;
+       non-removable;
+       status = "disabled";
+};
+
 &ohci0 {
        status = "okay";
 };
@@ -286,6 +297,7 @@
 &uart1 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+       uart-has-rtscts;
        status = "disabled";
 };
 

diff --git a/arch/arm/dts/sun50i-a64-pinebook.dts b/arch/arm/dts/sun50i-a64-pinebook.dts
index 1a85d5f60c36164b2b879a49f33ef013ec975e1c..5b7568edc32898845370c31fd6ebd288be0ac42e 100644 (file)
--- a/arch/arm/dts/sun50i-a64-pinebook.dts
+++ b/arch/arm/dts/sun50i-a64-pinebook.dts
@@ -13,7 +13,7 @@
 #include <dt-bindings/pwm/pwm.h>
 
 / {
-       model = "Pinebook";
+       model = "Pine64 Pinebook";
        compatible = "pine64,pinebook", "allwinner,sun50i-a64";
        chassis-type = "laptop";
 
@@ -390,6 +390,8 @@
 &tcon0 {
        pinctrl-names = "default";
        pinctrl-0 = <&lcd_rgb666_pins>;
+       assigned-clocks = <&ccu CLK_TCON0>;
+       assigned-clock-parents = <&ccu CLK_PLL_VIDEO0_2X>;
 
        status = "okay";
 };

diff --git a/arch/arm/dts/sun50i-a64-pinephone.dtsi b/arch/arm/dts/sun50i-a64-pinephone.dtsi
index c62dc937defbc03165c2c5eeefeace1e23286f35..31b1f99898cca182fabb3235450ebdcbc3e7f63e 100644 (file)
--- a/arch/arm/dts/sun50i-a64-pinephone.dtsi
+++ b/arch/arm/dts/sun50i-a64-pinephone.dtsi
@@ -188,12 +188,30 @@
 &i2c1 {
        status = "okay";
 
+       /* Alternative magnetometer */
+       af8133j: magnetometer@1c {
+               compatible = "voltafield,af8133j";
+               reg = <0x1c>;
+               reset-gpios = <&pio 1 1 GPIO_ACTIVE_LOW>;
+               avdd-supply = <&reg_dldo1>;
+               dvdd-supply = <&reg_dldo1>;
+               mount-matrix = "0", "-1", "0",
+                               "-1", "0", "0",
+                               "0", "0", "-1";
+
+               /* status will be fixed up in firmware */
+               status = "disabled";
+       };
+
        /* Magnetometer */
        lis3mdl: magnetometer@1e {
                compatible = "st,lis3mdl-magn";
                reg = <0x1e>;
                vdd-supply = <&reg_dldo1>;
                vddio-supply = <&reg_dldo1>;
+               mount-matrix = "0", "1", "0",
+                               "-1", "0", "0",
+                               "0", "0", "1";
        };
 
        /* Light/proximity sensor */
@@ -212,6 +230,9 @@
                interrupts = <7 5 IRQ_TYPE_EDGE_RISING>; /* PH5 */
                vdd-supply = <&reg_dldo1>;
                vddio-supply = <&reg_dldo1>;
+               mount-matrix = "0", "1", "0",
+                              "-1", "0", "0",
+                              "0", "0", "1";
        };
 };
 

diff --git a/arch/arm/dts/sun50i-a64-pinetab-early-adopter.dts b/arch/arm/dts/sun50i-a64-pinetab-early-adopter.dts
index 6265360ce623fa3e505038da66b33b9ea544ce6e..86cc85eb3d4846d0a0a113f6b2259f82e3bbe2c7 100644 (file)
--- a/arch/arm/dts/sun50i-a64-pinetab-early-adopter.dts
+++ b/arch/arm/dts/sun50i-a64-pinetab-early-adopter.dts
@@ -9,7 +9,7 @@
 #include "sun50i-a64-pinetab.dts"
 
 / {
-       model = "PineTab, Early Adopter's version";
+       model = "Pine64 PineTab Early Adopter";
        compatible = "pine64,pinetab-early-adopter", "allwinner,sun50i-a64";
 };
 

diff --git a/arch/arm/dts/sun50i-a64-pinetab.dts b/arch/arm/dts/sun50i-a64-pinetab.dts
index b6f42357b45fe176afb688ecc3e55a701cd6f638..c66e0bd52abcc6ccc9eb7cb62cfe69d8fd333115 100644 (file)
--- a/arch/arm/dts/sun50i-a64-pinetab.dts
+++ b/arch/arm/dts/sun50i-a64-pinetab.dts
@@ -14,7 +14,7 @@
 #include <dt-bindings/pwm/pwm.h>
 
 / {
-       model = "PineTab, Development Sample";
+       model = "Pine64 PineTab Developer Sample";
        compatible = "pine64,pinetab", "allwinner,sun50i-a64";
        chassis-type = "tablet";
 

diff --git a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
index 5e66ce1a334fb2831071979390c4668ad61df955..231e652cab67079ddc29faf21eb07774cfe6698d 100644 (file)
--- a/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm/dts/sun50i-a64-sopine-baseboard.dts
@@ -8,7 +8,7 @@
 #include "sun50i-a64-sopine.dtsi"
 
 / {
-       model = "SoPine with baseboard";
+       model = "Pine64 SOPINE on Baseboard carrier board";
        compatible = "pine64,sopine-baseboard", "pine64,sopine",
                     "allwinner,sun50i-a64";
 
@@ -103,6 +103,17 @@
        };
 };
 
+/* On Wifi/BT connector */
+&mmc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc1_pins>;
+       vmmc-supply = <&reg_dldo4>;
+       vqmmc-supply = <&reg_eldo1>;
+       bus-width = <4>;
+       non-removable;
+       status = "disabled";
+};
+
 &mmc2 {
        pinctrl-names = "default";
        pinctrl-0 = <&mmc2_pins>;
@@ -175,6 +186,14 @@
        status = "okay";
 };
 
+/* On Wifi/BT connector, with RTS/CTS */
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+       uart-has-rtscts;
+       status = "disabled";
+};
+
 /* On Pi-2 connector */
 &uart2 {
        pinctrl-names = "default";

diff --git a/arch/arm/dts/sun50i-a64-teres-i.dts b/arch/arm/dts/sun50i-a64-teres-i.dts
index 065b1861633bccceb339aaddc00d4e48e28a94a0..527bc4b46cd5bd9943525b907cf61a42e2940907 100644 (file)
--- a/arch/arm/dts/sun50i-a64-teres-i.dts
+++ b/arch/arm/dts/sun50i-a64-teres-i.dts
@@ -369,6 +369,8 @@
 &tcon0 {
        pinctrl-names = "default";
        pinctrl-0 = <&lcd_rgb666_pins>;
+       assigned-clocks = <&ccu CLK_TCON0>;
+       assigned-clock-parents = <&ccu CLK_PLL_VIDEO0_2X>;
 
        status = "okay";
 };

diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi
index b6928cc668d15062fe2095b0e482adf907aa285b..7c978b38f5b0d4f118c26c7d4e77336cb4d73b31 100644 (file)
--- a/arch/arm/dts/sun50i-a64.dtsi
+++ b/arch/arm/dts/sun50i-a64.dtsi
@@ -51,10 +51,16 @@
                        device_type = "cpu";
                        reg = <0>;
                        enable-method = "psci";
-                       next-level-cache = <&L2>;
                        clocks = <&ccu CLK_CPUX>;
                        clock-names = "cpu";
                        #cooling-cells = <2>;
+                       i-cache-size = <0x8000>;
+                       i-cache-line-size = <64>;
+                       i-cache-sets = <256>;
+                       d-cache-size = <0x8000>;
+                       d-cache-line-size = <64>;
+                       d-cache-sets = <128>;
+                       next-level-cache = <&l2_cache>;
                };
 
                cpu1: cpu@1 {
@@ -62,10 +68,16 @@
                        device_type = "cpu";
                        reg = <1>;
                        enable-method = "psci";
-                       next-level-cache = <&L2>;
                        clocks = <&ccu CLK_CPUX>;
                        clock-names = "cpu";
                        #cooling-cells = <2>;
+                       i-cache-size = <0x8000>;
+                       i-cache-line-size = <64>;
+                       i-cache-sets = <256>;
+                       d-cache-size = <0x8000>;
+                       d-cache-line-size = <64>;
+                       d-cache-sets = <128>;
+                       next-level-cache = <&l2_cache>;
                };
 
                cpu2: cpu@2 {
@@ -73,10 +85,16 @@
                        device_type = "cpu";
                        reg = <2>;
                        enable-method = "psci";
-                       next-level-cache = <&L2>;
                        clocks = <&ccu CLK_CPUX>;
                        clock-names = "cpu";
                        #cooling-cells = <2>;
+                       i-cache-size = <0x8000>;
+                       i-cache-line-size = <64>;
+                       i-cache-sets = <256>;
+                       d-cache-size = <0x8000>;
+                       d-cache-line-size = <64>;
+                       d-cache-sets = <128>;
+                       next-level-cache = <&l2_cache>;
                };
 
                cpu3: cpu@3 {
@@ -84,16 +102,25 @@
                        device_type = "cpu";
                        reg = <3>;
                        enable-method = "psci";
-                       next-level-cache = <&L2>;
                        clocks = <&ccu CLK_CPUX>;
                        clock-names = "cpu";
                        #cooling-cells = <2>;
+                       i-cache-size = <0x8000>;
+                       i-cache-line-size = <64>;
+                       i-cache-sets = <256>;
+                       d-cache-size = <0x8000>;
+                       d-cache-line-size = <64>;
+                       d-cache-sets = <128>;
+                       next-level-cache = <&l2_cache>;
                };
 
-               L2: l2-cache {
+               l2_cache: l2-cache {
                        compatible = "cache";
                        cache-level = <2>;
                        cache-unified;
+                       cache-size = <0x80000>;
+                       cache-line-size = <64>;
+                       cache-sets = <512>;
                };
        };
 
@@ -236,6 +263,14 @@
                        polling-delay-passive = <0>;
                        polling-delay = <0>;
                        thermal-sensors = <&ths 1>;
+
+                       trips {
+                               gpu0_crit: gpu0-crit {
+                                       temperature = <110000>;
+                                       hysteresis = <2000>;
+                                       type = "critical";
+                               };
+                       };
                };
 
                gpu1_thermal: gpu1-thermal {
@@ -243,6 +278,14 @@
                        polling-delay-passive = <0>;
                        polling-delay = <0>;
                        thermal-sensors = <&ths 2>;
+
+                       trips {
+                               gpu1_crit: gpu1-crit {
+                                       temperature = <110000>;
+                                       hysteresis = <2000>;
+                                       type = "critical";
+                               };
+                       };
                };
        };
 
@@ -402,6 +445,8 @@
                        clock-names = "ahb", "tcon-ch0";
                        clock-output-names = "tcon-data-clock";
                        #clock-cells = <0>;
+                       assigned-clocks = <&ccu CLK_TCON0>;
+                       assigned-clock-parents = <&ccu CLK_PLL_MIPI>;
                        resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>;
                        reset-names = "lcd", "lvds";
 

diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
index b69032c4455754cbe9fae604761d3b640d1a78eb..18fa541795a64d32cda0e1eb7bd1e5bd85effdff 100644 (file)
--- a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
+++ b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
@@ -45,16 +45,40 @@
                startup-delay-us = <100000>;
                enable-active-high;
                gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+               vin-supply = <&reg_vcc3v3>;
+       };
+
+       reg_gmac_2v5: gmac-2v5 {
+               /* 2V5 supply for GMAC PHY IO */
+               compatible = "regulator-fixed";
+               regulator-name = "gmac-2v5";
+               regulator-min-microvolt = <2500000>;
+               regulator-max-microvolt = <2500000>;
+               regulator-always-on;
+               vin-supply = <&reg_vcc3v3>;
+       };
+
+       reg_vcc5v: regulator-vcc5v {
+               /* board 5V supply from micro USB or pin headers */
+               compatible = "regulator-fixed";
+               regulator-name = "vcc-5v";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-always-on;
        };
 
        reg_vcc3v3: vcc3v3 {
+               /* board 3V3 supply by SY8089A */
                compatible = "regulator-fixed";
                regulator-name = "vcc3v3";
                regulator-min-microvolt = <3300000>;
                regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+               vin-supply = <&reg_vcc5v>;
        };
 
        vdd_cpux: gpio-regulator {
+               /* cpu voltage regulator MP2143DJ */
                compatible = "regulator-gpio";
                regulator-name = "vdd-cpux";
                regulator-type = "voltage";
@@ -66,6 +90,7 @@
                gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
                gpios-states = <0x1>;
                states = <1100000 0>, <1300000 1>;
+               vin-supply = <&reg_vcc5v>;
        };
 
        wifi_pwrseq: pwrseq {
@@ -111,6 +136,7 @@
        vmmc-supply = <&reg_vcc3v3>;
        bus-width = <4>;
        cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+       disable-wp;
        status = "okay";
 };
 
@@ -146,6 +172,18 @@
        status = "okay";
 };
 
+&pio {
+       vcc-pa-supply = <&reg_vcc3v3>;
+       vcc-pc-supply = <&reg_vcc3v3>;
+       vcc-pd-supply = <&reg_gmac_2v5>;
+       vcc-pf-supply = <&reg_vcc3v3>;
+       vcc-pg-supply = <&reg_vcc3v3>;
+};
+
+&r_pio {
+       vcc-pl-supply = <&reg_vcc3v3>;
+};
+
 &uart0 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart0_pa_pins>;

diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo2.dts b/arch/arm/dts/sun50i-h5-nanopi-neo2.dts
index 05486cccee1c4ef73d7e8284d30703280c363c79..128295f5a5d6b91e39da770b4c59078928ac0582 100644 (file)
--- a/arch/arm/dts/sun50i-h5-nanopi-neo2.dts
+++ b/arch/arm/dts/sun50i-h5-nanopi-neo2.dts
@@ -88,6 +88,7 @@
 
 &mmc0 {
        vmmc-supply = <&reg_vcc3v3>;
+       disable-wp;
        bus-width = <4>;
        cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
        status = "okay";

diff --git a/arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts b/arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts
index 3a7ee44708a2051da23f883f26175157ba3067ad..44fdc8b3f79d27871f01baeb3a1d25a499afa3da 100644 (file)
--- a/arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts
+++ b/arch/arm/dts/sun50i-h5-nanopi-r1s-h5.dts
@@ -157,6 +157,7 @@
 
 &mmc0 {
        vmmc-supply = <&reg_vcc3v3>;
+       disable-wp;
        bus-width = <4>;
        cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
        status = "okay";

diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
index ce3ae19e72dbd4582db7d67f3722d86f877c34a4..0f29da7d51e66d6d5f6102ab472e752e613dd081 100644 (file)
--- a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
@@ -153,6 +153,7 @@
 
 &mmc0 {
        vmmc-supply = <&reg_vcc3v3>;
+       disable-wp;
        bus-width = <4>;
        cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
        status = "okay";

diff --git a/arch/arm/dts/sun50i-h5-orangepi-prime.dts b/arch/arm/dts/sun50i-h5-orangepi-prime.dts
index b699bb900e13bb6e2d293d227cefd893645ccb41..d4fc4e60e4e72dbb7c9e22d26bec958c0a6e6a12 100644 (file)
--- a/arch/arm/dts/sun50i-h5-orangepi-prime.dts
+++ b/arch/arm/dts/sun50i-h5-orangepi-prime.dts
@@ -153,6 +153,7 @@
 
 &mmc0 {
        vmmc-supply = <&reg_vcc3v3>;
+       disable-wp;
        bus-width = <4>;
        cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
        status = "okay";

diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
index ae85131aac9c730d2738cec1cdb930c5e3c55101..3322cc4d9aa4a56644b02fb266c4c7857a9dbf97 100644 (file)
--- a/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
+++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
@@ -82,6 +82,7 @@
 
 &mmc0 {
        vmmc-supply = <&reg_vcc3v3>;
+       disable-wp;
        bus-width = <4>;
        cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
        status = "okay";

diff --git a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
index 734481e998b8dd4b7efe319605dd8c9b64a86ed7..3eb986c354a9d7a840844716734d377f3bc16e33 100644 (file)
--- a/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
+++ b/arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
@@ -79,6 +79,7 @@
 
 &mmc0 {
        vmmc-supply = <&reg_vcc3v3>;
+       disable-wp;
        bus-width = <4>;
        cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
        status = "okay";

diff --git a/arch/arm/dts/sun50i-h5.dtsi b/arch/arm/dts/sun50i-h5.dtsi
index 9b3462b13ccb072c2516f3ab2ac42f5863992e68..14c7c74c4ad1ac6a616d52dc91ff58f26024c957 100644 (file)
--- a/arch/arm/dts/sun50i-h5.dtsi
+++ b/arch/arm/dts/sun50i-h5.dtsi
@@ -16,7 +16,6 @@
                        reg = <0>;
                        enable-method = "psci";
                        clocks = <&ccu CLK_CPUX>;
-                       clock-latency-ns = <244144>; /* 8 32k periods */
                        #cooling-cells = <2>;
                };
 
@@ -26,7 +25,6 @@
                        reg = <1>;
                        enable-method = "psci";
                        clocks = <&ccu CLK_CPUX>;
-                       clock-latency-ns = <244144>; /* 8 32k periods */
                        #cooling-cells = <2>;
                };
 
@@ -36,7 +34,6 @@
                        reg = <2>;
                        enable-method = "psci";
                        clocks = <&ccu CLK_CPUX>;
-                       clock-latency-ns = <244144>; /* 8 32k periods */
                        #cooling-cells = <2>;
                };
 
@@ -46,7 +43,6 @@
                        reg = <3>;
                        enable-method = "psci";
                        clocks = <&ccu CLK_CPUX>;
-                       clock-latency-ns = <244144>; /* 8 32k periods */
                        #cooling-cells = <2>;
                };
        };
@@ -207,7 +203,7 @@
                        };
 
                        cooling-maps {
-                               cpu-hot-limit {
+                               map0 {
                                        trip = <&cpu_hot_trip>;
                                        cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
                                                         <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,

diff --git a/arch/arm/dts/sun50i-h6-beelink-gs1.dts b/arch/arm/dts/sun50i-h6-beelink-gs1.dts
index 529285fc34fdfe63d9fbe83fb863d5fc5073b950..6b4b621ef38dc600b1186f2f4aeab94f85c3ef2f 100644 (file)
--- a/arch/arm/dts/sun50i-h6-beelink-gs1.dts
+++ b/arch/arm/dts/sun50i-h6-beelink-gs1.dts
@@ -129,6 +129,7 @@
 &mmc0 {
        vmmc-supply = <&reg_cldo1>;
        cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
+       disable-wp;
        bus-width = <4>;
        status = "okay";
 };
@@ -151,28 +152,12 @@
        vcc-pg-supply = <&reg_aldo1>;
 };
 
-&r_ir {
-       linux,rc-map-name = "rc-beelink-gs1";
-       status = "okay";
-};
-
-&r_pio {
-       /*
-        * FIXME: We can't add that supply for now since it would
-        * create a circular dependency between pinctrl, the regulator
-        * and the RSB Bus.
-        *
-        * vcc-pl-supply = <&reg_aldo1>;
-        */
-       vcc-pm-supply = <&reg_aldo1>;
-};
-
-&r_rsb {
+&r_i2c {
        status = "okay";
 
-       axp805: pmic@745 {
+       axp805: pmic@36 {
                compatible = "x-powers,axp805", "x-powers,axp806";
-               reg = <0x745>;
+               reg = <0x36>;
                interrupt-parent = <&r_intc>;
                interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
                interrupt-controller;
@@ -290,6 +275,22 @@
        };
 };
 
+&r_ir {
+       linux,rc-map-name = "rc-beelink-gs1";
+       status = "okay";
+};
+
+&r_pio {
+       /*
+        * PL0 and PL1 are used for PMIC I2C
+        * don't enable the pl-supply else
+        * it will fail at boot
+        *
+        * vcc-pl-supply = <&reg_aldo1>;
+        */
+       vcc-pm-supply = <&reg_aldo1>;
+};
+
 &spdif {
        pinctrl-names = "default";
        pinctrl-0 = <&spdif_tx_pin>;

diff --git a/arch/arm/dts/sun50i-h6-orangepi-3.dts b/arch/arm/dts/sun50i-h6-orangepi-3.dts
index bdcec466246f1b62a14796bc03fa5e229fcefdf1..007e74e9604c16432a7d980dcdf6f4b250365ab1 100644 (file)
--- a/arch/arm/dts/sun50i-h6-orangepi-3.dts
+++ b/arch/arm/dts/sun50i-h6-orangepi-3.dts
@@ -131,6 +131,7 @@
 &mmc0 {
        vmmc-supply = <&reg_cldo1>;
        cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+       disable-wp;
        bus-width = <4>;
        status = "okay";
 };
@@ -143,7 +144,7 @@
        non-removable;
        status = "okay";
 
-       brcm: sdio-wifi@1 {
+       brcm: wifi@1 {
                reg = <1>;
                compatible = "brcm,bcm4329-fmac";
                interrupt-parent = <&r_pio>;
@@ -175,16 +176,12 @@
        vcc-pg-supply = <&reg_vcc_wifi_io>;
 };
 
-&r_ir {
-       status = "okay";
-};
-
-&r_rsb {
+&r_i2c {
        status = "okay";
 
-       axp805: pmic@745 {
+       axp805: pmic@36 {
                compatible = "x-powers,axp805", "x-powers,axp806";
-               reg = <0x745>;
+               reg = <0x36>;
                interrupt-parent = <&r_intc>;
                interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
                interrupt-controller;
@@ -295,6 +292,10 @@
        };
 };
 
+&r_ir {
+       status = "okay";
+};
+
 &rtc {
        clocks = <&ext_osc32k>;
 };

diff --git a/arch/arm/dts/sun50i-h6-orangepi-lite2.dts b/arch/arm/dts/sun50i-h6-orangepi-lite2.dts
index a3f65a45bd26635d29dafe785ec28641a1501a79..0911c537cc6b6918409d249d7923943ab29089b3 100644 (file)
--- a/arch/arm/dts/sun50i-h6-orangepi-lite2.dts
+++ b/arch/arm/dts/sun50i-h6-orangepi-lite2.dts
@@ -28,7 +28,7 @@
        non-removable;
        status = "okay";
 
-       brcm: sdio-wifi@1 {
+       brcm: wifi@1 {
                reg = <1>;
                compatible = "brcm,bcm4329-fmac";
                interrupt-parent = <&r_pio>;

diff --git a/arch/arm/dts/sun50i-h6-orangepi.dtsi b/arch/arm/dts/sun50i-h6-orangepi.dtsi
index 4403769fc36e8001dc1a3141b889a53058144b64..f69658bde88b6adc096bed5af8ed134915ab66ff 100644 (file)
--- a/arch/arm/dts/sun50i-h6-orangepi.dtsi
+++ b/arch/arm/dts/sun50i-h6-orangepi.dtsi
@@ -94,6 +94,7 @@
 &mmc0 {
        vmmc-supply = <&reg_cldo1>;
        cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
+       disable-wp;
        bus-width = <4>;
        status = "okay";
 };
@@ -112,20 +113,12 @@
        vcc-pg-supply = <&reg_aldo1>;
 };
 
-&r_ir {
-       status = "okay";
-};
-
-&r_pio {
-       vcc-pm-supply = <&reg_bldo3>;
-};
-
-&r_rsb {
+&r_i2c {
        status = "okay";
 
-       axp805: pmic@745 {
+       axp805: pmic@36 {
                compatible = "x-powers,axp805", "x-powers,axp806";
-               reg = <0x745>;
+               reg = <0x36>;
                interrupt-parent = <&r_intc>;
                interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
                interrupt-controller;
@@ -240,6 +233,14 @@
        };
 };
 
+&r_ir {
+       status = "okay";
+};
+
+&r_pio {
+       vcc-pm-supply = <&reg_bldo3>;
+};
+
 &rtc {
        clocks = <&ext_osc32k>;
 };

diff --git a/arch/arm/dts/sun50i-h6-pine-h64-model-b.dts b/arch/arm/dts/sun50i-h6-pine-h64-model-b.dts
index 66fe03910d5e6b482e1a1a0fca3fa62050eaee83..066fbeff8bfac2b40df9dc3ed78a98eeed008d27 100644 (file)
--- a/arch/arm/dts/sun50i-h6-pine-h64-model-b.dts
+++ b/arch/arm/dts/sun50i-h6-pine-h64-model-b.dts
@@ -8,7 +8,7 @@
 /delete-node/ &reg_gmac_3v3;
 
 / {
-       model = "Pine H64 model B";
+       model = "Pine64 PINE H64 Model B";
        compatible = "pine64,pine-h64-model-b", "allwinner,sun50i-h6";
 
        wifi_pwrseq: pwrseq {

diff --git a/arch/arm/dts/sun50i-h6-pine-h64.dts b/arch/arm/dts/sun50i-h6-pine-h64.dts
index bfb46572bdacc636e93c23eeaedf028d4284ebac..108dad2b0723c3760dd12107a0ebbe1d27b4c3bd 100644 (file)
--- a/arch/arm/dts/sun50i-h6-pine-h64.dts
+++ b/arch/arm/dts/sun50i-h6-pine-h64.dts
@@ -9,7 +9,7 @@
 #include <dt-bindings/gpio/gpio.h>
 
 / {
-       model = "Pine H64 model A";
+       model = "Pine64 PINE H64 Model A";
        compatible = "pine64,pine-h64", "allwinner,sun50i-h6";
 
        aliases {
@@ -133,6 +133,7 @@
 &mmc0 {
        vmmc-supply = <&reg_cldo1>;
        cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
+       disable-wp;
        bus-width = <4>;
        status = "okay";
 };

diff --git a/arch/arm/dts/sun50i-h6-tanix.dtsi b/arch/arm/dts/sun50i-h6-tanix.dtsi
index 855b7d43bc503ab3b2a042ef51f31d54a9dbaf1d..bb7de37c0d58be4b2dff2db18cede4bfb197b8bc 100644 (file)
--- a/arch/arm/dts/sun50i-h6-tanix.dtsi
+++ b/arch/arm/dts/sun50i-h6-tanix.dtsi
@@ -124,6 +124,7 @@
        pinctrl-0 = <&mmc0_pins>;
        vmmc-supply = <&reg_vcc3v3>;
        cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
+       disable-wp;
        bus-width = <4>;
        status = "okay";
 };

diff --git a/arch/arm/dts/sun50i-h6.dtsi b/arch/arm/dts/sun50i-h6.dtsi
index 82aa5679fc488d46830928fa982829b008259927..6febed20cb4f9176b9afd6fadad9ed8c3d96fb41 100644 (file)
--- a/arch/arm/dts/sun50i-h6.dtsi
+++ b/arch/arm/dts/sun50i-h6.dtsi
@@ -27,8 +27,14 @@
                        reg = <0>;
                        enable-method = "psci";
                        clocks = <&ccu CLK_CPUX>;
-                       clock-latency-ns = <244144>; /* 8 32k periods */
                        #cooling-cells = <2>;
+                       i-cache-size = <0x8000>;
+                       i-cache-line-size = <64>;
+                       i-cache-sets = <256>;
+                       d-cache-size = <0x8000>;
+                       d-cache-line-size = <64>;
+                       d-cache-sets = <128>;
+                       next-level-cache = <&l2_cache>;
                };
 
                cpu1: cpu@1 {
@@ -37,8 +43,14 @@
                        reg = <1>;
                        enable-method = "psci";
                        clocks = <&ccu CLK_CPUX>;
-                       clock-latency-ns = <244144>; /* 8 32k periods */
                        #cooling-cells = <2>;
+                       i-cache-size = <0x8000>;
+                       i-cache-line-size = <64>;
+                       i-cache-sets = <256>;
+                       d-cache-size = <0x8000>;
+                       d-cache-line-size = <64>;
+                       d-cache-sets = <128>;
+                       next-level-cache = <&l2_cache>;
                };
 
                cpu2: cpu@2 {
@@ -47,8 +59,14 @@
                        reg = <2>;
                        enable-method = "psci";
                        clocks = <&ccu CLK_CPUX>;
-                       clock-latency-ns = <244144>; /* 8 32k periods */
                        #cooling-cells = <2>;
+                       i-cache-size = <0x8000>;
+                       i-cache-line-size = <64>;
+                       i-cache-sets = <256>;
+                       d-cache-size = <0x8000>;
+                       d-cache-line-size = <64>;
+                       d-cache-sets = <128>;
+                       next-level-cache = <&l2_cache>;
                };
 
                cpu3: cpu@3 {
@@ -57,8 +75,23 @@
                        reg = <3>;
                        enable-method = "psci";
                        clocks = <&ccu CLK_CPUX>;
-                       clock-latency-ns = <244144>; /* 8 32k periods */
                        #cooling-cells = <2>;
+                       i-cache-size = <0x8000>;
+                       i-cache-line-size = <64>;
+                       i-cache-sets = <256>;
+                       d-cache-size = <0x8000>;
+                       d-cache-line-size = <64>;
+                       d-cache-sets = <128>;
+                       next-level-cache = <&l2_cache>;
+               };
+
+               l2_cache: l2-cache {
+                       compatible = "cache";
+                       cache-level = <2>;
+                       cache-unified;
+                       cache-size = <0x80000>;
+                       cache-line-size = <64>;
+                       cache-sets = <512>;
                };
        };