arm64: dts: renesas: r9a07g044: Add missing hypervisor virtual timer IRQ

[ Upstream commit ecbc5206a1a0532258144a4703cccf4e70f3fe6c ]

Add the missing fifth interrupt to the device node that represents the
ARM architected timer.  While at it, add an interrupt-names property for
clarity,

Fixes: 68a45525297b2e9a ("arm64: dts: renesas: Add initial DTSI for RZ/G2{L,LC} SoC's")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/21f556eb7e903d5b9f4c96188fd4b6ae0db71856.1718890849.git.geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
index 88634ae4328720f71725bbfc030cf6e07e93382a..1a9891ba6c02c475e0d8de5e948d190a7aec06b1 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi
@@ -1334,6 +1334,9 @@
                interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
                                      <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
                                      <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
-                                     <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
+                                     <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
+                                     <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
+               interrupt-names = "sec-phys", "phys", "virt", "hyp-phys",
+                                 "hyp-virt";
        };
 };