arm64: dts: qcom: x1e80100-crd: Fix the PHY regulator for PCIe 6a

commit cf7d2157aa87dca6f078a2d4867fd0a9dbc357aa upstream.

The actual PHY regulator is L1d instead of L3j, so fix it accordingly.

Fixes: d7e03cce0400 ("arm64: dts: qcom: x1e80100-crd: Enable more support")
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: stable@vger.kernel.org      # 6.9
Link: https://lore.kernel.org/r/20240530-x1e80100-dts-pcie6a-v1-1-ee17a9939ba5@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
index be6b1e7d07ce347e8bee73a420548d7604f9388c..17b630822621b234c4e933956e50c11657afd96e 100644 (file)
--- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
@@ -659,7 +659,7 @@
 };
 
 &pcie6a_phy {
-       vdda-phy-supply = <&vreg_l3j_0p8>;
+       vdda-phy-supply = <&vreg_l1d_0p8>;
        vdda-pll-supply = <&vreg_l2j_1p2>;
 
        status = "okay";