Revive VG_(cpuid) which had been commented out during the merge and

add VG_(has_cpuid) as well. These are then used in place of the inline
assembly in state.c as the compiler was having trouble allocating the
required registers when building in PIE mode.

git-svn-id: svn://svn.valgrind.org/valgrind/trunk@3476

diff --git a/coregrind/x86/cpuid.S b/coregrind/x86/cpuid.S
index 7843bed7f52855991e1efb30a16986e13329191c..6d6c12759be08927d66f506fca1d15cd0b13a2c4 100644 (file)
--- a/coregrind/x86/cpuid.S
+++ b/coregrind/x86/cpuid.S
@@ -28,13 +28,37 @@
   The GNU General Public License is contained in the file COPYING.
 */
 
-#if 0
-
 #include "core_asm.h"
 
 /*
-    int VG_(cpuid)(UInt eax,
-                   UInt *eax_ret, UInt *ebx_ret, UInt *ecx_ret, UInt *edx_ret)
+    Bool VG_(has_cpuid)(void)
+ */
+.globl VG_(has_cpuid)
+VG_(has_cpuid):
+        pushl   %ebp
+        movl    %esp, %ebp
+        pushl   %ecx
+        pushfl
+        pushfl
+        popl    %eax
+        movl    %eax, %ecx
+        xorl    $0x200000, %eax
+        pushl   %eax
+        popfl
+        pushfl
+        popl    %eax
+        popfl
+        xorl    %ecx, %eax
+        andl    $0x200000, %eax
+        shrl    $21, %eax
+        popl    %ecx
+        movl    %ebp, %esp
+        popl    %ebp
+        ret
+
+/*
+    void VG_(cpuid)(UInt eax,
+                    UInt *eax_ret, UInt *ebx_ret, UInt *ecx_ret, UInt *edx_ret)
  */
 .globl VG_(cpuid)
 VG_(cpuid):
@@ -79,8 +103,6 @@ VG_(cpuid):
 /* Let the linker know we don't need an executable stack */
 .section .note.GNU-stack,"",@progbits
 
-#endif /* 0 */
-
 ##--------------------------------------------------------------------##
 ##--- end                                                         ---##
 ##--------------------------------------------------------------------##

diff --git a/coregrind/x86/state.c b/coregrind/x86/state.c
index d7d9ba8808716751b4827f743bce7e78d7bbd6ca..9597ee5cf8cc8182b4b8e8e8c7561a3d78bcddbe 100644 (file)
--- a/coregrind/x86/state.c
+++ b/coregrind/x86/state.c
@@ -49,50 +49,6 @@
 /*--- Determining arch/subarch.                            ---*/
 /*------------------------------------------------------------*/
 
-/* Standard macro to see if a specific flag is changeable */
-
-static inline Bool flag_is_changeable(UInt flag)
-{
-   UInt f1, f2;
-
-   asm("pushfl\n\t"
-       "pushfl\n\t"
-       "popl %0\n\t"
-       "movl %0,%1\n\t"
-       "xorl %2,%0\n\t"
-       "pushl %0\n\t"
-       "popfl\n\t"
-       "pushfl\n\t"
-       "popl %0\n\t"
-       "popfl\n\t"
-       : "=&r" (f1), "=&r" (f2)
-       : "ir" (flag));
-
-   return ((f1^f2) & flag) != 0;
-}
-
-/* Does this CPU support the CPUID instruction? */
-
-static Bool has_cpuid ( void )
-{
-   /* 21 is the ID flag */
-   return flag_is_changeable(1<<21);
-}
-
-/* Actually do a CPUID on the host. */
-
-static void do_cpuid ( UInt n,
-                       UInt* a, UInt* b,
-                       UInt* c, UInt* d )
-{
-   __asm__ __volatile__ (
-      "cpuid"
-      : "=a" (*a), "=b" (*b), "=c" (*c), "=d" (*d)      /* output */
-      : "0" (n)         /* input */
-   );
-}
-
-
 // Returns the architecture and subarchitecture, or indicates
 // that this subarchitecture is unable to run Valgrind
 // Returns False to indicate we cannot proceed further.
@@ -102,17 +58,17 @@ Bool VGA_(getArchAndSubArch)( /*OUT*/VexArch*    vex_arch,
    Bool have_sse0, have_sse1, have_sse2;
    UInt eax, ebx, ecx, edx;
 
-   if (!has_cpuid())
+   if (!VG_(has_cpuid)())
       /* we can't do cpuid at all.  Give up. */
       return False;
 
-   do_cpuid(0, &eax, &ebx, &ecx, &edx);
+   VG_(cpuid)(0, &eax, &ebx, &ecx, &edx);
    if (eax < 1)
      /* we can't ask for cpuid(x) for x > 0.  Give up. */
      return False;
 
    /* get capabilities bits into edx */
-   do_cpuid(1, &eax, &ebx, &ecx, &edx);
+   VG_(cpuid)(1, &eax, &ebx, &ecx, &edx);
 
    have_sse0 = (edx & (1<<24)) != 0; /* True => have fxsave/fxrstor */
    have_sse1 = (edx & (1<<25)) != 0; /* True => have sse insns */