drm/i915: Use the the correct pixel rate to compute wm line time

The line time used for the watermark calculations is supposed to
based on the plane's adjusted pixel rate, not the pipe's adjusted
pixel rate. The current code will give incorrect answers if plane
downscaling is used.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250919180838.10498-2-ville.syrjala@linux.intel.com
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 9eb28d9357571204e738f9b47d533501d345a121..f73d1d24a488bae6eb13f68dd754ece8c2e8ac56 100644 (file)
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -1637,18 +1637,16 @@ skl_wm_method2(u32 pixel_rate, u32 pipe_htotal, u32 latency,
 }
 
 static uint_fixed_16_16_t
-intel_get_linetime_us(const struct intel_crtc_state *crtc_state)
+intel_get_linetime_us(const struct intel_crtc_state *crtc_state,
+                     int pixel_rate)
 {
        struct intel_display *display = to_intel_display(crtc_state);
-       u32 pixel_rate;
        u32 crtc_htotal;
        uint_fixed_16_16_t linetime_us;
 
        if (!crtc_state->hw.active)
                return u32_to_fixed16(0);
 
-       pixel_rate = crtc_state->pixel_rate;
-
        if (drm_WARN_ON(display->drm, pixel_rate == 0))
                return u32_to_fixed16(0);
 
@@ -1743,7 +1741,8 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
        wp->y_tile_minimum = mul_u32_fixed16(wp->y_min_scanlines,
                                             wp->plane_blocks_per_line);
 
-       wp->linetime_us = fixed16_to_u32_round_up(intel_get_linetime_us(crtc_state));
+       wp->linetime_us = fixed16_to_u32_round_up(intel_get_linetime_us(crtc_state,
+                                                                       plane_pixel_rate));
 
        return 0;
 }