net: ravb: Enforce descriptor type ordering

commit 5370c31e84b0e0999c7b5ff949f4e104def35584 upstream.

Ensure the TX descriptor type fields are published in a safe order so the
DMA engine never begins processing a descriptor chain before all descriptor
fields are fully initialised.

For multi-descriptor transmits the driver writes DT_FEND into the last
descriptor and DT_FSTART into the first. The DMA engine begins processing
when it observes DT_FSTART. Move the dma_wmb() barrier so it executes
immediately after DT_FEND and immediately before writing DT_FSTART
(and before DT_FSINGLE in the single-descriptor case). This guarantees
that all prior CPU writes to the descriptor memory are visible to the
device before DT_FSTART is seen.

This avoids a situation where compiler/CPU reordering could publish
DT_FSTART ahead of DT_FEND or other descriptor fields, allowing the DMA to
start on a partially initialised chain and causing corrupted transmissions
or TX timeouts. Such a failure was observed on RZ/G2L with an RT kernel as
transmit queue timeouts and device resets.

Fixes: 2f45d1902acf ("ravb: minimize TX data copying")
Cc: stable@vger.kernel.org
Co-developed-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://patch.msgid.link/20251017151830.171062-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/net/ethernet/renesas/ravb_main.c b/drivers/net/ethernet/renesas/ravb_main.c
index cc4f0d16c76303cd39080c1654d2a62d152b0fed..2540fbdae4a02996a48e55857b56e202e8add38d 100644 (file)
--- a/drivers/net/ethernet/renesas/ravb_main.c
+++ b/drivers/net/ethernet/renesas/ravb_main.c
@@ -2203,13 +2203,25 @@ static netdev_tx_t ravb_start_xmit(struct sk_buff *skb, struct net_device *ndev)
 
                skb_tx_timestamp(skb);
        }
-       /* Descriptor type must be set after all the above writes */
-       dma_wmb();
+
        if (num_tx_desc > 1) {
                desc->die_dt = DT_FEND;
                desc--;
+               /* When using multi-descriptors, DT_FEND needs to get written
+                * before DT_FSTART, but the compiler may reorder the memory
+                * writes in an attempt to optimize the code.
+                * Use a dma_wmb() barrier to make sure DT_FEND and DT_FSTART
+                * are written exactly in the order shown in the code.
+                * This is particularly important for cases where the DMA engine
+                * is already running when we are running this code. If the DMA
+                * sees DT_FSTART without the corresponding DT_FEND it will enter
+                * an error condition.
+                */
+               dma_wmb();
                desc->die_dt = DT_FSTART;
        } else {
+               /* Descriptor type must be set after all the above writes */
+               dma_wmb();
                desc->die_dt = DT_FSINGLE;
        }
        ravb_modify(ndev, TCCR, TCCR_TSRQ0 << q, TCCR_TSRQ0 << q);