]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
PCI: aardvark: Fix PCI_EXP_RTCTL register configuration
authorRemi Pommarel <repk@triplefau.lt>
Fri, 14 Jun 2019 10:10:59 +0000 (12:10 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 17 Jan 2020 18:48:53 +0000 (19:48 +0100)
commit c0f05a6ab52535c1bf5f43272eede3e11c5701a5 upstream.

PCI_EXP_RTCTL is used to activate PME interrupt only, so writing into it
should not modify other interrupts' mask. The ISR mask polarity was also
inverted, when PCI_EXP_RTCTL_PMEIE is set PCIE_MSG_PM_PME_MASK mask bit
should actually be cleared.

Fixes: 8a3ebd8de328 ("PCI: aardvark: Implement emulated root PCI bridge config space")
Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/pci/controller/pci-aardvark.c

index fe471861f801c990cb5e5d7b932922da3ea7d003..97245e07654833822c6b46f2eb63a3aec4dcf85f 100644 (file)
@@ -428,7 +428,7 @@ advk_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge,
 
        case PCI_EXP_RTCTL: {
                u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG);
-               *value = (val & PCIE_MSG_PM_PME_MASK) ? PCI_EXP_RTCTL_PMEIE : 0;
+               *value = (val & PCIE_MSG_PM_PME_MASK) ? 0 : PCI_EXP_RTCTL_PMEIE;
                return PCI_BRIDGE_EMUL_HANDLED;
        }
 
@@ -478,10 +478,15 @@ advk_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge,
                        advk_pcie_wait_for_retrain(pcie);
                break;
 
-       case PCI_EXP_RTCTL:
-               new = (new & PCI_EXP_RTCTL_PMEIE) << 3;
-               advk_writel(pcie, new, PCIE_ISR0_MASK_REG);
+       case PCI_EXP_RTCTL: {
+               /* Only mask/unmask PME interrupt */
+               u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG) &
+                       ~PCIE_MSG_PM_PME_MASK;
+               if ((new & PCI_EXP_RTCTL_PMEIE) == 0)
+                       val |= PCIE_MSG_PM_PME_MASK;
+               advk_writel(pcie, val, PCIE_ISR0_MASK_REG);
                break;
+       }
 
        case PCI_EXP_RTSTA:
                new = (new & PCI_EXP_RTSTA_PME) >> 9;