]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
KVM: arm64: vgic: Don't reset cpuif/redist addresses at finalize time
authorMarc Zyngier <maz@kernel.org>
Wed, 1 Apr 2026 10:35:56 +0000 (11:35 +0100)
committerMarc Zyngier <maz@kernel.org>
Wed, 1 Apr 2026 14:42:25 +0000 (15:42 +0100)
Although we are OK with rewriting idregs at finalize time, resetting
the guest's cpuif (GICv3) or redistributor (GICv3) addresses once
we start running the guest is a pretty bad idea.

Move back this initialisation to vgic creation time.

Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com>
Fixes: a258a383b9177 ("KVM: arm64: gic-v5: Sanitize ID_AA64PFR2_EL1.GCIE")
Link: https://patch.msgid.link/20260323174713.3183111-1-maz@kernel.org
Link: https://patch.msgid.link/20260401103611.357092-2-maz@kernel.org
Signed-off-by: Marc Zyngier <maz@kernel.org>
arch/arm64/kvm/vgic/vgic-init.c

index 47169604100f2f4f8e93311fc5ba12c8dda823dd..34460179fb8ae157e314a365976f28b4f9cc6c1b 100644 (file)
@@ -147,6 +147,15 @@ int kvm_vgic_create(struct kvm *kvm, u32 type)
        kvm->arch.vgic.implementation_rev = KVM_VGIC_IMP_REV_LATEST;
        kvm->arch.vgic.vgic_dist_base = VGIC_ADDR_UNDEF;
 
+       switch (type) {
+       case KVM_DEV_TYPE_ARM_VGIC_V2:
+               kvm->arch.vgic.vgic_cpu_base = VGIC_ADDR_UNDEF;
+               break;
+       case KVM_DEV_TYPE_ARM_VGIC_V3:
+               INIT_LIST_HEAD(&kvm->arch.vgic.rd_regions);
+               break;
+       }
+
        /*
         * We've now created the GIC. Update the system register state
         * to accurately reflect what we've created.
@@ -684,10 +693,8 @@ void kvm_vgic_finalize_idregs(struct kvm *kvm)
 
        switch (type) {
        case KVM_DEV_TYPE_ARM_VGIC_V2:
-               kvm->arch.vgic.vgic_cpu_base = VGIC_ADDR_UNDEF;
                break;
        case KVM_DEV_TYPE_ARM_VGIC_V3:
-               INIT_LIST_HEAD(&kvm->arch.vgic.rd_regions);
                aa64pfr0 |= SYS_FIELD_PREP_ENUM(ID_AA64PFR0_EL1, GIC, IMP);
                pfr1 |= SYS_FIELD_PREP_ENUM(ID_PFR1_EL1, GIC, GICv3);
                break;