MIPS: MIPS64R2: Fix buggy __arch_swab64

The way the code is written it was assuming dshd has the function of a
hypothetical dshw instruction ...

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/include/asm/byteorder.h b/arch/mips/include/asm/byteorder.h
index 2988d29a0867f4c0ce187040e710e3c87344030d..33790b9e0cc0d46ee41f0ec8d3f3dbf181c8a9fc 100644 (file)
--- a/arch/mips/include/asm/byteorder.h
+++ b/arch/mips/include/asm/byteorder.h
@@ -50,9 +50,8 @@ static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
 static inline __attribute_const__ __u64 __arch_swab64(__u64 x)
 {
        __asm__(
-       "       dsbh    %0, %1                  \n"
-       "       dshd    %0, %0                  \n"
-       "       drotr   %0, %0, 32              \n"
+       "       dsbh    %0, %1\n"
+       "       dshd    %0, %0"
        : "=r" (x)
        : "r" (x));