drm/amd/pm: Disable MCLK switching with non-DC at 120 Hz+ (v2)

According to pp_pm_compute_clocks the non-DC display code
has "issues with mclk switching with refresh rates over 120 hz".
The workaround is to disable MCLK switching in this case.

Do the same for legacy DPM.

Fixes: 6ddbd37f1074 ("drm/amd/pm: optimize the amdgpu_pm_compute_clocks() implementations")
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm_internal.c b/drivers/gpu/drm/amd/pm/amdgpu_dpm_internal.c
index 42efe838fa85c5100728697b69fc2663faddc916..2d2d2d5e6763411e3f1c1880a3d1e40e5aa33368 100644 (file)
--- a/drivers/gpu/drm/amd/pm/amdgpu_dpm_internal.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm_internal.c
@@ -66,6 +66,13 @@ u32 amdgpu_dpm_get_vblank_time(struct amdgpu_device *adev)
                                        (amdgpu_crtc->v_border * 2));
 
                                vblank_time_us = vblank_in_pixels * 1000 / amdgpu_crtc->hw_mode.clock;
+
+                               /* we have issues with mclk switching with
+                                * refresh rates over 120 hz on the non-DC code.
+                                */
+                               if (drm_mode_vrefresh(&amdgpu_crtc->hw_mode) > 120)
+                                       vblank_time_us = 0;
+
                                break;
                        }
                }