Xilinx: ARM: net: Fix rate of MDC for 111MHz CPU_1x clk

Change the MDC divisor from 32 to 48

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>

diff --git a/board/xilinx/dfe/xgmac.c b/board/xilinx/dfe/xgmac.c
index e8453c4348b6859caf1539e07a5695c988723f23..9159aa517592e82ce02d303d39fa98d7bb53cc8a 100644 (file)
--- a/board/xilinx/dfe/xgmac.c
+++ b/board/xilinx/dfe/xgmac.c
@@ -215,7 +215,7 @@ int Xgmac_init(struct eth_device *dev, bd_t * bis)
        printf("Trying to set up GEM link...\n");
 
        /*************************** MAC Setup ***************************/
-       tmp = (2 << 18);        /* MDC clock division (32 for up to 80MHz) */
+       tmp = (3 << 18);        /* MDC clock division (48 for up to 120MHz) */
        tmp |= (1 << 17);       /* set for FCS removal */
        tmp |= (1 << 10);       /* enable gigabit */
        tmp |= (1 << 4);        /* copy all frames */