#define _ARC_BITS_ATOMIC_H 1
#define __HAVE_64B_ATOMICS 0
-#define USE_ATOMIC_COMPILER_BUILTINS 1
/* ARC does have legacy atomic EX reg, [mem] instruction but the micro-arch
is not as optimal as LLOCK/SCOND specially for SMP. */
#define ATOMIC_EXCHANGE_USES_CAS 1
-#define __arch_compare_and_exchange_bool_8_acq(mem, newval, oldval) \
- (abort (), 0)
-#define __arch_compare_and_exchange_bool_16_acq(mem, newval, oldval) \
- (abort (), 0)
-#define __arch_compare_and_exchange_bool_64_acq(mem, newval, oldval) \
- (abort (), 0)
-
-#define __arch_compare_and_exchange_val_8_int(mem, newval, oldval, model) \
- (abort (), (__typeof (*mem)) 0)
-#define __arch_compare_and_exchange_val_16_int(mem, newval, oldval, model) \
- (abort (), (__typeof (*mem)) 0)
-#define __arch_compare_and_exchange_val_64_int(mem, newval, oldval, model) \
- (abort (), (__typeof (*mem)) 0)
-
-#define __arch_compare_and_exchange_val_32_int(mem, newval, oldval, model) \
- ({ \
- typeof (*mem) __oldval = (oldval); \
- __atomic_compare_exchange_n (mem, (void *) &__oldval, newval, 0, \
- model, __ATOMIC_RELAXED); \
- __oldval; \
- })
-
-#define atomic_compare_and_exchange_val_acq(mem, new, old) \
- __atomic_val_bysize (__arch_compare_and_exchange_val, int, \
- mem, new, old, __ATOMIC_ACQUIRE)
-
#define atomic_full_barrier() ({ asm volatile ("dmb 3":::"memory"); })
#endif /* _ARC_BITS_ATOMIC_H */