u32 msti = 0;
int state;
- if (port >= priv->cpu_port)
+ if (port >= priv->r->cpu_port)
return -EINVAL;
mutex_lock(&priv->reg_mutex);
pcs_node = of_parse_phandle(dn, "pcs-handle", 0);
phy_node = of_parse_phandle(dn, "phy-handle", 0);
- if (pn != priv->cpu_port && !phy_node && !pcs_node) {
+ if (pn != priv->r->cpu_port && !phy_node && !pcs_node) {
dev_err(priv->dev, "Port node %d has neither pcs-handle nor phy-handle\n", pn);
continue;
}
* }
*/
- for (int i = 0; i < priv->cpu_port; i++) {
+ for (int i = 0; i < priv->r->cpu_port; i++) {
if (!priv->ports[i].dp)
continue;
if (priv->ports[i].dp->user == dev)
link = priv->r->get_port_reg_le(priv->r->mac_link_sts);
link = priv->r->get_port_reg_le(priv->r->mac_link_sts);
- for (int port = 0; port < priv->cpu_port; port++)
+ for (int port = 0; port < priv->r->cpu_port; port++)
if (ports & BIT_ULL(port))
dsa_port_phylink_mac_change(ds, port, link & BIT_ULL(port));
case RTL8380_FAMILY_ID:
priv->ds->ops = &rtldsa_83xx_switch_ops;
priv->ds->phylink_mac_ops = &rtldsa_83xx_phylink_mac_ops;
- priv->cpu_port = RTL838X_CPU_PORT;
priv->port_mask = 0x1f;
priv->port_width = 1;
priv->fib_entries = 8192;
case RTL8390_FAMILY_ID:
priv->ds->ops = &rtldsa_83xx_switch_ops;
priv->ds->phylink_mac_ops = &rtldsa_83xx_phylink_mac_ops;
- priv->cpu_port = RTL839X_CPU_PORT;
priv->port_mask = 0x3f;
priv->port_width = 2;
priv->fib_entries = 16384;
case RTL9300_FAMILY_ID:
priv->ds->ops = &rtldsa_93xx_switch_ops;
priv->ds->phylink_mac_ops = &rtldsa_93xx_phylink_mac_ops;
- priv->cpu_port = RTL930X_CPU_PORT;
priv->port_mask = 0x1f;
priv->port_width = 1;
priv->fib_entries = 16384;
case RTL9310_FAMILY_ID:
priv->ds->ops = &rtldsa_93xx_switch_ops;
priv->ds->phylink_mac_ops = &rtldsa_93xx_phylink_mac_ops;
- priv->cpu_port = RTL931X_CPU_PORT;
priv->port_mask = 0x3f;
priv->port_width = 2;
priv->fib_entries = 16384;
priv->n_mst = 128;
break;
}
- priv->ds->num_ports = priv->cpu_port + 1;
- priv->irq_mask = GENMASK_ULL(priv->cpu_port - 1, 0);
+ priv->ds->num_ports = priv->r->cpu_port + 1;
+ priv->irq_mask = GENMASK_ULL(priv->r->cpu_port - 1, 0);
err = rtl83xx_mdio_probe(priv);
if (err) {
* dsa_switch_tree, the tree is built when the switch
* is registered by dsa_register_switch
*/
- for (int i = 0; i <= priv->cpu_port; i++)
+ for (int i = 0; i <= priv->r->cpu_port; i++)
priv->ports[i].dp = dsa_to_port(priv->ds, i);
/* Enable link and media change interrupts. Are the SERDES masks needed? */
msleep(1000);
/* Enable all ports with a PHY, including the SFP-ports */
- for (int i = 0; i < priv->cpu_port; i++) {
+ for (int i = 0; i < priv->r->cpu_port; i++) {
if (priv->ports[i].phy || priv->ports[i].pcs)
v |= BIT_ULL(i);
}
* egress VLAN(s) must therefore be a member of VLAN 0 to support
* CPU port as ingress when VLAN filtering is enabled.
*/
- for (int i = 0; i <= priv->cpu_port; i++) {
+ for (int i = 0; i <= priv->r->cpu_port; i++) {
rtldsa_vlan_set_pvid(priv, i, 0);
info.member_ports |= BIT_ULL(i);
}
priv->r->vlan_set_tagged(0, &info);
/* Set forwarding action based on inner VLAN tag */
- for (int i = 0; i < priv->cpu_port; i++)
+ for (int i = 0; i < priv->r->cpu_port; i++)
priv->r->vlan_fwd_on_inner(i, true);
}
static void rtldsa_setup_bpdu_traps(struct rtl838x_switch_priv *priv)
{
- for (int i = 0; i < priv->cpu_port; i++)
+ for (int i = 0; i < priv->r->cpu_port; i++)
priv->r->set_receive_management_action(i, BPDU, TRAP2CPU);
}
static void rtldsa_setup_lldp_traps(struct rtl838x_switch_priv *priv)
{
- for (int i = 0; i < priv->cpu_port; i++)
+ for (int i = 0; i < priv->r->cpu_port; i++)
priv->r->set_receive_management_action(i, LLDP, TRAP2CPU);
}
for (int i = 0; i < ds->num_ports; i++)
priv->ports[i].enable = false;
- priv->ports[priv->cpu_port].enable = true;
+ priv->ports[priv->r->cpu_port].enable = true;
/* Configure ports so they are disabled by default, but once enabled
* they will work in isolated mode (only traffic between port and CPU).
*/
- for (int i = 0; i < priv->cpu_port; i++) {
+ for (int i = 0; i < priv->r->cpu_port; i++) {
if (priv->ports[i].phy || priv->ports[i].pcs) {
- priv->ports[i].pm = BIT_ULL(priv->cpu_port);
+ priv->ports[i].pm = BIT_ULL(priv->r->cpu_port);
priv->r->traffic_set(i, BIT_ULL(i));
}
}
- priv->r->traffic_set(priv->cpu_port, BIT_ULL(priv->cpu_port));
+ priv->r->traffic_set(priv->r->cpu_port, BIT_ULL(priv->r->cpu_port));
/* For standalone ports, forward packets even if a static fdb
* entry for the source address exists on another port.
*/
if (priv->r->set_static_move_action) {
- for (int i = 0; i <= priv->cpu_port; i++)
+ for (int i = 0; i <= priv->r->cpu_port; i++)
priv->r->set_static_move_action(i, true);
}
priv->r->l2_learning_setup();
- rtldsa_port_set_salrn(priv, priv->cpu_port, false);
+ rtldsa_port_set_salrn(priv, priv->r->cpu_port, false);
ds->assisted_learning_on_cpu_port = true;
/* Make sure all frames sent to the switch's MAC are trapped to the CPU-port
/* Disable all ports except CPU port */
for (int i = 0; i < ds->num_ports; i++)
priv->ports[i].enable = false;
- priv->ports[priv->cpu_port].enable = true;
+ priv->ports[priv->r->cpu_port].enable = true;
/* Configure ports so they are disabled by default, but once enabled
* they will work in isolated mode (only traffic between port and CPU).
*/
- for (int i = 0; i < priv->cpu_port; i++) {
+ for (int i = 0; i < priv->r->cpu_port; i++) {
if (priv->ports[i].phy || priv->ports[i].pcs) {
- priv->ports[i].pm = BIT_ULL(priv->cpu_port);
+ priv->ports[i].pm = BIT_ULL(priv->r->cpu_port);
priv->r->traffic_set(i, BIT_ULL(i));
}
}
- priv->r->traffic_set(priv->cpu_port, BIT_ULL(priv->cpu_port));
+ priv->r->traffic_set(priv->r->cpu_port, BIT_ULL(priv->r->cpu_port));
priv->r->print_matrix();
/* TODO: Initialize statistics */
priv->r->l2_learning_setup();
- rtldsa_port_set_salrn(priv, priv->cpu_port, false);
+ rtldsa_port_set_salrn(priv, priv->r->cpu_port, false);
ds->assisted_learning_on_cpu_port = true;
rtldsa_enable_phy_polling(priv);
int port = dp->index;
/* Nothing to be done for the CPU-port */
- if (port == priv->cpu_port)
+ if (port == priv->r->cpu_port)
return;
/* Disable MAC completely */
struct rtl838x_switch_priv,
counters_work);
- for (int port = 0; port < priv->cpu_port; port++) {
+ for (int port = 0; port < priv->r->cpu_port; port++) {
if (!priv->ports[port].phy && !priv->ports[port].pcs)
continue;
{
struct rtldsa_counter_state *counters;
- for (int port = 0; port < priv->cpu_port; port++) {
+ for (int port = 0; port < priv->r->cpu_port; port++) {
if (!priv->ports[port].phy && !priv->ports[port].pcs)
continue;
if (stringset != ETH_SS_STATS)
return;
- if (port < 0 || port >= priv->cpu_port)
+ if (port < 0 || port >= priv->r->cpu_port)
return;
mib_desc = priv->r->mib_desc;
const struct rtldsa_mib_desc *mib_desc;
const struct rtldsa_mib_item *mib_item;
- if (port < 0 || port >= priv->cpu_port)
+ if (port < 0 || port >= priv->r->cpu_port)
return;
mib_desc = priv->r->mib_desc;
if (sset != ETH_SS_STATS)
return 0;
- if (port < 0 || port >= priv->cpu_port)
+ if (port < 0 || port >= priv->r->cpu_port)
return 0;
return priv->r->mib_desc->list_count;
struct rtl838x_switch_priv *priv = ds->priv;
struct rtldsa_counter_state *counters = &priv->ports[port].counters;
- if (port < 0 || port >= priv->cpu_port)
+ if (port < 0 || port >= priv->r->cpu_port)
return;
rtldsa_counters_lock(priv, port);
struct rtl838x_switch_priv *priv = ds->priv;
struct rtldsa_counter_state *counters = &priv->ports[port].counters;
- if (port < 0 || port >= priv->cpu_port)
+ if (port < 0 || port >= priv->r->cpu_port)
return;
rtldsa_counters_lock(priv, port);
struct rtl838x_switch_priv *priv = ds->priv;
struct rtldsa_counter_state *counters = &priv->ports[port].counters;
- if (port < 0 || port >= priv->cpu_port)
+ if (port < 0 || port >= priv->r->cpu_port)
return;
rtldsa_counters_lock(priv, port);
const struct rtldsa_mib_desc *mib_desc;
struct rtldsa_counter_state *counters = &priv->ports[port].counters;
- if (port < 0 || port >= priv->cpu_port)
+ if (port < 0 || port >= priv->r->cpu_port)
return;
mib_desc = priv->r->mib_desc;
struct rtl838x_switch_priv *priv = ds->priv;
struct rtldsa_counter_state *counters = &priv->ports[port].counters;
- if (port < 0 || port >= priv->cpu_port)
+ if (port < 0 || port >= priv->r->cpu_port)
return;
if (priv->r->stat_update_counters_atomically)
struct rtl838x_switch_priv *priv = ds->priv;
struct rtldsa_counter_state *counters = &priv->ports[port].counters;
- if (port < 0 || port >= priv->cpu_port)
+ if (port < 0 || port >= priv->r->cpu_port)
return;
rtldsa_counters_lock(priv, port);
return 0;
/* add port to switch mask of CPU_PORT */
- priv->r->traffic_enable(priv->cpu_port, port);
+ priv->r->traffic_enable(priv->r->cpu_port, port);
/* add all other ports in the same bridge to switch mask of port */
priv->r->traffic_set(port, priv->ports[port].pm);
/* BUG: This does not work on RTL931X */
/* remove port from switch mask of CPU_PORT */
- priv->r->traffic_disable(priv->cpu_port, port);
+ priv->r->traffic_disable(priv->r->cpu_port, port);
/* remove all other ports from switch mask of port */
priv->r->traffic_set(port, 0);
int n = priv->port_width << 1;
/* Ports above or equal CPU port can never be configured */
- if (port >= priv->cpu_port)
+ if (port >= priv->r->cpu_port)
return;
/* For the RTL839x and following, the bits are left-aligned, 838x and 930x
* 2: Trap packet to CPU port
* The Egress filter used 1 bit per state (0: DISABLED, 1: ENABLED)
*/
- if (port != priv->cpu_port) {
+ if (port != priv->r->cpu_port) {
priv->r->set_vlan_igr_filter(port, IGR_DROP);
priv->r->set_vlan_egr_filter(port, EGR_ENABLE);
} else {
} else {
/* Disable ingress and egress filtering */
- if (port != priv->cpu_port)
+ if (port != priv->r->cpu_port)
priv->r->set_vlan_igr_filter(port, IGR_FORWARD);
priv->r->set_vlan_egr_filter(port, EGR_DISABLE);
* of now no such logic is in place. So for the CPU port keep the fixed
* PVID=0 from initial setup in place and ignore all subsequent settings.
*/
- if (port != priv->cpu_port) {
+ if (port != priv->r->cpu_port) {
if (vlan->flags & BRIDGE_VLAN_INFO_PVID)
rtldsa_vlan_set_pvid(priv, port, vlan->vid);
else if (priv->ports[port].pvid == vlan->vid)
mutex_lock(&priv->reg_mutex);
- if (port >= priv->cpu_port) {
+ if (port >= priv->r->cpu_port) {
err = -EINVAL;
goto out;
}
goto out;
}
- if (port >= priv->cpu_port) {
+ if (port >= priv->r->cpu_port) {
err = -EINVAL;
goto out;
}