arm64: dts: s32g2: Add the Software Timer Watchdog (SWT) nodes

Referred in the documentation as the Software Timer Watchdog (SWT),
the s32g2 has 7 watchdogs. The number of watchdogs is designed to
allow dedicating one watchdog per Cortex-M7/A53 present on the SoC.

Add the SWT nodes in the device tree.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
index 3bca469e75f7d70ef9889704007747872247bdaa..3ff3b2ff09beb60843e7e113a2ab747eb66f5cdc 100644 (file)
--- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
@@ -325,6 +325,38 @@
                        };
                };
 
+               swt0: watchdog@40100000 {
+                       compatible = "nxp,s32g2-swt";
+                       reg = <0x40100000 0x1000>;
+                       clocks = <&clks 0x3a>, <&clks 0x3b>, <&clks 0x3b>;
+                       clock-names = "counter", "module", "register";
+                       status = "disabled";
+               };
+
+               swt1: watchdog@40104000 {
+                       compatible = "nxp,s32g2-swt";
+                       reg = <0x40104000 0x1000>;
+                       clocks = <&clks 0x3a>, <&clks 0x3b>, <&clks 0x3b>;
+                       clock-names = "counter", "module", "register";
+                       status = "disabled";
+               };
+
+               swt2: watchdog@40108000 {
+                       compatible = "nxp,s32g2-swt";
+                       reg = <0x40108000 0x1000>;
+                       clocks = <&clks 0x3a>, <&clks 0x3b>, <&clks 0x3b>;
+                       clock-names = "counter", "module", "register";
+                       status = "disabled";
+               };
+
+               swt3: watchdog@4010c000 {
+                       compatible = "nxp,s32g2-swt";
+                       reg = <0x4010c000 0x1000>;
+                       clocks = <&clks 0x3a>, <&clks 0x3b>, <&clks 0x3b>;
+                       clock-names = "counter", "module", "register";
+                       status = "disabled";
+               };
+
                stm0: timer@4011c000 {
                        compatible = "nxp,s32g2-stm";
                        reg = <0x4011c000 0x3000>;
@@ -515,6 +547,30 @@
                        status = "disabled";
                };
 
+               swt4: watchdog@40200000 {
+                       compatible = "nxp,s32g2-swt";
+                       reg = <0x40200000 0x1000>;
+                       clocks = <&clks 0x3a>, <&clks 0x3b>, <&clks 0x3b>;
+                       clock-names = "counter", "module", "register";
+                       status = "disabled";
+               };
+
+               swt5: watchdog@40204000 {
+                       compatible = "nxp,s32g2-swt";
+                       reg = <0x40204000 0x1000>;
+                       clocks = <&clks 0x3a>, <&clks 0x3b>, <&clks 0x3b>;
+                       clock-names = "counter", "module", "register";
+                       status = "disabled";
+               };
+
+               swt6: watchdog@40208000 {
+                       compatible = "nxp,s32g2-swt";
+                       reg = <0x40208000 0x1000>;
+                       clocks = <&clks 0x3a>, <&clks 0x3b>, <&clks 0x3b>;
+                       clock-names = "counter", "module", "register";
+                       status = "disabled";
+               };
+
                stm4: timer@4021c000 {
                        compatible = "nxp,s32g2-stm";
                        reg = <0x4021c000 0x3000>;