arm64: dts: qcom: lemans: add GDSP fastrpc-compute-cb nodes

Add GDSP0 and GDSP1 fastrpc compute-cb nodes for lemans SoC.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Ling Xu <quic_lxu5@quicinc.com>
Reviewed-by: Ekansh Gupta <ekansh.gupta@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250813030638.1075-3-quic_lxu5@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
index 99a566b42ef28eb7dda2c4284422203d84031d28..f5ec60086d600a62c7b0ef5599d1dcbd62d29bf1 100644 (file)
--- a/arch/arm64/boot/dts/qcom/lemans.dtsi
+++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
@@ -6105,6 +6105,35 @@
 
                                label = "gpdsp0";
                                qcom,remote-pid = <17>;
+
+                               fastrpc {
+                                       compatible = "qcom,fastrpc";
+                                       qcom,glink-channels = "fastrpcglink-apps-dsp";
+                                       label = "gdsp0";
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       compute-cb@1 {
+                                               compatible = "qcom,fastrpc-compute-cb";
+                                               reg = <1>;
+                                               iommus = <&apps_smmu 0x38a1 0x0>;
+                                               dma-coherent;
+                                       };
+
+                                       compute-cb@2 {
+                                               compatible = "qcom,fastrpc-compute-cb";
+                                               reg = <2>;
+                                               iommus = <&apps_smmu 0x38a2 0x0>;
+                                               dma-coherent;
+                                       };
+
+                                       compute-cb@3 {
+                                               compatible = "qcom,fastrpc-compute-cb";
+                                               reg = <3>;
+                                               iommus = <&apps_smmu 0x38a3 0x0>;
+                                               dma-coherent;
+                                       };
+                               };
                        };
                };
 
@@ -6148,6 +6177,35 @@
 
                                label = "gpdsp1";
                                qcom,remote-pid = <18>;
+
+                               fastrpc {
+                                       compatible = "qcom,fastrpc";
+                                       qcom,glink-channels = "fastrpcglink-apps-dsp";
+                                       label = "gdsp1";
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       compute-cb@1 {
+                                               compatible = "qcom,fastrpc-compute-cb";
+                                               reg = <1>;
+                                               iommus = <&apps_smmu 0x38c1 0x0>;
+                                               dma-coherent;
+                                       };
+
+                                       compute-cb@2 {
+                                               compatible = "qcom,fastrpc-compute-cb";
+                                               reg = <2>;
+                                               iommus = <&apps_smmu 0x38c2 0x0>;
+                                               dma-coherent;
+                                       };
+
+                                       compute-cb@3 {
+                                               compatible = "qcom,fastrpc-compute-cb";
+                                               reg = <3>;
+                                               iommus = <&apps_smmu 0x38c3 0x0>;
+                                               dma-coherent;
+                                       };
+                               };
                        };
                };