arm64: dts: qcom: sa8775p: add link_down reset for pcie

SA8775p supports 'link_down' reset on hardware, so add it for both pcie0
and pcie1, which can provide a better user experience.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250725102231.3608298-4-ziyue.zhang@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qcom/lemans.dtsi
index 4ccaddb7794c1e3ba5e243ecacbfb95e7b1d8b9c..9b7fa4c932e3d40dcb787821fd59528be3a3546f 100644 (file)
--- a/arch/arm64/boot/dts/qcom/lemans.dtsi
+++ b/arch/arm64/boot/dts/qcom/lemans.dtsi
@@ -7647,8 +7647,11 @@
                iommu-map = <0x0 &pcie_smmu 0x0000 0x1>,
                            <0x100 &pcie_smmu 0x0001 0x1>;
 
-               resets = <&gcc GCC_PCIE_0_BCR>;
-               reset-names = "pci";
+               resets = <&gcc GCC_PCIE_0_BCR>,
+                        <&gcc GCC_PCIE_0_LINK_DOWN_BCR>;
+               reset-names = "pci",
+                             "link_down";
+
                power-domains = <&gcc PCIE_0_GDSC>;
 
                phys = <&pcie0_phy>;
@@ -7815,8 +7818,11 @@
                iommu-map = <0x0 &pcie_smmu 0x0080 0x1>,
                            <0x100 &pcie_smmu 0x0081 0x1>;
 
-               resets = <&gcc GCC_PCIE_1_BCR>;
-               reset-names = "pci";
+               resets = <&gcc GCC_PCIE_1_BCR>,
+                        <&gcc GCC_PCIE_1_LINK_DOWN_BCR>;
+               reset-names = "pci",
+                             "link_down";
+
                power-domains = <&gcc PCIE_1_GDSC>;
 
                phys = <&pcie1_phy>;