+2008-12-19 Richard Earnshaw <rearnsha@arm.com>
+
+ PR bootstrap/38578
+ * arm.c (load_multiple_sequence): Initialize ORDER array.
+ (store_multiple_sequence): Likewise.
+ (output_move_double): Make reg0 unsigned.
+ (arm_output_epilogue): Make amount unsigned.
+ (arm_expand_prologue): Move declaration of dwarf before block
+ statements.
+
2008-12-19 Steve Ellcey <sje@cup.hp.com>
* df-scan.c ( df_hard_reg_init): Move declaration of i.
though could be easily extended if required. */
gcc_assert (nops >= 2 && nops <= 4);
+ memset (order, 0, 4 * sizeof (int));
+
/* Loop over the operands and check that the memory references are
suitable (i.e. immediate offsets from the same base register). At
the same time, extract the target register, and the memory
extended if required. */
gcc_assert (nops >= 2 && nops <= 4);
+ memset (order, 0, 4 * sizeof (int));
+
/* Loop over the operands and check that the memory references are
suitable (i.e. immediate offsets from the same base register). At
the same time, extract the target register, and the memory
if (code0 == REG)
{
- int reg0 = REGNO (operands[0]);
+ unsigned int reg0 = REGNO (operands[0]);
otherops[0] = gen_rtx_REG (SImode, 1 + reg0);
(where frame pointer is required to point at first register)
and ARM-non-apcs-frame. Therefore, such change is postponed
until real need arise. */
- HOST_WIDE_INT amount;
+ unsigned HOST_WIDE_INT amount;
int rfe;
/* Restore stack pointer if necessary. */
if (TARGET_ARM && frame_pointer_needed)
insn = emit_set_insn (gen_rtx_REG (SImode, 3), ip_rtx);
else if (args_to_push == 0)
{
+ rtx dwarf;
+
gcc_assert(arm_compute_static_chain_stack_bytes() == 4);
saved_regs += 4;
- rtx dwarf;
-
insn = gen_rtx_PRE_DEC (SImode, stack_pointer_rtx);
insn = emit_set_insn (gen_frame_mem (SImode, insn), ip_rtx);
fp_offset = 4;