arm64: dts: ti: k3-am62a-phycore-som: Add 1.4GHz opp entry

The phyCORE-AM62Ax is capable of supplying 0v85 to the VDD_CORE
which allows the Cortex-A53s to operate at 1.4GHz according to chapter
7.5 of the SoC's data sheet[0]. Append the 1.4Ghz entry to the OPP table
to enable this OPP

[0] https://www.ti.com/lit/ds/symlink/am62a3.pdf

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20250805090021.1407753-2-w.egorov@phytec.de
Signed-off-by: Nishanth Menon <nm@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi
index 5dc5d2cb20ccdd85d82a5067959f5ea83efcd96e..207ca00630d1813e070f07851d6ef737c2bb410a 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi
@@ -200,6 +200,15 @@
        };
 };
 
+&a53_opp_table {
+       /* Requires VDD_CORE at 0v85 */
+       opp-1400000000 {
+               opp-hz = /bits/ 64 <1400000000>;
+               opp-supported-hw = <0x01 0x0004>;
+               clock-latency-ns = <6000000>;
+       };
+};
+
 &c7x_0 {
        mboxes = <&mailbox0_cluster1 &mbox_c7x_0>;
        memory-region = <&c7x_0_dma_memory_region>,