mach-k3: map all banks using mem_map_from_dram_banks

The static memory map for K3 (k3_mem_map) only maps the first DRAM bank
and therefore doesn't scale for platforms with multiple memory banks.

This patch modifies enable_caches to add mem_map_from_dram_banks which
appends all the memory banks to k3_mem_map before calling mmu_setup.

Signed-off-by: Anshul Dalal <anshuld@ti.com>
Tested-by: Wadim Egorov <w.egorov@phytec.de>

diff --git a/arch/arm/mach-k3/arm64/arm64-mmu.c b/arch/arm/mach-k3/arm64/arm64-mmu.c
index 79650a7e346947b3664b544e15f0b141b67a6928..479451452a2148f8bf1f15cdb36e8b2df90ae47f 100644 (file)
--- a/arch/arm/mach-k3/arm64/arm64-mmu.c
+++ b/arch/arm/mach-k3/arm64/arm64-mmu.c
@@ -12,8 +12,9 @@
 #include <asm/system.h>
 #include <asm/armv8/mmu.h>
 #include <linux/sizes.h>
+#include <mach/k3-ddr.h>
 
-struct mm_region k3_mem_map[] = {
+struct mm_region k3_mem_map[K3_MEM_MAP_LEN] = {
        { /* SoC Peripherals */
                .virt = 0x0UL,
                .phys = 0x0UL,
@@ -28,7 +29,7 @@ struct mm_region k3_mem_map[] = {
                .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
                         PTE_BLOCK_NON_SHARE |
                         PTE_BLOCK_PXN | PTE_BLOCK_UXN
-       }, { /* First DRAM Bank of size 2G */
+       }, [K3_MEM_MAP_FIRST_BANK_IDX] = { /* First DRAM Bank of size 2G */
                .virt = CFG_SYS_SDRAM_BASE,
                .phys = CFG_SYS_SDRAM_BASE,
                .size = SZ_2G,

diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index ea287ba12263a33d9d82f5338d8e9b08ca542599..30ad98a68a24af3c8177f86d7878bee4e5dabd45 100644 (file)
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -31,6 +31,7 @@
 #include <dm/uclass-internal.h>
 #include <dm/device-internal.h>
 #include <asm/armv8/mmu.h>
+#include <mach/k3-ddr.h>
 
 #define PROC_BOOT_CTRL_FLAG_R5_CORE_HALT       0x00000001
 #define PROC_BOOT_STATUS_FLAG_R5_WFI           0x00000002
@@ -262,6 +263,14 @@ void board_prep_linux(struct bootm_headers *images)
 
 void enable_caches(void)
 {
+       int ret;
+
+       ret = mem_map_from_dram_banks(K3_MEM_MAP_FIRST_BANK_IDX, K3_MEM_MAP_LEN,
+                                    PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+                                            PTE_BLOCK_INNER_SHARE);
+       if (ret)
+               debug("%s: Failed to setup dram banks\n", __func__);
+
        mmu_setup();
 
        icache_enable();

diff --git a/arch/arm/mach-k3/include/mach/k3-ddr.h b/arch/arm/mach-k3/include/mach/k3-ddr.h
index 39e6725bb9bcd7e733ceda655c1c894ab65712b4..207e60b2763b02842e333d57520ff6dd88504ef0 100644 (file)
--- a/arch/arm/mach-k3/include/mach/k3-ddr.h
+++ b/arch/arm/mach-k3/include/mach/k3-ddr.h
@@ -8,6 +8,12 @@
 
 #include <spl.h>
 
+/* We need 3 extra entries for:
+ *   SoC peripherals, flash and the sentinel value.
+ */
+#define K3_MEM_MAP_LEN                 ((CONFIG_NR_DRAM_BANKS) + 3)
+#define K3_MEM_MAP_FIRST_BANK_IDX      2
+
 int dram_init(void);
 int dram_init_banksize(void);