Import d10v fixes from trunk.

diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog
index 6d8993ab4c25625af2aaeb7ed1f478ad1505a417..9559c793473c1c2bddd077f921086e60610a73b5 100644 (file)
--- a/sim/d10v/ChangeLog
+++ b/sim/d10v/ChangeLog
@@ -1,8 +1,36 @@
+Tue Apr 18 16:26:41 2000  Andrew Cagney  <cagney@b1.cygnus.com>
+
+       * interp.c (sim_resume): Deliver SIGILL.
+       (lookup_hash): Do not print SIGILL message.
+
 Tue Feb 22 18:24:56 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 
        * Makefile.in (SIM_EXTRA_CFLAGS): Define SIM_HAVE_ENVIRONMENT.
        * interp.c (sim_set_trace): Replace sim_trace.  Enable tracing.
 
+Tue Feb  8 17:41:12 2000  Andrew Cagney  <cagney@b1.cygnus.com>
+
+       * d10v_sim.h (SIG_D10V_BUS): Define.
+
+       * simops.c (address_exception): Delete function.
+       (OP_30000000, OP_6401, OP_6001, OP_6000, OP_32010000, OP_31000000,
+       OP_6601, OP_6201, OP_6200, OP_33010000, OP_34000000, OP_6800,
+       OP_6C1F, OP_6801, OP_6C01, OP_36010000, OP_35000000, OP_6A00,
+       OP_6E1F, OP_6A01, OP_6E01, OP_37010000): Replace call to
+       address_exception with code that sets SIG_D10V_BUS.
+
+       * interp.c (sim_resume): When SIGBUS or SIGSEGV, deliver a bus
+       error to the simulator before resuming execution.
+       (sim_trace): Check stop reason and use that to determine sim_trace
+       return value.
+       (sim_stop_reason): For SIG_D10V_BUS return a SIGBUS / SIGSEGV
+       sigrc.
+
+Tue Jan 18 16:07:42 MST 2000   Diego Novillo <dnovillo@cygnus.com>
+
+       * interp.c (sim_create_inferior): Change internal initial value for
+       DMAP2 to 0x2000.
+
 Mon Jan  3 02:06:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 
        * interp.c (lookup_hash): Stop the update of the PC when there was

diff --git a/sim/d10v/interp.c b/sim/d10v/interp.c
index 91ebee56ce99ed93cddd8b950d339299a686697c..f56df31c298be0bab775cd9008c04e8147c89517 100644 (file)
--- a/sim/d10v/interp.c
+++ b/sim/d10v/interp.c
@@ -99,8 +99,6 @@ lookup_hash (ins, size)
     {
       if (h->next == NULL)
        {
-         (*d10v_callback->printf_filtered)
-           (d10v_callback, "ERROR: Illegal instruction %x at PC %x\n", ins, PC);
          State.exception = SIGILL;
          State.pc_changed = 1; /* Don't increment the PC. */
          return NULL;
@@ -979,6 +977,13 @@ sim_resume (sd, step, siggnal)
       JMP (AE_VECTOR_START);
       SLOT_FLUSH ();
       break;
+    case SIGILL:
+      SET_BPC (PC);
+      SET_BPSW (PSW);
+      SET_HW_PSW ((PSW & (PSW_F0_BIT | PSW_F1_BIT | PSW_C_BIT)));
+      JMP (RIE_VECTOR_START);
+      SLOT_FLUSH ();
+      break;
     default:
       /* just ignore it */
       break;
@@ -1247,7 +1252,8 @@ sim_create_inferior (sd, abfd, argv, env)
       set_imap_register (1, 0x1000);
       set_dmap_register (0, 0x2000);
       set_dmap_register (1, 0x2000);
-      set_dmap_register (2, 0x0000); /* Old DMAP, Value is not 0x2000 */
+      set_dmap_register (2, 0x2000); /* DMAP2 initial internal value is
+                                       0x2000 on the new board. */
       set_dmap_register (3, 0x0000);
     }