XlnxVersalCRL *s = XLNX_VERSAL_CRL(obj);
XlnxVersalCRLBase *xvcb = XLNX_VERSAL_CRL_BASE(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+ RegisterInfoArray *reg_array;
int i;
- xvcb->reg_array =
- register_init_block32(DEVICE(obj), crl_regs_info,
- ARRAY_SIZE(crl_regs_info),
- s->regs_info, s->regs,
- &crl_ops,
- XLNX_VERSAL_CRL_ERR_DEBUG,
- CRL_R_MAX * 4);
+ reg_array = register_init_block32(DEVICE(obj), crl_regs_info,
+ ARRAY_SIZE(crl_regs_info),
+ s->regs_info, s->regs,
+ &crl_ops,
+ XLNX_VERSAL_CRL_ERR_DEBUG,
+ CRL_R_MAX * 4);
xvcb->regs = s->regs;
- sysbus_init_mmio(sbd, &xvcb->reg_array->mem);
+ sysbus_init_mmio(sbd, ®_array->mem);
sysbus_init_irq(sbd, &s->irq);
for (i = 0; i < ARRAY_SIZE(s->cfg.rpu); ++i) {
XlnxVersal2CRL *s = XLNX_VERSAL2_CRL(obj);
XlnxVersalCRLBase *xvcb = XLNX_VERSAL_CRL_BASE(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+ RegisterInfoArray *reg_array;
size_t i;
- xvcb->reg_array = register_init_block32(DEVICE(obj), versal2_crl_regs_info,
- ARRAY_SIZE(versal2_crl_regs_info),
- s->regs_info, s->regs,
- &crl_ops,
- XLNX_VERSAL_CRL_ERR_DEBUG,
- VERSAL2_CRL_R_MAX * 4);
+ reg_array = register_init_block32(DEVICE(obj), versal2_crl_regs_info,
+ ARRAY_SIZE(versal2_crl_regs_info),
+ s->regs_info, s->regs,
+ &crl_ops,
+ XLNX_VERSAL_CRL_ERR_DEBUG,
+ VERSAL2_CRL_R_MAX * 4);
xvcb->regs = s->regs;
- sysbus_init_mmio(sbd, &xvcb->reg_array->mem);
+ sysbus_init_mmio(sbd, ®_array->mem);
for (i = 0; i < ARRAY_SIZE(s->cfg.rpu); ++i) {
object_property_add_link(obj, "rpu[*]", TYPE_ARM_CPU,
}
}
-static void crl_finalize(Object *obj)
-{
- XlnxVersalCRLBase *s = XLNX_VERSAL_CRL_BASE(obj);
- register_finalize_block(s->reg_array);
-}
-
static const VMStateDescription vmstate_versal_crl = {
.name = TYPE_XLNX_VERSAL_CRL,
.version_id = 1,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(XlnxVersalCRLBase),
.class_size = sizeof(XlnxVersalCRLBaseClass),
- .instance_finalize = crl_finalize,
.abstract = true,
};
{
XlnxVersalTRng *s = XLNX_VERSAL_TRNG(obj);
- register_finalize_block(s->reg_array);
g_rand_free(s->prng);
s->prng = NULL;
}
{
XlnxXramCtrl *s = XLNX_XRAM_CTRL(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+ RegisterInfoArray *reg_array;
- s->reg_array =
+ reg_array =
register_init_block32(DEVICE(obj), xram_ctrl_regs_info,
ARRAY_SIZE(xram_ctrl_regs_info),
s->regs_info, s->regs,
&xram_ctrl_ops,
XLNX_XRAM_CTRL_ERR_DEBUG,
XRAM_CTRL_R_MAX * 4);
- sysbus_init_mmio(sbd, &s->reg_array->mem);
+ sysbus_init_mmio(sbd, ®_array->mem);
sysbus_init_irq(sbd, &s->irq);
}
-static void xram_ctrl_finalize(Object *obj)
-{
- XlnxXramCtrl *s = XLNX_XRAM_CTRL(obj);
- register_finalize_block(s->reg_array);
-}
-
static const VMStateDescription vmstate_xram_ctrl = {
.name = TYPE_XLNX_XRAM_CTRL,
.version_id = 1,
.instance_size = sizeof(XlnxXramCtrl),
.class_init = xram_ctrl_class_init,
.instance_init = xram_ctrl_init,
- .instance_finalize = xram_ctrl_finalize,
};
static void xram_ctrl_register_types(void)
static void zynqmp_apu_init(Object *obj)
{
XlnxZynqMPAPUCtrl *s = XLNX_ZYNQMP_APU_CTRL(obj);
+ RegisterInfoArray *reg_array;
int i;
- s->reg_array =
+ reg_array =
register_init_block32(DEVICE(obj), zynqmp_apu_regs_info,
ARRAY_SIZE(zynqmp_apu_regs_info),
s->regs_info, s->regs,
&zynqmp_apu_ops,
XILINX_ZYNQMP_APU_ERR_DEBUG,
APU_R_MAX * 4);
- sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->reg_array->mem);
+ sysbus_init_mmio(SYS_BUS_DEVICE(obj), ®_array->mem);
sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq_imr);
for (i = 0; i < APU_MAX_CPU; ++i) {
qdev_init_gpio_in_named(DEVICE(obj), zynqmp_apu_handle_wfi, "wfi_in", 4);
}
-static void zynqmp_apu_finalize(Object *obj)
-{
- XlnxZynqMPAPUCtrl *s = XLNX_ZYNQMP_APU_CTRL(obj);
- register_finalize_block(s->reg_array);
-}
-
static const VMStateDescription vmstate_zynqmp_apu = {
.name = TYPE_XLNX_ZYNQMP_APU_CTRL,
.version_id = 1,
.instance_size = sizeof(XlnxZynqMPAPUCtrl),
.class_init = zynqmp_apu_class_init,
.instance_init = zynqmp_apu_init,
- .instance_finalize = zynqmp_apu_finalize,
};
static void zynqmp_apu_register_types(void)
{
XlnxZynqMPCRF *s = XLNX_ZYNQMP_CRF(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+ RegisterInfoArray *reg_array;
- s->reg_array =
+ reg_array =
register_init_block32(DEVICE(obj), crf_regs_info,
ARRAY_SIZE(crf_regs_info),
s->regs_info, s->regs,
&crf_ops,
XLNX_ZYNQMP_CRF_ERR_DEBUG,
CRF_R_MAX * 4);
- sysbus_init_mmio(sbd, &s->reg_array->mem);
+ sysbus_init_mmio(sbd, ®_array->mem);
sysbus_init_irq(sbd, &s->irq_ir);
}
-static void crf_finalize(Object *obj)
-{
- XlnxZynqMPCRF *s = XLNX_ZYNQMP_CRF(obj);
- register_finalize_block(s->reg_array);
-}
-
static const VMStateDescription vmstate_crf = {
.name = TYPE_XLNX_ZYNQMP_CRF,
.version_id = 1,
.instance_size = sizeof(XlnxZynqMPCRF),
.class_init = crf_class_init,
.instance_init = crf_init,
- .instance_finalize = crf_finalize,
};
static void crf_register_types(void)
{
XlnxBBRam *s = XLNX_BBRAM(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+ RegisterInfoArray *reg_array;
- s->reg_array =
+ reg_array =
register_init_block32(DEVICE(obj), bbram_ctrl_regs_info,
ARRAY_SIZE(bbram_ctrl_regs_info),
s->regs_info, s->regs,
XLNX_BBRAM_ERR_DEBUG,
R_MAX * 4);
- sysbus_init_mmio(sbd, &s->reg_array->mem);
+ sysbus_init_mmio(sbd, ®_array->mem);
sysbus_init_irq(sbd, &s->irq_bbram);
}
-static void bbram_ctrl_finalize(Object *obj)
-{
- XlnxBBRam *s = XLNX_BBRAM(obj);
-
- register_finalize_block(s->reg_array);
-}
-
static void bbram_prop_set_drive(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
.instance_size = sizeof(XlnxBBRam),
.class_init = bbram_ctrl_class_init,
.instance_init = bbram_ctrl_init,
- .instance_finalize = bbram_ctrl_finalize,
};
static void bbram_ctrl_register_types(void)
{
XlnxVersalEFuseCtrl *s = XLNX_VERSAL_EFUSE_CTRL(obj);
- register_finalize_block(s->reg_array);
g_free(s->extra_pg0_lock_spec);
}
sysbus_init_irq(sbd, &s->irq);
}
-static void zynqmp_efuse_finalize(Object *obj)
-{
- XlnxZynqMPEFuse *s = XLNX_ZYNQMP_EFUSE(obj);
-
- register_finalize_block(s->reg_array);
-}
-
static const VMStateDescription vmstate_efuse = {
.name = TYPE_XLNX_ZYNQMP_EFUSE,
.version_id = 1,
.instance_size = sizeof(XlnxZynqMPEFuse),
.class_init = zynqmp_efuse_class_init,
.instance_init = zynqmp_efuse_init,
- .instance_finalize = zynqmp_efuse_finalize,
};
static void efuse_register_types(void)
struct XlnxVersalCRLBase {
SysBusDevice parent_obj;
- RegisterInfoArray *reg_array;
uint32_t *regs;
};
unsigned int encoded_size;
} cfg;
- RegisterInfoArray *reg_array;
uint32_t regs[XRAM_CTRL_R_MAX];
RegisterInfo regs_info[XRAM_CTRL_R_MAX];
} XlnxXramCtrl;
uint8_t cpu_pwrdwn_req;
uint8_t cpu_in_wfi;
- RegisterInfoArray *reg_array;
uint32_t regs[APU_R_MAX];
RegisterInfo regs_info[APU_R_MAX];
};
MemoryRegion iomem;
qemu_irq irq_ir;
- RegisterInfoArray *reg_array;
uint32_t regs[CRF_R_MAX];
RegisterInfo regs_info[CRF_R_MAX];
};
bool bbram8_wo;
bool blk_ro;
- RegisterInfoArray *reg_array;
uint32_t regs[RMAX_XLNX_BBRAM];
RegisterInfo regs_info[RMAX_XLNX_BBRAM];
};