5.11-stable patches

added patches:
	arm64-unconditionally-set-virtual-cpu-id-registers.patch

diff --git a/queue-5.11/arm64-unconditionally-set-virtual-cpu-id-registers.patch b/queue-5.11/arm64-unconditionally-set-virtual-cpu-id-registers.patch
new file mode 100644 (file)
index 0000000..bee33d5
--- /dev/null
+++ b/queue-5.11/arm64-unconditionally-set-virtual-cpu-id-registers.patch
@@ -0,0 +1,51 @@
+From vladimir.murzin@arm.com  Fri Mar 19 10:43:20 2021
+From: Vladimir Murzin <vladimir.murzin@arm.com>
+Date: Tue, 16 Mar 2021 13:43:19 +0000
+Subject: arm64: Unconditionally set virtual cpu id registers
+To: linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org
+Cc: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, dbrazdil@google.com
+Message-ID: <20210316134319.89472-1-vladimir.murzin@arm.com>
+
+From: Vladimir Murzin <vladimir.murzin@arm.com>
+
+Commit 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro")
+reorganized el2 setup in such way that virtual cpu id registers set
+only in nVHE, yet they used (and need) to be set irrespective VHE
+support.
+
+Fixes: 78869f0f0552 ("arm64: Extract parts of el2_setup into a macro")
+Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
+Acked-by: Will Deacon <will@kernel.org>
+Reviewed-by: Marc Zyngier <maz@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/arm64/include/asm/el2_setup.h |    4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/arm64/include/asm/el2_setup.h
++++ b/arch/arm64/include/asm/el2_setup.h
+@@ -111,7 +111,7 @@
+ .endm
+ 
+ /* Virtual CPU ID registers */
+-.macro __init_el2_nvhe_idregs
++.macro __init_el2_idregs
+       mrs     x0, midr_el1
+       mrs     x1, mpidr_el1
+       msr     vpidr_el2, x0
+@@ -163,6 +163,7 @@
+       __init_el2_stage2
+       __init_el2_gicv3
+       __init_el2_hstr
++      __init_el2_idregs
+ 
+       /*
+        * When VHE is not in use, early init of EL2 needs to be done here.
+@@ -171,7 +172,6 @@
+        * will be done via the _EL1 system register aliases in __cpu_setup.
+        */
+ .ifeqs "\mode", "nvhe"
+-      __init_el2_nvhe_idregs
+       __init_el2_nvhe_cptr
+       __init_el2_nvhe_sve
+       __init_el2_nvhe_prepare_eret

diff --git a/queue-5.11/series b/queue-5.11/series
index 9ba0169196834d6fe81bb8680bdd18df3e8c23d9..a2e17bd2028287ada5f86b1898496275531852cf 100644 (file)
--- a/queue-5.11/series
+++ b/queue-5.11/series
@@ -22,3 +22,4 @@ bpf-fix-off-by-one-for-area-size-in-creating-mask-to-left.patch
 bpf-simplify-alu_limit-masking-for-pointer-arithmetic.patch
 bpf-add-sanity-check-for-upper-ptr_limit.patch
 bpf-selftests-fix-up-some-test_verifier-cases-for-unprivileged.patch
+arm64-unconditionally-set-virtual-cpu-id-registers.patch