zynqmp: slcr: Fix qspi block indentation

Coding style cleanup.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/cpu/armv8/zynqmp/slcr.c b/arch/arm/cpu/armv8/zynqmp/slcr.c
index a0f3847bb694d9d2237e974513e36fc90f8b3229..e287a8bf0a74d422ed781c97dda843cf2954c93c 100644 (file)
--- a/arch/arm/cpu/armv8/zynqmp/slcr.c
+++ b/arch/arm/cpu/armv8/zynqmp/slcr.c
@@ -45,27 +45,27 @@ static const int qspi1_pins[] = {
 };
 
 static const struct zynq_slcr_mio_get_status mio_periphs[] = {
-        {
-                "qspi0",
-                qspi0_pins,
-                ARRAY_SIZE(qspi0_pins),
-                SLCR_QSPI_ENABLE_MASK,
-                SLCR_QSPI_ENABLE,
-        },
-        {
-                "qspi1_cs",
-                qspi1_cs_pin,
-                ARRAY_SIZE(qspi1_cs_pin),
-                SLCR_QSPI_ENABLE_MASK,
-                SLCR_QSPI_ENABLE,
-        },
-        {
-                "qspi1",
-                qspi1_pins,
-                ARRAY_SIZE(qspi1_pins),
-                SLCR_QSPI_ENABLE_MASK,
-                SLCR_QSPI_ENABLE,
-        },
+       {
+               "qspi0",
+               qspi0_pins,
+               ARRAY_SIZE(qspi0_pins),
+               SLCR_QSPI_ENABLE_MASK,
+               SLCR_QSPI_ENABLE,
+       },
+       {
+               "qspi1_cs",
+               qspi1_cs_pin,
+               ARRAY_SIZE(qspi1_cs_pin),
+               SLCR_QSPI_ENABLE_MASK,
+               SLCR_QSPI_ENABLE,
+       },
+       {
+               "qspi1",
+               qspi1_pins,
+               ARRAY_SIZE(qspi1_pins),
+               SLCR_QSPI_ENABLE_MASK,
+               SLCR_QSPI_ENABLE,
+       },
 };
 
 /*