arm64: dts: renesas: r8a779a0: Fix PMU interrupt

[ Upstream commit bbbf6db5a0b56199702bb225132831bced2eee41 ]

Should use PPI No.7 for the PMU. Otherwise, the perf command didn't
show any information.

Fixes: 834c310f5418 ("arm64: dts: renesas: Add Renesas R8A779A0 SoC support")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20210325041949.925777-1-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
index dfd6ae8b564fb1ba19d591ee7fcec5f0f72dea75..86ac48e2c84918150fe91f6af0e484fdc6532ff5 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
@@ -60,10 +60,7 @@
 
        pmu_a76 {
                compatible = "arm,cortex-a76-pmu";
-               interrupts-extended = <&gic GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,
-                                     <&gic GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
-                                     <&gic GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
-                                     <&gic GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
+               interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
        };
 
        /* External SCIF clock - to be overridden by boards that provide it */