ARM: dts: stm32: fix timer nodes on STM32 MCU to prevent warnings

[ Upstream commit 2388f14d8747f8304e26ee870790e188c9431efd ]

Prevent warning seen with "make dtbs_check W=1" command:

Warning (avoid_unnecessary_addr_size): /soc/timers@40001c00: unnecessary
address-cells/size-cells without "ranges" or child "reg" property

Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index 1476d3eaf6fa60cdbc3c65a822b81b9f13c03859..dd41342ef0175b199e7c591b2243178dad77375d 100644 (file)
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -283,8 +283,6 @@
                };
 
                timers13: timers@40001c00 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40001C00 0x400>;
                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM13)>;
@@ -299,8 +297,6 @@
                };
 
                timers14: timers@40002000 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40002000 0x400>;
                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM14)>;
@@ -623,8 +619,6 @@
                };
 
                timers10: timers@40014400 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40014400 0x400>;
                        clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM10)>;
@@ -639,8 +633,6 @@
                };
 
                timers11: timers@40014800 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40014800 0x400>;
                        clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM11)>;

diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
index d26f93f8b9c2a869dea44f305d39258c1eafd93d..974dc71b2fe350b187882d493dd725b628cf2095 100644 (file)
--- a/arch/arm/boot/dts/stm32f746.dtsi
+++ b/arch/arm/boot/dts/stm32f746.dtsi
@@ -265,8 +265,6 @@
                };
 
                timers13: timers@40001c00 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40001C00 0x400>;
                        clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM13)>;
@@ -281,8 +279,6 @@
                };
 
                timers14: timers@40002000 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40002000 0x400>;
                        clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM14)>;
@@ -533,8 +529,6 @@
                };
 
                timers10: timers@40014400 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40014400 0x400>;
                        clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM10)>;
@@ -549,8 +543,6 @@
                };
 
                timers11: timers@40014800 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40014800 0x400>;
                        clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM11)>;

diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi
index c065266ee37760940671e77ee1c04787e252eeab..82a234c64b8b9d45ac7b95a77cdee9b20b88ea53 100644 (file)
--- a/arch/arm/boot/dts/stm32h743.dtsi
+++ b/arch/arm/boot/dts/stm32h743.dtsi
@@ -438,8 +438,6 @@
                };
 
                lptimer4: timer@58002c00 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-lptimer";
                        reg = <0x58002c00 0x400>;
                        clocks = <&rcc LPTIM4_CK>;
@@ -454,8 +452,6 @@
                };
 
                lptimer5: timer@58003000 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-lptimer";
                        reg = <0x58003000 0x400>;
                        clocks = <&rcc LPTIM5_CK>;