]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
clk: renesas: r8a779g0: Add DSC clock
authorMarek Vasut <marek.vasut+renesas@mailbox.org>
Fri, 15 May 2026 09:09:26 +0000 (12:09 +0300)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 28 May 2026 13:09:54 +0000 (15:09 +0200)
Add the DSC module clock for Renesas R-Car V4H (R8A779G0) SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260515-rcar-du-dsc-v3-1-164157820498@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a779g0-cpg-mssr.c

index 015b9773cc55f0aa94e392aa52b38f2d7934ec9b..54ba76ff5ab0fca02ebbf4733716fe4743b6a7ee 100644 (file)
@@ -245,6 +245,7 @@ static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = {
        DEF_MOD("fcpvx0",       1100,   R8A779G0_CLK_S0D1_VIO),
        DEF_MOD("fcpvx1",       1101,   R8A779G0_CLK_S0D1_VIO),
        DEF_MOD("tsn",          2723,   R8A779G0_CLK_S0D4_HSC),
+       DEF_MOD("dsc",          2819,   R8A779G0_CLK_VIOBUSD2),
        DEF_MOD("ssiu",         2926,   R8A779G0_CLK_S0D6_PER),
        DEF_MOD("ssi",          2927,   R8A779G0_CLK_S0D6_PER),
 };