This patch provides a support to use SDHCI1 on existing zynq_sdhci.c
driver. defined regbase as -> CONFIG_ZYNQ_SDHCI_BASEADDR1 and
max, min clock values are initialized as 0.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
# if defined(CONFIG_ZYNQ_SDHCI_BASEADDR0)
ret = zynq_sdhci_init(CONFIG_ZYNQ_SDHCI_BASEADDR0);
# endif
+# if defined(CONFIG_ZYNQ_SDHCI_BASEADDR1)
+ ret |= zynq_sdhci_init(CONFIG_ZYNQ_SDHCI_BASEADDR1);
+# endif
#endif
return ret;
}
# define CONFIG_ZYNQ_SDHCI_BASEADDR0 0xE0100000
#endif
-#if defined(CONFIG_ZYNQ_SDHCI0)
+#ifdef CONFIG_ZYNQ_SDHCI1
+# define CONFIG_ZYNQ_SDHCI_BASEADDR1 0xE0101000
+#endif
+
+#if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1)
# define CONFIG_MMC
# define CONFIG_GENERIC_MMC
# define CONFIG_SDHCI