}
static struct dma_fence *
-amdgpu_ttm_job_submit(struct amdgpu_device *adev, struct amdgpu_job *job, u32 num_dw)
+amdgpu_ttm_job_submit(struct amdgpu_device *adev, struct amdgpu_ttm_buffer_entity *entity,
+ struct amdgpu_job *job, u32 num_dw)
{
struct amdgpu_ring *ring;
amdgpu_ring_pad_ib(ring, &job->ibs[0]);
WARN_ON(job->ibs[0].length_dw > num_dw);
+ lockdep_assert_held(&entity->lock);
+
return amdgpu_job_submit(job);
}
amdgpu_gart_map_vram_range(adev, pa, 0, num_pages, flags, cpu_addr);
}
- dma_fence_put(amdgpu_ttm_job_submit(adev, job, num_dw));
+ dma_fence_put(amdgpu_ttm_job_submit(adev, entity, job, num_dw));
return 0;
}
amdgpu_emit_copy_buffer(adev, &job->ibs[0], src_addr, dst_addr,
PAGE_SIZE, 0);
- fence = amdgpu_ttm_job_submit(adev, job, num_dw);
+ fence = amdgpu_ttm_job_submit(adev, &adev->mman.default_entity, job, num_dw);
mutex_unlock(&adev->mman.default_entity.lock);
if (!dma_fence_wait_timeout(fence, false, adev->sdma_timeout))
byte_count -= cur_size_in_bytes;
}
- *fence = amdgpu_ttm_job_submit(adev, job, num_dw);
+ *fence = amdgpu_ttm_job_submit(adev, entity, job, num_dw);
return 0;
byte_count -= cur_size;
}
- *fence = amdgpu_ttm_job_submit(adev, job, num_dw);
+ *fence = amdgpu_ttm_job_submit(adev, entity, job, num_dw);
return 0;
}