info->is_32bit = riscv_is_32bit(harts);
}
-target_ulong riscv_calc_kernel_start_addr(RISCVBootInfo *info,
- target_ulong firmware_end_addr) {
+hwaddr riscv_calc_kernel_start_addr(RISCVBootInfo *info,
+ hwaddr firmware_end_addr) {
if (info->is_32bit) {
return QEMU_ALIGN_UP(firmware_end_addr, 4 * MiB);
} else {
return filename;
}
-target_ulong riscv_find_and_load_firmware(MachineState *machine,
- const char *default_machine_firmware,
- hwaddr *firmware_load_addr,
- symbol_fn_t sym_cb)
+hwaddr riscv_find_and_load_firmware(MachineState *machine,
+ const char *default_machine_firmware,
+ hwaddr *firmware_load_addr,
+ symbol_fn_t sym_cb)
{
char *firmware_filename;
- target_ulong firmware_end_addr = *firmware_load_addr;
+ hwaddr firmware_end_addr = *firmware_load_addr;
firmware_filename = riscv_find_firmware(machine->firmware,
default_machine_firmware);
return firmware_end_addr;
}
-target_ulong riscv_load_firmware(const char *firmware_filename,
- hwaddr *firmware_load_addr,
- symbol_fn_t sym_cb)
+hwaddr riscv_load_firmware(const char *firmware_filename,
+ hwaddr *firmware_load_addr,
+ symbol_fn_t sym_cb)
{
uint64_t firmware_entry, firmware_end;
ssize_t firmware_size;
uint64_t mem_low_size, mem_high_size;
hwaddr firmware_load_addr;
const char *firmware_name;
- target_ulong firmware_end_addr, kernel_start_addr;
+ hwaddr firmware_end_addr, kernel_start_addr;
uint64_t kernel_entry;
uint64_t fdt_load_addr;
DriveInfo *dinfo = drive_get(IF_SD, 0, 0);
MemoryRegion *system_memory = get_system_memory();
MemoryRegion *flash0 = g_new(MemoryRegion, 1);
hwaddr start_addr = memmap[SIFIVE_U_DEV_DRAM].base;
- target_ulong firmware_end_addr, kernel_start_addr;
+ hwaddr firmware_end_addr, kernel_start_addr;
const char *firmware_name;
uint32_t start_addr_hi32 = 0x00000000;
uint32_t fdt_load_addr_hi32 = 0x00000000;
SpikeState *s = SPIKE_MACHINE(machine);
MemoryRegion *system_memory = get_system_memory();
MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
- target_ulong firmware_end_addr = memmap[SPIKE_DRAM].base;
+ hwaddr firmware_end_addr = memmap[SPIKE_DRAM].base;
hwaddr firmware_load_addr = memmap[SPIKE_DRAM].base;
- target_ulong kernel_start_addr;
+ hwaddr kernel_start_addr;
char *firmware_name;
uint64_t fdt_load_addr;
uint64_t kernel_entry;
machine_done);
MachineState *machine = MACHINE(s);
hwaddr start_addr = s->memmap[VIRT_DRAM].base;
- target_ulong firmware_end_addr, kernel_start_addr;
+ hwaddr firmware_end_addr, kernel_start_addr;
const char *firmware_name = riscv_default_firmware_name(&s->soc[0]);
uint64_t fdt_load_addr;
uint64_t kernel_entry = 0;
char *riscv_plic_hart_config_string(int hart_count);
void riscv_boot_info_init(RISCVBootInfo *info, RISCVHartArrayState *harts);
-target_ulong riscv_calc_kernel_start_addr(RISCVBootInfo *info,
- target_ulong firmware_end_addr);
-target_ulong riscv_find_and_load_firmware(MachineState *machine,
- const char *default_machine_firmware,
- hwaddr *firmware_load_addr,
- symbol_fn_t sym_cb);
+hwaddr riscv_calc_kernel_start_addr(RISCVBootInfo *info,
+ hwaddr firmware_end_addr);
+hwaddr riscv_find_and_load_firmware(MachineState *machine,
+ const char *default_machine_firmware,
+ hwaddr *firmware_load_addr,
+ symbol_fn_t sym_cb);
const char *riscv_default_firmware_name(RISCVHartArrayState *harts);
char *riscv_find_firmware(const char *firmware_filename,
const char *default_machine_firmware);
-target_ulong riscv_load_firmware(const char *firmware_filename,
- hwaddr *firmware_load_addr,
- symbol_fn_t sym_cb);
+hwaddr riscv_load_firmware(const char *firmware_filename,
+ hwaddr *firmware_load_addr,
+ symbol_fn_t sym_cb);
void riscv_load_kernel(MachineState *machine,
RISCVBootInfo *info,
target_ulong kernel_start_addr,