imx: Revert "imx: mx6ull: fix REFTOP_VBGADJ setting" and fix comments

The change in commit c1af358cf51a ("imx: mx6ull: fix REFTOP_VBGADJ
setting") is not correct. According to latest i.MX6ULL fuse table,
the REFTOP_TRIM[2:0] fuse is defined as below. So the previous codes
are correct, only need to fix the comments.

Set the REFTOP_VBGADJ field in PMU_MISC0 register based on the
REFTOP_TRIM fuse:
'000" - set REFTOP_VBGADJ[2:0] to 3'b000
'001" - set REFTOP_VBGADJ[2:0] to 3'b001
'010" - set REFTOP_VBGADJ[2:0] to 3'b010
'011" - set REFTOP_VBGADJ[2:0] to 3'b011
'100" - set REFTOP_VBGADJ[2:0] to 3'b100
'101" - set REFTOP_VBGADJ[2:0] to 3'b101
'110" - set REFTOP_VBGADJ[2:0] to 3'b110
'111" - set REFTOP_VBGADJ[2:0] to 3'b111

Sven Schwermer reported:

"These are the symptoms: Very few of the thousands of devices that we
manufacture (< 1%) fail to decompress a large XZ archive once in Linux
userspace. We have not found any form of memory testing or other load
that reproduces this issue. Reverting the offending patch fixes this
behavior on the affected devices."

Revert the offending commit to fix the regression.

Reported-by: Sven Schwermer <u-boot@schwermer.no>
Signed-off-by: Ye Li <ye.li@nxp.com>
[fabio: Fixed checkpatch warning and added Sven's report]
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c
index 50521490b354ddb8fb0d67588aa0f8d87e8a7a03..02df86156d41c3890d7a8b02361588961ba1b477 100644 (file)
--- a/arch/arm/mach-imx/mx6/soc.c
+++ b/arch/arm/mach-imx/mx6/soc.c
@@ -360,23 +360,21 @@ static void init_bandgap(void)
        /*
         * On i.MX6ULL,we need to set VBGADJ bits according to the
         * REFTOP_TRIM[3:0] in fuse table
-        *      000 - set REFTOP_VBGADJ[2:0] to 3b'110,
-        *      110 - set REFTOP_VBGADJ[2:0] to 3b'000,
-        *      001 - set REFTOP_VBGADJ[2:0] to 3b'001,
-        *      010 - set REFTOP_VBGADJ[2:0] to 3b'010,
-        *      011 - set REFTOP_VBGADJ[2:0] to 3b'011,
-        *      100 - set REFTOP_VBGADJ[2:0] to 3b'100,
-        *      101 - set REFTOP_VBGADJ[2:0] to 3b'101,
-        *      111 - set REFTOP_VBGADJ[2:0] to 3b'111,
+        *      000 - set REFTOP_VBGADJ[2:0] to 3'b000
+        *      001 - set REFTOP_VBGADJ[2:0] to 3'b001
+        *      010 - set REFTOP_VBGADJ[2:0] to 3'b010
+        *      011 - set REFTOP_VBGADJ[2:0] to 3'b011
+        *      100 - set REFTOP_VBGADJ[2:0] to 3'b100
+        *      101 - set REFTOP_VBGADJ[2:0] to 3'b101
+        *      110 - set REFTOP_VBGADJ[2:0] to 3'b110
+        *      111 - set REFTOP_VBGADJ[2:0] to 3'b111
         */
        if (is_mx6ull()) {
-               static const u32 map[] = {6, 1, 2, 3, 4, 5, 0, 7};
-
                val = readl(&fuse->mem0);
                val >>= OCOTP_MEM0_REFTOP_TRIM_SHIFT;
                val &= 0x7;
 
-               writel(map[val] << BM_ANADIG_ANA_MISC0_REFTOP_VBGADJ_SHIFT,
+               writel(val << BM_ANADIG_ANA_MISC0_REFTOP_VBGADJ_SHIFT,
                       &anatop->ana_misc0_set);
        }
 }