arm64: dts: renesas: rzg3e-smarc-som: Add I2C2 device pincontrol

Add a device node for I2C2 pincontrol.  Also enable the I2C2 device node
with 1MHz clock frequency as it is connected to the RAA215300 PMIC on
the RZ/G3E SoM.

Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250329121258.172099-2-john.madieu.xa@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
index 72b42a81bcf34e588e64497cc0d52500d458597c..ca56a9edda2e47cf8aaf7067492ebcec9907cc40 100644 (file)
--- a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi
@@ -18,6 +18,7 @@
        compatible = "renesas,rzg3e-smarcm", "renesas,r9a09g047e57", "renesas,r9a09g047";
 
        aliases {
+               i2c2 = &i2c2;
                mmc0 = &sdhi0;
                mmc2 = &sdhi2;
        };
@@ -51,7 +52,19 @@
        clock-frequency = <48000000>;
 };
 
+&i2c2 {
+       pinctrl-0 = <&i2c2_pins>;
+       pinctrl-names = "default";
+       clock-frequency = <1000000>;
+       status = "okay";
+};
+
 &pinctrl {
+       i2c2_pins: i2c {
+               pinmux = <RZG3E_PORT_PINMUX(3, 4, 1)>, /* SCL2 */
+                        <RZG3E_PORT_PINMUX(3, 5, 1)>; /* SDA2 */
+       };
+
        sdhi0_emmc_pins: sd0-emmc {
                sd0-ctrl {
                        pins = "SD0CLK", "SD0CMD";