]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
riscv: Replace __ASSEMBLY__ with __ASSEMBLER__ in non-uapi headers
authorThomas Huth <thuth@redhat.com>
Fri, 6 Jun 2025 07:09:52 +0000 (09:09 +0200)
committerPaul Walmsley <pjw@kernel.org>
Tue, 16 Sep 2025 22:25:30 +0000 (16:25 -0600)
While the GCC and Clang compilers already define __ASSEMBLER__
automatically when compiling assembly code, __ASSEMBLY__ is a
macro that only gets defined by the Makefiles in the kernel.
This can be very confusing when switching between userspace
and kernelspace coding, or when dealing with uapi headers that
rather should use __ASSEMBLER__ instead. So let's standardize on
the __ASSEMBLER__ macro that is provided by the compilers now.

This originally was a completely mechanical patch (done with a
simple "sed -i" statement), with some manual fixups during
rebasing of the patch later.

Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>
Cc: Alexandre Ghiti <alex@ghiti.fr>
Cc: linux-riscv@lists.infradead.org
Signed-off-by: Thomas Huth <thuth@redhat.com>
Link: https://lore.kernel.org/r/20250606070952.498274-3-thuth@redhat.com
Signed-off-by: Paul Walmsley <pjw@kernel.org>
33 files changed:
arch/riscv/include/asm/alternative-macros.h
arch/riscv/include/asm/alternative.h
arch/riscv/include/asm/asm-extable.h
arch/riscv/include/asm/asm.h
arch/riscv/include/asm/assembler.h
arch/riscv/include/asm/barrier.h
arch/riscv/include/asm/cache.h
arch/riscv/include/asm/cpu_ops_sbi.h
arch/riscv/include/asm/csr.h
arch/riscv/include/asm/current.h
arch/riscv/include/asm/errata_list.h
arch/riscv/include/asm/ftrace.h
arch/riscv/include/asm/gpr-num.h
arch/riscv/include/asm/image.h
arch/riscv/include/asm/insn-def.h
arch/riscv/include/asm/jump_label.h
arch/riscv/include/asm/kasan.h
arch/riscv/include/asm/kgdb.h
arch/riscv/include/asm/mmu.h
arch/riscv/include/asm/page.h
arch/riscv/include/asm/pgtable.h
arch/riscv/include/asm/processor.h
arch/riscv/include/asm/ptrace.h
arch/riscv/include/asm/scs.h
arch/riscv/include/asm/set_memory.h
arch/riscv/include/asm/thread_info.h
arch/riscv/include/asm/vdso.h
arch/riscv/include/asm/vdso/getrandom.h
arch/riscv/include/asm/vdso/gettimeofday.h
arch/riscv/include/asm/vdso/processor.h
arch/riscv/include/asm/vdso/vsyscall.h
tools/arch/riscv/include/asm/csr.h
tools/arch/riscv/include/asm/vdso/processor.h

index 231d777d936c2d29c858decaa9a3fa5f172efbb8..9619bd5c8ebaa35018ca75c6becd259317b2c1cf 100644 (file)
@@ -4,7 +4,7 @@
 
 #ifdef CONFIG_RISCV_ALTERNATIVE
 
-#ifdef __ASSEMBLY__
+#ifdef __ASSEMBLER__
 
 .macro ALT_ENTRY oldptr newptr vendor_id patch_id new_len
        .4byte \oldptr - .
@@ -53,7 +53,7 @@
 #define __ALTERNATIVE_CFG(...)         ALTERNATIVE_CFG __VA_ARGS__
 #define __ALTERNATIVE_CFG_2(...)       ALTERNATIVE_CFG_2 __VA_ARGS__
 
-#else /* !__ASSEMBLY__ */
+#else /* !__ASSEMBLER__ */
 
 #include <asm/asm.h>
 #include <linux/stringify.h>
@@ -98,7 +98,7 @@
        __ALTERNATIVE_CFG(old_c, new_c_1, vendor_id_1, patch_id_1, enable_1)    \
        ALT_NEW_CONTENT(vendor_id_2, patch_id_2, enable_2, new_c_2)
 
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
 
 #define _ALTERNATIVE_CFG(old_c, new_c, vendor_id, patch_id, CONFIG_k)  \
        __ALTERNATIVE_CFG(old_c, new_c, vendor_id, patch_id, IS_ENABLED(CONFIG_k))
                                   new_c_2, vendor_id_2, patch_id_2, IS_ENABLED(CONFIG_k_2))
 
 #else /* CONFIG_RISCV_ALTERNATIVE */
-#ifdef __ASSEMBLY__
+#ifdef __ASSEMBLER__
 
 .macro ALTERNATIVE_CFG old_c
        \old_c
 #define __ALTERNATIVE_CFG(old_c, ...)          ALTERNATIVE_CFG old_c
 #define __ALTERNATIVE_CFG_2(old_c, ...)                ALTERNATIVE_CFG old_c
 
-#else /* !__ASSEMBLY__ */
+#else /* !__ASSEMBLER__ */
 
 #define __ALTERNATIVE_CFG(old_c, ...)          old_c "\n"
 #define __ALTERNATIVE_CFG_2(old_c, ...)                old_c "\n"
 
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
 
 #define _ALTERNATIVE_CFG(old_c, ...)           __ALTERNATIVE_CFG(old_c)
 #define _ALTERNATIVE_CFG_2(old_c, ...)         __ALTERNATIVE_CFG_2(old_c)
index 3c2b59b25017929df92b4e6741ac1a9308bfec54..0e95539ba451ba55abb15ee4a26b6125c9d0261a 100644 (file)
@@ -8,7 +8,7 @@
 
 #include <asm/alternative-macros.h>
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 #ifdef CONFIG_RISCV_ALTERNATIVE
 
index 0c8bfd54fc4e05beec2fed22fc7f73ddcc997ab7..37d425d7a762961498f9b432e63ce5cadb560c62 100644 (file)
@@ -10,7 +10,7 @@
 
 #ifdef CONFIG_MMU
 
-#ifdef __ASSEMBLY__
+#ifdef __ASSEMBLER__
 
 #define __ASM_EXTABLE_RAW(insn, fixup, type, data)     \
        .pushsection    __ex_table, "a";                \
@@ -25,7 +25,7 @@
        __ASM_EXTABLE_RAW(\insn, \fixup, EX_TYPE_FIXUP, 0)
        .endm
 
-#else /* __ASSEMBLY__ */
+#else /* __ASSEMBLER__ */
 
 #include <linux/bits.h>
 #include <linux/stringify.h>
@@ -77,7 +77,7 @@
                            EX_DATA_REG(ADDR, addr)                             \
                          ")")
 
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
 
 #else /* CONFIG_MMU */
        #define _ASM_EXTABLE_UACCESS_ERR(insn, fixup, err)
index 2a16e88e13deda9961ca0958d0fc9e39d2af1a29..8bd2a11382a39039320bbe4925d7478c710b2a73 100644 (file)
@@ -6,7 +6,7 @@
 #ifndef _ASM_RISCV_ASM_H
 #define _ASM_RISCV_ASM_H
 
-#ifdef __ASSEMBLY__
+#ifdef __ASSEMBLER__
 #define __ASM_STR(x)   x
 #else
 #define __ASM_STR(x)   #x
@@ -30,7 +30,7 @@
 #define SRLI           __REG_SEL(srliw, srli)
 
 #if __SIZEOF_POINTER__ == 8
-#ifdef __ASSEMBLY__
+#ifdef __ASSEMBLER__
 #define RISCV_PTR              .dword
 #define RISCV_SZPTR            8
 #define RISCV_LGPTR            3
@@ -40,7 +40,7 @@
 #define RISCV_LGPTR            "3"
 #endif
 #elif __SIZEOF_POINTER__ == 4
-#ifdef __ASSEMBLY__
+#ifdef __ASSEMBLER__
 #define RISCV_PTR              .word
 #define RISCV_SZPTR            4
 #define RISCV_LGPTR            2
@@ -69,7 +69,7 @@
 #error "Unexpected __SIZEOF_SHORT__"
 #endif
 
-#ifdef __ASSEMBLY__
+#ifdef __ASSEMBLER__
 #include <asm/asm-offsets.h>
 
 /* Common assembly source macros */
 #define ASM_NOKPROBE(name)
 #endif
 
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
 
 #endif /* _ASM_RISCV_ASM_H */
index 44b1457d3e95678a5600e2d03cb86381d1bea367..16931712beab64e18fe7c5150180270550ce9cfe 100644 (file)
@@ -5,7 +5,7 @@
  * Author: Jee Heng Sia <jeeheng.sia@starfivetech.com>
  */
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 #error "Only include this from assembly code"
 #endif
 
index b8c5726d86acb1e2e5c6b9fb63bcdf305b01b4f9..700ba3f922cb51add3e895296fc3c3bb76ea4c4c 100644 (file)
@@ -10,7 +10,7 @@
 #ifndef _ASM_RISCV_BARRIER_H
 #define _ASM_RISCV_BARRIER_H
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 #include <asm/cmpxchg.h>
 #include <asm/fence.h>
 
@@ -82,6 +82,6 @@ do {                                                                  \
 
 #include <asm-generic/barrier.h>
 
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
 
 #endif /* _ASM_RISCV_BARRIER_H */
index 570e9d8acad1e5298e9228cc6124c24e808dd9b5..eb42b739d1328c5f8c98d338b98a71708d881cd9 100644 (file)
@@ -24,7 +24,7 @@
 #define ARCH_SLAB_MINALIGN     16
 #endif
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 extern int dma_cache_alignment;
 #ifdef CONFIG_RISCV_DMA_NONCOHERENT
@@ -35,6 +35,6 @@ static inline int dma_get_cache_alignment(void)
 }
 #endif
 
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
 
 #endif /* _ASM_RISCV_CACHE_H */
index d6e4665b31954ca5edfa2f078e3af632c81fbc3f..776fa55fbaa4568b0bc885e66260bb8cc12c191e 100644 (file)
@@ -5,7 +5,7 @@
 #ifndef __ASM_CPU_OPS_SBI_H
 #define __ASM_CPU_OPS_SBI_H
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 #include <linux/init.h>
 #include <linux/sched.h>
 #include <linux/threads.h>
index 6fed42e377059c7004ecd3c29eb36d5c0e36a656..4a37a98398ad3b527c280c1e1260d0b53a4ac8d9 100644 (file)
 #define IE_TIE         (_AC(0x1, UL) << RV_IRQ_TIMER)
 #define IE_EIE         (_AC(0x1, UL) << RV_IRQ_EXT)
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 #define csr_swap(csr, val)                                     \
 ({                                                             \
                              : "memory");                      \
 })
 
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
 
 #endif /* _ASM_RISCV_CSR_H */
index 21774d868c65bdedaf4f34ab41f4c83456bacc4a..ba5aa72aff631ac86c3c80faf116520acba97d6c 100644 (file)
@@ -13,7 +13,7 @@
 #include <linux/bug.h>
 #include <linux/compiler.h>
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 struct task_struct;
 
@@ -35,6 +35,6 @@ static __always_inline struct task_struct *get_current(void)
 
 register unsigned long current_stack_pointer __asm__("sp");
 
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
 
 #endif /* _ASM_RISCV_CURRENT_H */
index 6e426ed7919a4acd997b60b723c0d5cfddb4cff6..e17d6c98b3bfdfd40946c82808b1e16b38aa4958 100644 (file)
@@ -29,7 +29,7 @@
 #define        ERRATA_THEAD_NUMBER 3
 #endif
 
-#ifdef __ASSEMBLY__
+#ifdef __ASSEMBLER__
 
 #define ALT_INSN_FAULT(x)                                              \
 ALTERNATIVE(__stringify(RISCV_PTR do_trap_insn_fault),                 \
@@ -42,7 +42,7 @@ ALTERNATIVE(__stringify(RISCV_PTR do_page_fault),                     \
            __stringify(RISCV_PTR sifive_cip_453_page_fault_trp),       \
            SIFIVE_VENDOR_ID, ERRATA_SIFIVE_CIP_453,                    \
            CONFIG_ERRATA_SIFIVE_CIP_453)
-#else /* !__ASSEMBLY__ */
+#else /* !__ASSEMBLER__ */
 
 #define ALT_SFENCE_VMA_ASID(asid)                                      \
 asm(ALTERNATIVE("sfence.vma x0, %0", "sfence.vma", SIFIVE_VENDOR_ID,   \
@@ -123,6 +123,6 @@ asm volatile(ALTERNATIVE(                                           \
 #define THEAD_C9XX_RV_IRQ_PMU                  17
 #define THEAD_C9XX_CSR_SCOUNTEROF              0x5c5
 
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
 
 #endif
index 22ebea3c2b26c16f166d60f46dfbb43c64a602cc..e5026cd8f022f578e6b4d25abbfd9127b5e1c286 100644 (file)
@@ -13,7 +13,7 @@
 #endif
 
 #define ARCH_SUPPORTS_FTRACE_OPS 1
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 extern void *return_address(unsigned int level);
 
@@ -112,7 +112,7 @@ do {                                                                        \
 #define MCOUNT_JALR_SIZE       4
 #define MCOUNT_NOP4_SIZE       4
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 struct dyn_ftrace;
 int ftrace_init_nop(struct module *mod, struct dyn_ftrace *rec);
 #define ftrace_init_nop ftrace_init_nop
@@ -235,7 +235,7 @@ static inline void arch_ftrace_set_direct_caller(struct ftrace_regs *fregs, unsi
 
 #endif /* CONFIG_DYNAMIC_FTRACE_WITH_ARGS */
 
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
 
 #endif /* CONFIG_DYNAMIC_FTRACE */
 
index efeb5edf8a3af15052c68fc8a95a3091a2d3af46..b499cf83273415d3bbe5f2c5fb686afa92b88137 100644 (file)
@@ -2,7 +2,7 @@
 #ifndef __ASM_GPR_NUM_H
 #define __ASM_GPR_NUM_H
 
-#ifdef __ASSEMBLY__
+#ifdef __ASSEMBLER__
 
        .irp    num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
        .equ    .L__gpr_num_x\num, \num
@@ -41,7 +41,7 @@
        .equ    .L__gpr_num_t5,         30
        .equ    .L__gpr_num_t6,         31
 
-#else /* __ASSEMBLY__ */
+#else /* __ASSEMBLER__ */
 
 #define __DEFINE_ASM_GPR_NUMS                                  \
 "      .irp    num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31\n" \
@@ -80,6 +80,6 @@
 "      .equ    .L__gpr_num_t5,         30\n"                   \
 "      .equ    .L__gpr_num_t6,         31\n"
 
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
 
 #endif /* __ASM_GPR_NUM_H */
index 8927a6ea1127e25543be4c850fa96e682d2c6383..899254966e8585fcb3cfa7c58d77231abe92a8a7 100644 (file)
@@ -29,7 +29,7 @@
 #define RISCV_HEADER_VERSION (RISCV_HEADER_VERSION_MAJOR << 16 | \
                              RISCV_HEADER_VERSION_MINOR)
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 #define riscv_image_flag_field(flags, field)\
                               (((flags) >> field##_SHIFT) & field##_MASK)
 /**
@@ -63,5 +63,5 @@ struct riscv_image_header {
        u32 magic2;
        u32 res3;
 };
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
 #endif /* _ASM_RISCV_IMAGE_H */
index d5adbaec1d010d26c8c41a5b48c682d9efa3eb75..c9cfcea52cbbcfd220a21bf04bae45119c2815f2 100644 (file)
@@ -25,7 +25,7 @@
 #define INSN_S_SIMM5_SHIFT              7
 #define INSN_S_OPCODE_SHIFT             0
 
-#ifdef __ASSEMBLY__
+#ifdef __ASSEMBLER__
 
 #ifdef CONFIG_AS_HAS_INSN
 
@@ -77,7 +77,7 @@
 #define __INSN_I(...)  insn_i __VA_ARGS__
 #define __INSN_S(...)  insn_s __VA_ARGS__
 
-#else /* ! __ASSEMBLY__ */
+#else /* ! __ASSEMBLER__ */
 
 #ifdef CONFIG_AS_HAS_INSN
 
 
 #endif
 
-#endif /* ! __ASSEMBLY__ */
+#endif /* ! __ASSEMBLER__ */
 
 #define INSN_R(opcode, func3, func7, rd, rs1, rs2)             \
        __INSN_R(RV_##opcode, RV_##func3, RV_##func7,           \
 
 #define RISCV_INSN_NOP4        _AC(0x00000013, U)
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 #define nop()           __asm__ __volatile__ ("nop")
 #define __nops(n)       ".rept  " #n "\nnop\n.endr\n"
 #define nops(n)         __asm__ __volatile__ (__nops(n))
index 87a71cc6d146cef9c8eabc9e03e2fb270b697851..3ab5f2e3212bec49a55132a793c76911f5507d16 100644 (file)
@@ -7,7 +7,7 @@
 #ifndef __ASM_JUMP_LABEL_H
 #define __ASM_JUMP_LABEL_H
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 #include <linux/types.h>
 #include <asm/asm.h>
@@ -66,5 +66,5 @@ label:
        return true;
 }
 
-#endif  /* __ASSEMBLY__ */
+#endif  /* __ASSEMBLER__ */
 #endif /* __ASM_JUMP_LABEL_H */
index e6a0071bdb56c4105d37f4e41ad912429e81ba58..60af6691f9032195c5288843afc2b7d9f4f2b927 100644 (file)
@@ -4,7 +4,7 @@
 #ifndef __ASM_KASAN_H
 #define __ASM_KASAN_H
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 /*
  * The following comment was copied from arm64:
index cc11c4544cffd133c86a738bcd35c3f75ba59aea..7559d728c5ff9b1af9bdf18539ab121c6e81e678 100644 (file)
 #define BREAK_INSTR_SIZE       4
 #endif
 
-#ifndef        __ASSEMBLY__
+#ifndef        __ASSEMBLER__
 
 void arch_kgdb_breakpoint(void);
 extern unsigned long kgdb_compiled_break;
 
-#endif /* !__ASSEMBLY__ */
+#endif /* !__ASSEMBLER__ */
 
 #define DBG_REG_ZERO "zero"
 #define DBG_REG_RA "ra"
index 1cc90465d75b18466c0957d2b981bdab04cbaf85..cf8e6eac77d520bb27bf145179880726c57d132d 100644 (file)
@@ -7,7 +7,7 @@
 #ifndef _ASM_RISCV_MMU_H
 #define _ASM_RISCV_MMU_H
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 typedef struct {
 #ifndef CONFIG_MMU
@@ -40,6 +40,6 @@ typedef struct {
 
 void __meminit create_pgd_mapping(pgd_t *pgdp, uintptr_t va, phys_addr_t pa, phys_addr_t sz,
                                  pgprot_t prot);
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
 
 #endif /* _ASM_RISCV_MMU_H */
index 572a141ddecdb19f587415dc61f8343cfc3d3a29..ffe213ad65a4eef1f9d69d55bb436af830cbc727 100644 (file)
@@ -41,7 +41,7 @@
 #define PAGE_OFFSET            ((unsigned long)phys_ram_base)
 #endif /* CONFIG_MMU */
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 #ifdef CONFIG_RISCV_ISA_ZICBOZ
 void clear_page(void *page);
@@ -199,7 +199,7 @@ static __always_inline void *pfn_to_kaddr(unsigned long pfn)
        return __va(pfn << PAGE_SHIFT);
 }
 
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
 
 #define virt_addr_valid(vaddr) ({                                              \
        unsigned long _addr = (unsigned long)vaddr;                             \
index 3d17399a06c772f8278b39e2989cb4b761349010..224eb3376d04ff06e7190f2bf77ab2363d64302c 100644 (file)
 
 #endif
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 #include <asm/page.h>
 #include <asm/tlbflush.h>
@@ -1119,6 +1119,6 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
        WARN_ON_ONCE(pgd_present(*pgdp) && !pgd_same(*pgdp, pgd)); \
        set_pgd(pgdp, pgd); \
 })
-#endif /* !__ASSEMBLY__ */
+#endif /* !__ASSEMBLER__ */
 
 #endif /* _ASM_RISCV_PGTABLE_H */
index 24d3af4d3807e37396744ef26533ac4661abcb4f..da5426122d280b53b8ba8f764ea6f1b9f93ca994 100644 (file)
@@ -54,7 +54,7 @@
 #define TASK_UNMAPPED_BASE     PAGE_ALIGN(TASK_SIZE / 3)
 #endif
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 struct task_struct;
 struct pt_regs;
@@ -215,6 +215,6 @@ long get_tagged_addr_ctrl(struct task_struct *task);
 #define GET_TAGGED_ADDR_CTRL()         get_tagged_addr_ctrl(current)
 #endif
 
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
 
 #endif /* _ASM_RISCV_PROCESSOR_H */
index a7dc0e33075796843bfdcafa2925afbcc2f85019..addc8188152f7f40e6db0cbe92ad30b193982309 100644 (file)
@@ -10,7 +10,7 @@
 #include <asm/csr.h>
 #include <linux/compiler.h>
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 struct pt_regs {
        unsigned long epc;
@@ -180,6 +180,6 @@ static __always_inline bool regs_irqs_disabled(struct pt_regs *regs)
        return !(regs->status & SR_PIE);
 }
 
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
 
 #endif /* _ASM_RISCV_PTRACE_H */
index 0e45db78b24bf201c7f70c1819d95d258323b8bd..ab7714aa93bdc4218077e8b905870b0099094694 100644 (file)
@@ -2,7 +2,7 @@
 #ifndef _ASM_SCS_H
 #define _ASM_SCS_H
 
-#ifdef __ASSEMBLY__
+#ifdef __ASSEMBLER__
 #include <asm/asm-offsets.h>
 
 #ifdef CONFIG_SHADOW_CALL_STACK
@@ -49,6 +49,6 @@ _skip_scs:
 .endm
 
 #endif /* CONFIG_SHADOW_CALL_STACK */
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
 
 #endif /* _ASM_SCS_H */
index ea263d3683ef6f59f7eb89c21bee333eda7fd0a2..87389e93325a3b357a195f9f1fc5742ad7f36a14 100644 (file)
@@ -6,7 +6,7 @@
 #ifndef _ASM_RISCV_SET_MEMORY_H
 #define _ASM_RISCV_SET_MEMORY_H
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 /*
  * Functions to change memory attributes.
  */
@@ -45,7 +45,7 @@ int set_direct_map_default_noflush(struct page *page);
 int set_direct_map_valid_noflush(struct page *page, unsigned nr, bool valid);
 bool kernel_page_present(struct page *page);
 
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
 
 #if defined(CONFIG_STRICT_KERNEL_RWX) || defined(CONFIG_XIP_KERNEL)
 #ifdef CONFIG_64BIT
index f5916a70879a87d9356bb755ca78b4d2e7f65f6e..c33d8b7dd4880d3ea052fca7b86dbeb45dc6957f 100644 (file)
@@ -37,7 +37,7 @@
 
 #define IRQ_STACK_SIZE         THREAD_SIZE
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 #include <asm/processor.h>
 #include <asm/csr.h>
@@ -98,7 +98,7 @@ struct thread_info {
 void arch_release_task_struct(struct task_struct *tsk);
 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src);
 
-#endif /* !__ASSEMBLY__ */
+#endif /* !__ASSEMBLER__ */
 
 /*
  * thread information flags
index c130d8100232cbe50e52e35eb418e354bd114cb7..f80357fe24d111cb3c4f53e8e9d20498798d22bd 100644 (file)
@@ -16,7 +16,7 @@
 
 #define __VDSO_PAGES    4
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 #include <generated/vdso-offsets.h>
 
 #define VDSO_SYMBOL(base, name)                                                        \
@@ -34,7 +34,7 @@ extern char compat_vdso_start[], compat_vdso_end[];
 
 extern char vdso_start[], vdso_end[];
 
-#endif /* !__ASSEMBLY__ */
+#endif /* !__ASSEMBLER__ */
 
 #endif /* CONFIG_MMU */
 
index c6d66895c1f585c7b8e670bc206049b985c20ab1..ab4aef9550998e151dcb7b8fdf57c33f6faefdcb 100644 (file)
@@ -5,7 +5,7 @@
 #ifndef __ASM_VDSO_GETRANDOM_H
 #define __ASM_VDSO_GETRANDOM_H
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 #include <asm/unistd.h>
 
@@ -25,6 +25,6 @@ static __always_inline ssize_t getrandom_syscall(void *_buffer, size_t _len, uns
        return ret;
 }
 
-#endif /* !__ASSEMBLY__ */
+#endif /* !__ASSEMBLER__ */
 
 #endif /* __ASM_VDSO_GETRANDOM_H */
index 29164f84f93cec6e28251e6a0adfbc341ac88241..9ec08fa04d35a38e2ca189d1bfcaacaa3486dd8c 100644 (file)
@@ -2,7 +2,7 @@
 #ifndef __ASM_VDSO_GETTIMEOFDAY_H
 #define __ASM_VDSO_GETTIMEOFDAY_H
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 #include <asm/barrier.h>
 #include <asm/unistd.h>
@@ -79,6 +79,6 @@ static __always_inline u64 __arch_get_hw_counter(s32 clock_mode,
        return csr_read(CSR_TIME);
 }
 
-#endif /* !__ASSEMBLY__ */
+#endif /* !__ASSEMBLER__ */
 
 #endif /* __ASM_VDSO_GETTIMEOFDAY_H */
index 8f383f05a290f123d941226b5dd975381d7d8536..98fb44336c055f1c60899cb25c99f2416184c466 100644 (file)
@@ -2,7 +2,7 @@
 #ifndef __ASM_VDSO_PROCESSOR_H
 #define __ASM_VDSO_PROCESSOR_H
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 #include <asm/barrier.h>
 #include <asm/insn-def.h>
@@ -23,6 +23,6 @@ static inline void cpu_relax(void)
        barrier();
 }
 
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
 
 #endif /* __ASM_VDSO_PROCESSOR_H */
index 1140b54b4bc8278d7a322036cd9f84f71258f246..558eb9dfda52035b1784f83d8bcdfb58a8896751 100644 (file)
@@ -2,13 +2,13 @@
 #ifndef __ASM_VDSO_VSYSCALL_H
 #define __ASM_VDSO_VSYSCALL_H
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 #include <vdso/datapage.h>
 
 /* The asm-generic header needs to be included after the definitions above */
 #include <asm-generic/vdso/vsyscall.h>
 
-#endif /* !__ASSEMBLY__ */
+#endif /* !__ASSEMBLER__ */
 
 #endif /* __ASM_VDSO_VSYSCALL_H */
index 0dfc09254f99af06db831c9b08ebe82c41620a46..56d7367ee344c16b8eacc073bc5d5efa6784f972 100644 (file)
 #define IE_TIE         (_AC(0x1, UL) << RV_IRQ_TIMER)
 #define IE_EIE         (_AC(0x1, UL) << RV_IRQ_EXT)
 
-#ifdef __ASSEMBLY__
+#ifdef __ASSEMBLER__
 #define __ASM_STR(x)    x
 #else
 #define __ASM_STR(x)    #x
 #endif
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 #define csr_swap(csr, val)                                     \
 ({                                                             \
                              : "memory");                      \
 })
 
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
 
 #endif /* _ASM_RISCV_CSR_H */
index 662aca03984817f9c69186658b19e9dad9e4771c..0665b117f30f2766a23446fbd7c8ce82d1843a93 100644 (file)
@@ -2,7 +2,7 @@
 #ifndef __ASM_VDSO_PROCESSOR_H
 #define __ASM_VDSO_PROCESSOR_H
 
-#ifndef __ASSEMBLY__
+#ifndef __ASSEMBLER__
 
 #include <asm-generic/barrier.h>
 
@@ -27,6 +27,6 @@ static inline void cpu_relax(void)
        barrier();
 }
 
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLER__ */
 
 #endif /* __ASM_VDSO_PROCESSOR_H */