arm64: dts: qcom: ipq5424-rdp466: Enable QPIC SPI NAND support

Enable QPIC SPI NAND flash controller support on the IPQ5424 RDP466
reference design platform.

The RDP466 board features a SPI NAND flash device connected to the QPIC
controller for primary storage. This patch enables the QPIC BAM DMA
controller and SPI NAND interface of QPIC, and configures the necessary
pin control settings for proper operation.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
Link: https://lore.kernel.org/r/20260306113940.1654304-4-quic_mdalam@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
index 738618551203b9fb58ee3d6f7b7a46b38eea4bf4..de71b72ae6dcc00955ce64f30f5064d570d381ad 100644 (file)
--- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
+++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
@@ -124,13 +124,6 @@
        status = "okay";
 };
 
-&sdhc {
-       pinctrl-0 = <&sdc_default_state>;
-       pinctrl-names = "default";
-
-       status = "okay";
-};
-
 &sleep_clk {
        clock-frequency = <32000>;
 };
@@ -201,26 +194,26 @@
                };
        };
 
-       sdc_default_state: sdc-default-state {
-               clk-pins {
+       qpic_snand_default_state: qpic-snand-default-state {
+               clock-pins {
                        pins = "gpio5";
-                       function = "sdc_clk";
+                       function = "qspi_clk";
                        drive-strength = <8>;
-                       bias-disable;
+                       bias-pull-down;
                };
 
-               cmd-pins {
+               cs-pins {
                        pins = "gpio4";
-                       function = "sdc_cmd";
+                       function = "qspi_cs";
                        drive-strength = <8>;
                        bias-pull-up;
                };
 
                data-pins {
                        pins = "gpio0", "gpio1", "gpio2", "gpio3";
-                       function = "sdc_data";
+                       function = "qspi_data";
                        drive-strength = <8>;
-                       bias-pull-up;
+                       bias-pull-down;
                };
        };
 
@@ -246,6 +239,27 @@
        };
 };
 
+&qpic_bam {
+       status = "okay";
+};
+
+&qpic_nand {
+       pinctrl-0 = <&qpic_snand_default_state>;
+       pinctrl-names = "default";
+
+       status = "okay";
+
+       flash@0 {
+               compatible = "spi-nand";
+               reg = <0>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+               nand-ecc-engine = <&qpic_nand>;
+               nand-ecc-strength = <4>;
+               nand-ecc-step-size = <512>;
+       };
+};
+
 &uart0 {
        pinctrl-0 = <&uart0_pins>;
        pinctrl-names = "default";