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mips.h (ISA_HAS_FP4): Correct formatting.
authorMaciej W. Rozycki <macro@codesourcery.com>
Tue, 16 Jul 2013 23:04:52 +0000 (23:04 +0000)
committerMaciej W. Rozycki <macro@gcc.gnu.org>
Tue, 16 Jul 2013 23:04:52 +0000 (23:04 +0000)
* config/mips/mips.h (ISA_HAS_FP4): Correct formatting.
(ISA_HAS_FP_MADD4_MSUB4): Also enable for ISA_MIPS32R2.
(ISA_HAS_NMADD4_NMSUB4): Remove the MODE argument; rewrite in
terms of ISA_HAS_FP4, and also enable for ISA_MIPS32R2.
(ISA_HAS_NMADD3_NMSUB3): Remove the MODE argument.
* config/mips/mips.c (mips_rtx_costs) <PLUS>: Check for
ISA_HAS_FP_MADD4_MSUB4 || ISA_HAS_FP_MADD3_MSUB3 rather than
ISA_HAS_FP4.
<MINUS, NEG>: Update according to changes to ISA_HAS_NMADD4_NMSUB4
and ISA_HAS_NMADD3_NMSUB3.
* config/mips/mips.md (nmadd4<mode>, nmadd3<mode>): Likewise.
(nmadd4<mode>_fastmath, nmadd3<mode>_fastmath): Likewise.
(nmsub4<mode>, nmsub3<mode>): Likewise.
(nmsub4<mode>_fastmath, nmsub3<mode>_fastmath): Likewise.

From-SVN: r200993

gcc/ChangeLog patch | blob | blame | history
gcc/config/mips/mips.c patch | blob | blame | history
gcc/config/mips/mips.h patch | blob | blame | history
gcc/config/mips/mips.md patch | blob | blame | history

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index da7c8002c73900468f4f7aa4d0961cd2e9b6212e..b4f628753b4d60304c34349c3048007d2dfcaac5 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,20 @@
+2013-07-16  Maciej W. Rozycki  <macro@codesourcery.com>
+
+       * config/mips/mips.h (ISA_HAS_FP4): Correct formatting.
+       (ISA_HAS_FP_MADD4_MSUB4): Also enable for ISA_MIPS32R2.
+       (ISA_HAS_NMADD4_NMSUB4): Remove the MODE argument; rewrite in
+       terms of ISA_HAS_FP4, and also enable for ISA_MIPS32R2.
+       (ISA_HAS_NMADD3_NMSUB3): Remove the MODE argument.
+       * config/mips/mips.c (mips_rtx_costs) <PLUS>: Check for
+       ISA_HAS_FP_MADD4_MSUB4 || ISA_HAS_FP_MADD3_MSUB3 rather than
+       ISA_HAS_FP4.
+       <MINUS, NEG>: Update according to changes to ISA_HAS_NMADD4_NMSUB4
+       and ISA_HAS_NMADD3_NMSUB3.
+       * config/mips/mips.md (nmadd4<mode>, nmadd3<mode>): Likewise.
+       (nmadd4<mode>_fastmath, nmadd3<mode>_fastmath): Likewise.
+       (nmsub4<mode>, nmsub3<mode>): Likewise.
+       (nmsub4<mode>_fastmath, nmsub3<mode>_fastmath): Likewise.
+
 2013-07-16  Maciej W. Rozycki  <macro@codesourcery.com>
 
        * config/mips/mips.h (ISA_HAS_NMADD4_NMSUB4): Remove
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index f7b31ae50b089f66c9130029af94ab9f167d9acb..e95bdd88d4a07e6217aab793f403c25b87f74734 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -3857,7 +3857,7 @@ mips_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED,
 
     case MINUS:
       if (float_mode_p
-         && (ISA_HAS_NMADD4_NMSUB4 (mode) || ISA_HAS_NMADD3_NMSUB3 (mode))
+         && (ISA_HAS_NMADD4_NMSUB4 || ISA_HAS_NMADD3_NMSUB3)
          && TARGET_FUSED_MADD
          && !HONOR_NANS (mode)
          && !HONOR_SIGNED_ZEROS (mode))
@@ -3890,7 +3890,7 @@ mips_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED,
        {
          /* If this is part of a MADD or MSUB, treat the PLUS as
             being free.  */
-         if (ISA_HAS_FP4
+         if ((ISA_HAS_FP_MADD4_MSUB4 || ISA_HAS_FP_MADD3_MSUB3)
              && TARGET_FUSED_MADD
              && GET_CODE (XEXP (x, 0)) == MULT)
            *total = 0;
@@ -3909,7 +3909,7 @@ mips_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED,
 
     case NEG:
       if (float_mode_p
-         && (ISA_HAS_NMADD4_NMSUB4 (mode) || ISA_HAS_NMADD3_NMSUB3 (mode))
+         && (ISA_HAS_NMADD4_NMSUB4 || ISA_HAS_NMADD3_NMSUB3)
          && TARGET_FUSED_MADD
          && !HONOR_NANS (mode)
          && HONOR_SIGNED_ZEROS (mode))
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index ed08de1c6ecf8ca7e31c7f0cad1e5115c79091d0..007f598c658f2426ffe1e73e985c0444c2a0549c 100644 (file)
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -873,7 +873,7 @@ struct mips_cpu_info {
    FP madd and msub instructions, and the FP recip and recip sqrt
    instructions.  */
 #define ISA_HAS_FP4            ((ISA_MIPS4                             \
-                                 || (ISA_MIPS32R2 && TARGET_FLOAT64)   \
+                                 || (ISA_MIPS32R2 && TARGET_FLOAT64)   \
                                  || ISA_MIPS64                         \
                                  || ISA_MIPS64R2)                      \
                                 && !TARGET_MIPS16)
@@ -895,24 +895,20 @@ struct mips_cpu_info {
 #define GENERATE_MADD_MSUB     (TARGET_IMADD && !TARGET_MIPS16)
 
 /* ISA has floating-point madd and msub instructions 'd = a * b [+-] c'.  */
-#define ISA_HAS_FP_MADD4_MSUB4  ISA_HAS_FP4
+#define ISA_HAS_FP_MADD4_MSUB4  (ISA_HAS_FP4                           \
+                                || (ISA_MIPS32R2 && !TARGET_MIPS16))
 
 /* ISA has floating-point madd and msub instructions 'c = a * b [+-] c'.  */
 #define ISA_HAS_FP_MADD3_MSUB3  TARGET_LOONGSON_2EF
 
 /* ISA has floating-point nmadd and nmsub instructions
    'd = -((a * b) [+-] c)'.  */
-#define ISA_HAS_NMADD4_NMSUB4(MODE)                                    \
-                               ((ISA_MIPS4                             \
-                                 || (ISA_MIPS32R2 && (MODE) == V2SFmode) \
-                                 || ISA_MIPS64                         \
-                                 || ISA_MIPS64R2)                      \
-                                && !TARGET_MIPS16)
+#define ISA_HAS_NMADD4_NMSUB4  (ISA_HAS_FP4                            \
+                                || (ISA_MIPS32R2 && !TARGET_MIPS16))
 
 /* ISA has floating-point nmadd and nmsub instructions
    'c = -((a * b) [+-] c)'.  */
-#define ISA_HAS_NMADD3_NMSUB3(MODE)                                    \
-                                TARGET_LOONGSON_2EF
+#define ISA_HAS_NMADD3_NMSUB3  TARGET_LOONGSON_2EF
 
 /* ISA has count leading zeroes/ones instruction (not implemented).  */
 #define ISA_HAS_CLZ_CLO                ((ISA_MIPS32                            \
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index b832dda27f0a7fed3aa20198cd0741e7fc63883c..ca79a31e29ac9f67ab8bf78e4bc30eba1a2ac0ef 100644 (file)
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -2367,7 +2367,7 @@
                   (mult:ANYF (match_operand:ANYF 1 "register_operand" "f")
                              (match_operand:ANYF 2 "register_operand" "f"))
                   (match_operand:ANYF 3 "register_operand" "f"))))]
-  "ISA_HAS_NMADD4_NMSUB4 (<MODE>mode)
+  "ISA_HAS_NMADD4_NMSUB4
    && TARGET_FUSED_MADD
    && HONOR_SIGNED_ZEROS (<MODE>mode)
    && !HONOR_NANS (<MODE>mode)"
@@ -2382,7 +2382,7 @@
                   (mult:ANYF (match_operand:ANYF 1 "register_operand" "f")
                              (match_operand:ANYF 2 "register_operand" "f"))
                   (match_operand:ANYF 3 "register_operand" "0"))))]
-  "ISA_HAS_NMADD3_NMSUB3 (<MODE>mode)
+  "ISA_HAS_NMADD3_NMSUB3
    && TARGET_FUSED_MADD
    && HONOR_SIGNED_ZEROS (<MODE>mode)
    && !HONOR_NANS (<MODE>mode)"
@@ -2397,7 +2397,7 @@
         (mult:ANYF (neg:ANYF (match_operand:ANYF 1 "register_operand" "f"))
                    (match_operand:ANYF 2 "register_operand" "f"))
         (match_operand:ANYF 3 "register_operand" "f")))]
-  "ISA_HAS_NMADD4_NMSUB4 (<MODE>mode)
+  "ISA_HAS_NMADD4_NMSUB4
    && TARGET_FUSED_MADD
    && !HONOR_SIGNED_ZEROS (<MODE>mode)
    && !HONOR_NANS (<MODE>mode)"
@@ -2412,7 +2412,7 @@
         (mult:ANYF (neg:ANYF (match_operand:ANYF 1 "register_operand" "f"))
                    (match_operand:ANYF 2 "register_operand" "f"))
         (match_operand:ANYF 3 "register_operand" "0")))]
-  "ISA_HAS_NMADD3_NMSUB3 (<MODE>mode)
+  "ISA_HAS_NMADD3_NMSUB3
    && TARGET_FUSED_MADD
    && !HONOR_SIGNED_ZEROS (<MODE>mode)
    && !HONOR_NANS (<MODE>mode)"
@@ -2427,7 +2427,7 @@
                   (mult:ANYF (match_operand:ANYF 2 "register_operand" "f")
                              (match_operand:ANYF 3 "register_operand" "f"))
                   (match_operand:ANYF 1 "register_operand" "f"))))]
-  "ISA_HAS_NMADD4_NMSUB4 (<MODE>mode)
+  "ISA_HAS_NMADD4_NMSUB4
    && TARGET_FUSED_MADD
    && HONOR_SIGNED_ZEROS (<MODE>mode)
    && !HONOR_NANS (<MODE>mode)"
@@ -2442,7 +2442,7 @@
                   (mult:ANYF (match_operand:ANYF 2 "register_operand" "f")
                              (match_operand:ANYF 3 "register_operand" "f"))
                   (match_operand:ANYF 1 "register_operand" "0"))))]
-  "ISA_HAS_NMADD3_NMSUB3 (<MODE>mode)
+  "ISA_HAS_NMADD3_NMSUB3
    && TARGET_FUSED_MADD
    && HONOR_SIGNED_ZEROS (<MODE>mode)
    && !HONOR_NANS (<MODE>mode)"
@@ -2457,7 +2457,7 @@
         (match_operand:ANYF 1 "register_operand" "f")
         (mult:ANYF (match_operand:ANYF 2 "register_operand" "f")
                    (match_operand:ANYF 3 "register_operand" "f"))))]
-  "ISA_HAS_NMADD4_NMSUB4 (<MODE>mode)
+  "ISA_HAS_NMADD4_NMSUB4
    && TARGET_FUSED_MADD
    && !HONOR_SIGNED_ZEROS (<MODE>mode)
    && !HONOR_NANS (<MODE>mode)"
@@ -2472,7 +2472,7 @@
         (match_operand:ANYF 1 "register_operand" "f")
         (mult:ANYF (match_operand:ANYF 2 "register_operand" "f")
                    (match_operand:ANYF 3 "register_operand" "0"))))]
-  "ISA_HAS_NMADD3_NMSUB3 (<MODE>mode)
+  "ISA_HAS_NMADD3_NMSUB3
    && TARGET_FUSED_MADD
    && !HONOR_SIGNED_ZEROS (<MODE>mode)
    && !HONOR_NANS (<MODE>mode)"
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