]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: ti: k3-am62a: Enable remote processors at board level
authorBeleswar Padhi <b-padhi@ti.com>
Mon, 8 Sep 2025 14:27:59 +0000 (19:57 +0530)
committerNishanth Menon <nm@ti.com>
Fri, 12 Sep 2025 04:15:29 +0000 (09:45 +0530)
Remote Processors defined in top-level AM62A SoC dtsi files are
incomplete without the memory carveouts and mailbox assignments which
are only known at board integration level.

Therefore, disable the remote processors at SoC level and enable them at
board level where above information is available.

Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Tested-by: Judith Mendez <jm@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
Link: https://patch.msgid.link/20250908142826.1828676-8-b-padhi@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi
arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
arch/arm64/boot/dts/ti/k3-am62d2-evm.dts

index ee961ced7208f99acf239ba9c8d8cbef0c326481..d22caa7c346b35dcb11163a5e73e17790ff751dd 100644 (file)
                        ti,sci = <&dmsc>;
                        ti,sci-dev-id = <9>;
                        ti,sci-proc-ids = <0x03 0xff>;
+                       status = "disabled";
                };
        };
 };
index 207ca00630d1813e070f07851d6ef737c2bb410a..403adfbf7dce28c3d04c8640b4680994b7d6047b 100644 (file)
        mboxes = <&mailbox0_cluster2 &mbox_mcu_r5_0>;
        memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
                        <&mcu_r5fss0_core0_memory_region>;
+       status = "okay";
 };
 
 &ospi0 {
        mboxes = <&mailbox0_cluster0  &mbox_r5_0>;
        memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
                        <&wkup_r5fss0_core0_memory_region>;
+       status = "okay";
 };
index 9ef1c829a9df555d3694d063d149342d1a50fc9d..23877dadc98dcd474a8b2a1db5f284a30f978081 100644 (file)
                        ti,sci = <&dmsc>;
                        ti,sci-dev-id = <121>;
                        ti,sci-proc-ids = <0x01 0xff>;
+                       status = "disabled";
                };
        };
 
index bceead5e288e6d78c671baf0afabd1a9aa23fbee..03291862f07a61b814c30248ce39809803e239b1 100644 (file)
        mboxes = <&mailbox0_cluster0>, <&mbox_r5_0>;
        memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
                        <&wkup_r5fss0_core0_memory_region>;
+       status = "okay";
 };
 
 &mcu_r5fss0 {
        mboxes = <&mailbox0_cluster2>, <&mbox_mcu_r5_0>;
        memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
                        <&mcu_r5fss0_core0_memory_region>;
+       status = "okay";
 };
 
 &c7x_0 {
index daea18b0bc61c67fc1a1c8f4f47b4fd40b0235e1..d45fc42b03f3ab6b2a1a6e56692b072b7061c479 100644 (file)
        mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
        memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
                        <&wkup_r5fss0_core0_memory_region>;
+       status = "okay";
        bootph-pre-ram;
 };