drm/amdgpu/sdma: Fix incorrect calculations of the wptr of the doorbells

[ Upstream commit 7dba6e838e741caadcf27ef717b6dcb561e77f89 ]

This patch fixes the issue where the driver miscomputes the 64-bit
values of the wptr of the SDMA doorbell when initializing the
hardware. SDMA engines v4 and later on have full 64-bit registers for
wptr thus they should be set properly.

Older generation hardwares like CIK / SI have only 16 / 20 / 24bits
for the WPTR, where the calls of lower_32_bits() will be removed in a
following patch.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Haohui Mai <ricetons@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index d7e8f72323641cdbcbfe75f27f63f0091bde4284..ff86c43b63d1159867021ba106f074d049e350ce 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -772,8 +772,8 @@ static void sdma_v4_0_ring_set_wptr(struct amdgpu_ring *ring)
 
                DRM_DEBUG("Using doorbell -- "
                                "wptr_offs == 0x%08x "
-                               "lower_32_bits(ring->wptr) << 2 == 0x%08x "
-                               "upper_32_bits(ring->wptr) << 2 == 0x%08x\n",
+                               "lower_32_bits(ring->wptr << 2) == 0x%08x "
+                               "upper_32_bits(ring->wptr << 2) == 0x%08x\n",
                                ring->wptr_offs,
                                lower_32_bits(ring->wptr << 2),
                                upper_32_bits(ring->wptr << 2));

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
index a8d49c005f73d762c9a1b048c05dea2594dfa5b3..627eb1f147c20d9b452508720bd008fe48f66063 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
@@ -394,8 +394,8 @@ static void sdma_v5_0_ring_set_wptr(struct amdgpu_ring *ring)
        if (ring->use_doorbell) {
                DRM_DEBUG("Using doorbell -- "
                                "wptr_offs == 0x%08x "
-                               "lower_32_bits(ring->wptr) << 2 == 0x%08x "
-                               "upper_32_bits(ring->wptr) << 2 == 0x%08x\n",
+                               "lower_32_bits(ring->wptr << 2) == 0x%08x "
+                               "upper_32_bits(ring->wptr << 2) == 0x%08x\n",
                                ring->wptr_offs,
                                lower_32_bits(ring->wptr << 2),
                                upper_32_bits(ring->wptr << 2));
@@ -774,9 +774,9 @@ static int sdma_v5_0_gfx_resume(struct amdgpu_device *adev)
 
                if (!amdgpu_sriov_vf(adev)) { /* only bare-metal use register write for wptr */
                        WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR),
-                              lower_32_bits(ring->wptr) << 2);
+                              lower_32_bits(ring->wptr << 2));
                        WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_HI),
-                              upper_32_bits(ring->wptr) << 2);
+                              upper_32_bits(ring->wptr << 2));
                }
 
                doorbell = RREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL));

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
index 824eace698842c0b204c3ebc6a48467abd91277c..a5eb82bfeaa8d4a7868be43d4304060a07f21b6f 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
@@ -295,8 +295,8 @@ static void sdma_v5_2_ring_set_wptr(struct amdgpu_ring *ring)
        if (ring->use_doorbell) {
                DRM_DEBUG("Using doorbell -- "
                                "wptr_offs == 0x%08x "
-                               "lower_32_bits(ring->wptr) << 2 == 0x%08x "
-                               "upper_32_bits(ring->wptr) << 2 == 0x%08x\n",
+                               "lower_32_bits(ring->wptr << 2) == 0x%08x "
+                               "upper_32_bits(ring->wptr << 2) == 0x%08x\n",
                                ring->wptr_offs,
                                lower_32_bits(ring->wptr << 2),
                                upper_32_bits(ring->wptr << 2));
@@ -672,8 +672,8 @@ static int sdma_v5_2_gfx_resume(struct amdgpu_device *adev)
                WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_MINOR_PTR_UPDATE), 1);
 
                if (!amdgpu_sriov_vf(adev)) { /* only bare-metal use register write for wptr */
-                       WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR), lower_32_bits(ring->wptr) << 2);
-                       WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_HI), upper_32_bits(ring->wptr) << 2);
+                       WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR), lower_32_bits(ring->wptr << 2));
+                       WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR_HI), upper_32_bits(ring->wptr << 2));
                }
 
                doorbell = RREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_DOORBELL));