arm64: dts: qcom: eliza: Coding style clean-ups

Some coding style issues were raised during review but the devicetree
was merged meanwhile. Address them here.

These changes are non-functional.

Fixes: db7fe6963466 ("arm64: dts: qcom: Introduce Eliza Soc base dtsi")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260324-eliza-base-dt-fixes-v3-1-3a4a03e72f8f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/eliza.dtsi b/arch/arm64/boot/dts/qcom/eliza.dtsi
index 190f10a77d7486f11c0e43f0c00507d646d70aba..5dc3aede6842ae7a7d221291c8a5300319d94f86 100644 (file)
--- a/arch/arm64/boot/dts/qcom/eliza.dtsi
+++ b/arch/arm64/boot/dts/qcom/eliza.dtsi
@@ -686,7 +686,7 @@
                        reg = <0x0 0x016c0000 0x0 0x11400>;
                        qcom,bcm-voters = <&apps_bcm_voter>;
                        clocks = <&gcc GCC_AGGRE_NOC_PCIE_AXI_CLK>,
-                               <&gcc GCC_CFG_NOC_PCIE_ANOC_AHB_CLK>;
+                                <&gcc GCC_CFG_NOC_PCIE_ANOC_AHB_CLK>;
                        #interconnect-cells = <2>;
                };
 
@@ -722,7 +722,6 @@
                        clocks = <&rpmhcc RPMH_CXO_CLK>,
                                 <&gcc GCC_UFS_PHY_PHY_AUX_CLK>,
                                 <&tcsr TCSR_UFS_CLKREF_EN>;
-
                        clock-names = "ref",
                                      "ref_aux",
                                      "qref";
@@ -912,10 +911,12 @@
                spmi: arbiter@c400000 {
                        compatible = "qcom,eliza-spmi-pmic-arb",
                                     "qcom,x1e80100-spmi-pmic-arb";
-                       reg = <0 0x0c400000 0 0x3000>,
-                             <0 0x0c500000 0 0x400000>,
-                             <0 0x0c440000 0 0x80000>;
-                       reg-names = "core", "chnls", "obsrvr";
+                       reg = <0x0 0x0c400000 0x0 0x3000>,
+                             <0x0 0x0c500000 0x0 0x400000>,
+                             <0x0 0x0c440000 0x0 0x80000>;
+                       reg-names = "core",
+                                   "chnls",
+                                   "obsrvr";
 
                        qcom,ee = <0>;
                        qcom,channel = <0>;
@@ -925,9 +926,10 @@
                        ranges;
 
                        spmi_bus0: spmi@c42d000 {
-                               reg = <0 0x0c42d000 0 0x4000>,
-                                     <0 0x0c4c0000 0 0x10000>;
-                               reg-names = "cnfg", "intr";
+                               reg = <0x0 0x0c42d000 0x0 0x4000>,
+                                     <0x0 0x0c4c0000 0x0 0x10000>;
+                               reg-names = "cnfg",
+                                           "intr";
 
                                interrupt-names = "periph_irq";
                                interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
@@ -939,9 +941,10 @@
                        };
 
                        spmi_bus1: spmi@c432000 {
-                               reg = <0 0x0c432000 0 0x4000>,
-                                     <0 0x0c4d0000 0 0x10000>;
-                               reg-names = "cnfg", "intr";
+                               reg = <0x0 0x0c432000 0x0 0x4000>,
+                                     <0x0 0x0c4d0000 0x0 0x10000>;
+                               reg-names = "cnfg",
+                                           "intr";
 
                                interrupt-names = "periph_irq";
                                interrupts-extended = <&pdc 3 IRQ_TYPE_LEVEL_HIGH>;