zynq_cse: Add initial support for cse nand board

Added zynq cse board support with nand flash as a config
option.

bash> make zynq_cse_nand_config
Configuring for zynq_cse_nand - Board: zynq_cse, Options: CSE_NAND

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>

diff --git a/boards.cfg b/boards.cfg
index 969220cde7265916c0ae1507977cb5c3334fd637..db58ed4344f827562cade8e050dac43e599db6f5 100644 (file)
--- a/boards.cfg
+++ b/boards.cfg
@@ -324,6 +324,7 @@ zynq_afx_nand                arm         armv7       zynq                xilinx
 zynq_zc70x                   arm         armv7       zynq                xilinx         zynq
 zynq_zed                     arm         armv7       zynq                xilinx         zynq
 zynq_cse_qspi               arm         armv7       zynq                xilinx         zynq    zynq_cse:CSE_QSPI
+zynq_cse_nand               arm         armv7       zynq                xilinx         zynq    zynq_cse:CSE_NAND
 omap5_uevm                   arm         armv7       omap5_uevm          ti            omap5
 dra7xx_evm                  arm         armv7       dra7xx              ti             omap5
 s5p_goni                     arm         armv7       goni                samsung        s5pc1xx

diff --git a/include/configs/zynq_common.h b/include/configs/zynq_common.h
index e55f6fbffa17a43eea82b9dfa3aab900201d65f9..126e0f99aae2a933f8ae7a0729b77dc7119221a6 100644 (file)
--- a/include/configs/zynq_common.h
+++ b/include/configs/zynq_common.h
@@ -38,6 +38,8 @@
 /* TEXT BASE defines */
 #if defined(CONFIG_CSE_QSPI)
 # define CONFIG_SYS_TEXT_BASE          0xFFFC4800
+#elif defined(CONFIG_CSE_NAND)
+# define CONFIG_SYS_TEXT_BASE          0x00100000
 #else
 # define CONFIG_SYS_TEXT_BASE          0x04000000
 #endif

diff --git a/include/configs/zynq_cse.h b/include/configs/zynq_cse.h
index 7f12b81a672b4cf7968a0e19e71c05e333ee3e40..84ce3330aba79636d6e6d167a303d941edc64c62 100644 (file)
--- a/include/configs/zynq_cse.h
+++ b/include/configs/zynq_cse.h
@@ -18,6 +18,10 @@
 
 #if defined(CONFIG_CSE_QSPI)
 # define CONFIG_ZYNQ_QSPI
+
+#elif defined(CONFIG_CSE_NAND)
+# define CONFIG_NAND_ZYNQ
+
 #endif
 
 #include <configs/zynq_common.h>
@@ -52,6 +56,12 @@
 # define PHYS_SDRAM_1_SIZE             (256 * 1024)
 # define CONFIG_SYS_SDRAM_BASE         0xFFFD0000
 # define CONFIG_ENV_SIZE               1400
+
+#elif defined(CONFIG_CSE_NAND)
+# define PHYS_SDRAM_1_SIZE             (4 * 1024 * 1024)
+# define CONFIG_SYS_SDRAM_BASE         0
+# define CONFIG_ENV_SIZE               0x10000
+
 #endif
 
 #endif /* __CONFIG_ZYNQ_CSE_H */