drm/amdgpu/mes: adjust the VMID masks

The firmware limits the max vmid, but align the
settings with the hw limits as well just to be safe.

Reviewed-by: Shaoyun liu  <Shaoyun.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
index 4883adcfbb4bb066073ff7e8c4bd0f28e009e4a0..45bf8309cb3758ef270efa533b524c8150937258 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
@@ -105,8 +105,8 @@ int amdgpu_mes_init(struct amdgpu_device *adev)
                spin_lock_init(&adev->mes.ring_lock[i]);
 
        adev->mes.total_max_queue = AMDGPU_FENCE_MES_QUEUE_ID_MASK;
-       adev->mes.vmid_mask_mmhub = 0xffffff00;
-       adev->mes.vmid_mask_gfxhub = adev->gfx.disable_kq ? 0xfffffffe : 0xffffff00;
+       adev->mes.vmid_mask_mmhub = 0xFF00;
+       adev->mes.vmid_mask_gfxhub = adev->gfx.disable_kq ? 0xFFFE : 0xFF00;
 
        num_pipes = adev->gfx.me.num_pipe_per_me * adev->gfx.me.num_me;
        if (num_pipes > AMDGPU_MES_MAX_GFX_PIPES)