]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
ARM: dts: lpc: add cfg surfix in pinctrl child node
authorFrank Li <Frank.Li@nxp.com>
Sun, 6 Jul 2025 18:47:02 +0000 (14:47 -0400)
committerVladimir Zapolskiy <vz@mleia.com>
Wed, 10 Sep 2025 23:53:59 +0000 (02:53 +0300)
Add cfg surfix in pinctrl child node to fix below CHECK_DTB warning:
arch/arm/boot/dts/nxp/lpc/lpc4337-ciaa.dtb: pinctrl@40086000 (nxp,lpc1850-scu): ssp-pins: 'ssp1_cs', 'ssp1_miso_mosi', 'ssp1_sck' do not match any of the regexes: '^pinctrl-[0-9]+$', '_cfg$'
        from schema $id: http://devicetree.org/schemas/pinctrl/nxp,lpc1850-scu.yaml#

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
arch/arm/boot/dts/nxp/lpc/lpc4337-ciaa.dts
arch/arm/boot/dts/nxp/lpc/lpc4357-ea4357-devkit.dts

index beddaba85393e61a07da5175fa9e7fb081bbac3f..5ff43c825944dcfa523e8be2fdf49f1ad8e0a884 100644 (file)
        };
 
        ssp_pins: ssp-pins {
-               ssp1_cs {
+               ssp1_cs_cfg {
                        pins = "p6_7";
                        function = "gpio";
                        bias-pull-up;
                        bias-disable;
                };
 
-               ssp1_miso_mosi {
+               ssp1_miso_mosi_cfg {
                        pins = "p1_3", "p1_4";
                        function = "ssp1";
                        slew-rate = <1>;
                        input-schmitt-disable;
                };
 
-               ssp1_sck {
+               ssp1_sck_cfg {
                        pins = "pf_4";
                        function = "ssp1";
                        slew-rate = <1>;
index 60bcfa5e0518e55eb3e642f146d1c96f2ebd5267..9dc8c3cc2211001f30a5a15c3a04a240e4acd86b 100644 (file)
        };
 
        ssp0_pins: ssp0-pins {
-               ssp0_sck_miso_mosi {
+               ssp0_sck_miso_mosi_cfg {
                        pins = "pf_0", "pf_2", "pf_3";
                        function = "ssp0";
                        slew-rate = <1>;
                        input-schmitt-disable;
                };
 
-               ssp0_ssel {
+               ssp0_ssel_cfg {
                        pins = "pf_1";
                        function = "ssp0";
                        bias-pull-up;
        };
 
        usb0_pins: usb0-pins {
-               usb0_pwr_enable {
+               usb0_pwr_enable_cfg {
                        pins = "p2_3";
                        function = "usb0";
                };
 
-               usb0_pwr_fault {
+               usb0_pwr_fault_cfg {
                        pins = "p8_0";
                        function = "usb0";
                        bias-disable;