phy: rockchip: naneng-combphy: Enable U3 port for USB3OTG on RK3568

The USB OTG U3 port may have been disabled early, add support to the
COMBPHY driver to re-enable the U3 port.

This matches changes made in the Linux commit 7bb14b61b7d0 ("phy:
rockchip: naneng-combphy: Enable U3 OTG port for RK3568").

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Acked-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
index d602f965d6aa15ef922d1ff9890b02ff125a054d..82353ae7678ce4d117f9ea307ea53024558726e9 100644 (file)
--- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
+++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
@@ -399,6 +399,14 @@ static int rk3568_combphy_cfg(struct rockchip_combphy_priv *priv)
                param_write(priv->phy_grf, &cfg->pipe_txcomp_sel, false);
                param_write(priv->phy_grf, &cfg->pipe_txelec_sel, false);
                param_write(priv->phy_grf, &cfg->usb_mode_set, true);
+               switch (priv->id) {
+               case 0:
+                       param_write(priv->pipe_grf, &cfg->u3otg0_port_en, true);
+                       break;
+               case 1:
+                       param_write(priv->pipe_grf, &cfg->u3otg1_port_en, true);
+                       break;
+               }
                break;
        case PHY_TYPE_SATA:
                writel(0x41, priv->mmio + 0x38);