ARM: zynq: Show ECC status on the same line as DRAM size

Without this patch is DRAM size one line below DRAM:
which is not nice

Origin:
I2C:   ready
DRAM:  ECC disabled
1 GiB
Now running in RAM - U-Boot at: 3ff59000
MMC:   zynq_sdhci: 0

Fixed by this patch:
I2C:   ready
DRAM:  ECC disabled 1 GiB
Now running in RAM - U-Boot at: 3ff59000
MMC:   zynq_sdhci: 0
Using default environment

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/cpu/armv7/zynq/ddrc.c b/arch/arm/cpu/armv7/zynq/ddrc.c
index eb29379a5ecf68d1c417f547a79bc36261c20762..90ce4ff31867ab80f99f8f7a75df15a0acf1974c 100644 (file)
--- a/arch/arm/cpu/armv7/zynq/ddrc.c
+++ b/arch/arm/cpu/armv7/zynq/ddrc.c
@@ -34,7 +34,7 @@ void zynq_ddrc_init(void)
        /* ECC is enabled when memory is in 16bit mode and it is enabled */
        if ((ecctype == ZYNQ_DDRC_ECC_SCRUBREG_ECCMODE_SECDED) &&
            (width == ZYNQ_DDRC_CTRLREG_BUSWIDTH_16BIT)) {
-               puts("Memory: ECC enabled\n");
+               puts("ECC enabled ");
                /*
                 * Clear the first 1MB because it is not initialized from
                 * first stage bootloader. To get ECC to work all memory has
@@ -44,6 +44,6 @@ void zynq_ddrc_init(void)
 
                gd->ram_size /= 2;
        } else {
-               puts("Memory: ECC disabled\n");
+               puts("ECC disabled ");
        }
 }