]> git.ipfire.org Git - thirdparty/openwrt.git/commitdiff
realtek: dts: add phy-package to LGS352C 23711/head
authorMarkus Stockhausen <markus.stockhausen@gmx.de>
Mon, 8 Jun 2026 16:25:50 +0000 (18:25 +0200)
committerMarkus Stockhausen <markus.stockhausen@gmx.de>
Sat, 13 Jun 2026 14:21:12 +0000 (16:21 +0200)
Describe the RTL8218D packages in the device tree.

Link: https://github.com/openwrt/openwrt/pull/23711
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
target/linux/realtek/dts/rtl9311_linksys_lgs352c.dts

index 61493e4c76fff8b7a475845dca17445f0c5636c0..78fc59e2538874c23069ed592958d8679f3f27e2 100644 (file)
 };
 
 &mdio_bus0 {
-       PHY_C22(0, 0)
-       PHY_C22(1, 1)
-       PHY_C22(2, 2)
-       PHY_C22(3, 3)
-       PHY_C22(4, 4)
-       PHY_C22(5, 5)
-       PHY_C22(6, 6)
-       PHY_C22(7, 7)
-       PHY_C22(8, 8)
-       PHY_C22(9, 9)
-       PHY_C22(10, 10)
-       PHY_C22(11, 11)
-       PHY_C22(12, 12)
-       PHY_C22(13, 13)
-       PHY_C22(14, 14)
-       PHY_C22(15, 15)
-       PHY_C22(16, 16)
-       PHY_C22(17, 17)
-       PHY_C22(18, 18)
-       PHY_C22(19, 19)
-       PHY_C22(20, 20)
-       PHY_C22(21, 21)
-       PHY_C22(22, 22)
-       PHY_C22(23, 23)
+       ethernet-phy-package@0 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0>;
+
+               PHY_C22(0, 0)
+               PHY_C22(1, 1)
+               PHY_C22(2, 2)
+               PHY_C22(3, 3)
+               PHY_C22(4, 4)
+               PHY_C22(5, 5)
+               PHY_C22(6, 6)
+               PHY_C22(7, 7)
+       };
+       ethernet-phy-package@8 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <8>;
+
+               PHY_C22(8, 8)
+               PHY_C22(9, 9)
+               PHY_C22(10, 10)
+               PHY_C22(11, 11)
+               PHY_C22(12, 12)
+               PHY_C22(13, 13)
+               PHY_C22(14, 14)
+               PHY_C22(15, 15)
+       };
+       ethernet-phy-package@16 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <16>;
+
+               PHY_C22(16, 16)
+               PHY_C22(17, 17)
+               PHY_C22(18, 18)
+               PHY_C22(19, 19)
+               PHY_C22(20, 20)
+               PHY_C22(21, 21)
+               PHY_C22(22, 22)
+               PHY_C22(23, 23)
+       };
 };
 
 &mdio_bus1 {
-       PHY_C22(24, 0)
-       PHY_C22(25, 1)
-       PHY_C22(26, 2)
-       PHY_C22(27, 3)
-       PHY_C22(28, 4)
-       PHY_C22(29, 5)
-       PHY_C22(30, 6)
-       PHY_C22(31, 7)
-       PHY_C22(32, 8)
-       PHY_C22(33, 9)
-       PHY_C22(34, 10)
-       PHY_C22(35, 11)
-       PHY_C22(36, 12)
-       PHY_C22(37, 13)
-       PHY_C22(38, 14)
-       PHY_C22(39, 15)
-       PHY_C22(40, 16)
-       PHY_C22(41, 17)
-       PHY_C22(42, 18)
-       PHY_C22(43, 19)
-       PHY_C22(44, 20)
-       PHY_C22(45, 21)
-       PHY_C22(46, 22)
-       PHY_C22(47, 23)
+       ethernet-phy-package@0 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0>;
+
+               PHY_C22(24, 0)
+               PHY_C22(25, 1)
+               PHY_C22(26, 2)
+               PHY_C22(27, 3)
+               PHY_C22(28, 4)
+               PHY_C22(29, 5)
+               PHY_C22(30, 6)
+               PHY_C22(31, 7)
+       };
+       ethernet-phy-package@8 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <8>;
+
+               PHY_C22(32, 8)
+               PHY_C22(33, 9)
+               PHY_C22(34, 10)
+               PHY_C22(35, 11)
+               PHY_C22(36, 12)
+               PHY_C22(37, 13)
+               PHY_C22(38, 14)
+               PHY_C22(39, 15)
+       };
+       ethernet-phy-package@16 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <16>;
+
+               PHY_C22(40, 16)
+               PHY_C22(41, 17)
+               PHY_C22(42, 18)
+               PHY_C22(43, 19)
+               PHY_C22(44, 20)
+               PHY_C22(45, 21)
+               PHY_C22(46, 22)
+               PHY_C22(47, 23)
+       };
 };
 
 &switch0 {