From: Greg Kroah-Hartman Date: Tue, 13 Aug 2024 13:24:50 +0000 (+0200) Subject: 5.15-stable patches X-Git-Tag: v6.1.105~13 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=01a3b5a51131ef03677971766b3086dfde0b1ea9;p=thirdparty%2Fkernel%2Fstable-queue.git 5.15-stable patches added patches: arm64-dts-qcom-msm8996-correct-clock-cells-for-qmp-phy-nodes.patch --- diff --git a/queue-5.15/arm64-dts-qcom-msm8996-correct-clock-cells-for-qmp-phy-nodes.patch b/queue-5.15/arm64-dts-qcom-msm8996-correct-clock-cells-for-qmp-phy-nodes.patch new file mode 100644 index 00000000000..5808fdc859b --- /dev/null +++ b/queue-5.15/arm64-dts-qcom-msm8996-correct-clock-cells-for-qmp-phy-nodes.patch @@ -0,0 +1,64 @@ +From b874fff9a7683df30e5aff16d5a85b1f8a43aa5d Mon Sep 17 00:00:00 2001 +From: Dmitry Baryshkov +Date: Mon, 20 Jun 2022 10:19:34 +0300 +Subject: arm64: dts: qcom: msm8996: correct #clock-cells for QMP PHY nodes + +From: Dmitry Baryshkov + +commit b874fff9a7683df30e5aff16d5a85b1f8a43aa5d upstream. + +The commit 82d61e19fccb ("arm64: dts: qcom: msm8996: Move '#clock-cells' +to QMP PHY child node") moved the '#clock-cells' properties to the child +nodes. However it missed the fact that the property must have been set +to <0> (as all pipe clocks use of_clk_hw_simple_get as the xlate +function. Also the mentioned commit didn't add '#clock-cells' properties +to second and third PCIe PHY nodes. Correct both these mistakes: + +- Set '#clock-cells' to <0>, +- Add the property to pciephy_1 and pciephy_2 nodes. + +Fixes: 82d61e19fccb ("arm64: dts: qcom: msm8996: Move '#clock-cells' to QMP PHY child node") +Signed-off-by: Dmitry Baryshkov +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20220620071936.1558906-3-dmitry.baryshkov@linaro.org +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/qcom/msm8996.dtsi | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi ++++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi +@@ -636,7 +636,7 @@ + <0x00035400 0x1dc>; + #phy-cells = <0>; + +- #clock-cells = <1>; ++ #clock-cells = <0>; + clock-output-names = "pcie_0_pipe_clk_src"; + clocks = <&gcc GCC_PCIE_0_PIPE_CLK>; + clock-names = "pipe0"; +@@ -650,6 +650,7 @@ + <0x00036400 0x1dc>; + #phy-cells = <0>; + ++ #clock-cells = <0>; + clock-output-names = "pcie_1_pipe_clk_src"; + clocks = <&gcc GCC_PCIE_1_PIPE_CLK>; + clock-names = "pipe1"; +@@ -663,6 +664,7 @@ + <0x00037400 0x1dc>; + #phy-cells = <0>; + ++ #clock-cells = <0>; + clock-output-names = "pcie_2_pipe_clk_src"; + clocks = <&gcc GCC_PCIE_2_PIPE_CLK>; + clock-names = "pipe2"; +@@ -2662,7 +2664,7 @@ + <0x07410600 0x1a8>; + #phy-cells = <0>; + +- #clock-cells = <1>; ++ #clock-cells = <0>; + clock-output-names = "usb3_phy_pipe_clk_src"; + clocks = <&gcc GCC_USB3_PHY_PIPE_CLK>; + clock-names = "pipe0"; diff --git a/queue-5.15/series b/queue-5.15/series index b19361ab1f9..035b3e1d64d 100644 --- a/queue-5.15/series +++ b/queue-5.15/series @@ -474,3 +474,4 @@ wifi-mac80211-check-basic-rates-validity.patch mptcp-fully-established-after-add_addr-echo-on-mpj.patch drm-i915-gem-fix-virtual-memory-mapping-boundaries-calculation.patch powerpc-avoid-nmi_enter-nmi_exit-in-real-mode-interrupt.patch +arm64-dts-qcom-msm8996-correct-clock-cells-for-qmp-phy-nodes.patch