From: Michal Simek Date: Wed, 23 Jan 2013 08:13:33 +0000 (+0100) Subject: Merge commit 'v2013.01' into master-next X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=01ebbdc82fef0f8c2122a69cd3c4900a23b28af4;p=thirdparty%2Fu-boot.git Merge commit 'v2013.01' into master-next --- 01ebbdc82fef0f8c2122a69cd3c4900a23b28af4 diff --cc Makefile index 6cd4fa766cb,3305e8cd1c0..149e4271a2b mode 100755,100644..100755 --- a/Makefile +++ b/Makefile diff --cc arch/arm/lib/bootm.c index 2960c4d1d54,1bd27308568..7ee1f2b2ead --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@@ -307,7 -313,11 +313,8 @@@ static void boot_prep_linux(bootm_heade setup_initrd_tag(gd->bd, images->rd_start, images->rd_end); #endif + setup_board_tags(¶ms); setup_end_tag(gd->bd); -#else /* all tags */ - printf("FDT and ATAGS support not compiled in - hanging\n"); - hang(); #endif /* all tags */ } } diff --cc arch/microblaze/lib/board.c index 97d2f371957,a7c2f762339..a6a8d194b72 mode 100755,100644..100755 --- a/arch/microblaze/lib/board.c +++ b/arch/microblaze/lib/board.c @@@ -112,14 -107,8 +111,12 @@@ void board_init_f(ulong not_used */ mem_malloc_init (CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN); - #ifdef CONFIG_SERIAL_MULTI serial_initialize(); - #endif +#if defined(CONFIG_HW_WATCHDOG) + hw_watchdog_init(); +#endif + for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { WATCHDOG_RESET (); if ((*init_fnc_ptr) () != 0) { diff --cc board/xilinx/ppc405-generic/u-boot.lds index 45e428de87a,00000000000..7fbbca66998 mode 100644,000000..100644 --- a/board/xilinx/ppc405-generic/u-boot.lds +++ b/board/xilinx/ppc405-generic/u-boot.lds @@@ -1,132 -1,0 +1,132 @@@ +/* + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +ENTRY(_start) + +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + /* WARNING - the following is hand-optimized to fit within */ + /* the sector layout of our flash chips! XXX FIXME XXX */ + + + *(.text) + *(.fixup) + *(.got1) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.eh_frame) + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : { *(.u_boot_cmd) } - __u_boot_cmd_end = .; - ++ . = ALIGN(4); ++ .u_boot_list : { ++ #include ++ } + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss (NOLOAD) : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } + __bss_end__ = .; + ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your configuration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and TEXT_BASE may need to be modified."); + + _end = . ; + PROVIDE (end = .); +} diff --cc board/xilinx/ppc440-generic/u-boot.lds index df7e2faa639,00000000000..023324dc8ef mode 100644,000000..100644 --- a/board/xilinx/ppc440-generic/u-boot.lds +++ b/board/xilinx/ppc440-generic/u-boot.lds @@@ -1,104 -1,0 +1,104 @@@ +/* + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +ENTRY(_start_440) + + +PHDRS +{ + text PT_LOAD; + bss PT_LOAD; +} + +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .text : + { + *(.text*) + } :text + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + } :text + + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + _GOT2_TABLE_ = .; + KEEP(*(.got2)) + KEEP(*(.got)) + PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); + _FIXUP_TABLE_ = .; + KEEP(*(.fixup)) + } + __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; + __fixup_entries = (. - _FIXUP_TABLE_) >> 2; + + .data : + { + *(.data*) + *(.sdata*) + } + _edata = .; + PROVIDE (edata = .); + + . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : { *(.u_boot_cmd) } - __u_boot_cmd_end = .; - ++ . = ALIGN(4); ++ .u_boot_list : { ++ #include ++ } + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss (NOLOAD) : + { + *(.bss*) + *(.sbss*) + *(COMMON) + } :bss + . = ALIGN(4); + __bss_end__ = .; + ppcenv_assert = ASSERT(. < 0xFFFFB000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CONFIG_SYS_MONITOR_BASE, CONFIG_SYS_MONITOR_LEN and TEXT_BASE may need to be modified."); + + PROVIDE (end = .); +} diff --cc boards.cfg index 9ff0e7656e9,e4b0d44fa78..b4449b09925 --- a/boards.cfg +++ b/boards.cfg @@@ -262,20 -275,9 +275,21 @@@ devkit8000 ar mcx arm armv7 mcx htkw omap3 tricorder arm armv7 tricorder corscience omap3 twister arm armv7 twister technexion omap3 + nokia_rx51 arm armv7 rx51 nokia omap3 omap4_panda arm armv7 panda ti omap4 omap4_sdp4430 arm armv7 sdp4430 ti omap4 +zynq_zc770_XM010 arm armv7 zynq xilinx zynq zynq_zc770:ZC770_XM010 +zynq_zc770_XM011 arm armv7 zynq xilinx zynq zynq_zc770:ZC770_XM011 +zynq_zc770_XM011_n16b arm armv7 zynq xilinx zynq zynq_zc770:ZC770_XM011,XILINX_ZYNQ_NAND_BUSWIDTH_16 +zynq_zc770_XM012 arm armv7 zynq xilinx zynq zynq_zc770:ZC770_XM012 +zynq_zc770_XM013 arm armv7 zynq xilinx zynq zynq_zc770:ZC770_XM013 +zynq_afx_nor arm armv7 zynq xilinx zynq zynq_afx:AFX_NOR +zynq_afx_qspi arm armv7 zynq xilinx zynq zynq_afx:AFX_QSPI +zynq_afx_nand arm armv7 zynq xilinx zynq zynq_afx:AFX_NAND +zynq_afx_nand_16b arm armv7 zynq xilinx zynq zynq_afx:AFX_NAND,XILINX_ZYNQ_NAND_BUSWIDTH_16 +zynq_zc70x arm armv7 zynq xilinx zynq +zynq_cseflash arm armv7 zynq xilinx zynq +zynq_zed arm armv7 zynq xilinx zynq omap5_evm arm armv7 omap5_evm ti omap5 s5p_goni arm armv7 goni samsung s5pc1xx smdkc100 arm armv7 smdkc100 samsung s5pc1xx @@@ -1011,7 -1014,10 +1025,6 @@@ walnut powerp yellowstone powerpc ppc4xx yosemite amcc - yosemite:YELLOWSTONE yosemite powerpc ppc4xx yosemite amcc - yosemite:YOSEMITE yucca powerpc ppc4xx - amcc - AP1000 powerpc ppc4xx ap1000 amirix -fx12mm powerpc ppc4xx fx12mm avnet - fx12mm:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,INIT_TLB=board/xilinx/ppc405-generic/init.o -fx12mm_flash powerpc ppc4xx fx12mm avnet - fx12mm:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc405-generic/init.o -v5fx30teval powerpc ppc4xx v5fx30teval avnet - v5fx30teval:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o -v5fx30teval_flash powerpc ppc4xx v5fx30teval avnet - v5fx30teval:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc440-generic/init.o CRAYL1 powerpc ppc4xx L1 cray CATcenter powerpc ppc4xx PPChameleonEVB dave - CATcenter:PPCHAMELEON_MODULE_MODEL=1 CATcenter_25 powerpc ppc4xx PPChameleonEVB dave - CATcenter:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_25 diff --cc common/Makefile index f3150ebdeb9,54fcc815889..0dac9d84241 --- a/common/Makefile +++ b/common/Makefile @@@ -144,9 -149,9 +149,10 @@@ endi COBJS-y += cmd_pcmcia.o COBJS-$(CONFIG_CMD_PORTIO) += cmd_portio.o COBJS-$(CONFIG_CMD_PXE) += cmd_pxe.o + COBJS-$(CONFIG_CMD_READ) += cmd_read.o COBJS-$(CONFIG_CMD_REGINFO) += cmd_reginfo.o COBJS-$(CONFIG_CMD_REISER) += cmd_reiser.o +COBJS-$(CONFIG_CMD_ROMFS) += cmd_romfs.o COBJS-$(CONFIG_CMD_SATA) += cmd_sata.o COBJS-$(CONFIG_CMD_SF) += cmd_sf.o COBJS-$(CONFIG_CMD_SCSI) += cmd_scsi.o diff --cc common/cmd_bdinfo.c index 8905058560d,48cdd16dd21..fc50e589cb6 --- a/common/cmd_bdinfo.c +++ b/common/cmd_bdinfo.c @@@ -200,20 -195,10 +200,20 @@@ int do_bdinfo(cmd_tbl_t *cmdtp, int fla print_num("sram size ", (ulong)bd->bi_sramsize); #endif #if defined(CONFIG_CMD_NET) - print_eth(0); + i = 0; + while(1) { + dev = eth_get_dev_by_index(i); + if (dev) { + printf("eth%dname = %s\n", i, dev->name); + print_eth(i); + } else + break; + i++; + } + printf("current eth = %s\n", eth_get_name()); printf("ip_addr = %s\n", getenv("ipaddr")); #endif - printf("baudrate = %ld bps\n", (ulong)bd->bi_baudrate); + printf("baudrate = %u bps\n", (ulong)bd->bi_baudrate); return 0; } @@@ -384,20 -366,10 +384,20 @@@ int do_bdinfo(cmd_tbl_t *cmdtp, int fla } #if defined(CONFIG_CMD_NET) - print_eth(0); + i = 0; + while(1) { + dev = eth_get_dev_by_index(i); + if (dev) { + printf("eth%dname = %s\n", i, dev->name); + print_eth(i); + } else + break; + i++; + } + printf("current eth = %s\n", eth_get_name()); printf("ip_addr = %s\n", getenv("ipaddr")); #endif - printf("baudrate = %d bps\n", bd->bi_baudrate); + printf("baudrate = %u bps\n", bd->bi_baudrate); #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) print_num("TLB addr", gd->tlb_addr); #endif diff --cc common/stdio.c index 1bf9ba08297,97ff9cf4a6a..5d5117c0ed8 --- a/common/stdio.c +++ b/common/stdio.c @@@ -208,7 -207,7 +207,7 @@@ int stdio_init (void /* Initialize the list */ INIT_LIST_HEAD(&(devs.list)); --#ifdef CONFIG_ARM_DCC_MULTI ++#ifdef CONFIG_ARM_DCC drv_arm_dcc_init (); #endif #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) diff --cc drivers/mmc/Makefile index eef090a5a07,65791aa2184..54a492c1345 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@@ -47,7 -46,8 +46,9 @@@ COBJS-$(CONFIG_SDHCI) += sdhci. COBJS-$(CONFIG_S5P_SDHCI) += s5p_sdhci.o COBJS-$(CONFIG_SH_MMCIF) += sh_mmcif.o COBJS-$(CONFIG_TEGRA_MMC) += tegra_mmc.o +COBJS-$(CONFIG_ZYNQ_MMC) += zynq_mmc.o + COBJS-$(CONFIG_DWMMC) += dw_mmc.o + COBJS-$(CONFIG_EXYNOS_DWMMC) += exynos_dw_mmc.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --cc drivers/mtd/nand/Makefile index 6e932024db8,c77c0c4f0f6..76d71687d2e --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile @@@ -65,8 -78,13 +78,14 @@@ COBJS-$(CONFIG_NAND_SPEAR) += spr_nand. COBJS-$(CONFIG_TEGRA_NAND) += tegra_nand.o COBJS-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o COBJS-$(CONFIG_NAND_PLAT) += nand_plat.o +COBJS-$(CONFIG_NAND_ZYNQ) += zynq_nand.o - endif + + else # minimal SPL drivers + + COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o + + endif # drivers + endif # nand COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --cc drivers/net/phy/marvell.c index df429845d8b,4b271989acb..46801c79190 --- a/drivers/net/phy/marvell.c +++ b/drivers/net/phy/marvell.c @@@ -498,10 -471,9 +481,10 @@@ int phy_marvell_init(void phy_register(&M88E1145_driver); phy_register(&M88E1121R_driver); phy_register(&M88E1118_driver); - phy_register(&M88E1116R_driver); + phy_register(&M88E1118R_driver); phy_register(&M88E1111S_driver); phy_register(&M88E1011S_driver); + phy_register(&M88E1518_driver); return 0; } diff --cc drivers/serial/arm_dcc.c index 7b5ecb5132d,7b5ecb5132d..812dcf0787c --- a/drivers/serial/arm_dcc.c +++ b/drivers/serial/arm_dcc.c @@@ -89,15 -89,15 +89,6 @@@ #define TIMEOUT_COUNT 0x4000000 --#ifndef CONFIG_ARM_DCC_MULTI --#define arm_dcc_init serial_init --void serial_setbrg(void) {} --#define arm_dcc_getc serial_getc --#define arm_dcc_putc serial_putc --#define arm_dcc_puts serial_puts --#define arm_dcc_tstc serial_tstc --#endif -- int arm_dcc_init(void) { return 0; @@@ -147,7 -147,7 +138,6 @@@ int arm_dcc_tstc(void return reg; } --#ifdef CONFIG_ARM_DCC_MULTI static struct stdio_dev arm_dcc_dev; int drv_arm_dcc_init(void) @@@ -167,4 -167,4 +157,8 @@@ return stdio_register(&arm_dcc_dev); } --#endif ++ ++__weak struct serial_device *default_serial_console(void) ++{ ++ return NULL; ++} diff --cc include/config_cmd_all.h index 4d7e322525a,2a82e19c78c..edd2f6da1c0 --- a/include/config_cmd_all.h +++ b/include/config_cmd_all.h @@@ -70,7 -74,7 +74,8 @@@ #define CONFIG_CMD_REGINFO /* Register dump */ #define CONFIG_CMD_REISER /* Reiserfs support */ #define CONFIG_CMD_RARP /* rarpboot support */ +#define CONFIG_CMD_ROMFS /* ROMFS support */ + #define CONFIG_CMD_READ /* Read data from partition */ #define CONFIG_CMD_RUN /* run command in env variable */ #define CONFIG_CMD_SAVEENV /* saveenv */ #define CONFIG_CMD_SAVES /* save S record dump */ diff --cc include/configs/microblaze-generic.h index 9ec64f45cd6,eed38c165f0..dfeb8aebeec --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@@ -27,62 -27,42 +27,61 @@@ #include "../board/xilinx/microblaze-generic/xparameters.h" -/* MicroBlaze CPU */ -#define CONFIG_MICROBLAZE 1 + +#define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */ #define MICROBLAZE_V5 1 -/* Open Firmware DTS */ -#define CONFIG_OF_CONTROL 1 -#define CONFIG_OF_EMBED 1 -#define CONFIG_DEFAULT_DEVICE_TREE microblaze +/* Memory test handling */ +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000) -/* linear and spi flash memory */ -#ifdef XILINX_FLASH_START -#define FLASH -#undef SPIFLASH -#undef RAMENV /* hold environment in flash */ -#else -#ifdef XILINX_SPI_FLASH_BASEADDR -#undef FLASH -#define SPIFLASH -#undef RAMENV /* hold environment in flash */ -#else -#undef FLASH -#undef SPIFLASH -#define RAMENV /* hold environment in RAM */ -#endif +/* global pointer */ +/* start of global data */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_SIZE - GENERATED_GBL_DATA_SIZE) + +/* monitor code */ +#define SIZE 0x40000 +#define CONFIG_SYS_MONITOR_LEN SIZE +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN - GENERATED_BD_INFO_SIZE) + +#define CONFIG_SYS_MONITOR_END (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) +#define CONFIG_SYS_MALLOC_LEN SIZE +#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) + +/* stack */ +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MALLOC_BASE + +#define CONFIG_SYS_BOOTMAPSZ (1 << 31) /* Initial Memory map for Linux */ + +#undef CONFIG_PHYLIB +#define CONFIG_LMB 1 + +/* Default cache size if not specified */ +#ifndef XILINX_DCACHE_BYTE_SIZE +# define XILINX_DCACHE_BYTE_SIZE 32768 #endif -/* uart */ + +/* The following table includes the supported baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} + +/* use serial multi for all serial devices */ - #define CONFIG_SERIAL_MULTI +#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 + #ifdef XILINX_UARTLITE_BASEADDR # define CONFIG_XILINX_UARTLITE -# define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR -# define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE -# define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } -# define CONSOLE_ARG "console=console=ttyUL0,115200\0" -#elif XILINX_UART16550_BASEADDR -# define CONFIG_SYS_NS16550 1 +# if defined(XILINX_UARTLITE_BAUDRATE) +# define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE +# endif +#endif + +#if XILINX_UART16550_BASEADDR +# define CONFIG_SYS_NS16550 1 # define CONFIG_SYS_NS16550_SERIAL +# define CONFIG_SYS_NS16550_COM1 ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000) +# define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ + # if defined(__MICROBLAZEEL__) # define CONFIG_SYS_NS16550_REG_SIZE -4 # else @@@ -210,11 -282,15 +209,15 @@@ #endif #if defined(XILINX_USE_DCACHE) -# define CONFIG_DCACHE + #define CONFIG_DCACHE #else -# undef CONFIG_DCACHE + #undef CONFIG_DCACHE #endif + #ifndef XILINX_DCACHE_BYTE_SIZE + #define XILINX_DCACHE_BYTE_SIZE 32768 + #endif + /* * BOOTP options */ diff --cc include/configs/xilinx-ppc405-generic.h index 157c8bb6a4d,5036c62546e..b2d41556e23 --- a/include/configs/xilinx-ppc405-generic.h +++ b/include/configs/xilinx-ppc405-generic.h @@@ -27,270 -30,29 +27,269 @@@ #include "../board/xilinx/ppc405-generic/xparameters.h" -/* sdram */ -#define CONFIG_SYS_SDRAM_SIZE_MB 256 - -/* environment */ -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_SIZE 0x10000 -#define CONFIG_ENV_SECT_SIZE 0x10000 -#define CONFIG_SYS_ENV_OFFSET 0x3F0000 -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_ENV_OFFSET) -#define CONFIG_ENV_OVERWRITE 1 - -/*Misc*/ -#define CONFIG_SYS_PROMPT "xlx-ppc405:/# " /* Monitor Command Prompt */ -#define CONFIG_PREBOOT "echo U-Boot is up and runnining;" - -/*Flash*/ -#define CONFIG_SYS_FLASH_BASE XPAR_FLASH_MEM0_BASEADDR -#define CONFIG_SYS_FLASH_SIZE (32*1024*1024) -#define CONFIG_SYS_MAX_FLASH_SECT 71 -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 -#define MTDIDS_DEFAULT "nor0=ppc405-flash" -#define MTDPARTS_DEFAULT "mtdpartsa=ppc405-flash:-(user)" - -#include -#endif /* __CONFIG_H */ +/* cpu parameter */ +#define CONFIG_405 1 +#define CONFIG_4xx 1 +#define CONFIG_XILINX_405 1 + +/* PPC-specific memory layout */ +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (192 * 1024) +#define CONFIG_SYS_MALLOC_LEN (128 * 1024) + +/*Stack*/ +#define CONFIG_SYS_INIT_RAM_ADDR 0x800000/* Initial RAM address */ +#define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END \ + - CONFIG_SYS_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET + +/*Speed*/ +#define CONFIG_SYS_CLK_FREQ XPAR_CORE_CLOCK_FREQ_HZ + +/* Common PPC-specific settings */ +#define CONFIG_SYS_MEMTEST_START 0x00400000 + /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x00C00000 + /* 4 ... 12 MB in DRAM */ +#define CONFIG_SYS_EXTBDINFO 1 + /* Extended board_into (bd_t) */ +#define CONFIG_SYS_HZ 1000 + /* decrementer freq: 1 ms ticks */ +#define CONFIG_SYS_BOOTMAPSZ (8 << 20) + /* Initial Memory map for Linux */ + +/* The following table includes the supported baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} + +/* use serial multi for all serial devices */ - #define CONFIG_SERIAL_MULTI +#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 + +#ifdef XILINX_UARTLITE_BASEADDR +# define CONFIG_XILINX_UARTLITE +# if defined(XILINX_UARTLITE_BAUDRATE) +# define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE +# endif +#endif + +#if XILINX_UART16550_BASEADDR +# define CONFIG_SYS_NS16550 1 +# define CONFIG_SYS_NS16550_SERIAL +# define CONFIG_SYS_NS16550_COM1 ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000) +# define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ + +# if defined(__MICROBLAZEEL__) +# define CONFIG_SYS_NS16550_REG_SIZE -4 +# else +# define CONFIG_SYS_NS16550_REG_SIZE 4 +# endif + +/* CONS_INDEX for system with uartlite only mustn't define CONFIG_CONS_INDEX + * u-boot BSP generates CONFIG_CONS_INDEX for system with several uart16550 */ +# if !defined(CONFIG_CONS_INDEX) +# define CONFIG_CONS_INDEX 1 +# endif +#endif + +#if !defined(CONFIG_BAUDRATE) + #define CONFIG_BAUDRATE 115200 +#endif + +#undef CONFIG_SYS_ENET +#if defined(XILINX_EMACLITE_BASEADDR) + #define CONFIG_XILINX_EMACLITE 1 + #define CONFIG_SYS_ENET +#endif +#if defined(XILINX_LLTEMAC_BASEADDR) + #define CONFIG_XILINX_LL_TEMAC 1 + #define CONFIG_SYS_ENET +#endif + +#undef ET_DEBUG + + +/* interrupt controller */ +#ifdef XILINX_INTC_BASEADDR + #define CONFIG_SYS_INTC_0 1 + #define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR + #define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS +#endif + +/* timer */ +#ifdef XILINX_TIMER_BASEADDR + #if (XILINX_TIMER_IRQ != -1) + #define CONFIG_SYS_TIMER_0 1 + #define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR + #define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ + #define FREQUENCE XILINX_CLOCK_FREQ + #define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 ) + #endif +#else +# error Please setup TIMER in BSP +#endif + +/* + * memory layout - Example + * TEXT_BASE = 0x1200_0000; + * CONFIG_SYS_SRAM_BASE = 0x1000_0000; + * CONFIG_SYS_SRAM_SIZE = 0x0400_0000; + * + * CONFIG_SYS_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000 + * CONFIG_SYS_MONITOR_BASE = 0x13FF_F000 - 0x40000 = 0x13FB_F000 + * CONFIG_SYS_MALLOC_BASE = 0x13FB_F000 - 0x40000 = 0x13F7_F000 + * + * 0x1000_0000 CONFIG_SYS_SDRAM_BASE + * FREE + * 0x1200_0000 TEXT_BASE + * U-BOOT code + * 0x1202_0000 + * FREE + * + * STACK + * 0x13F7_F000 CONFIG_SYS_MALLOC_BASE + * MALLOC_AREA 256kB Alloc + * 0x11FB_F000 CONFIG_SYS_MONITOR_BASE + * MONITOR_CODE 256kB Env + * 0x13FF_F000 CONFIG_SYS_GBL_DATA_OFFSET + * GLOBAL_DATA 4kB bd, gd + * 0x1400_0000 CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE + */ + +/* ddr sdram - main memory */ +#define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START +#define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE + +#if defined(XILINX_FLASH_START) /* Parallel Flash */ + #define FLASH + #define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START + #define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE + #define CONFIG_SYS_FLASH_CFI 1 + #define CONFIG_FLASH_CFI_DRIVER 1 + #define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* ?empty sector */ + #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ + #define CONFIG_SYS_MAX_FLASH_SECT 2048 /* max number of sectors on one chip */ + + /* Assume env is in flash, this may be undone lower down */ + #define CONFIG_ENV_IS_IN_FLASH 1 + #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */ + + #define CONFIG_SYS_FLASH_PROTECTION + + #define CONFIG_ENV_ADDR XILINX_FLASH_START + #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE +#else /* No flash memory at all */ + /* ENV in RAM */ + #define RAMENV + #define CONFIG_SYS_NO_FLASH 1 + + #define CONFIG_ENV_IS_NOWHERE 1 + #undef CONFIG_ENV_IS_IN_FLASH + #undef CONFIG_ENV_IS_IN_SPI_FLASH + #define CONFIG_ENV_SIZE 0x1000 + #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) + #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */ +#endif + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + +/* + * Command line configuration. + */ +#include + +#define CONFIG_CMD_ASKENV +/* FIXME: hack for zynq */ +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_ECHO + +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_JFFS2 +#ifndef CONFIG_SYS_ENET + #undef CONFIG_CMD_NET + #undef CONFIG_NET_MULTI +#else + #define CONFIG_CMD_PING + #define CONFIG_NET_MULTI +#endif + +#if defined(FLASH) + #define CONFIG_CMD_FLASH + #define CONFIG_CMD_IMLS +#else + #undef CONFIG_CMD_IMLS + #undef CONFIG_CMD_FLASH + #undef CONFIG_CMD_SAVEENV + #undef CONFIG_CMD_SAVES +#endif + +#if !defined(RAMENV) + #define CONFIG_CMD_SAVEENV + #define CONFIG_CMD_SAVES +#endif + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_PROMPT "U-Boot> " +#define CONFIG_SYS_CBSIZE 256/* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE +\ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + /* Boot Argument Buffer Size */ +#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START /* default load address */ + +#define CONFIG_BOOTDELAY 4 +/* Don't define BOOTARGS, we get it from the DTB chosen fragment */ +#undef CONFIG_BOOTARGS +#define CONFIG_HOSTNAME XILINX_BOARD_NAME + +#define CONFIG_BOOTCOMMAND "" + +/* architecture dependent code */ +#define CONFIG_SYS_USR_EXCEP /* user exception */ +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_ENV_OVERWRITE /* Allow to overwrite the u-boot environment variables */ +#define CONFIG_IPADDR 192.168.10.90 +#define CONFIG_SERVERIP 192.168.10.101 +#define CONFIG_ETHADDR 00:0a:35:00:92:d4 +#define CONFIG_BOOTP_SERVERIP + +#define CONFIG_CMDLINE_EDITING + +/* Use the HUSH parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " + +#define CONFIG_FIT 1 +#define CONFIG_OF_LIBFDT 1 + +#if defined(CONFIG_XILINX_LL_TEMAC) +# define CONFIG_MII 1 +# define CONFIG_CMD_MII 1 +# define CONFIG_PHY_GIGE 1 +# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 +# define CONFIG_PHYLIB 1 +# define CONFIG_PHY_ATHEROS 1 +# define CONFIG_PHY_BROADCOM 1 +# define CONFIG_PHY_DAVICOM 1 +# define CONFIG_PHY_LXT 1 +# define CONFIG_PHY_MARVELL 1 +# define CONFIG_PHY_MICREL 1 +# define CONFIG_PHY_NATSEMI 1 +# define CONFIG_PHY_REALTEK 1 +# define CONFIG_PHY_VITESSE 1 +#else +# undef CONFIG_MII +# undef CONFIG_CMD_MII +# undef CONFIG_PHYLIB +#endif + +#endif /* __CONFIG_H */ diff --cc include/configs/xilinx-ppc440-generic.h index 5fa0e082f55,fc0f932aa49..78c0dec7838 --- a/include/configs/xilinx-ppc440-generic.h +++ b/include/configs/xilinx-ppc440-generic.h @@@ -25,277 -18,32 +25,276 @@@ #ifndef __CONFIG_H #define __CONFIG_H -/*CPU*/ -#define CONFIG_440 1 -#define CONFIG_XILINX_PPC440_GENERIC 1 #include "../board/xilinx/ppc440-generic/xparameters.h" -/*Mem Map*/ -#define CONFIG_SYS_SDRAM_SIZE_MB 256 +/* cpu parameter */ +#define CONFIG_4xx 1 +#define CONFIG_440 1 +#define CONFIG_XILINX_440 1 +#define CONFIG_XILINX_440_GENERIC 1 + +/* Gross XPAR_ hackery */ +#define XPAR_INTC_0_BASEADDR XILINX_INTC_BASEADDR +#define XPAR_INTC_MAX_NUM_INTR_INPUTS XILINX_INTC_NUM_INTR_INPUTS + +/* PPC-specific memory layout */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (256 * 1024) +#define CONFIG_SYS_MALLOC_LEN (128 * 1024) + +/*Stack*/ +#define CONFIG_SYS_INIT_RAM_ADDR 0x800000/* Initial RAM address */ +#define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */ +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END \ + - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET + +/*Speed*/ +#define CONFIG_SYS_CLK_FREQ XILINX_CLOCK_FREQ + +/* Common PPC-specific settings */ +#define CONFIG_SYS_MEMTEST_START 0x00400000 + /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x00C00000 + /* 4 ... 12 MB in DRAM */ +#define CONFIG_SYS_EXTBDINFO 1 + /* Extended board_into (bd_t) */ +#define CONFIG_SYS_HZ 1000 + /* decrementer freq: 1 ms ticks */ + +#define CONFIG_SYS_BOOTMAPSZ (16 << 20) + /* Initial Memory map for Linux */ + +/* The following table includes the supported baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE \ + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} + +/* use serial multi for all serial devices */ - #define CONFIG_SERIAL_MULTI +#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 + +#ifdef XILINX_UARTLITE_BASEADDR +# define CONFIG_XILINX_UARTLITE +# if defined(XILINX_UARTLITE_BAUDRATE) +# define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE +# endif +#endif + +#if XILINX_UART16550_BASEADDR +# define CONFIG_SYS_NS16550 1 +# define CONFIG_SYS_NS16550_SERIAL +# define CONFIG_SYS_NS16550_COM1 ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000) +# define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ + +# if defined(__MICROBLAZEEL__) +# define CONFIG_SYS_NS16550_REG_SIZE -4 +# else +# define CONFIG_SYS_NS16550_REG_SIZE 4 +# endif + +/* CONS_INDEX for system with uartlite only mustn't define CONFIG_CONS_INDEX + * u-boot BSP generates CONFIG_CONS_INDEX for system with several uart16550 */ +# if !defined(CONFIG_CONS_INDEX) +# define CONFIG_CONS_INDEX 1 +# endif +#endif + +#if !defined(CONFIG_BAUDRATE) + #define CONFIG_BAUDRATE 115200 +#endif + +#undef CONFIG_SYS_ENET +#if defined(XILINX_EMACLITE_BASEADDR) + #define CONFIG_XILINX_EMACLITE 1 + #define CONFIG_SYS_ENET +#endif +#if defined(XILINX_LLTEMAC_BASEADDR) + #define CONFIG_XILINX_LL_TEMAC 1 + #define CONFIG_SYS_ENET +#endif + +#undef ET_DEBUG + + +/* interrupt controller */ +#ifdef XILINX_INTC_BASEADDR + #define CONFIG_SYS_INTC_0 1 + #define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR + #define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS +#endif + +/* timer */ +#ifdef XILINX_TIMER_BASEADDR + #if (XILINX_TIMER_IRQ != -1) + #define CONFIG_SYS_TIMER_0 1 + #define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR + #define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ + #define FREQUENCE XILINX_CLOCK_FREQ + #define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 ) + #endif +#else +# error Please setup TIMER in BSP +#endif + +/* + * memory layout - Example + * TEXT_BASE = 0x1200_0000; + * CONFIG_SYS_SRAM_BASE = 0x1000_0000; + * CONFIG_SYS_SRAM_SIZE = 0x0400_0000; + * + * CONFIG_SYS_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000 + * CONFIG_SYS_MONITOR_BASE = 0x13FF_F000 - 0x40000 = 0x13FB_F000 + * CONFIG_SYS_MALLOC_BASE = 0x13FB_F000 - 0x40000 = 0x13F7_F000 + * + * 0x1000_0000 CONFIG_SYS_SDRAM_BASE + * FREE + * 0x1200_0000 TEXT_BASE + * U-BOOT code + * 0x1202_0000 + * FREE + * + * STACK + * 0x13F7_F000 CONFIG_SYS_MALLOC_BASE + * MALLOC_AREA 256kB Alloc + * 0x11FB_F000 CONFIG_SYS_MONITOR_BASE + * MONITOR_CODE 256kB Env + * 0x13FF_F000 CONFIG_SYS_GBL_DATA_OFFSET + * GLOBAL_DATA 4kB bd, gd + * 0x1400_0000 CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE + */ + +/* ddr sdram - main memory */ +#define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START +#define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE + +#if defined(XILINX_FLASH_START) /* Parallel Flash */ + #define FLASH + #define CONFIG_SYS_FLASH_BASE XILINX_FLASH_START + #define CONFIG_SYS_FLASH_SIZE XILINX_FLASH_SIZE + #define CONFIG_SYS_FLASH_CFI 1 + #define CONFIG_FLASH_CFI_DRIVER 1 + #define CONFIG_SYS_FLASH_EMPTY_INFO 1 /* ?empty sector */ + #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ + #define CONFIG_SYS_MAX_FLASH_SECT 2048 /* max number of sectors on one chip */ + + /* Assume env is in flash, this may be undone lower down */ + #define CONFIG_ENV_IS_IN_FLASH 1 + #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */ + + #define CONFIG_SYS_FLASH_PROTECTION + + #define CONFIG_ENV_ADDR XILINX_FLASH_START + #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE +#else /* No flash memory at all */ + /* ENV in RAM */ + #define RAMENV + #define CONFIG_SYS_NO_FLASH 1 + + #define CONFIG_ENV_IS_NOWHERE 1 + #undef CONFIG_ENV_IS_IN_FLASH + #undef CONFIG_ENV_IS_IN_SPI_FLASH + #define CONFIG_ENV_SIZE 0x1000 + #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE) + #define CONFIG_SYS_FLASH_PROTECTION /* hardware flash protection */ +#endif + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + +/* + * Command line configuration. + */ +#include + +#define CONFIG_CMD_ASKENV +/* FIXME: hack for zynq */ +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_ECHO + +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_JFFS2 +#ifndef CONFIG_SYS_ENET + #undef CONFIG_CMD_NET + #undef CONFIG_NET_MULTI +#else + #define CONFIG_CMD_PING + #define CONFIG_NET_MULTI +#endif + +#if defined(FLASH) + #define CONFIG_CMD_FLASH + #define CONFIG_CMD_IMLS +#else + #undef CONFIG_CMD_IMLS + #undef CONFIG_CMD_FLASH + #undef CONFIG_CMD_SAVEENV + #undef CONFIG_CMD_SAVES +#endif + +#if !defined(RAMENV) + #define CONFIG_CMD_SAVEENV + #define CONFIG_CMD_SAVES +#endif + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_PROMPT "U-Boot> " +#define CONFIG_SYS_CBSIZE 256/* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE +\ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + /* Boot Argument Buffer Size */ +#define CONFIG_SYS_MAXARGS 15 /* max number of command args */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_LOAD_ADDR XILINX_RAM_START /* default load address */ + +#define CONFIG_BOOTDELAY 4 +/* Don't define BOOTARGS, we get it from the DTB chosen fragment */ +#undef CONFIG_BOOTARGS +#define CONFIG_HOSTNAME XILINX_BOARD_NAME + +#define CONFIG_BOOTCOMMAND "" + +/* architecture dependent code */ +#define CONFIG_SYS_USR_EXCEP /* user exception */ +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_ENV_OVERWRITE /* Allow to overwrite the u-boot environment variables */ +#define CONFIG_IPADDR 192.168.10.90 +#define CONFIG_SERVERIP 192.168.10.101 +#define CONFIG_ETHADDR 00:0a:35:00:92:d4 +#define CONFIG_BOOTP_SERVERIP -/*Env*/ -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_SIZE 0x20000 -#define CONFIG_ENV_SECT_SIZE 0x20000 -#define CONFIG_ENV_OFFSET 0x340000 -#define CONFIG_ENV_ADDR (XPAR_FLASH_MEM0_BASEADDR+CONFIG_ENV_OFFSET) +#define CONFIG_CMDLINE_EDITING -/*Misc*/ -#define CONFIG_SYS_PROMPT "board:/# " /* Monitor Command Prompt */ -#define CONFIG_PREBOOT "echo U-Boot is up and runnining;" +/* Use the HUSH parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -/*Flash*/ -#define CONFIG_SYS_FLASH_SIZE (32*1024*1024) -#define CONFIG_SYS_MAX_FLASH_SECT 259 -#define MTDIDS_DEFAULT "nor0=ml507-flash" -#define MTDPARTS_DEFAULT "mtdparts=ml507-flash:-(user)" +#define CONFIG_FIT 1 +#define CONFIG_OF_LIBFDT 1 -/*Generic Configs*/ -#include +#if defined(CONFIG_XILINX_LL_TEMAC) +# define CONFIG_MII 1 +# define CONFIG_CMD_MII 1 +# define CONFIG_PHY_GIGE 1 +# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1 +# define CONFIG_PHYLIB 1 +# define CONFIG_PHY_ATHEROS 1 +# define CONFIG_PHY_BROADCOM 1 +# define CONFIG_PHY_DAVICOM 1 +# define CONFIG_PHY_LXT 1 +# define CONFIG_PHY_MARVELL 1 +# define CONFIG_PHY_MICREL 1 +# define CONFIG_PHY_NATSEMI 1 +# define CONFIG_PHY_REALTEK 1 +# define CONFIG_PHY_VITESSE 1 +#else +# undef CONFIG_MII +# undef CONFIG_CMD_MII +# undef CONFIG_PHYLIB +#endif -#endif /* __CONFIG_H */ +#endif /* __CONFIG_H */ diff --cc include/configs/zynq_common.h index fbefd4489e9,00000000000..3196f846d2a mode 100644,000000..100644 --- a/include/configs/zynq_common.h +++ b/include/configs/zynq_common.h @@@ -1,315 -1,0 +1,314 @@@ +/* + * (C) Copyright 2012 Xilinx + * + * Xilinx Zynq common configuration settings + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_ZYNQ_COMMON_H +#define __CONFIG_ZYNQ_COMMON_H + +/* + * High Level Configuration Options + */ +#define CONFIG_ARMV7 /* CPU */ +#define CONFIG_ZYNQ /* SoC */ + +/* Default environment */ +#define CONFIG_IPADDR 192.168.0.99 +#define CONFIG_SERVERIP 192.168.0.101 + +#define CONFIG_SYS_SDRAM_BASE 0 +#define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_1_SIZE + +/* Total Size of Environment Sector */ +#define CONFIG_ENV_SIZE (128 << 10) + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE + +/* Serial drivers */ +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 38400, 115200 } + +/* Zynq serial driver */ +#ifdef CONFIG_ZYNQ_SERIAL_UART0 +# define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0000000 +# define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE +# define CONFIG_ZYNQ_SERIAL_CLOCK0 50000000 +#endif + +#ifdef CONFIG_ZYNQ_SERIAL_UART1 +# define CONFIG_ZYNQ_SERIAL_BASEADDR1 0xE0001000 +# define CONFIG_ZYNQ_SERIAL_BAUDRATE1 CONFIG_BAUDRATE +# define CONFIG_ZYNQ_SERIAL_CLOCK1 50000000 +#endif + +#if defined(CONFIG_ZYNQ_SERIAL_UART0) || defined(CONFIG_ZYNQ_SERIAL_UART1) - #define CONFIG_SERIAL_MULTI +#define CONFIG_ZYNQ_SERIAL +#endif + +/* Ethernet driver */ +#ifdef CONFIG_ZYNQ_GEM0 +# define CONFIG_ZYNQ_GEM_BASEADDR0 0xE000B000 +#endif + +#ifdef CONFIG_ZYNQ_GEM1 +# define CONFIG_ZYNQ_GEM_BASEADDR1 0xE000C000 +#endif + +#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) +# define CONFIG_NET_MULTI +# define CONFIG_ZYNQ_GEM +# define CONFIG_MII +# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN +# define CONFIG_PHYLIB +# define CONFIG_PHY_MARVELL +# define CONFIG_SYS_ENET +#endif + +/* SCU timer address is hardcoded */ +#define CONFIG_SCUTIMER_BASEADDR 0xF8F00600 +#ifndef CONFIG_CPU_FREQ_HZ +#define CONFIG_CPU_FREQ_HZ 800000000 +#endif +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_CMDLINE_EDITING +#define CONFIG_SYS_LONGHELP + +#include + +#ifdef CONFIG_SYS_ENET +# define CONFIG_CMD_PING +# define CONFIG_CMD_MII +#else +# undef CONFIG_CMD_NET +# undef CONFIG_CMD_NFS +#endif + +/* NOR */ +#ifndef CONFIG_SYS_NO_FLASH +# define CONFIG_SYS_FLASH_BASE 0xE2000000 +# define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024) +# define CONFIG_SYS_MAX_FLASH_BANKS 1 +/* max number of sectors/blocks on one chip */ +# define CONFIG_SYS_MAX_FLASH_SECT 512 +# define CONFIG_SYS_FLASH_ERASE_TOUT 1000 +# define CONFIG_SYS_FLASH_WRITE_TOUT 5000 +# define CONFIG_FLASH_SHOW_PROGRESS 10 +# define CONFIG_SYS_FLASH_CFI +# undef CONFIG_SYS_FLASH_EMPTY_INFO +# define CONFIG_FLASH_CFI_DRIVER +# undef CONFIG_SYS_FLASH_PROTECTION /* don't use hardware protection */ +# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes (20x faster) */ +#endif + +/* QSPI */ +#ifdef CONFIG_ZYNQ_SPI +# define CONFIG_SF_DEFAULT_SPEED 30000000 +# define CONFIG_SPI_FLASH +# define CONFIG_SPI_FLASH_SPANSION +# define CONFIG_SPI_FLASH_STMICRO +# define CONFIG_SPI_FLASH_WINBOND +# define CONFIG_CMD_SPI +# define CONFIG_CMD_SF +#endif + +/* MMC */ +#ifdef CONFIG_MMC +# define CONFIG_GENERIC_MMC +# define CONFIG_ZYNQ_MMC +# define CONFIG_CMD_MMC +# define CONFIG_CMD_FAT +# define CONFIG_CMD_EXT2 +# define CONFIG_DOS_PARTITION +/* For now, use only single block reads for the MMC */ +# define CONFIG_SYS_MMC_MAX_BLK_COUNT 1 +#endif + +/* NAND */ +#ifdef CONFIG_NAND_ZYNQ +# define CONFIG_CMD_NAND +# define CONFIG_CMD_NAND_LOCK_UNLOCK +# define CONFIG_SYS_MAX_NAND_DEVICE 1 +# define CONFIG_SYS_NAND_BASE XPSS_NAND_BASEADDR +# define CONFIG_SYS_NAND_ONFI_DETECTION +# define CONFIG_MTD_DEVICE +#endif + +/* I2C */ +#ifdef CONFIG_ZYNQ_I2C +# define CONFIG_CMD_I2C +# define CONFIG_ZYNQ_I2C_CTLR_0 +# define CONFIG_HARD_I2C 1 +# define CONFIG_SYS_I2C_SPEED 100000 +# define CONFIG_SYS_I2C_SLAVE 1 +#endif + +/* EEPROM */ +#ifdef CONFIG_ZYNQ_EEPROM +# define CONFIG_CMD_EEPROM +# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +# define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 +# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 +# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 +# define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */ +#endif + +#ifndef CONFIG_ENV_IS_NOWHERE +# ifndef CONFIG_SYS_NO_FLASH +/* Environment in NOR flash */ +# define CONFIG_ENV_IS_IN_FLASH +# elif defined(CONFIG_ZYNQ_SPI) +/* Environment in Serial Flash */ +# define CONFIG_ENV_IS_IN_SPI_FLASH +# elif defined(CONFIG_NAND_ZYNQ) +/* Environment in NAND flash */ +# define CONFIG_ENV_IS_IN_NAND +# endif + +# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE +# define CONFIG_ENV_OFFSET 0xE0000 +# define CONFIG_CMD_SAVEENV /* Command to save ENV to Flash */ +#endif + +/* For development/debugging */ +#ifdef DEBUG +# define CONFIG_CMD_REGINFO +# define CONFIG_PANIC_HANG +#endif + +#define CONFIG_SYS_TEXT_BASE 0x04000000 + +/* + * Open Firmware flat tree + */ +#define CONFIG_OF_LIBFDT + +/* Default environment */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "ethaddr=00:0a:35:00:01:22\0" \ + "kernel_image=uImage\0" \ + "ramdisk_image=uramdisk.image.gz\0" \ + "devicetree_image=devicetree.dtb\0" \ + "kernel_size=0x500000\0" \ + "devicetree_size=0x20000\0" \ + "ramdisk_size=0x5E0000\0" \ + "fdt_high=0x20000000\0" \ + "initrd_high=0x20000000\0" \ + "norboot=echo Copying Linux from NOR flash to RAM...;" \ + "cp 0xE2100000 0x3000000 ${kernel_size};" \ + "cp 0xE2600000 0x2A00000 ${devicetree_size};" \ + "echo Copying ramdisk...;" \ + "cp 0xE2620000 0x2000000 ${ramdisk_size};" \ + "bootm 0x3000000 0x2000000 0x2A00000\0" \ + "qspiboot=echo Copying Linux from QSPI flash to RAM...;" \ + "sf probe 0 0 0;" \ + "sf read 0x3000000 0x100000 ${kernel_size};" \ + "sf read 0x2A00000 0x600000 ${devicetree_size};" \ + "echo Copying ramdisk...;" \ + "sf read 0x2000000 0x620000 ${ramdisk_size};" \ + "bootm 0x3000000 0x2000000 0x2A00000\0" \ + "sdboot=echo Copying Linux from SD to RAM...;" \ + "mmcinfo;" \ + "fatload mmc 0 0x3000000 ${kernel_image};" \ + "fatload mmc 0 0x2A00000 ${devicetree_image};" \ + "fatload mmc 0 0x2000000 ${ramdisk_image};" \ + "bootm 0x3000000 0x2000000 0x2A00000\0" \ + "nandboot=echo Copying Linux from NAND flash to RAM...;" \ + "nand read 0x3000000 0x100000 ${kernel_size};" \ + "nand read 0x2A00000 0x600000 ${devicetree_size};" \ + "echo Copying ramdisk...;" \ + "nand read 0x2000000 0x620000 ${ramdisk_size};" \ + "bootm 0x3000000 0x2000000 0x2A00000\0" \ + "jtagboot=echo TFTPing Linux to RAM...;" \ + "tftp 0x3000000 ${kernel_image};" \ + "tftp 0x2A00000 ${devicetree_image};" \ + "tftp 0x2000000 ${ramdisk_image};" \ + "bootm 0x3000000 0x2000000 0x2A00000\0" + +/* default boot is according to the bootmode switch settings */ +#define CONFIG_BOOTCOMMAND "run $modeboot" +#define CONFIG_BOOTDELAY 3 /* -1 to Disable autoboot */ + +#define CONFIG_SYS_PROMPT "zynq-uboot> " + +/* CONFIG_SYS_MONITOR_BASE? */ +/* CONFIG_SYS_MONITOR_LEN? */ + +/* Keep L2 Cache Disabled */ +#define CONFIG_SYS_L2CACHE_OFF +#define CONFIG_SYS_CACHELINE_SIZE 32 + +/* Physical Memory map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM_1 0 + +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ + PHYS_SDRAM_1_SIZE - (16 * 1024 * 1024)) + +#define CONFIG_SYS_SDRAM_BASE 0 +#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) + +#define CONFIG_SYS_MALLOC_LEN 0x400000 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_CBSIZE 2048 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) + + +#define CONFIG_SYS_LOAD_ADDR 0 /* default? */ + +/* Enable the PL to be downloaded */ +#define CONFIG_FPGA +#define CONFIG_FPGA_XILINX +#define CONFIG_FPGA_ZYNQPL +#define CONFIG_CMD_FPGA + +/* FIT support */ +#define CONFIG_FIT 1 +#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */ + +#define CONFIG_BOARD_LATE_INIT + +#undef CONFIG_BOOTM_NETBSD + +/* FIXME this should be removed pretty soon */ +#define XPSS_QSPI_BASEADDR 0xE000D000 +#define SD_BASEADDR 0xE0100000 +#define XPSS_NAND_BASEADDR 0xE1000000 +#define XPSS_CRTL_PARPORT_BASEADDR 0xE000E000 + +#define RTL_30 +#ifdef RTL_30 +# define XPSS_QSPI_LIN_BASEADDR 0xFC000000 +# define XPSS_SYS_CTRL_BASEADDR 0xF8000000 +# define XPSS_DDR_CTRL_BASEADDR 0xF8006000 +# define XPSS_SCU_BASEADDR 0xF8F00000 +# define XPSS_DEV_CFG_APB_BASEADDR 0xF8007000 +#else +# define XPSS_QSPI_LIN_BASEADDR 0xE6000000 +# define XPSS_SYS_CTRL_BASEADDR 0xFE000000 +# define XPSS_DDR_CTRL_BASEADDR 0xFE006000 +# define XPSS_SCU_BASEADDR 0xFEF00000 +# define XPSS_DEV_CFG_APB_BASEADDR 0xFE007000 +#endif + +#endif /* __CONFIG_ZYNQ_COMMON_H */ diff --cc include/configs/zynq_cseflash.h index 4bb3cc28f5d,00000000000..64ed499d47e mode 100644,000000..100644 --- a/include/configs/zynq_cseflash.h +++ b/include/configs/zynq_cseflash.h @@@ -1,78 -1,0 +1,77 @@@ +/* + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024) + +#define CONFIG_ENV_IS_NOWHERE + +#include + +/* Disable uart console */ - #undef CONFIG_SERIAL_MULTI +#undef CONFIG_ZYNQ_SERIAL + + +#define CONFIG_ARM_DCC +#define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */ + +/* + * Open Firmware flat tree + */ +#undef CONFIG_OF_LIBFDT + + + + +#undef CONFIG_CMD_EDITENV +#undef CONFIG_CMD_SAVEENV + +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_XIMG + +#undef CONFIG_CMD_LOADB /* loadb */ +#undef CONFIG_CMD_LOADS /* loads */ + +#define CONFIG_CMD_MEMORY /* md mm nm mw cp cmp crc base loop mtest */ + +#undef CONFIG_CMD_MISC /* Misc functions like sleep etc*/ +#undef CONFIG_CMD_RUN /* run command in env variable */ +#undef CONFIG_CMD_SOURCE /* "source" command support */ + +#undef CONFIG_CMD_BDI /* bdinfo */ +#undef CONFIG_CMD_BOOTD /* bootd */ +#undef CONFIG_CMD_CONSOLE /* coninfo */ +#undef CONFIG_CMD_ECHO /* echo arguments */ +#undef CONFIG_CMD_IMI /* iminfo */ +#undef CONFIG_CMD_ITEST /* Integer (and string) test */ +#undef CONFIG_CMD_IMLS /* List all found images */ + + +// FIXME this is silly - there is no any bootm image enabled - disable BOOTM +//#undef CONFIG_BOOTM_LINUX +#undef CONFIG_BOOTM_NETBSD +#undef CONFIG_BOOTM_RTEMS +#undef CONFIG_GZIP +#undef CONFIG_ZLIB + +#undef CONFIG_AUTO_COMPLETE +#define CONFIG_CMDLINE_EDITING +#undef CONFIG_SYS_LONGHELP + + +/* Because (at least at first) we're going to be loaded via JTAG_Tcl */ +#define CONFIG_SKIP_LOWLEVEL_INIT + + + +/* Why? */ +#undef CONFIG_ENV_SIZE +#define CONFIG_ENV_SIZE 896 + +/* Place a Xilinx Boot ROM header in u-boot image? */ +#define CONFIG_ZYNQ_XILINX_FLASH_HEADER +#define CONFIG_ZYNQ_XIP_START CONFIG_SYS_FLASH_BASE + +#endif /* __CONFIG_H */ diff --cc include/stdio_dev.h index 23e0ee15f28,932d093345e..9451740e8be --- a/include/stdio_dev.h +++ b/include/stdio_dev.h @@@ -99,7 -99,7 +99,7 @@@ struct list_head* stdio_get_list(void) struct stdio_dev* stdio_get_by_name(const char* name); struct stdio_dev* stdio_clone(struct stdio_dev *dev); --#ifdef CONFIG_ARM_DCC_MULTI ++#ifdef CONFIG_ARM_DCC int drv_arm_dcc_init(void); #endif #ifdef CONFIG_LCD