From: Jeff Law Date: Tue, 14 May 2024 03:42:38 +0000 (-0600) Subject: Revert "[PATCH v2 1/3] RISC-V: movmem for RISCV with V extension" X-Git-Tag: basepoints/gcc-16~9110 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=04ee1f788ceaa4c7f777ff3b9441ae076191439c;p=thirdparty%2Fgcc.git Revert "[PATCH v2 1/3] RISC-V: movmem for RISCV with V extension" This reverts commit df15eb15b5f820321c81efc75f0af13ff8c0dd5b. --- diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md index 696d911a7e9..4d6de992557 100644 --- a/gcc/config/riscv/riscv.md +++ b/gcc/config/riscv/riscv.md @@ -2608,29 +2608,6 @@ FAIL; }) -;; Inlining general memmove is a pessimisation as we can't avoid having to -;; decide which direction to go at runtime, which can be costly. Until we -;; can benchmark implementations on real V hardware implement a conservative -;; approach of inlining cases which can be performed with a single vector -;; load + store. For tiny moves, fallback to scalar. -(define_expand "movmem" - [(parallel [(set (match_operand:BLK 0 "general_operand") - (match_operand:BLK 1 "general_operand")) - (use (match_operand:P 2 "const_int_operand")) - (use (match_operand:SI 3 "const_int_operand"))])] - "TARGET_VECTOR" -{ - if (CONST_INT_P (operands[2]) - && INTVAL (operands[2]) >= TARGET_MIN_VLEN / 8 - && INTVAL (operands[2]) <= TARGET_MIN_VLEN - && riscv_vector::expand_block_move (operands[0], - operands[1], - operands[2])) - DONE; - else - FAIL; -}) - ;; Expand in-line code to clear the instruction cache between operand[0] and ;; operand[1]. (define_expand "clear_cache" diff --git a/gcc/testsuite/gcc.target/riscv/rvv/base/movmem-1.c b/gcc/testsuite/gcc.target/riscv/rvv/base/movmem-1.c deleted file mode 100644 index b930241ae5d..00000000000 --- a/gcc/testsuite/gcc.target/riscv/rvv/base/movmem-1.c +++ /dev/null @@ -1,59 +0,0 @@ -/* { dg-do compile } */ -/* { dg-add-options riscv_v } */ -/* { dg-additional-options "-O3" } */ -/* { dg-final { check-function-bodies "**" "" } } */ - -#include - -#define MIN_VECTOR_BYTES (__riscv_v_min_vlen/8) - -/* tiny memmoves should not be vectorised -** f1: -** li\s+a2,15 -** tail\s+memmove -*/ -char * f1 (char *a, char const *b) -{ - return memmove (a, b, 15); -} - -/* vectorise+inline minimum vector register width with LMUL=1 -** f2: -** ( -** vsetivli\s+zero,16,e8,m1,ta,ma -** | -** li\s+[ta][0-7],\d+ -** vsetvli\s+zero,[ta][0-7],e8,m1,ta,ma -** ) -** vle8\.v\s+v\d+,0\(a1\) -** vse8\.v\s+v\d+,0\(a0\) -** ret -*/ -char * f2 (char *a, char const *b) -{ - return memmove (a, b, MIN_VECTOR_BYTES); -} - -/* vectorise+inline up to LMUL=8 -** f3: -** li\s+[ta][0-7],\d+ -** vsetvli\s+zero,[ta][0-7],e8,m8,ta,ma -** vle8\.v\s+v\d+,0\(a1\) -** vse8\.v\s+v\d+,0\(a0\) -** ret -*/ -char * f3 (char *a, char const *b) -{ - return memmove (a, b, MIN_VECTOR_BYTES*8); -} - -/* don't vectorise if the move is too large for one operation -** f4: -** li\s+a2,\d+ -** tail\s+memmove -*/ -char * f4 (char *a, char const *b) -{ - return memmove (a, b, MIN_VECTOR_BYTES*8+1); -} -