From: Sasha Levin Date: Sat, 27 Jul 2024 14:04:13 +0000 (-0400) Subject: Fixes for 6.6 X-Git-Tag: v6.1.103~105 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=07348ba4da6aed3e2c04e9055a63f8799a935835;p=thirdparty%2Fkernel%2Fstable-queue.git Fixes for 6.6 Signed-off-by: Sasha Levin --- diff --git a/queue-6.6/arm-dts-imx6qdl-kontron-samx6i-fix-board-reset.patch b/queue-6.6/arm-dts-imx6qdl-kontron-samx6i-fix-board-reset.patch new file mode 100644 index 00000000000..8d0393ce20f --- /dev/null +++ b/queue-6.6/arm-dts-imx6qdl-kontron-samx6i-fix-board-reset.patch @@ -0,0 +1,36 @@ +From e23e028e1b99877460bf6c77aa40cbfb6b1869bf Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Jun 2024 11:13:31 +0200 +Subject: ARM: dts: imx6qdl-kontron-samx6i: fix board reset + +From: Michael Walle + +[ Upstream commit b972d6b3b46345023aee56a95df8e2c137aa4ee4 ] + +On i.MX6 the board is reset by the watchdog. But in turn to do a +complete board reset, we have to assert the WDOG_B output which is +routed also to the CPLD which then do a complete power-cycle of the +board. + +Fixes: 2125212785c9 ("ARM: dts: imx6qdl-kontron-samx6i: add Kontron SMARC SoM Support") +Signed-off-by: Michael Walle +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi +index d6c049b9a9c69..700780bf64f58 100644 +--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi ++++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi +@@ -817,5 +817,6 @@ &wdog1 { + /* CPLD is feeded by watchdog (hardwired) */ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog1>; ++ fsl,ext-reset-output; + status = "okay"; + }; +-- +2.43.0 + diff --git a/queue-6.6/arm-dts-imx6qdl-kontron-samx6i-fix-pcie-reset-polari.patch b/queue-6.6/arm-dts-imx6qdl-kontron-samx6i-fix-pcie-reset-polari.patch new file mode 100644 index 00000000000..6f6c0272f27 --- /dev/null +++ b/queue-6.6/arm-dts-imx6qdl-kontron-samx6i-fix-pcie-reset-polari.patch @@ -0,0 +1,35 @@ +From 4ea3de9a0e030d1f580179b1adaad8d525432aaf Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Jun 2024 11:13:38 +0200 +Subject: ARM: dts: imx6qdl-kontron-samx6i: fix PCIe reset polarity + +From: Michael Walle + +[ Upstream commit df35c6e9027cf9affe699e632a48082ab1bbba4c ] + +The PCIe reset line is active low. Fix it. + +Fixes: 2a51f9dae13d ("ARM: dts: imx6qdl-kontron-samx6i: Add iMX6-based Kontron SMARC-sAMX6i module") +Signed-off-by: Michael Walle +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi +index 78cbc2df279e6..668d33d1ff0c1 100644 +--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi ++++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi +@@ -732,7 +732,7 @@ &pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pcie>; + wake-up-gpio = <&gpio6 18 GPIO_ACTIVE_HIGH>; +- reset-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>; ++ reset-gpio = <&gpio3 13 GPIO_ACTIVE_LOW>; + }; + + /* LCD_BKLT_PWM */ +-- +2.43.0 + diff --git a/queue-6.6/arm-dts-imx6qdl-kontron-samx6i-fix-phy-mode.patch b/queue-6.6/arm-dts-imx6qdl-kontron-samx6i-fix-phy-mode.patch new file mode 100644 index 00000000000..3ceb6603955 --- /dev/null +++ b/queue-6.6/arm-dts-imx6qdl-kontron-samx6i-fix-phy-mode.patch @@ -0,0 +1,37 @@ +From 6b899c642b25f96fb6c5e6a2b09d3d6a6a90cafe Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Jun 2024 11:13:29 +0200 +Subject: ARM: dts: imx6qdl-kontron-samx6i: fix phy-mode + +From: Michael Walle + +[ Upstream commit 0df3c7d7a73d75153090637392c0b73a63cdc24a ] + +The i.MX6 cannot add any RGMII delays. The PHY has to add both the RX +and TX delays on the RGMII interface. Fix the interface mode. While at +it, use the new phy-connection-type property name. + +Fixes: 5694eed98cca ("ARM: dts: imx6qdl-kontron-samx6i: move phy reset into phy-node") +Signed-off-by: Michael Walle +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi +index 85aeebc9485dd..d8c1dfb8c9abb 100644 +--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi ++++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi +@@ -259,7 +259,7 @@ smarc_flash: flash@0 { + &fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; +- phy-mode = "rgmii"; ++ phy-connection-type = "rgmii-id"; + phy-handle = <ðphy>; + + mdio { +-- +2.43.0 + diff --git a/queue-6.6/arm-dts-imx6qdl-kontron-samx6i-fix-phy-reset.patch b/queue-6.6/arm-dts-imx6qdl-kontron-samx6i-fix-phy-reset.patch new file mode 100644 index 00000000000..65913ee22f1 --- /dev/null +++ b/queue-6.6/arm-dts-imx6qdl-kontron-samx6i-fix-phy-reset.patch @@ -0,0 +1,49 @@ +From e3f5ad01c48fb6e3cb0b6b3503a8b111c5122137 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Jun 2024 11:13:30 +0200 +Subject: ARM: dts: imx6qdl-kontron-samx6i: fix PHY reset + +From: Michael Walle + +[ Upstream commit edfea889a049abe80f0d55c0365bf60fbade272f ] + +The PHY reset line is connected to both the SoC (GPIO1_25) and +the CPLD. We must not use the GPIO1_25 as it will drive against +the output buffer of the CPLD. Instead there is another GPIO +(GPIO2_01), an input to the CPLD, which will tell the CPLD to +assert the PHY reset line. + +Fixes: 2a51f9dae13d ("ARM: dts: imx6qdl-kontron-samx6i: Add iMX6-based Kontron SMARC-sAMX6i module") +Fixes: 5694eed98cca ("ARM: dts: imx6qdl-kontron-samx6i: move phy reset into phy-node") +Signed-off-by: Michael Walle +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi +index d8c1dfb8c9abb..d6c049b9a9c69 100644 +--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi ++++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi +@@ -269,7 +269,7 @@ mdio { + ethphy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; +- reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; ++ reset-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; + reset-assert-us = <1000>; + }; + }; +@@ -516,7 +516,7 @@ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 +- MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 /* RST_GBE0_PHY# */ ++ MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 /* RST_GBE0_PHY# */ + >; + }; + +-- +2.43.0 + diff --git a/queue-6.6/arm-dts-imx6qdl-kontron-samx6i-fix-spi0-chip-selects.patch b/queue-6.6/arm-dts-imx6qdl-kontron-samx6i-fix-spi0-chip-selects.patch new file mode 100644 index 00000000000..28adeb118cc --- /dev/null +++ b/queue-6.6/arm-dts-imx6qdl-kontron-samx6i-fix-spi0-chip-selects.patch @@ -0,0 +1,88 @@ +From c361da4693ded3d6e3956a7a2e58c2280ec80854 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Jun 2024 11:13:33 +0200 +Subject: ARM: dts: imx6qdl-kontron-samx6i: fix SPI0 chip selects + +From: Michael Walle + +[ Upstream commit 74e1c956a68a65d642447d852e95b3fbb69bebaa ] + +There is a comment in the imx6q variant dtsi claiming that these +modules will have one more chip select than the imx6dl variant. +This is wrong. Ordinary GPIOs are used for chip selects and both +variants of the module share the very same PCB and both have this +GPIO routed to the SPI0_CS1# pin of the SMARC connector. + +Fix it by moving the third chip select description to the common dtsi. + +Fixes: 2125212785c9 ("ARM: dts: imx6qdl-kontron-samx6i: add Kontron SMARC SoM Support") +Signed-off-by: Michael Walle +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + .../dts/nxp/imx/imx6q-kontron-samx6i.dtsi | 23 ------------------- + .../dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi | 5 +++- + 2 files changed, 4 insertions(+), 24 deletions(-) + +diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-kontron-samx6i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6q-kontron-samx6i.dtsi +index 4d6a0c3e8455f..ff062f4fd726e 100644 +--- a/arch/arm/boot/dts/nxp/imx/imx6q-kontron-samx6i.dtsi ++++ b/arch/arm/boot/dts/nxp/imx/imx6q-kontron-samx6i.dtsi +@@ -5,31 +5,8 @@ + + #include "imx6q.dtsi" + #include "imx6qdl-kontron-samx6i.dtsi" +-#include + + / { + model = "Kontron SMARC sAMX6i Quad/Dual"; + compatible = "kontron,imx6q-samx6i", "fsl,imx6q"; + }; +- +-/* Quad/Dual SoMs have 3 chip-select signals */ +-&ecspi4 { +- cs-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>, +- <&gpio3 29 GPIO_ACTIVE_LOW>, +- <&gpio3 25 GPIO_ACTIVE_LOW>; +-}; +- +-&pinctrl_ecspi4 { +- fsl,pins = < +- MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1 +- MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1 +- MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1 +- +- /* SPI4_IMX_CS2# - connected to internal flash */ +- MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x1b0b0 +- /* SPI4_IMX_CS0# - connected to SMARC SPI0_CS0# */ +- MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0 +- /* SPI4_CS3# - connected to SMARC SPI0_CS1# */ +- MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x1b0b0 +- >; +-}; +diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi +index 700780bf64f58..78cbc2df279e6 100644 +--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi ++++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-kontron-samx6i.dtsi +@@ -244,7 +244,8 @@ &ecspi4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi4>; + cs-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>, +- <&gpio3 29 GPIO_ACTIVE_LOW>; ++ <&gpio3 29 GPIO_ACTIVE_LOW>, ++ <&gpio3 25 GPIO_ACTIVE_LOW>; + status = "okay"; + + /* default boot source: workaround #1 for errata ERR006282 */ +@@ -464,6 +465,8 @@ MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1 + MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x1b0b0 + /* SPI_IMX_CS0# - connected to SMARC SPI0_CS0# */ + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0 ++ /* SPI4_CS3# - connected to SMARC SPI0_CS1# */ ++ MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x1b0b0 + >; + }; + +-- +2.43.0 + diff --git a/queue-6.6/arm-dts-stm32-add-arm-no-tick-in-suspend-to-stm32mp1.patch b/queue-6.6/arm-dts-stm32-add-arm-no-tick-in-suspend-to-stm32mp1.patch new file mode 100644 index 00000000000..5ad1fcaf96f --- /dev/null +++ b/queue-6.6/arm-dts-stm32-add-arm-no-tick-in-suspend-to-stm32mp1.patch @@ -0,0 +1,46 @@ +From 91cf4a1005bc5b861f35768a1435096e9a47b4bc Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 13 May 2024 23:58:15 +0200 +Subject: ARM: dts: stm32: Add arm,no-tick-in-suspend to STM32MP15xx STGEN + timer + +From: Marek Vasut + +[ Upstream commit 4306c047415a227bc72f0e7ba9bde1ccdac10435 ] + +STM32MP15xx RM0436 Rev 6 section 46.3 System timer generator (STGEN) states +" +Arm recommends that the system counter is in an always-on power domain. +This is not supported in the current implementation, therefore STGEN should +be saved and restored before Standby mode entry, and restored at Standby +exit by secure software. +... +" +Instead of piling up workarounds in the firmware which is difficult to +update, add "arm,no-tick-in-suspend" DT property into the timer node to +indicate the timer is stopped in suspend, and let the kernel fix the +timer up. + +Fixes: 8471a20253eb ("ARM: dts: stm32: add stm32mp157c initial support") +Signed-off-by: Marek Vasut +Signed-off-by: Alexandre Torgue +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/st/stm32mp151.dtsi | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm/boot/dts/st/stm32mp151.dtsi b/arch/arm/boot/dts/st/stm32mp151.dtsi +index 61508917521c3..aec7fa5ab5d8c 100644 +--- a/arch/arm/boot/dts/st/stm32mp151.dtsi ++++ b/arch/arm/boot/dts/st/stm32mp151.dtsi +@@ -50,6 +50,7 @@ timer { + , + ; + interrupt-parent = <&intc>; ++ arm,no-tick-in-suspend; + }; + + clocks { +-- +2.43.0 + diff --git a/queue-6.6/arm-dts-sunxi-remove-duplicated-entries-in-makefile.patch b/queue-6.6/arm-dts-sunxi-remove-duplicated-entries-in-makefile.patch new file mode 100644 index 00000000000..1b242b74728 --- /dev/null +++ b/queue-6.6/arm-dts-sunxi-remove-duplicated-entries-in-makefile.patch @@ -0,0 +1,102 @@ +From a4b4b09c877c391c9ff22f6aed97e40e18456564 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 20 Mar 2024 07:10:19 +0100 +Subject: ARM: dts: sunxi: remove duplicated entries in makefile +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Pavel Löbl + +[ Upstream commit bba474656dd85b13e4c5d5bdb73ca08d9136df21 ] + +During introduction of DTS vendor subdirectories in 724ba6751532, sun8i +section of the makefile got duplicated. Clean that up. + +Fixes: 724ba6751532 ("ARM: dts: Move .dts files to vendor sub-directories") +Signed-off-by: Pavel Löbl +Reviewed-by: Jernej Skrabec +Reviewed-by: Andre Przywara +Link: https://lore.kernel.org/r/20240320061027.4078852-1-pavel@loebl.cz +Signed-off-by: Chen-Yu Tsai +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/allwinner/Makefile | 62 ---------------------------- + 1 file changed, 62 deletions(-) + +diff --git a/arch/arm/boot/dts/allwinner/Makefile b/arch/arm/boot/dts/allwinner/Makefile +index eebb5a0c873ad..296be33ec9346 100644 +--- a/arch/arm/boot/dts/allwinner/Makefile ++++ b/arch/arm/boot/dts/allwinner/Makefile +@@ -259,68 +259,6 @@ dtb-$(CONFIG_MACH_SUN8I) += \ + sun8i-v3s-licheepi-zero.dtb \ + sun8i-v3s-licheepi-zero-dock.dtb \ + sun8i-v40-bananapi-m2-berry.dtb +-dtb-$(CONFIG_MACH_SUN8I) += \ +- sun8i-a23-evb.dtb \ +- sun8i-a23-gt90h-v4.dtb \ +- sun8i-a23-inet86dz.dtb \ +- sun8i-a23-ippo-q8h-v5.dtb \ +- sun8i-a23-ippo-q8h-v1.2.dtb \ +- sun8i-a23-polaroid-mid2407pxe03.dtb \ +- sun8i-a23-polaroid-mid2809pxe04.dtb \ +- sun8i-a23-q8-tablet.dtb \ +- sun8i-a33-et-q8-v1.6.dtb \ +- sun8i-a33-ga10h-v1.1.dtb \ +- sun8i-a33-inet-d978-rev2.dtb \ +- sun8i-a33-ippo-q8h-v1.2.dtb \ +- sun8i-a33-olinuxino.dtb \ +- sun8i-a33-q8-tablet.dtb \ +- sun8i-a33-sinlinx-sina33.dtb \ +- sun8i-a83t-allwinner-h8homlet-v2.dtb \ +- sun8i-a83t-bananapi-m3.dtb \ +- sun8i-a83t-cubietruck-plus.dtb \ +- sun8i-a83t-tbs-a711.dtb \ +- sun8i-h2-plus-bananapi-m2-zero.dtb \ +- sun8i-h2-plus-libretech-all-h3-cc.dtb \ +- sun8i-h2-plus-orangepi-r1.dtb \ +- sun8i-h2-plus-orangepi-zero.dtb \ +- sun8i-h3-bananapi-m2-plus.dtb \ +- sun8i-h3-bananapi-m2-plus-v1.2.dtb \ +- sun8i-h3-beelink-x2.dtb \ +- sun8i-h3-libretech-all-h3-cc.dtb \ +- sun8i-h3-mapleboard-mp130.dtb \ +- sun8i-h3-nanopi-duo2.dtb \ +- sun8i-h3-nanopi-m1.dtb\ +- \ +- sun8i-h3-nanopi-m1-plus.dtb \ +- sun8i-h3-nanopi-neo.dtb \ +- sun8i-h3-nanopi-neo-air.dtb \ +- sun8i-h3-nanopi-r1.dtb \ +- sun8i-h3-orangepi-2.dtb \ +- sun8i-h3-orangepi-lite.dtb \ +- sun8i-h3-orangepi-one.dtb \ +- sun8i-h3-orangepi-pc.dtb \ +- sun8i-h3-orangepi-pc-plus.dtb \ +- sun8i-h3-orangepi-plus.dtb \ +- sun8i-h3-orangepi-plus2e.dtb \ +- sun8i-h3-orangepi-zero-plus2.dtb \ +- sun8i-h3-rervision-dvk.dtb \ +- sun8i-h3-zeropi.dtb \ +- sun8i-h3-emlid-neutis-n5h3-devboard.dtb \ +- sun8i-r16-bananapi-m2m.dtb \ +- sun8i-r16-nintendo-nes-classic.dtb \ +- sun8i-r16-nintendo-super-nes-classic.dtb \ +- sun8i-r16-parrot.dtb \ +- sun8i-r40-bananapi-m2-ultra.dtb \ +- sun8i-r40-oka40i-c.dtb \ +- sun8i-s3-elimo-initium.dtb \ +- sun8i-s3-lichee-zero-plus.dtb \ +- sun8i-s3-pinecube.dtb \ +- sun8i-t113s-mangopi-mq-r-t113.dtb \ +- sun8i-t3-cqa3t-bv3.dtb \ +- sun8i-v3-sl631-imx179.dtb \ +- sun8i-v3s-licheepi-zero.dtb \ +- sun8i-v3s-licheepi-zero-dock.dtb \ +- sun8i-v40-bananapi-m2-berry.dtb + dtb-$(CONFIG_MACH_SUN9I) += \ + sun9i-a80-optimus.dtb \ + sun9i-a80-cubieboard4.dtb +-- +2.43.0 + diff --git a/queue-6.6/arm-spitz-fix-gpio-assignment-for-backlight.patch b/queue-6.6/arm-spitz-fix-gpio-assignment-for-backlight.patch new file mode 100644 index 00000000000..58f2a8a6b7b --- /dev/null +++ b/queue-6.6/arm-spitz-fix-gpio-assignment-for-backlight.patch @@ -0,0 +1,91 @@ +From b674d0b04c2a1621b3ebbd4550a9f3f4501faa16 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 28 Jun 2024 11:08:41 -0700 +Subject: ARM: spitz: fix GPIO assignment for backlight + +From: Dmitry Torokhov + +[ Upstream commit 78ab3d352f2982bf3f7e506bfbaba7afee1ed8a9 ] + +GPIOs controlling backlight on Spitz and Akita are coming from GPIO +expanders, not the pxa27xx-gpio block, correct it. + +Additionally GPIO lookup tables operate with pin numbers rather than +legacy GPIO numbers, fix that as well. Use raw numbers instead of legacy +GPIO names to avoid confusion. + +Fixes: ee0c8e494cc3 ("backlight: corgi: Convert to use GPIO descriptors") +Reviewed-by: Linus Walleij +Signed-off-by: Dmitry Torokhov +Link: https://lore.kernel.org/r/20240628180852.1738922-2-dmitry.torokhov@gmail.com +Signed-off-by: Arnd Bergmann +Signed-off-by: Sasha Levin +--- + arch/arm/mach-pxa/spitz.c | 30 ++++++++++-------------------- + 1 file changed, 10 insertions(+), 20 deletions(-) + +diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c +index cc691b199429c..a42417de53f74 100644 +--- a/arch/arm/mach-pxa/spitz.c ++++ b/arch/arm/mach-pxa/spitz.c +@@ -520,10 +520,8 @@ static struct gpiod_lookup_table spitz_ads7846_gpio_table = { + static struct gpiod_lookup_table spitz_lcdcon_gpio_table = { + .dev_id = "spi2.1", + .table = { +- GPIO_LOOKUP("gpio-pxa", SPITZ_GPIO_BACKLIGHT_CONT, +- "BL_CONT", GPIO_ACTIVE_LOW), +- GPIO_LOOKUP("gpio-pxa", SPITZ_GPIO_BACKLIGHT_ON, +- "BL_ON", GPIO_ACTIVE_HIGH), ++ GPIO_LOOKUP("sharp-scoop.1", 6, "BL_CONT", GPIO_ACTIVE_LOW), ++ GPIO_LOOKUP("sharp-scoop.1", 7, "BL_ON", GPIO_ACTIVE_HIGH), + { }, + }, + }; +@@ -531,10 +529,8 @@ static struct gpiod_lookup_table spitz_lcdcon_gpio_table = { + static struct gpiod_lookup_table akita_lcdcon_gpio_table = { + .dev_id = "spi2.1", + .table = { +- GPIO_LOOKUP("gpio-pxa", AKITA_GPIO_BACKLIGHT_CONT, +- "BL_CONT", GPIO_ACTIVE_LOW), +- GPIO_LOOKUP("gpio-pxa", AKITA_GPIO_BACKLIGHT_ON, +- "BL_ON", GPIO_ACTIVE_HIGH), ++ GPIO_LOOKUP("i2c-max7310", 3, "BL_ON", GPIO_ACTIVE_HIGH), ++ GPIO_LOOKUP("i2c-max7310", 4, "BL_CONT", GPIO_ACTIVE_LOW), + { }, + }, + }; +@@ -941,12 +937,9 @@ static inline void spitz_i2c_init(void) {} + static struct gpiod_lookup_table spitz_audio_gpio_table = { + .dev_id = "spitz-audio", + .table = { +- GPIO_LOOKUP("sharp-scoop.0", SPITZ_GPIO_MUTE_L - SPITZ_SCP_GPIO_BASE, +- "mute-l", GPIO_ACTIVE_HIGH), +- GPIO_LOOKUP("sharp-scoop.0", SPITZ_GPIO_MUTE_R - SPITZ_SCP_GPIO_BASE, +- "mute-r", GPIO_ACTIVE_HIGH), +- GPIO_LOOKUP("sharp-scoop.1", SPITZ_GPIO_MIC_BIAS - SPITZ_SCP2_GPIO_BASE, +- "mic", GPIO_ACTIVE_HIGH), ++ GPIO_LOOKUP("sharp-scoop.0", 3, "mute-l", GPIO_ACTIVE_HIGH), ++ GPIO_LOOKUP("sharp-scoop.0", 4, "mute-r", GPIO_ACTIVE_HIGH), ++ GPIO_LOOKUP("sharp-scoop.1", 8, "mic", GPIO_ACTIVE_HIGH), + { }, + }, + }; +@@ -954,12 +947,9 @@ static struct gpiod_lookup_table spitz_audio_gpio_table = { + static struct gpiod_lookup_table akita_audio_gpio_table = { + .dev_id = "spitz-audio", + .table = { +- GPIO_LOOKUP("sharp-scoop.0", SPITZ_GPIO_MUTE_L - SPITZ_SCP_GPIO_BASE, +- "mute-l", GPIO_ACTIVE_HIGH), +- GPIO_LOOKUP("sharp-scoop.0", SPITZ_GPIO_MUTE_R - SPITZ_SCP_GPIO_BASE, +- "mute-r", GPIO_ACTIVE_HIGH), +- GPIO_LOOKUP("i2c-max7310", AKITA_GPIO_MIC_BIAS - AKITA_IOEXP_GPIO_BASE, +- "mic", GPIO_ACTIVE_HIGH), ++ GPIO_LOOKUP("sharp-scoop.0", 3, "mute-l", GPIO_ACTIVE_HIGH), ++ GPIO_LOOKUP("sharp-scoop.0", 4, "mute-r", GPIO_ACTIVE_HIGH), ++ GPIO_LOOKUP("i2c-max7310", 2, "mic", GPIO_ACTIVE_HIGH), + { }, + }, + }; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-amlogic-add-power-domain-to-hdmitx.patch b/queue-6.6/arm64-dts-amlogic-add-power-domain-to-hdmitx.patch new file mode 100644 index 00000000000..c9183c06e4d --- /dev/null +++ b/queue-6.6/arm64-dts-amlogic-add-power-domain-to-hdmitx.patch @@ -0,0 +1,87 @@ +From e78a14c1677d90cba8f333fddf052222151d8641 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 Jun 2024 16:50:15 +0200 +Subject: arm64: dts: amlogic: add power domain to hdmitx + +From: Jerome Brunet + +[ Upstream commit f1ab099d6591a353899a2ee09c89de0fc908e2d2 ] + +HDMI Tx needs HDMI Tx memory power domain turned on. This power domain is +handled under the VPU power domain. + +The HDMI Tx currently works because it is enabling the PD by directly +poking the power controller register. It is should not do that but properly +use the power domain controller. + +Fix this by adding the power domain to HDMI Tx. + +Signed-off-by: Jerome Brunet +Link: https://lore.kernel.org/r/20240625145017.1003346-3-jbrunet@baylibre.com +Signed-off-by: Neil Armstrong +Stable-dep-of: 1443b6ea806d ("arm64: dts: amlogic: setup hdmi system clock") +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/amlogic/meson-g12.dtsi | 4 ++++ + arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 1 + + arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 1 + + arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 4 ++++ + 4 files changed, 10 insertions(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-g12.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12.dtsi +index 6a1f4dcf64885..7b655e07e80cf 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-g12.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-g12.dtsi +@@ -367,6 +367,10 @@ ðmac { + power-domains = <&pwrc PWRC_G12A_ETH_ID>; + }; + ++&hdmi_tx { ++ power-domains = <&pwrc PWRC_G12A_VPU_ID>; ++}; ++ + &vpu { + power-domains = <&pwrc PWRC_G12A_VPU_ID>; + }; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +index a15c1ef30a88b..041c37b809f27 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +@@ -315,6 +315,7 @@ &hdmi_tx { + <&clkc CLKID_HDMI_PCLK>, + <&clkc CLKID_GCLK_VENCI_INT0>; + clock-names = "isfr", "iahb", "venci"; ++ power-domains = <&pwrc PWRC_GXBB_VPU_ID>; + }; + + &sysctrl { +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +index a53b38045b3d2..067108800a58d 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +@@ -327,6 +327,7 @@ &hdmi_tx { + <&clkc CLKID_HDMI_PCLK>, + <&clkc CLKID_GCLK_VENCI_INT0>; + clock-names = "isfr", "iahb", "venci"; ++ power-domains = <&pwrc PWRC_GXBB_VPU_ID>; + }; + + &sysctrl { +diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi +index fcaa1a273829c..13e742ba00bea 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi +@@ -518,6 +518,10 @@ &gpio_intc { + "amlogic,meson-gpio-intc"; + }; + ++&hdmi_tx { ++ power-domains = <&pwrc PWRC_SM1_VPU_ID>; ++}; ++ + &pcie { + power-domains = <&pwrc PWRC_SM1_PCIE_ID>; + }; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-amlogic-gx-correct-hdmi-clocks.patch b/queue-6.6/arm64-dts-amlogic-gx-correct-hdmi-clocks.patch new file mode 100644 index 00000000000..82d34107f4d --- /dev/null +++ b/queue-6.6/arm64-dts-amlogic-gx-correct-hdmi-clocks.patch @@ -0,0 +1,63 @@ +From c60cbf2cd9dad8112aa23e254274cb0e9b00e2b0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 26 Jun 2024 17:27:30 +0200 +Subject: arm64: dts: amlogic: gx: correct hdmi clocks + +From: Jerome Brunet + +[ Upstream commit 0602ba0dcd0e76067a0b7543e92b2de3fb231073 ] + +The clocks provided to HDMI tx are not consistent between gx and g12: +* gx receives the peripheral clock as 'isfr' while g12 receives it as + 'iahb' +* g12 gets the HDMI system clock as 'isfr' but gx does not even get it. + It surely needs that clock since the driver is directly poking around + the clock controller's registers for that clock. + +Align gx SoCs with g12 and provide: + * the HDMI peripheral clock as 'iahb' + * the HDMI system clock as 'isfr' + +Fixes: 6939db7e0dbf ("ARM64: dts: meson-gx: Add support for HDMI output") +Signed-off-by: Jerome Brunet +Link: https://lore.kernel.org/r/20240626152733.1350376-2-jbrunet@baylibre.com +Signed-off-by: Neil Armstrong +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 4 ++-- + arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 4 ++-- + 2 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +index 12ef6e81c8bd6..a15c1ef30a88b 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +@@ -311,8 +311,8 @@ &hdmi_tx { + <&reset RESET_HDMI_SYSTEM_RESET>, + <&reset RESET_HDMI_TX>; + reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy"; +- clocks = <&clkc CLKID_HDMI_PCLK>, +- <&clkc CLKID_CLK81>, ++ clocks = <&clkc CLKID_HDMI>, ++ <&clkc CLKID_HDMI_PCLK>, + <&clkc CLKID_GCLK_VENCI_INT0>; + clock-names = "isfr", "iahb", "venci"; + }; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +index 17bcfa4702e17..a53b38045b3d2 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +@@ -323,8 +323,8 @@ &hdmi_tx { + <&reset RESET_HDMI_SYSTEM_RESET>, + <&reset RESET_HDMI_TX>; + reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy"; +- clocks = <&clkc CLKID_HDMI_PCLK>, +- <&clkc CLKID_CLK81>, ++ clocks = <&clkc CLKID_HDMI>, ++ <&clkc CLKID_HDMI_PCLK>, + <&clkc CLKID_GCLK_VENCI_INT0>; + clock-names = "isfr", "iahb", "venci"; + }; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-amlogic-setup-hdmi-system-clock.patch b/queue-6.6/arm64-dts-amlogic-setup-hdmi-system-clock.patch new file mode 100644 index 00000000000..9b8c9223faf --- /dev/null +++ b/queue-6.6/arm64-dts-amlogic-setup-hdmi-system-clock.patch @@ -0,0 +1,80 @@ +From 8ee7a24c444a3147e84e378e4ac36ff5d81bafb2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 26 Jun 2024 17:27:31 +0200 +Subject: arm64: dts: amlogic: setup hdmi system clock + +From: Jerome Brunet + +[ Upstream commit 1443b6ea806dfcdcee6c894784332c9c947ac319 ] + +HDMI Tx needs the system clock set on the xtal rate. +This clock is managed by the main clock controller of the related SoCs. + +Currently 2 part of the display drivers race to setup the HDMI system +clock by directly poking the controller register. The clock API should +be used to setup the rate instead. + +Use assigned-clock to setup the HDMI system clock. + +Fixes: 6939db7e0dbf ("ARM64: dts: meson-gx: Add support for HDMI output") +Signed-off-by: Jerome Brunet +Link: https://lore.kernel.org/r/20240626152733.1350376-3-jbrunet@baylibre.com +Signed-off-by: Neil Armstrong +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 5 +++++ + arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 5 +++++ + arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 5 +++++ + 3 files changed, 15 insertions(+) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +index ff68b911b7297..0ff0d090548d0 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +@@ -215,6 +215,11 @@ hdmi_tx: hdmi-tx@0 { + #sound-dai-cells = <0>; + status = "disabled"; + ++ assigned-clocks = <&clkc CLKID_HDMI_SEL>, ++ <&clkc CLKID_HDMI>; ++ assigned-clock-parents = <&xtal>, <0>; ++ assigned-clock-rates = <0>, <24000000>; ++ + /* VPU VENC Input */ + hdmi_tx_venc_port: port@0 { + reg = <0>; +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +index 041c37b809f27..ed00e67e6923a 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +@@ -316,6 +316,11 @@ &hdmi_tx { + <&clkc CLKID_GCLK_VENCI_INT0>; + clock-names = "isfr", "iahb", "venci"; + power-domains = <&pwrc PWRC_GXBB_VPU_ID>; ++ ++ assigned-clocks = <&clkc CLKID_HDMI_SEL>, ++ <&clkc CLKID_HDMI>; ++ assigned-clock-parents = <&xtal>, <0>; ++ assigned-clock-rates = <0>, <24000000>; + }; + + &sysctrl { +diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +index 067108800a58d..f58d1790de1cb 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +@@ -328,6 +328,11 @@ &hdmi_tx { + <&clkc CLKID_GCLK_VENCI_INT0>; + clock-names = "isfr", "iahb", "venci"; + power-domains = <&pwrc PWRC_GXBB_VPU_ID>; ++ ++ assigned-clocks = <&clkc CLKID_HDMI_SEL>, ++ <&clkc CLKID_HDMI>; ++ assigned-clock-parents = <&xtal>, <0>; ++ assigned-clock-rates = <0>, <24000000>; + }; + + &sysctrl { +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-amlogic-sm1-fix-spdif-compatibles.patch b/queue-6.6/arm64-dts-amlogic-sm1-fix-spdif-compatibles.patch new file mode 100644 index 00000000000..56291d18118 --- /dev/null +++ b/queue-6.6/arm64-dts-amlogic-sm1-fix-spdif-compatibles.patch @@ -0,0 +1,46 @@ +From 3b61a0335d36a0d4b7b228dcb1bc7eaf7affe5a2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 Jun 2024 13:18:43 +0200 +Subject: arm64: dts: amlogic: sm1: fix spdif compatibles + +From: Jerome Brunet + +[ Upstream commit b0aba467c329a89e8b325eda0cf60776958353fe ] + +The spdif input and output of g12 and sm1 are compatible but +sm1 should use the related compatible since it exists. + +Fixes: 86f2159468d5 ("arm64: dts: meson-sm1: add spdifin and pdifout nodes") +Signed-off-by: Jerome Brunet +Link: https://lore.kernel.org/r/20240625111845.928192-1-jbrunet@baylibre.com +Signed-off-by: Neil Armstrong +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi +index 643f94d9d08e1..fcaa1a273829c 100644 +--- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi ++++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi +@@ -339,7 +339,7 @@ tdmin_lb: audio-controller@3c0 { + }; + + spdifin: audio-controller@400 { +- compatible = "amlogic,g12a-spdifin", ++ compatible = "amlogic,sm1-spdifin", + "amlogic,axg-spdifin"; + reg = <0x0 0x400 0x0 0x30>; + #sound-dai-cells = <0>; +@@ -353,7 +353,7 @@ spdifin: audio-controller@400 { + }; + + spdifout_a: audio-controller@480 { +- compatible = "amlogic,g12a-spdifout", ++ compatible = "amlogic,sm1-spdifout", + "amlogic,axg-spdifout"; + reg = <0x0 0x480 0x0 0x50>; + #sound-dai-cells = <0>; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-imx8mp-add-hdmi-power-domains.patch b/queue-6.6/arm64-dts-imx8mp-add-hdmi-power-domains.patch new file mode 100644 index 00000000000..33235ec1b39 --- /dev/null +++ b/queue-6.6/arm64-dts-imx8mp-add-hdmi-power-domains.patch @@ -0,0 +1,83 @@ +From ec259066a76a30b3a75781d97b1e000bab64cbec Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 27 Feb 2024 16:04:37 -0600 +Subject: arm64: dts: imx8mp: add HDMI power-domains + +From: Lucas Stach + +[ Upstream commit f6772c5882d2229b4e0d9aadbcac3eb922e822c0 ] + +This adds the PGC and HDMI blk-ctrl nodes providing power control for +HDMI subsystem peripherals. + +Signed-off-by: Adam Ford +Signed-off-by: Lucas Stach +Tested-by: Marek Vasut +Tested-by: Luca Ceresoli +Tested-by: Tommaso Merciai +Signed-off-by: Shawn Guo +Stable-dep-of: 2f8405fb077b ("arm64: dts: imx8mp: Fix pgc vpu locations") +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/freescale/imx8mp.dtsi | 38 +++++++++++++++++++++++ + 1 file changed, 38 insertions(+) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi +index 0b824120d5488..2de16e3d21d24 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi +@@ -849,6 +849,23 @@ pgc_mediamix: power-domain@10 { + <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; + }; + ++ pgc_hdmimix: power-domain@14 { ++ #power-domain-cells = <0>; ++ reg = ; ++ clocks = <&clk IMX8MP_CLK_HDMI_ROOT>, ++ <&clk IMX8MP_CLK_HDMI_APB>; ++ assigned-clocks = <&clk IMX8MP_CLK_HDMI_AXI>, ++ <&clk IMX8MP_CLK_HDMI_APB>; ++ assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_500M>, ++ <&clk IMX8MP_SYS_PLL1_133M>; ++ assigned-clock-rates = <500000000>, <133000000>; ++ }; ++ ++ pgc_hdmi_phy: power-domain@15 { ++ #power-domain-cells = <0>; ++ reg = ; ++ }; ++ + pgc_mipi_phy2: power-domain@16 { + #power-domain-cells = <0>; + reg = ; +@@ -1840,6 +1857,27 @@ hsio_blk_ctrl: blk-ctrl@32f10000 { + #power-domain-cells = <1>; + #clock-cells = <0>; + }; ++ ++ hdmi_blk_ctrl: blk-ctrl@32fc0000 { ++ compatible = "fsl,imx8mp-hdmi-blk-ctrl", "syscon"; ++ reg = <0x32fc0000 0x1000>; ++ clocks = <&clk IMX8MP_CLK_HDMI_APB>, ++ <&clk IMX8MP_CLK_HDMI_ROOT>, ++ <&clk IMX8MP_CLK_HDMI_REF_266M>, ++ <&clk IMX8MP_CLK_HDMI_24M>, ++ <&clk IMX8MP_CLK_HDMI_FDCC_TST>; ++ clock-names = "apb", "axi", "ref_266m", "ref_24m", "fdcc"; ++ power-domains = <&pgc_hdmimix>, <&pgc_hdmimix>, ++ <&pgc_hdmimix>, <&pgc_hdmimix>, ++ <&pgc_hdmimix>, <&pgc_hdmimix>, ++ <&pgc_hdmimix>, <&pgc_hdmi_phy>, ++ <&pgc_hdmimix>, <&pgc_hdmimix>; ++ power-domain-names = "bus", "irqsteer", "lcdif", ++ "pai", "pvi", "trng", ++ "hdmi-tx", "hdmi-tx-phy", ++ "hdcp", "hrv"; ++ #power-domain-cells = <1>; ++ }; + }; + + pcie: pcie@33800000 { +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-imx8mp-add-npu-node.patch b/queue-6.6/arm64-dts-imx8mp-add-npu-node.patch new file mode 100644 index 00000000000..3271b507bcc --- /dev/null +++ b/queue-6.6/arm64-dts-imx8mp-add-npu-node.patch @@ -0,0 +1,73 @@ +From 4e405d9b90f93a8236dd075f32da65569e870943 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 22 Oct 2023 11:19:10 -0500 +Subject: arm64: dts: imx8mp: Add NPU Node + +From: Adam Ford + +[ Upstream commit 4bedc468b725d55655dc8c9f5528932f4d77ccb0 ] + +The NPU is based on the Vivante GC8000 and its power-domain +is controlled my pgc_mlmix. Since the power-domain uses +some of these clocks, setup the clock parent and rates +inside the power-domain, and add the NPU node. + +The data sheet states the CLK_ML_AHB should be 300MHz for +nominal, but 800MHz clock will divide down to 266 instead. +Boards which operate in over-drive mode should update the +clocks on their boards accordingly. When the driver loads, +the NPU numerates as: + + etnaviv-gpu 38500000.npu: model: GC8000, revision: 8002 + +Signed-off-by: Adam Ford +Reviewed-by: Alexander Stein +Signed-off-by: Shawn Guo +Stable-dep-of: 106f68fc9da3 ("arm64: dts: imx8mp: Fix pgc_mlmix location") +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/freescale/imx8mp.dtsi | 21 +++++++++++++++++++++ + 1 file changed, 21 insertions(+) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi +index 4b50920ac2049..56f72d264eee8 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi +@@ -886,6 +886,15 @@ pgc_mlmix: power-domain@24 { + clocks = <&clk IMX8MP_CLK_ML_AXI>, + <&clk IMX8MP_CLK_ML_AHB>, + <&clk IMX8MP_CLK_NPU_ROOT>; ++ assigned-clocks = <&clk IMX8MP_CLK_ML_CORE>, ++ <&clk IMX8MP_CLK_ML_AXI>, ++ <&clk IMX8MP_CLK_ML_AHB>; ++ assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>, ++ <&clk IMX8MP_SYS_PLL1_800M>, ++ <&clk IMX8MP_SYS_PLL1_800M>; ++ assigned-clock-rates = <800000000>, ++ <800000000>, ++ <300000000>; + }; + }; + }; +@@ -1970,6 +1979,18 @@ vpumix_blk_ctrl: blk-ctrl@38330000 { + interconnect-names = "g1", "g2", "vc8000e"; + }; + ++ npu: npu@38500000 { ++ compatible = "vivante,gc"; ++ reg = <0x38500000 0x200000>; ++ interrupts = ; ++ clocks = <&clk IMX8MP_CLK_NPU_ROOT>, ++ <&clk IMX8MP_CLK_NPU_ROOT>, ++ <&clk IMX8MP_CLK_ML_AXI>, ++ <&clk IMX8MP_CLK_ML_AHB>; ++ clock-names = "core", "shader", "bus", "reg"; ++ power-domains = <&pgc_mlmix>; ++ }; ++ + gic: interrupt-controller@38800000 { + compatible = "arm,gic-v3"; + reg = <0x38800000 0x10000>, +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-imx8mp-fix-pgc-vpu-locations.patch b/queue-6.6/arm64-dts-imx8mp-fix-pgc-vpu-locations.patch new file mode 100644 index 00000000000..bf27ed4632f --- /dev/null +++ b/queue-6.6/arm64-dts-imx8mp-fix-pgc-vpu-locations.patch @@ -0,0 +1,106 @@ +From 7bef8ceff763082c1d1ccc7a8411cf42c3057502 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 19 Jun 2024 05:10:44 -0500 +Subject: arm64: dts: imx8mp: Fix pgc vpu locations + +From: Adam Ford + +[ Upstream commit 2f8405fb077bcb8e98c8cd87c2a0a238b15d8da8 ] + +The various pgv_vpu nodes have a mismatch between the value after +the @ symbol and what is referenced by 'reg' so reorder the nodes +to align. + +Fixes: df680992dd62 ("arm64: dts: imx8mp: add vpu pgc nodes") +Suggested-by: Alexander Stein +Signed-off-by: Adam Ford +Reviewd-by: Alexander Stein +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/freescale/imx8mp.dtsi | 55 ++++++++++++----------- + 1 file changed, 28 insertions(+), 27 deletions(-) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi +index 2de16e3d21d24..d1488ebfef3f0 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi +@@ -834,6 +834,12 @@ pgc_gpumix: power-domain@7 { + assigned-clock-rates = <800000000>, <400000000>; + }; + ++ pgc_vpumix: power-domain@8 { ++ #power-domain-cells = <0>; ++ reg = ; ++ clocks = <&clk IMX8MP_CLK_VPU_ROOT>; ++ }; ++ + pgc_gpu3d: power-domain@9 { + #power-domain-cells = <0>; + reg = ; +@@ -849,6 +855,28 @@ pgc_mediamix: power-domain@10 { + <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; + }; + ++ pgc_vpu_g1: power-domain@11 { ++ #power-domain-cells = <0>; ++ power-domains = <&pgc_vpumix>; ++ reg = ; ++ clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>; ++ }; ++ ++ pgc_vpu_g2: power-domain@12 { ++ #power-domain-cells = <0>; ++ power-domains = <&pgc_vpumix>; ++ reg = ; ++ clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>; ++ ++ }; ++ ++ pgc_vpu_vc8000e: power-domain@13 { ++ #power-domain-cells = <0>; ++ power-domains = <&pgc_vpumix>; ++ reg = ; ++ clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>; ++ }; ++ + pgc_hdmimix: power-domain@14 { + #power-domain-cells = <0>; + reg = ; +@@ -886,33 +914,6 @@ pgc_ispdwp: power-domain@18 { + reg = ; + clocks = <&clk IMX8MP_CLK_MEDIA_ISP_ROOT>; + }; +- +- pgc_vpumix: power-domain@19 { +- #power-domain-cells = <0>; +- reg = ; +- clocks = <&clk IMX8MP_CLK_VPU_ROOT>; +- }; +- +- pgc_vpu_g1: power-domain@20 { +- #power-domain-cells = <0>; +- power-domains = <&pgc_vpumix>; +- reg = ; +- clocks = <&clk IMX8MP_CLK_VPU_G1_ROOT>; +- }; +- +- pgc_vpu_g2: power-domain@21 { +- #power-domain-cells = <0>; +- power-domains = <&pgc_vpumix>; +- reg = ; +- clocks = <&clk IMX8MP_CLK_VPU_G2_ROOT>; +- }; +- +- pgc_vpu_vc8000e: power-domain@22 { +- #power-domain-cells = <0>; +- power-domains = <&pgc_vpumix>; +- reg = ; +- clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>; +- }; + }; + }; + }; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-imx8mp-fix-pgc_mlmix-location.patch b/queue-6.6/arm64-dts-imx8mp-fix-pgc_mlmix-location.patch new file mode 100644 index 00000000000..821b7aeb500 --- /dev/null +++ b/queue-6.6/arm64-dts-imx8mp-fix-pgc_mlmix-location.patch @@ -0,0 +1,82 @@ +From 4c5f97fe926a98a830f88d0786471496b9fb0db7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Jun 2024 17:39:51 -0500 +Subject: arm64: dts: imx8mp: Fix pgc_mlmix location + +From: Adam Ford + +[ Upstream commit 106f68fc9da3d4835070b55a2229d2c54ef5cba1 ] + +The pgc_mlmix shows a power-domain@24, but the reg value is +IMX8MP_POWER_DOMAIN_MLMIX which is set to 4. + +The stuff after the @ symbol should match the stuff referenced +by 'reg' so reorder the pgc_mlmix so it to appear as power-domain@4. + +Fixes: 834464c8504c ("arm64: dts: imx8mp: add mlmix power domain") +Fixes: 4bedc468b725 ("arm64: dts: imx8mp: Add NPU Node") +Signed-off-by: Adam Ford +Reviewed-by: Peng Fan +Reviewed-by: Marek Vasut +Reviewed-by: Alexander Stein +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/freescale/imx8mp.dtsi | 34 +++++++++++------------ + 1 file changed, 17 insertions(+), 17 deletions(-) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi +index 56f72d264eee8..0b824120d5488 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi +@@ -785,6 +785,23 @@ pgc_usb2_phy: power-domain@3 { + reg = ; + }; + ++ pgc_mlmix: power-domain@4 { ++ #power-domain-cells = <0>; ++ reg = ; ++ clocks = <&clk IMX8MP_CLK_ML_AXI>, ++ <&clk IMX8MP_CLK_ML_AHB>, ++ <&clk IMX8MP_CLK_NPU_ROOT>; ++ assigned-clocks = <&clk IMX8MP_CLK_ML_CORE>, ++ <&clk IMX8MP_CLK_ML_AXI>, ++ <&clk IMX8MP_CLK_ML_AHB>; ++ assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>, ++ <&clk IMX8MP_SYS_PLL1_800M>, ++ <&clk IMX8MP_SYS_PLL1_800M>; ++ assigned-clock-rates = <800000000>, ++ <800000000>, ++ <300000000>; ++ }; ++ + pgc_audio: power-domain@5 { + #power-domain-cells = <0>; + reg = ; +@@ -879,23 +896,6 @@ pgc_vpu_vc8000e: power-domain@22 { + reg = ; + clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>; + }; +- +- pgc_mlmix: power-domain@24 { +- #power-domain-cells = <0>; +- reg = ; +- clocks = <&clk IMX8MP_CLK_ML_AXI>, +- <&clk IMX8MP_CLK_ML_AHB>, +- <&clk IMX8MP_CLK_NPU_ROOT>; +- assigned-clocks = <&clk IMX8MP_CLK_ML_CORE>, +- <&clk IMX8MP_CLK_ML_AXI>, +- <&clk IMX8MP_CLK_ML_AHB>; +- assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>, +- <&clk IMX8MP_SYS_PLL1_800M>, +- <&clk IMX8MP_SYS_PLL1_800M>; +- assigned-clock-rates = <800000000>, +- <800000000>, +- <300000000>; +- }; + }; + }; + }; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-mediatek-mt7622-fix-emmc-pinctrl-mux.patch b/queue-6.6/arm64-dts-mediatek-mt7622-fix-emmc-pinctrl-mux.patch new file mode 100644 index 00000000000..05b6a3a0193 --- /dev/null +++ b/queue-6.6/arm64-dts-mediatek-mt7622-fix-emmc-pinctrl-mux.patch @@ -0,0 +1,66 @@ +From e4d649f8104d0c796ee840814ac0d6d8e3169659 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 4 Jun 2024 09:49:16 +0200 +Subject: arm64: dts: mediatek: mt7622: fix "emmc" pinctrl mux +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Rafał Miłecki + +[ Upstream commit aebba1030a5766cdf894ed4ab0cac7aed5aee9c1 ] + +Value "emmc_rst" is a group name and should be part of the "groups" +property. + +This fixes: +arch/arm64/boot/dts/mediatek/mt7622-rfb1.dtb: pinctrl@10211000: emmc-pins-default:mux:function: ['emmc', 'emmc_rst'] is too long + from schema $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7622-pinctrl.yaml# +arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dtb: pinctrl@10211000: emmc-pins-default:mux:function: ['emmc', 'emmc_rst'] is too long + from schema $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7622-pinctrl.yaml# + +Fixes: 3725ba3f5574 ("arm64: dts: mt7622: add pinctrl related device nodes") +Fixes: 0b6286dd96c0 ("arm64: dts: mt7622: add bananapi BPI-R64 board") +Signed-off-by: Rafał Miłecki +Reviewed-by: AngeloGioacchino Del Regno +Link: https://lore.kernel.org/r/20240604074916.7929-1-zajec5@gmail.com +Signed-off-by: AngeloGioacchino Del Regno +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts | 4 ++-- + arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 4 ++-- + 2 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts +index 7ef517e9e3746..15838c1ee8cc3 100644 +--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts ++++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts +@@ -318,8 +318,8 @@ asm_sel { + /* eMMC is shared pin with parallel NAND */ + emmc_pins_default: emmc-pins-default { + mux { +- function = "emmc", "emmc_rst"; +- groups = "emmc"; ++ function = "emmc"; ++ groups = "emmc", "emmc_rst"; + }; + + /* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7", +diff --git a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts +index a75dc63a1362a..0a14ef1da60de 100644 +--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts ++++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts +@@ -244,8 +244,8 @@ &pio { + /* eMMC is shared pin with parallel NAND */ + emmc_pins_default: emmc-pins-default { + mux { +- function = "emmc", "emmc_rst"; +- groups = "emmc"; ++ function = "emmc"; ++ groups = "emmc", "emmc_rst"; + }; + + /* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7", +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-mediatek-mt8183-kukui-drop-bogus-output-en.patch b/queue-6.6/arm64-dts-mediatek-mt8183-kukui-drop-bogus-output-en.patch new file mode 100644 index 00000000000..74268c0cde2 --- /dev/null +++ b/queue-6.6/arm64-dts-mediatek-mt8183-kukui-drop-bogus-output-en.patch @@ -0,0 +1,51 @@ +From 73ff2ec78075416264b81092185ec6cff5ae0e44 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 12 Apr 2024 15:56:12 +0800 +Subject: arm64: dts: mediatek: mt8183-kukui: Drop bogus output-enable property + +From: Chen-Yu Tsai + +[ Upstream commit e9a9055fdcdc1e5a27cef118c5b4f09cdd2fa28e ] + +The "output-enable" property is set on uart1's RTS pin. This is bogus +because the hardware does not actually have a controllable output +buffer. Secondly, the implementation incorrectly treats this property +as a request to switch the pin to GPIO output. This does not fit the +intended semantic of "output-enable" and it does not have any affect +either because the pin is muxed to the UART function, not the GPIO +function. + +Drop the property. + +Fixes: cd894e274b74 ("arm64: dts: mt8183: Add krane-sku176 board") +Signed-off-by: Chen-Yu Tsai +Link: https://lore.kernel.org/r/20240412075613.1200048-1-wenst@chromium.org +Signed-off-by: AngeloGioacchino Del Regno +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +index d846342c1d3b2..2c6587f260f82 100644 +--- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi ++++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +@@ -775,7 +775,6 @@ pins-tx { + }; + pins-rts { + pinmux = ; +- output-enable; + }; + pins-cts { + pinmux = ; +@@ -794,7 +793,6 @@ pins-tx { + }; + pins-rts { + pinmux = ; +- output-enable; + }; + pins-cts { + pinmux = ; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-mediatek-mt8183-kukui-fix-the-value-of-dlg.patch b/queue-6.6/arm64-dts-mediatek-mt8183-kukui-fix-the-value-of-dlg.patch new file mode 100644 index 00000000000..02f28d8459d --- /dev/null +++ b/queue-6.6/arm64-dts-mediatek-mt8183-kukui-fix-the-value-of-dlg.patch @@ -0,0 +1,39 @@ +From af57f6cb032d72ac2bf1dc2b6178ab1c2f9bd648 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 13 Jun 2024 11:58:54 +0000 +Subject: arm64: dts: mediatek: mt8183-kukui: Fix the value of + `dlg,jack-det-rate` mismatch + +From: Hsin-Te Yuan + +[ Upstream commit 95173af725e6f41eb470466a52ddf2054439409c ] + +According to Documentation/devicetree/bindings/sound/dialog,da7219.yaml, +the value of `dlg,jack-det-rate` property should be "32_64" instead of +"32ms_64ms". + +Fixes: dc0ff0fa3a9b ("ASoC: da7219: Add Jack insertion detection polarity") +Signed-off-by: Hsin-Te Yuan +Link: https://lore.kernel.org/r/20240613-jack-rate-v2-1-ebc5f9f37931@chromium.org +Signed-off-by: AngeloGioacchino Del Regno +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-da7219.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-da7219.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-da7219.dtsi +index 2c69e7658dba6..b9a6fd4f86d4a 100644 +--- a/arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-da7219.dtsi ++++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-audio-da7219.dtsi +@@ -28,7 +28,7 @@ da7219_aad { + dlg,btn-cfg = <50>; + dlg,mic-det-thr = <500>; + dlg,jack-ins-deb = <20>; +- dlg,jack-det-rate = "32ms_64ms"; ++ dlg,jack-det-rate = "32_64"; + dlg,jack-rem-deb = <1>; + + dlg,a-d-btn-thr = <0xa>; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-mediatek-mt8183-kukui-jacuzzi-add-ports-no.patch b/queue-6.6/arm64-dts-mediatek-mt8183-kukui-jacuzzi-add-ports-no.patch new file mode 100644 index 00000000000..c159d422392 --- /dev/null +++ b/queue-6.6/arm64-dts-mediatek-mt8183-kukui-jacuzzi-add-ports-no.patch @@ -0,0 +1,69 @@ +From df24aca2e80884eca0004f2c66972f7b9d4675f0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 31 Jan 2024 16:39:29 +0800 +Subject: arm64: dts: mediatek: mt8183-kukui-jacuzzi: Add ports node for + anx7625 + +From: Chen-Yu Tsai + +[ Upstream commit 4055416e6c51347e7dd5784065263fe0ced0bb7d ] + +The anx7625 binding requires a "ports" node as a container for the +"port" nodes. The jacuzzi dtsi file is missing it. + +Add a "ports" node under the anx7625 node, and move the port related +nodes and properties under it. + +Fixes: cabc71b08eb5 ("arm64: dts: mt8183: Add kukui-jacuzzi-damu board") +Signed-off-by: Chen-Yu Tsai +Reviewed-by: AngeloGioacchino Del Regno +Link: https://lore.kernel.org/r/20240131083931.3970388-1-wenst@chromium.org +Signed-off-by: AngeloGioacchino Del Regno +Signed-off-by: Sasha Levin +--- + .../dts/mediatek/mt8183-kukui-jacuzzi.dtsi | 25 +++++++++++-------- + 1 file changed, 14 insertions(+), 11 deletions(-) + +diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi +index 820260348de9b..32f6899f885ef 100644 +--- a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi ++++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi +@@ -156,21 +156,24 @@ anx_bridge: anx7625@58 { + vdd18-supply = <&pp1800_mipibrdg>; + vdd33-supply = <&vddio_mipibrdg>; + +- #address-cells = <1>; +- #size-cells = <0>; +- port@0 { +- reg = <0>; ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; + +- anx7625_in: endpoint { +- remote-endpoint = <&dsi_out>; ++ port@0 { ++ reg = <0>; ++ ++ anx7625_in: endpoint { ++ remote-endpoint = <&dsi_out>; ++ }; + }; +- }; + +- port@1 { +- reg = <1>; ++ port@1 { ++ reg = <1>; + +- anx7625_out: endpoint { +- remote-endpoint = <&panel_in>; ++ anx7625_out: endpoint { ++ remote-endpoint = <&panel_in>; ++ }; + }; + }; + +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-mediatek-mt8192-asurada-add-off-on-delay-u.patch b/queue-6.6/arm64-dts-mediatek-mt8192-asurada-add-off-on-delay-u.patch new file mode 100644 index 00000000000..f649f26addd --- /dev/null +++ b/queue-6.6/arm64-dts-mediatek-mt8192-asurada-add-off-on-delay-u.patch @@ -0,0 +1,54 @@ +From cc237b34c051770fe320717eff6cb25b4d24f59b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 2 May 2024 23:39:51 +0800 +Subject: arm64: dts: mediatek: mt8192-asurada: Add off-on-delay-us for + pp3300_mipibrdg + +From: Pin-yen Lin + +[ Upstream commit 897a7edba9330974726c564dfdbf4fb5e203b9ac ] + +Set off-on-delay-us to 500000 us for pp3300_mipibrdg to make sure it +complies with the panel's unprepare delay (the time to power down +completely) of the power sequence. Explicit configuration on the +regulator node is required because mt8192-asurada uses the same power +supply for the panel and the anx7625 DP bridge. + +For example, the power sequence could be violated in this sequence: +1. Bridge on: panel goes off, but regulator doesn't turn off (refcount=1). +2. Bridge off: regulator turns off (refcount=0). +3. Bridge resume -> regulator turns on but the bridge driver doesn't + check the delay. + +Or in this sequence: +1. Bridge on: panel goes off. The regulator doesn't turn off (refcount=1), + but the .unprepared_time in panel_edp is still updated. +2. Bridge off, regulator goes off (refcount=0). +3. Panel on, but the panel driver uses the wrong .unprepared_time to check + the unprepare delay. + +Fixes: f9f00b1f6b9b ("arm64: dts: mediatek: asurada: Add display regulators") +Signed-off-by: Pin-yen Lin +Reviewed-by: AngeloGioacchino Del Regno +Link: https://lore.kernel.org/r/20240502154455.3427793-1-treapking@chromium.org +Signed-off-by: AngeloGioacchino Del Regno +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +index dc39ebd1bbfc8..6b4b7a7cd35ef 100644 +--- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi ++++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +@@ -147,6 +147,7 @@ pp3300_mipibrdg: regulator-3v3-mipibrdg { + regulator-boot-on; + gpio = <&pio 127 GPIO_ACTIVE_HIGH>; + vin-supply = <&pp3300_g>; ++ off-on-delay-us = <500000>; + }; + + /* separately switched 3.3V power rail */ +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-mediatek-mt8195-fix-gpu-thermal-zone-name-.patch b/queue-6.6/arm64-dts-mediatek-mt8195-fix-gpu-thermal-zone-name-.patch new file mode 100644 index 00000000000..996a79e1c6f --- /dev/null +++ b/queue-6.6/arm64-dts-mediatek-mt8195-fix-gpu-thermal-zone-name-.patch @@ -0,0 +1,36 @@ +From bb61c0815d1c60b0c9d71fd075cc1500ca709496 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 10 Apr 2024 10:30:00 +0200 +Subject: arm64: dts: mediatek: mt8195: Fix GPU thermal zone name for SVS + +From: AngeloGioacchino Del Regno + +[ Upstream commit b2b6f2edb82a08abe8942535bc77da55a0f43e14 ] + +This SoC has two GPU related thermal zones: the primary zone must be +called "gpu-thermal" for SVS to pick it up. + +Fixes: 1e5b6725199f ("arm64: dts: mediatek: mt8195: Add AP domain thermal zones") +Link: https://lore.kernel.org/r/20240410083002.1357857-2-angelogioacchino.delregno@collabora.com +Signed-off-by: AngeloGioacchino Del Regno +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/mediatek/mt8195.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi +index 2bb9d9aa65fed..20e6d90cc4118 100644 +--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi ++++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi +@@ -3395,7 +3395,7 @@ vpu1_crit: trip-crit { + }; + }; + +- gpu0-thermal { ++ gpu-thermal { + polling-delay = <1000>; + polling-delay-passive = <250>; + thermal-sensors = <&lvts_ap MT8195_AP_GPU0>; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-qcom-msm8996-specify-ufs-core_clk-frequenc.patch b/queue-6.6/arm64-dts-qcom-msm8996-specify-ufs-core_clk-frequenc.patch new file mode 100644 index 00000000000..7299a76e476 --- /dev/null +++ b/queue-6.6/arm64-dts-qcom-msm8996-specify-ufs-core_clk-frequenc.patch @@ -0,0 +1,42 @@ +From 9e2eabe1881cc8ee131e283c46dcbcb2e1e1feb4 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 8 Apr 2024 03:04:31 +0300 +Subject: arm64: dts: qcom: msm8996: specify UFS core_clk frequencies + +From: Dmitry Baryshkov + +[ Upstream commit 02f838b7f8cdfb7a96b7f08e7f6716f230bdecba ] + +Follow the example of other platforms and specify core_clk frequencies +in the frequency table in addition to the core_clk_src frequencies. The +driver should be setting the leaf frequency instead of some interim +clock freq. + +Suggested-by: Nitin Rawat +Fixes: 57fc67ef0d35 ("arm64: dts: qcom: msm8996: Add ufs related nodes") +Reviewed-by: Konrad Dybcio +Reviewed-by: Manivannan Sadhasivam +Signed-off-by: Dmitry Baryshkov +Link: https://lore.kernel.org/r/20240408-msm8996-fix-ufs-v4-1-ee1a28bf8579@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi +index dd407aa3abfb9..1f7cbb35886db 100644 +--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi ++++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi +@@ -2090,7 +2090,7 @@ ufshc: ufshc@624000 { + <&gcc GCC_UFS_RX_SYMBOL_0_CLK>; + freq-table-hz = + <100000000 200000000>, +- <0 0>, ++ <100000000 200000000>, + <0 0>, + <0 0>, + <0 0>, +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-qcom-msm8996-xiaomi-common-drop-excton-fro.patch b/queue-6.6/arm64-dts-qcom-msm8996-xiaomi-common-drop-excton-fro.patch new file mode 100644 index 00000000000..9dfbae248b5 --- /dev/null +++ b/queue-6.6/arm64-dts-qcom-msm8996-xiaomi-common-drop-excton-fro.patch @@ -0,0 +1,38 @@ +From aaf116e76398905362824961beba12969acffd8e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 1 May 2024 19:19:39 +0300 +Subject: arm64: dts: qcom: msm8996-xiaomi-common: drop excton from the USB PHY + +From: Dmitry Baryshkov + +[ Upstream commit c1aefeae8cb7b71c1bb6d33b1bda7fc322094e16 ] + +The USB PHYs don't use extcon connectors, drop the extcon property from +the hsusb_phy1 node. + +Fixes: 46680fe9ba61 ("arm64: dts: qcom: msm8996: Add support for the Xiaomi MSM8996 platform") +Cc: Yassine Oudjana +Signed-off-by: Dmitry Baryshkov +Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-13-f1fd15c33fb3@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi +index 06f8ff624181f..d5b35ff0175cd 100644 +--- a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi ++++ b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi +@@ -405,7 +405,6 @@ &usb3_dwc3 { + + &hsusb_phy1 { + status = "okay"; +- extcon = <&typec>; + + vdda-pll-supply = <&vreg_l12a_1p8>; + vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-qcom-msm8998-enable-adreno_smmu-by-default.patch b/queue-6.6/arm64-dts-qcom-msm8998-enable-adreno_smmu-by-default.patch new file mode 100644 index 00000000000..60e240e6704 --- /dev/null +++ b/queue-6.6/arm64-dts-qcom-msm8998-enable-adreno_smmu-by-default.patch @@ -0,0 +1,48 @@ +From 2f7946c95f5ac5e9831e3cdc4166658cf302703d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 15 May 2024 16:27:44 +0200 +Subject: arm64: dts: qcom: msm8998: enable adreno_smmu by default + +From: Marc Gonzalez + +[ Upstream commit 98a0c4f2278b4d6c1c7722735c20b2247de6293f ] + +15 qcom platform DTSI files define an adreno_smmu node. +msm8998 is the only one with adreno_smmu disabled by default. + +There's no reason why this SMMU should be disabled by default, +it doesn't need any further configuration. + +Bring msm8998 in line with the 14 other platforms. + +This fixes GPU init failing with ENODEV: +msm_dpu c901000.display-controller: failed to load adreno gpu +msm_dpu c901000.display-controller: failed to bind 5000000.gpu (ops a3xx_ops): -19 + +Fixes: 87cd46d68aeac8 ("Configure Adreno GPU and related IOMMU") +Signed-off-by: Marc Gonzalez +Reviewed-by: Bryan O'Donoghue +Reviewed-by: Marijn Suijten +Reviewed-by: Jeffrey Hugo +Link: https://lore.kernel.org/r/be51d1a4-e8fc-48d1-9afb-a42b1d6ca478@freebox.fr +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/msm8998.dtsi | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi +index f91c58c844afd..9c072ce197358 100644 +--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi ++++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi +@@ -1588,7 +1588,6 @@ adreno_smmu: iommu@5040000 { + * SoC VDDMX RPM Power Domain in the Adreno driver. + */ + power-domains = <&gpucc GPU_GX_GDSC>; +- status = "disabled"; + }; + + gpucc: clock-controller@5065000 { +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-qcom-qdu1000-add-secure-qfprom-node.patch b/queue-6.6/arm64-dts-qcom-qdu1000-add-secure-qfprom-node.patch new file mode 100644 index 00000000000..2b27614de41 --- /dev/null +++ b/queue-6.6/arm64-dts-qcom-qdu1000-add-secure-qfprom-node.patch @@ -0,0 +1,54 @@ +From 6f78b728184f166f501b20568c2ae111c5256455 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 18 Jun 2024 14:57:11 +0530 +Subject: arm64: dts: qcom: qdu1000: Add secure qfprom node + +From: Komal Bajaj + +[ Upstream commit 367fb3f0aaa6eac9101dc683dd27c268b4cc702e ] + +Add secure qfprom node and also add properties for multi channel +DDR. This is required for LLCC driver to pick the correct LLCC +configuration. + +Fixes: 6209038f131f ("arm64: dts: qcom: qdu1000: Add LLCC/system-cache-controller") +Signed-off-by: Komal Bajaj +Reviewed-by: Dmitry Baryshkov +Reviewed-by: Konrad Dybcio +Reviewed-by: Mukesh Ojha +Link: https://lore.kernel.org/r/20240618092711.15037-1-quic_kbajaj@quicinc.com +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/qdu1000.dtsi | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi +index 1ef87604549fa..dbdc06be6260b 100644 +--- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi ++++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi +@@ -1452,6 +1452,21 @@ system-cache-controller@19200000 { + "llcc_broadcast_base", + "multi_channel_register"; + interrupts = ; ++ ++ nvmem-cells = <&multi_chan_ddr>; ++ nvmem-cell-names = "multi-chan-ddr"; ++ }; ++ ++ sec_qfprom: efuse@221c8000 { ++ compatible = "qcom,qdu1000-sec-qfprom", "qcom,sec-qfprom"; ++ reg = <0 0x221c8000 0 0x1000>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ multi_chan_ddr: multi-chan-ddr@12b { ++ reg = <0x12b 0x1>; ++ bits = <0 2>; ++ }; + }; + }; + +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-qcom-qdu1000-idp-drop-unused-llcc-multi-ch.patch b/queue-6.6/arm64-dts-qcom-qdu1000-idp-drop-unused-llcc-multi-ch.patch new file mode 100644 index 00000000000..5d8f5242cfa --- /dev/null +++ b/queue-6.6/arm64-dts-qcom-qdu1000-idp-drop-unused-llcc-multi-ch.patch @@ -0,0 +1,39 @@ +From a270d79917a76a1790c798bc76b7475828f8935b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 7 Nov 2023 09:04:17 +0100 +Subject: arm64: dts: qcom: qdu1000-idp: drop unused LLCC multi-ch-bit-off + +From: Krzysztof Kozlowski + +[ Upstream commit 468cf125e4796e8ef9815e2d8d018f44cf8f1225 ] + +There is no "multi-ch-bit-off" property in LLCC, according to bindings +and Linux driver: + + qdu1000-idp.dtb: system-cache-controller@19200000: 'multi-ch-bit-off' does not match any of the regexes: 'pinctrl-[0-9]+' + +Signed-off-by: Krzysztof Kozlowski +Acked-by: Mukesh Ojha +Link: https://lore.kernel.org/r/20231107080417.16700-2-krzysztof.kozlowski@linaro.org +Signed-off-by: Bjorn Andersson +Stable-dep-of: 367fb3f0aaa6 ("arm64: dts: qcom: qdu1000: Add secure qfprom node") +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/qdu1000.dtsi | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi +index 1c0e5d271e91b..1ef87604549fa 100644 +--- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi ++++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi +@@ -1452,7 +1452,6 @@ system-cache-controller@19200000 { + "llcc_broadcast_base", + "multi_channel_register"; + interrupts = ; +- multi-ch-bit-off = <24 2>; + }; + }; + +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-qcom-qrb4210-rb2-make-l9a-always-on.patch b/queue-6.6/arm64-dts-qcom-qrb4210-rb2-make-l9a-always-on.patch new file mode 100644 index 00000000000..a84869d0a91 --- /dev/null +++ b/queue-6.6/arm64-dts-qcom-qrb4210-rb2-make-l9a-always-on.patch @@ -0,0 +1,41 @@ +From 572915892d00cbc84570da1398136bdd18545843 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 5 Jun 2024 12:00:49 +0300 +Subject: arm64: dts: qcom: qrb4210-rb2: make L9A always-on + +From: Dmitry Baryshkov + +[ Upstream commit d6c6b85bf5582bbe2efefa9a083178b5f7eef439 ] + +The L9A regulator is used to further control voltage regulators on the +board. It can be used to disable VBAT_mains, 1.8V, 3.3V, 5V rails). Make +sure that is stays always on to prevent undervolting of these volage +rails. + +Fixes: 8d58a8c0d930 ("arm64: dts: qcom: Add base qrb4210-rb2 board dts") +Reviewed-by: Bryan O'Donoghue +Signed-off-by: Dmitry Baryshkov +Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20240605-rb2-l9a-aon-v2-1-0d493d0d107c@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +index c8e80bb405e71..5def8c1154ceb 100644 +--- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts ++++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +@@ -364,6 +364,8 @@ vreg_l8a_0p664: l8 { + vreg_l9a_1p8: l9 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <2000000>; ++ regulator-always-on; ++ regulator-boot-on; + }; + + vreg_l10a_1p8: l10 { +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-qcom-sa8775p-mark-ethernet-devices-as-dma-.patch b/queue-6.6/arm64-dts-qcom-sa8775p-mark-ethernet-devices-as-dma-.patch new file mode 100644 index 00000000000..b2310f1cb80 --- /dev/null +++ b/queue-6.6/arm64-dts-qcom-sa8775p-mark-ethernet-devices-as-dma-.patch @@ -0,0 +1,44 @@ +From 5cacbae9068a50a919ea6e32862e0116f60b2797 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 14 May 2024 17:06:51 -0700 +Subject: arm64: dts: qcom: sa8775p: mark ethernet devices as DMA-coherent + +From: Sagar Cheluvegowda + +[ Upstream commit 49cc31f8ab44e60d8109da7e18c0983a917d4d74 ] + +Ethernet devices are cache coherent, mark it as such in the dtsi. + +Fixes: ff499a0fbb23 ("arm64: dts: qcom: sa8775p: add the first 1Gb ethernet interface") +Fixes: e952348a7cc7 ("arm64: dts: qcom: sa8775p: add a node for EMAC1") +Signed-off-by: Sagar Cheluvegowda +Link: https://lore.kernel.org/r/20240514-mark_ethernet_devices_dma_coherent-v4-1-04e1198858c5@quicinc.com +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/sa8775p.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi +index 88ef3b5d374b3..44bea063aedba 100644 +--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi ++++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi +@@ -2350,6 +2350,7 @@ ethernet1: ethernet@23000000 { + phy-names = "serdes"; + + iommus = <&apps_smmu 0x140 0xf>; ++ dma-coherent; + + snps,tso; + snps,pbl = <32>; +@@ -2383,6 +2384,7 @@ ethernet0: ethernet@23040000 { + phy-names = "serdes"; + + iommus = <&apps_smmu 0x120 0xf>; ++ dma-coherent; + + snps,tso; + snps,pbl = <32>; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-qcom-sc8180x-add-power-domain-to-ufs-phy.patch b/queue-6.6/arm64-dts-qcom-sc8180x-add-power-domain-to-ufs-phy.patch new file mode 100644 index 00000000000..2d461f3b609 --- /dev/null +++ b/queue-6.6/arm64-dts-qcom-sc8180x-add-power-domain-to-ufs-phy.patch @@ -0,0 +1,38 @@ +From 530def7bdb028e89861379e611c7ead4020dbb34 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 1 May 2024 19:19:31 +0300 +Subject: arm64: dts: qcom: sc8180x: add power-domain to UFS PHY + +From: Dmitry Baryshkov + +[ Upstream commit 9a80ecce60bd4919019a3cdb64604c9b183a8518 ] + +The UFS PHY is powered on via the UFS_PHY_GDSC power domain. Add +corresponding power-domain the the PHY node. + +Fixes: 8575f197b077 ("arm64: dts: qcom: Introduce the SC8180x platform") +Signed-off-by: Dmitry Baryshkov +Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-5-f1fd15c33fb3@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/sc8180x.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi +index d310d4c4d0953..92b85de7706d3 100644 +--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi ++++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi +@@ -2142,6 +2142,8 @@ ufs_mem_phy: phy-wrapper@1d87000 { + resets = <&ufs_mem_hc 0>; + reset-names = "ufsphy"; + ++ power-domains = <&gcc UFS_PHY_GDSC>; ++ + #phy-cells = <0>; + + status = "disabled"; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-qcom-sc8180x-correct-pcie-slave-ports.patch b/queue-6.6/arm64-dts-qcom-sc8180x-correct-pcie-slave-ports.patch new file mode 100644 index 00000000000..ecaa63aff10 --- /dev/null +++ b/queue-6.6/arm64-dts-qcom-sc8180x-correct-pcie-slave-ports.patch @@ -0,0 +1,59 @@ +From 89059db4e07cd510541cb67b12fe0c02a9ca53d4 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 25 May 2024 10:56:20 -0700 +Subject: arm64: dts: qcom: sc8180x: Correct PCIe slave ports + +From: Bjorn Andersson + +[ Upstream commit dc402e084a9e0cc714ffd6008dce3c63281b8142 ] + +The interconnects property was clearly copy-pasted between the 4 PCIe +controllers, giving all four the cpu-pcie path destination of SLAVE_0. + +The four ports are all associated with CN0, but update the property for +correctness sake. + +Fixes: d20b6c84f56a ("arm64: dts: qcom: sc8180x: Add PCIe instances") +Signed-off-by: Bjorn Andersson +Reviewed-by: Dmitry Baryshkov +Link: https://lore.kernel.org/r/20240525-sc8180x-pcie-interconnect-port-fix-v1-1-f86affa02392@quicinc.com +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/sc8180x.dtsi | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi +index dd207eb81360a..9163c1419cc12 100644 +--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi ++++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi +@@ -1853,7 +1853,7 @@ pcie3: pci@1c08000 { + power-domains = <&gcc PCIE_3_GDSC>; + + interconnects = <&aggre2_noc MASTER_PCIE_3 0 &mc_virt SLAVE_EBI_CH0 0>, +- <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_PCIE_0 0>; ++ <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_PCIE_3 0>; + interconnect-names = "pcie-mem", "cpu-pcie"; + + phys = <&pcie3_phy>; +@@ -1952,7 +1952,7 @@ pcie1: pci@1c10000 { + power-domains = <&gcc PCIE_1_GDSC>; + + interconnects = <&aggre2_noc MASTER_PCIE_1 0 &mc_virt SLAVE_EBI_CH0 0>, +- <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_PCIE_0 0>; ++ <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_PCIE_1 0>; + interconnect-names = "pcie-mem", "cpu-pcie"; + + phys = <&pcie1_phy>; +@@ -2051,7 +2051,7 @@ pcie2: pci@1c18000 { + power-domains = <&gcc PCIE_2_GDSC>; + + interconnects = <&aggre2_noc MASTER_PCIE_2 0 &mc_virt SLAVE_EBI_CH0 0>, +- <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_PCIE_0 0>; ++ <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_PCIE_2 0>; + interconnect-names = "pcie-mem", "cpu-pcie"; + + phys = <&pcie2_phy>; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-qcom-sc8180x-switch-ufs-qmp-phy-to-new-sty.patch b/queue-6.6/arm64-dts-qcom-sc8180x-switch-ufs-qmp-phy-to-new-sty.patch new file mode 100644 index 00000000000..233c4f87067 --- /dev/null +++ b/queue-6.6/arm64-dts-qcom-sc8180x-switch-ufs-qmp-phy-to-new-sty.patch @@ -0,0 +1,72 @@ +From 39e85a13185be66ee42330fa3990b8890fb24d12 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 31 Jul 2023 14:11:58 +0300 +Subject: arm64: dts: qcom: sc8180x: switch UFS QMP PHY to new style of + bindings + +From: Dmitry Baryshkov + +[ Upstream commit 916b5916f228a9f83a22ad91ad8c5bf788a456d7 ] + +Change the UFS QMP PHY to use newer style of QMP PHY bindings (single +resource region, no per-PHY subnodes). + +Signed-off-by: Dmitry Baryshkov +Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20230731111158.3998107-1-dmitry.baryshkov@linaro.org +Signed-off-by: Bjorn Andersson +Stable-dep-of: 9a80ecce60bd ("arm64: dts: qcom: sc8180x: add power-domain to UFS PHY") +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/sc8180x.dtsi | 20 ++++++-------------- + 1 file changed, 6 insertions(+), 14 deletions(-) + +diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi +index 9163c1419cc12..d310d4c4d0953 100644 +--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi ++++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi +@@ -2093,7 +2093,7 @@ ufs_mem_hc: ufshc@1d84000 { + "jedec,ufs-2.0"; + reg = <0 0x01d84000 0 0x2500>; + interrupts = ; +- phys = <&ufs_mem_phy_lanes>; ++ phys = <&ufs_mem_phy>; + phy-names = "ufsphy"; + lanes-per-direction = <2>; + #reset-cells = <1>; +@@ -2132,10 +2132,8 @@ ufs_mem_hc: ufshc@1d84000 { + + ufs_mem_phy: phy-wrapper@1d87000 { + compatible = "qcom,sc8180x-qmp-ufs-phy"; +- reg = <0 0x01d87000 0 0x1c0>; +- #address-cells = <2>; +- #size-cells = <2>; +- ranges; ++ reg = <0 0x01d87000 0 0x1000>; ++ + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + clock-names = "ref", +@@ -2143,16 +2141,10 @@ ufs_mem_phy: phy-wrapper@1d87000 { + + resets = <&ufs_mem_hc 0>; + reset-names = "ufsphy"; +- status = "disabled"; + +- ufs_mem_phy_lanes: phy@1d87400 { +- reg = <0 0x01d87400 0 0x108>, +- <0 0x01d87600 0 0x1e0>, +- <0 0x01d87c00 0 0x1dc>, +- <0 0x01d87800 0 0x108>, +- <0 0x01d87a00 0 0x1e0>; +- #phy-cells = <0>; +- }; ++ #phy-cells = <0>; ++ ++ status = "disabled"; + }; + + ipa_virt: interconnect@1e00000 { +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-qcom-sdm845-add-power-domain-to-ufs-phy.patch b/queue-6.6/arm64-dts-qcom-sdm845-add-power-domain-to-ufs-phy.patch new file mode 100644 index 00000000000..5a34feca00a --- /dev/null +++ b/queue-6.6/arm64-dts-qcom-sdm845-add-power-domain-to-ufs-phy.patch @@ -0,0 +1,38 @@ +From c0494df3c603546e9083a773a47be98360c7f9e4 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 1 May 2024 19:19:32 +0300 +Subject: arm64: dts: qcom: sdm845: add power-domain to UFS PHY + +From: Dmitry Baryshkov + +[ Upstream commit fd39ae8b9bc10419b1e4b849cdbc6755a967ade1 ] + +The UFS PHY is powered on via the UFS_PHY_GDSC power domain. Add +corresponding power-domain the the PHY node. + +Fixes: cc16687fbd74 ("arm64: dts: qcom: sdm845: add UFS controller") +Signed-off-by: Dmitry Baryshkov +Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-6-f1fd15c33fb3@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi +index 5bf0d5af452af..9d9b378c07e14 100644 +--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi ++++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi +@@ -2634,6 +2634,8 @@ ufs_mem_phy: phy@1d87000 { + clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + ++ power-domains = <&gcc UFS_PHY_GDSC>; ++ + resets = <&ufs_mem_hc 0>; + reset-names = "ufsphy"; + status = "disabled"; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-qcom-sdm850-lenovo-yoga-c630-fix-ipa-firmw.patch b/queue-6.6/arm64-dts-qcom-sdm850-lenovo-yoga-c630-fix-ipa-firmw.patch new file mode 100644 index 00000000000..93a5f7985db --- /dev/null +++ b/queue-6.6/arm64-dts-qcom-sdm850-lenovo-yoga-c630-fix-ipa-firmw.patch @@ -0,0 +1,37 @@ +From 56a4eacc73d60a014a67d59779aa6864bced8dcb Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 27 May 2024 07:00:22 +0300 +Subject: arm64: dts: qcom: sdm850-lenovo-yoga-c630: fix IPA firmware path + +From: Dmitry Baryshkov + +[ Upstream commit cae4c862d8b2d7debb07e6d831e079520163ac4f ] + +Specify firmware path for the IPA network controller on the Lenovo Yoga +C630 laptop. Without this property IPA tries to load firmware from the +default location, which likely will fail. + +Fixes: 2e01e0c21459 ("arm64: dts: qcom: sdm850-yoga: Enable IPA") +Signed-off-by: Dmitry Baryshkov +Link: https://lore.kernel.org/r/20240527-yoga-ipa-fw-v1-1-99ac1f5db283@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts +index 92a812b5f4238..fe5c12da666e4 100644 +--- a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts ++++ b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts +@@ -488,6 +488,7 @@ ecsh: hid@5c { + &ipa { + qcom,gsi-loader = "self"; + memory-region = <&ipa_fw_mem>; ++ firmware-name = "qcom/sdm850/LENOVO/81JL/ipa_fws.elf"; + status = "okay"; + }; + +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-qcom-sm6115-add-power-domain-to-ufs-phy.patch b/queue-6.6/arm64-dts-qcom-sm6115-add-power-domain-to-ufs-phy.patch new file mode 100644 index 00000000000..c7fe52e0a06 --- /dev/null +++ b/queue-6.6/arm64-dts-qcom-sm6115-add-power-domain-to-ufs-phy.patch @@ -0,0 +1,38 @@ +From ed93e578229a12d1c605e7132dce2b26b6b718cc Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 1 May 2024 19:19:33 +0300 +Subject: arm64: dts: qcom: sm6115: add power-domain to UFS PHY + +From: Dmitry Baryshkov + +[ Upstream commit a9eb454873a813ddc4578e5c3b37778de6fda472 ] + +The UFS PHY is powered on via the UFS_PHY_GDSC power domain. Add +corresponding power-domain the the PHY node. + +Fixes: 97e563bf5ba1 ("arm64: dts: qcom: sm6115: Add basic soc dtsi") +Signed-off-by: Dmitry Baryshkov +Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-7-f1fd15c33fb3@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/sm6115.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi +index 87cbc4e8b1ed5..821db9b851855 100644 +--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi +@@ -1043,6 +1043,8 @@ ufs_mem_phy: phy@4807000 { + clocks = <&gcc GCC_UFS_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + clock-names = "ref", "ref_aux"; + ++ power-domains = <&gcc GCC_UFS_PHY_GDSC>; ++ + resets = <&ufs_mem_hc 0>; + reset-names = "ufsphy"; + status = "disabled"; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-qcom-sm6350-add-missing-qcom-non-secure-do.patch b/queue-6.6/arm64-dts-qcom-sm6350-add-missing-qcom-non-secure-do.patch new file mode 100644 index 00000000000..bfaf9c5294d --- /dev/null +++ b/queue-6.6/arm64-dts-qcom-sm6350-add-missing-qcom-non-secure-do.patch @@ -0,0 +1,46 @@ +From 3b4febf4a00fb514c57afe0e18b9c0ff81fd1be7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 5 Jul 2024 09:43:11 +0200 +Subject: arm64: dts: qcom: sm6350: Add missing qcom,non-secure-domain property + +From: Luca Weiss + +[ Upstream commit 81008068ee4f2c4c26e97a0404405bb4b450241b ] + +By default the DSP domains are secure, add the missing +qcom,non-secure-domain property to mark them as non-secure. + +Fixes: efc33c969f23 ("arm64: dts: qcom: sm6350: Add ADSP nodes") +Fixes: 8eb5287e8a42 ("arm64: dts: qcom: sm6350: Add CDSP nodes") +Reviewed-by: Dmitry Baryshkov +Signed-off-by: Luca Weiss +Link: https://lore.kernel.org/r/20240705-sm6350-fastrpc-fix-v2-1-89a43166c9bb@fairphone.com +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi +index 7477bfbd20796..2efceb49a3218 100644 +--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi +@@ -1299,6 +1299,7 @@ fastrpc { + compatible = "qcom,fastrpc"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + label = "adsp"; ++ qcom,non-secure-domain; + #address-cells = <1>; + #size-cells = <0>; + +@@ -1559,6 +1560,7 @@ fastrpc { + compatible = "qcom,fastrpc"; + qcom,glink-channels = "fastrpcglink-apps-dsp"; + label = "cdsp"; ++ qcom,non-secure-domain; + #address-cells = <1>; + #size-cells = <0>; + +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-qcom-sm6350-add-power-domain-to-ufs-phy.patch b/queue-6.6/arm64-dts-qcom-sm6350-add-power-domain-to-ufs-phy.patch new file mode 100644 index 00000000000..ff698ac0ec0 --- /dev/null +++ b/queue-6.6/arm64-dts-qcom-sm6350-add-power-domain-to-ufs-phy.patch @@ -0,0 +1,38 @@ +From 194fe31dde34c28c83d9f44347b8ce816d0aef25 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 1 May 2024 19:19:34 +0300 +Subject: arm64: dts: qcom: sm6350: add power-domain to UFS PHY + +From: Dmitry Baryshkov + +[ Upstream commit 18c2727282c5264ff5502daac26c43000e8eb202 ] + +The UFS PHY is powered on via the UFS_PHY_GDSC power domain. Add +corresponding power-domain the the PHY node. + +Fixes: 5a814af5fc22 ("arm64: dts: qcom: sm6350: Add UFS nodes") +Signed-off-by: Dmitry Baryshkov +Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-8-f1fd15c33fb3@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi +index 71ccda7389ee1..7477bfbd20796 100644 +--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi +@@ -1197,6 +1197,8 @@ ufs_mem_phy: phy@1d87000 { + clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + ++ power-domains = <&gcc UFS_PHY_GDSC>; ++ + resets = <&ufs_mem_hc 0>; + reset-names = "ufsphy"; + +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-qcom-sm8250-add-power-domain-to-ufs-phy.patch b/queue-6.6/arm64-dts-qcom-sm8250-add-power-domain-to-ufs-phy.patch new file mode 100644 index 00000000000..901d5f53f54 --- /dev/null +++ b/queue-6.6/arm64-dts-qcom-sm8250-add-power-domain-to-ufs-phy.patch @@ -0,0 +1,38 @@ +From 51aa0b147f137a002391bc578039ada3cdb9c7a1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 1 May 2024 19:19:35 +0300 +Subject: arm64: dts: qcom: sm8250: add power-domain to UFS PHY + +From: Dmitry Baryshkov + +[ Upstream commit 154ed5ea328d8a97a4ef5d1447e6f06d11fe2bbe ] + +The UFS PHY is powered on via the UFS_PHY_GDSC power domain. Add +corresponding power-domain the the PHY node. + +Fixes: b7e2fba06622 ("arm64: dts: qcom: sm8250: Add UFS controller and PHY") +Signed-off-by: Dmitry Baryshkov +Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-9-f1fd15c33fb3@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi +index a67a12b466f34..b522d19f3a132 100644 +--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi +@@ -2227,6 +2227,8 @@ ufs_mem_phy: phy@1d87000 { + resets = <&ufs_mem_hc 0>; + reset-names = "ufsphy"; + ++ power-domains = <&gcc UFS_PHY_GDSC>; ++ + #phy-cells = <0>; + + status = "disabled"; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-qcom-sm8250-switch-ufs-qmp-phy-to-new-styl.patch b/queue-6.6/arm64-dts-qcom-sm8250-switch-ufs-qmp-phy-to-new-styl.patch new file mode 100644 index 00000000000..14012f83ca4 --- /dev/null +++ b/queue-6.6/arm64-dts-qcom-sm8250-switch-ufs-qmp-phy-to-new-styl.patch @@ -0,0 +1,71 @@ +From 756555ecab302b3fcfb69ef4ce091757540d3ce1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 5 Dec 2023 06:25:50 +0300 +Subject: arm64: dts: qcom: sm8250: switch UFS QMP PHY to new style of bindings + +From: Dmitry Baryshkov + +[ Upstream commit ba865bdcc688932980b8e5ec2154eaa33cd4a981 ] + +Change the UFS QMP PHY to use newer style of QMP PHY bindings (single +resource region, no per-PHY subnodes). + +Reviewed-by: Konrad Dybcio +Signed-off-by: Dmitry Baryshkov +Link: https://lore.kernel.org/r/20231205032552.1583336-8-dmitry.baryshkov@linaro.org +Signed-off-by: Bjorn Andersson +Stable-dep-of: 154ed5ea328d ("arm64: dts: qcom: sm8250: add power-domain to UFS PHY") +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/sm8250.dtsi | 20 ++++++-------------- + 1 file changed, 6 insertions(+), 14 deletions(-) + +diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi +index 64a656dcfa1f5..a67a12b466f34 100644 +--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi +@@ -2169,7 +2169,7 @@ ufs_mem_hc: ufshc@1d84000 { + "jedec,ufs-2.0"; + reg = <0 0x01d84000 0 0x3000>; + interrupts = ; +- phys = <&ufs_mem_phy_lanes>; ++ phys = <&ufs_mem_phy>; + phy-names = "ufsphy"; + lanes-per-direction = <2>; + #reset-cells = <1>; +@@ -2217,10 +2217,8 @@ ufs_mem_hc: ufshc@1d84000 { + + ufs_mem_phy: phy@1d87000 { + compatible = "qcom,sm8250-qmp-ufs-phy"; +- reg = <0 0x01d87000 0 0x1c0>; +- #address-cells = <2>; +- #size-cells = <2>; +- ranges; ++ reg = <0 0x01d87000 0 0x1000>; ++ + clock-names = "ref", + "ref_aux"; + clocks = <&rpmhcc RPMH_CXO_CLK>, +@@ -2228,16 +2226,10 @@ ufs_mem_phy: phy@1d87000 { + + resets = <&ufs_mem_hc 0>; + reset-names = "ufsphy"; +- status = "disabled"; + +- ufs_mem_phy_lanes: phy@1d87400 { +- reg = <0 0x01d87400 0 0x16c>, +- <0 0x01d87600 0 0x200>, +- <0 0x01d87c00 0 0x200>, +- <0 0x01d87800 0 0x16c>, +- <0 0x01d87a00 0 0x200>; +- #phy-cells = <0>; +- }; ++ #phy-cells = <0>; ++ ++ status = "disabled"; + }; + + cryptobam: dma-controller@1dc4000 { +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-qcom-sm8350-add-power-domain-to-ufs-phy.patch b/queue-6.6/arm64-dts-qcom-sm8350-add-power-domain-to-ufs-phy.patch new file mode 100644 index 00000000000..581ab47b27b --- /dev/null +++ b/queue-6.6/arm64-dts-qcom-sm8350-add-power-domain-to-ufs-phy.patch @@ -0,0 +1,38 @@ +From 1a3d20261d621a41a420c8d32839228ed51e78cf Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 1 May 2024 19:19:36 +0300 +Subject: arm64: dts: qcom: sm8350: add power-domain to UFS PHY + +From: Dmitry Baryshkov + +[ Upstream commit 634acc8cea1584b507801315831a330443f819b4 ] + +The UFS PHY is powered on via the UFS_PHY_GDSC power domain. Add +corresponding power-domain the the PHY node. + +Fixes: 59c7cf814783 ("arm64: dts: qcom: sm8350: Add UFS nodes") +Signed-off-by: Dmitry Baryshkov +Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-10-f1fd15c33fb3@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi +index 5ed464c37422d..d4f1b36c7aebe 100644 +--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi +@@ -1731,6 +1731,8 @@ ufs_mem_phy: phy@1d87000 { + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + ++ power-domains = <&gcc UFS_PHY_GDSC>; ++ + resets = <&ufs_mem_hc 0>; + reset-names = "ufsphy"; + status = "disabled"; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-qcom-sm8450-add-power-domain-to-ufs-phy.patch b/queue-6.6/arm64-dts-qcom-sm8450-add-power-domain-to-ufs-phy.patch new file mode 100644 index 00000000000..db15dbd8a76 --- /dev/null +++ b/queue-6.6/arm64-dts-qcom-sm8450-add-power-domain-to-ufs-phy.patch @@ -0,0 +1,38 @@ +From e11b8b8045b24625ff0b0dc8813df5efb8a1d2fd Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 1 May 2024 19:19:37 +0300 +Subject: arm64: dts: qcom: sm8450: add power-domain to UFS PHY + +From: Dmitry Baryshkov + +[ Upstream commit 27d3f57cf5a71484ea38770d4bfd10f6ef035cf4 ] + +The UFS PHY is powered on via the UFS_PHY_GDSC power domain. Add +corresponding power-domain the the PHY node. + +Fixes: 07fa917a335e ("arm64: dts: qcom: sm8450: add ufs nodes") +Signed-off-by: Dmitry Baryshkov +Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20240501-qcom-phy-fixes-v1-11-f1fd15c33fb3@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/qcom/sm8450.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi +index 0229bd706a2e9..a34f460240a07 100644 +--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi +@@ -4200,6 +4200,8 @@ ufs_mem_phy: phy@1d87000 { + <&gcc GCC_UFS_PHY_PHY_AUX_CLK>, + <&gcc GCC_UFS_0_CLKREF_EN>; + ++ power-domains = <&gcc UFS_PHY_GDSC>; ++ + resets = <&ufs_mem_hc 0>; + reset-names = "ufsphy"; + status = "disabled"; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-renesas-r8a779a0-add-missing-hypervisor-vi.patch b/queue-6.6/arm64-dts-renesas-r8a779a0-add-missing-hypervisor-vi.patch new file mode 100644 index 00000000000..5ee3da35bfc --- /dev/null +++ b/queue-6.6/arm64-dts-renesas-r8a779a0-add-missing-hypervisor-vi.patch @@ -0,0 +1,40 @@ +From 0b3b9014187cbcb9597e7090f91232294fc30b23 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 Jun 2024 15:57:31 +0200 +Subject: arm64: dts: renesas: r8a779a0: Add missing hypervisor virtual timer + IRQ + +From: Geert Uytterhoeven + +[ Upstream commit 6fca24a07e1de664c3d0b280043302e0387726df ] + +Add the missing fifth interrupt to the device node that represents the +ARM architected timer. While at it, add an interrupt-names property for +clarity, + +Fixes: 834c310f541839b6 ("arm64: dts: renesas: Add Renesas R8A779A0 SoC support") +Signed-off-by: Geert Uytterhoeven +Link: https://lore.kernel.org/671416fb31e3992101c32fe7e46147fe4cd623ae.1718890849.git.geert+renesas@glider.be +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi +index 504ac8c93faf5..84e0eb48a1b8a 100644 +--- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi ++++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi +@@ -2910,6 +2910,9 @@ timer { + interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, +- <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; ++ <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, ++ <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; ++ interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", ++ "hyp-virt"; + }; + }; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-renesas-r8a779f0-add-missing-hypervisor-vi.patch b/queue-6.6/arm64-dts-renesas-r8a779f0-add-missing-hypervisor-vi.patch new file mode 100644 index 00000000000..abfdc7be7bb --- /dev/null +++ b/queue-6.6/arm64-dts-renesas-r8a779f0-add-missing-hypervisor-vi.patch @@ -0,0 +1,41 @@ +From 1186365e35d31f6c77386165dbeb6cd11ceca78e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 Jun 2024 15:57:32 +0200 +Subject: arm64: dts: renesas: r8a779f0: Add missing hypervisor virtual timer + IRQ + +From: Geert Uytterhoeven + +[ Upstream commit b1c34567aebe300f9a0f70320eaeef0b3d56ffc7 ] + +Add the missing fifth interrupt to the device node that represents the +ARM architected timer. While at it, add an interrupt-names property for +clarity, + +Fixes: c62331e8222f8f21 ("arm64: dts: renesas: Add Renesas R8A779F0 SoC support") +Signed-off-by: Geert Uytterhoeven +Link: https://lore.kernel.org/46deba1008f73e4b6864f937642d17f9d4ae7205.1718890849.git.geert+renesas@glider.be +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/renesas/r8a779f0.dtsi | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi +index ecdd5a523fa34..555fff9364e35 100644 +--- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi ++++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi +@@ -1181,7 +1181,10 @@ timer { + interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, +- <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; ++ <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, ++ <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; ++ interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", ++ "hyp-virt"; + }; + + ufs30_clk: ufs30-clk { +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-renesas-r8a779g0-add-missing-hypervisor-vi.patch b/queue-6.6/arm64-dts-renesas-r8a779g0-add-missing-hypervisor-vi.patch new file mode 100644 index 00000000000..a42a03aa191 --- /dev/null +++ b/queue-6.6/arm64-dts-renesas-r8a779g0-add-missing-hypervisor-vi.patch @@ -0,0 +1,40 @@ +From 385f5b1f83e5fb0aea20cd69ed14cc79d2b810b9 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 Jun 2024 15:57:33 +0200 +Subject: arm64: dts: renesas: r8a779g0: Add missing hypervisor virtual timer + IRQ + +From: Geert Uytterhoeven + +[ Upstream commit 6775165fc95052a03acc91e25bc20fcf286910a7 ] + +Add the missing fifth interrupt to the device node that represents the +ARM architected timer. While at it, add an interrupt-names property for +clarity, + +Fixes: 987da486d84a5643 ("arm64: dts: renesas: Add Renesas R8A779G0 SoC support") +Signed-off-by: Geert Uytterhoeven +Link: https://lore.kernel.org/5eeabbeaea1c5fd518a608f2e8013d260b00fd7e.1718890849.git.geert+renesas@glider.be +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/renesas/r8a779g0.dtsi | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi +index d7677595204dc..87fbc53316906 100644 +--- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi ++++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi +@@ -2350,6 +2350,9 @@ timer { + interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, +- <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; ++ <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, ++ <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; ++ interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", ++ "hyp-virt"; + }; + }; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-renesas-r9a07g043u-add-missing-hypervisor-.patch b/queue-6.6/arm64-dts-renesas-r9a07g043u-add-missing-hypervisor-.patch new file mode 100644 index 00000000000..8a12d916dc7 --- /dev/null +++ b/queue-6.6/arm64-dts-renesas-r9a07g043u-add-missing-hypervisor-.patch @@ -0,0 +1,42 @@ +From 3d394c52a99c6ad574592630407709157624141d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 Jun 2024 15:57:34 +0200 +Subject: arm64: dts: renesas: r9a07g043u: Add missing hypervisor virtual timer + IRQ + +From: Geert Uytterhoeven + +[ Upstream commit 4036bae6dfd782d414040e7d714abc525b2e8792 ] + +Add the missing fifth interrupt to the device node that represents the +ARM architected timer. While at it, add an interrupt-names property for +clarity, + +Fixes: cf40c9689e5109bf ("arm64: dts: renesas: Add initial DTSI for RZ/G2UL SoC") +Signed-off-by: Geert Uytterhoeven +Reviewed-by: Lad Prabhakar +Link: https://lore.kernel.org/15cc7a7522b1658327a2bd0c4990d0131bbcb4d7.1718890849.git.geert+renesas@glider.be +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi +index b3f83d0ebcbb5..4b72de43b71cc 100644 +--- a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi ++++ b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi +@@ -50,7 +50,10 @@ timer { + interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, +- <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; ++ <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, ++ <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; ++ interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", ++ "hyp-virt"; + }; + }; + +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-renesas-r9a07g044-add-missing-hypervisor-v.patch b/queue-6.6/arm64-dts-renesas-r9a07g044-add-missing-hypervisor-v.patch new file mode 100644 index 00000000000..0a1dd991a1d --- /dev/null +++ b/queue-6.6/arm64-dts-renesas-r9a07g044-add-missing-hypervisor-v.patch @@ -0,0 +1,41 @@ +From d43a1ac0ceee2766e7bced40724f26f8c1f9596a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 Jun 2024 15:57:35 +0200 +Subject: arm64: dts: renesas: r9a07g044: Add missing hypervisor virtual timer + IRQ + +From: Geert Uytterhoeven + +[ Upstream commit ecbc5206a1a0532258144a4703cccf4e70f3fe6c ] + +Add the missing fifth interrupt to the device node that represents the +ARM architected timer. While at it, add an interrupt-names property for +clarity, + +Fixes: 68a45525297b2e9a ("arm64: dts: renesas: Add initial DTSI for RZ/G2{L,LC} SoC's") +Signed-off-by: Geert Uytterhoeven +Reviewed-by: Lad Prabhakar +Link: https://lore.kernel.org/21f556eb7e903d5b9f4c96188fd4b6ae0db71856.1718890849.git.geert+renesas@glider.be +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi +index 081d8f49db879..a877738c30484 100644 +--- a/arch/arm64/boot/dts/renesas/r9a07g044.dtsi ++++ b/arch/arm64/boot/dts/renesas/r9a07g044.dtsi +@@ -1288,6 +1288,9 @@ timer { + interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, +- <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; ++ <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, ++ <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; ++ interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", ++ "hyp-virt"; + }; + }; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-renesas-r9a07g054-add-missing-hypervisor-v.patch b/queue-6.6/arm64-dts-renesas-r9a07g054-add-missing-hypervisor-v.patch new file mode 100644 index 00000000000..03947c8bfc6 --- /dev/null +++ b/queue-6.6/arm64-dts-renesas-r9a07g054-add-missing-hypervisor-v.patch @@ -0,0 +1,41 @@ +From ff972cd5743feef6f16ed744ccc14dd593697b26 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 Jun 2024 15:57:36 +0200 +Subject: arm64: dts: renesas: r9a07g054: Add missing hypervisor virtual timer + IRQ + +From: Geert Uytterhoeven + +[ Upstream commit 2918674704aad620215c41979a331021fe3f1ec4 ] + +Add the missing fifth interrupt to the device node that represents the +ARM architected timer. While at it, add an interrupt-names property for +clarity, + +Fixes: 7c2b8198f4f321df ("arm64: dts: renesas: Add initial DTSI for RZ/V2L SoC") +Signed-off-by: Geert Uytterhoeven +Reviewed-by: Lad Prabhakar +Link: https://lore.kernel.org/834244e77e5f407ee6fab1ab5c10c98a8a933085.1718890849.git.geert+renesas@glider.be +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/renesas/r9a07g054.dtsi | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi +index 0d327464d2baf..3f01b096cfb71 100644 +--- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi ++++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi +@@ -1295,6 +1295,9 @@ timer { + interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, + <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, +- <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; ++ <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>, ++ <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>; ++ interrupt-names = "sec-phys", "phys", "virt", "hyp-phys", ++ "hyp-virt"; + }; + }; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-rockchip-add-mdio-and-ethernet-phy-nodes-t.patch b/queue-6.6/arm64-dts-rockchip-add-mdio-and-ethernet-phy-nodes-t.patch new file mode 100644 index 00000000000..3ef1c3127f0 --- /dev/null +++ b/queue-6.6/arm64-dts-rockchip-add-mdio-and-ethernet-phy-nodes-t.patch @@ -0,0 +1,71 @@ +From f931c54a44493c6285bdf14b3730bf64fafabe37 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 21 May 2024 21:10:10 +0000 +Subject: arm64: dts: rockchip: Add mdio and ethernet-phy nodes to + rk3308-rock-pi-s + +From: Jonas Karlman + +[ Upstream commit 4b64ed510ed946a4e4ca6d51d6512bf5361f6a04 ] + +Be explicit about the Ethernet port and define mdio and ethernet-phy +nodes in the device tree for ROCK Pi S. + +Fixes: bc3753aed81f ("arm64: dts: rockchip: rock-pi-s add more peripherals") +Signed-off-by: Jonas Karlman +Link: https://lore.kernel.org/r/20240521211029.1236094-8-jonas@kwiboo.se +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + .../boot/dts/rockchip/rk3308-rock-pi-s.dts | 26 ++++++++++++++++--- + 1 file changed, 23 insertions(+), 3 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts +index e31b831cd5fb3..05e26cd1ab422 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts +@@ -144,11 +144,25 @@ &emmc { + + &gmac { + clock_in_out = "output"; ++ phy-handle = <&rtl8201f>; + phy-supply = <&vcc_io>; +- snps,reset-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; +- snps,reset-active-low; +- snps,reset-delays-us = <0 50000 50000>; + status = "okay"; ++ ++ mdio { ++ compatible = "snps,dwmac-mdio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rtl8201f: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mac_rst>; ++ reset-assert-us = <20000>; ++ reset-deassert-us = <50000>; ++ reset-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; ++ }; ++ }; + }; + + &i2c1 { +@@ -159,6 +173,12 @@ &pinctrl { + pinctrl-names = "default"; + pinctrl-0 = <&rtc_32k>; + ++ gmac { ++ mac_rst: mac-rst { ++ rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ + leds { + green_led: green-led { + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-rockchip-add-missing-power-domains-for-rk3.patch b/queue-6.6/arm64-dts-rockchip-add-missing-power-domains-for-rk3.patch new file mode 100644 index 00000000000..2718682170f --- /dev/null +++ b/queue-6.6/arm64-dts-rockchip-add-missing-power-domains-for-rk3.patch @@ -0,0 +1,43 @@ +From 38550addac8eef348b96f2f9b71414b2afe04a01 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 2 Jul 2024 04:12:52 +0300 +Subject: arm64: dts: rockchip: Add missing power-domains for rk356x vop_mmu + +From: Cristian Ciocaltea + +[ Upstream commit 9d42c3ee3ce37cdad6f98c9e77bfbd0d791ac7da ] + +The iommu@fe043e00 on RK356x SoC shares the VOP power domain, but the +power-domains property was not provided when the node has been added. + +The consequence is that an attempt to reload the rockchipdrm module will +freeze the entire system. That is because on probe time, +pm_runtime_get_suppliers() gets called for vop@fe040000, which blocks +when pm_runtime_get_sync() is being invoked for iommu@fe043e00. + +Fix the issue by adding the missing property. + +Fixes: 9d6c6d978f97 ("arm64: dts: rockchip: rk356x: Add VOP2 nodes") +Signed-off-by: Cristian Ciocaltea +Link: https://lore.kernel.org/r/20240702-rk356x-fix-vop-mmu-v1-1-a66d1a0c45ea@collabora.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/rockchip/rk356x.dtsi | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi +index 820c98dbccc0a..2f885bc3665b5 100644 +--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi +@@ -749,6 +749,7 @@ vop_mmu: iommu@fe043e00 { + clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; + clock-names = "aclk", "iface"; + #iommu-cells = <0>; ++ power-domains = <&power RK3568_PD_VO>; + status = "disabled"; + }; + +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-rockchip-add-pinctrl-for-uart0-to-rk3308-r.patch b/queue-6.6/arm64-dts-rockchip-add-pinctrl-for-uart0-to-rk3308-r.patch new file mode 100644 index 00000000000..547c085dfd2 --- /dev/null +++ b/queue-6.6/arm64-dts-rockchip-add-pinctrl-for-uart0-to-rk3308-r.patch @@ -0,0 +1,40 @@ +From d69127d5ffa0f5b5d5a0a24adfddd47c09613b98 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 21 May 2024 21:10:08 +0000 +Subject: arm64: dts: rockchip: Add pinctrl for UART0 to rk3308-rock-pi-s + +From: Jonas Karlman + +[ Upstream commit 7affb86ef62581e3475ce3e0a7640da1f2ee29f8 ] + +UAR0 CTS/RTS is not wired to any pin and is not used for the default +serial console use of UART0 on ROCK Pi S. + +Override the SoC defined pinctrl props to limit configuration of the +two xfer pins wired to one of the GPIO pin headers. + +Fixes: 2e04c25b1320 ("arm64: dts: rockchip: add ROCK Pi S DTS support") +Signed-off-by: Jonas Karlman +Link: https://lore.kernel.org/r/20240521211029.1236094-6-jonas@kwiboo.se +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts +index f436284cb89c3..e31b831cd5fb3 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts +@@ -232,6 +232,8 @@ u2phy_otg: otg-port { + }; + + &uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_xfer>; + status = "okay"; + }; + +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-rockchip-add-sdmmc-related-properties-on-r.patch b/queue-6.6/arm64-dts-rockchip-add-sdmmc-related-properties-on-r.patch new file mode 100644 index 00000000000..02bdd621e93 --- /dev/null +++ b/queue-6.6/arm64-dts-rockchip-add-sdmmc-related-properties-on-r.patch @@ -0,0 +1,42 @@ +From 59ea42a4044564fb9286d73f5af44f04df0f38e5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 21 May 2024 21:10:07 +0000 +Subject: arm64: dts: rockchip: Add sdmmc related properties on + rk3308-rock-pi-s + +From: Jonas Karlman + +[ Upstream commit fc0daeccc384233eadfa9d5ddbd00159653c6bdc ] + +Add cap-mmc-highspeed to allow use of high speed MMC mode using an eMMC +to uSD board. Use disable-wp to signal that no physical write-protect +line is present. Also add vcc_io used for card and IO line power as +vmmc-supply. + +Fixes: 2e04c25b1320 ("arm64: dts: rockchip: add ROCK Pi S DTS support") +Signed-off-by: Jonas Karlman +Link: https://lore.kernel.org/r/20240521211029.1236094-5-jonas@kwiboo.se +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts +index 4f6541262ab84..f436284cb89c3 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts +@@ -210,7 +210,10 @@ &sdio { + }; + + &sdmmc { ++ cap-mmc-highspeed; + cap-sd-highspeed; ++ disable-wp; ++ vmmc-supply = <&vcc_io>; + status = "okay"; + }; + +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-rockchip-disable-display-subsystem-for-lun.patch b/queue-6.6/arm64-dts-rockchip-disable-display-subsystem-for-lun.patch new file mode 100644 index 00000000000..4cc7798380c --- /dev/null +++ b/queue-6.6/arm64-dts-rockchip-disable-display-subsystem-for-lun.patch @@ -0,0 +1,40 @@ +From fc9f966327ee8cd0fc201e19eb4ac4bb15af79d7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 1 Jul 2024 22:30:27 +0800 +Subject: arm64: dts: rockchip: disable display subsystem for Lunzn Fastrhino + R6xS + +From: Chukun Pan + +[ Upstream commit 2bf5d445df2ec89689d15ea259a916260c936959 ] + +The R66S and R68S boards do not have HDMI output, so disable +the display subsystem. + +Fixes: c79dab407afd ("arm64: dts: rockchip: Add Lunzn Fastrhino R66S") +Signed-off-by: Chukun Pan +Link: https://lore.kernel.org/r/20240701143028.1203997-3-amadeus@jmu.edu.cn +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi +index e08c9eab6f170..25c49bdbadbcb 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi +@@ -115,6 +115,10 @@ &cpu3 { + cpu-supply = <&vdd_cpu>; + }; + ++&display_subsystem { ++ status = "disabled"; ++}; ++ + &gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-rockchip-drop-invalid-mic-in-differential-.patch b/queue-6.6/arm64-dts-rockchip-drop-invalid-mic-in-differential-.patch new file mode 100644 index 00000000000..88d89c3c43c --- /dev/null +++ b/queue-6.6/arm64-dts-rockchip-drop-invalid-mic-in-differential-.patch @@ -0,0 +1,48 @@ +From 343a0ae3efb282ee6d90a26b12f901cbdebf7220 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 22 Jun 2024 00:57:20 +0300 +Subject: arm64: dts: rockchip: Drop invalid mic-in-differential on + rk3568-rock-3a + +From: Cristian Ciocaltea + +[ Upstream commit 406a554b382200abfabd1df423a425f6efee53e0 ] + +The 'mic-in-differential' DT property supported by the RK809/RK817 audio +codec driver is actually valid if prefixed with 'rockchip,': + + DTC_CHK arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dtb + rk3568-rock-3a.dtb: pmic@20: codec: 'mic-in-differential' does not match any of the regexes: 'pinctrl-[0-9]+' + from schema $id: http://devicetree.org/schemas/mfd/rockchip,rk809.yaml# + +However, the board doesn't make use of differential signaling, hence +drop the incorrect property and the now unnecessary 'codec' node. + +Fixes: 22a442e6586c ("arm64: dts: rockchip: add basic dts for the radxa rock3 model a") +Reported-by: Jonas Karlman +Signed-off-by: Cristian Ciocaltea +Link: https://lore.kernel.org/r/20240622-rk809-fixes-v2-3-c0db420d3639@collabora.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts | 4 ---- + 1 file changed, 4 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts +index e05ab11981f55..17830e8c9a59b 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts +@@ -530,10 +530,6 @@ regulator-state-mem { + }; + }; + }; +- +- codec { +- mic-in-differential; +- }; + }; + }; + +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-rockchip-fix-mic-in-differential-usage-on-.patch b/queue-6.6/arm64-dts-rockchip-fix-mic-in-differential-usage-on-.patch new file mode 100644 index 00000000000..ce965a7d055 --- /dev/null +++ b/queue-6.6/arm64-dts-rockchip-fix-mic-in-differential-usage-on-.patch @@ -0,0 +1,43 @@ +From b743debe3c614a66762e3beb7862ef44848b01bb Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 22 Jun 2024 00:57:21 +0300 +Subject: arm64: dts: rockchip: Fix mic-in-differential usage on rk3566-roc-pc + +From: Cristian Ciocaltea + +[ Upstream commit e643e4eb4bef6a2f95bf0c61a20c991bccecb212 ] + +The 'mic-in-differential' DT property supported by the RK809/RK817 audio +codec driver is actually valid if prefixed with 'rockchip,': + + DTC_CHK arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dtb + rk3566-roc-pc.dtb: pmic@20: codec: 'mic-in-differential' does not match any of the regexes: 'pinctrl-[0-9]+' + from schema $id: http://devicetree.org/schemas/mfd/rockchip,rk809.yaml# + +Make use of the correct property name. + +Fixes: a8e35c4bebe4 ("arm64: dts: rockchip: add audio nodes to rk3566-roc-pc") +Signed-off-by: Cristian Ciocaltea +Link: https://lore.kernel.org/r/20240622-rk809-fixes-v2-4-c0db420d3639@collabora.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts b/arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts +index 938092fce1866..68a72ac24cd4b 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts +@@ -268,7 +268,7 @@ rk809: pmic@20 { + vcc9-supply = <&vcc3v3_sys>; + + codec { +- mic-in-differential; ++ rockchip,mic-in-differential; + }; + + regulators { +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-rockchip-fix-mic-in-differential-usage-on-.patch-32164 b/queue-6.6/arm64-dts-rockchip-fix-mic-in-differential-usage-on-.patch-32164 new file mode 100644 index 00000000000..29409b41374 --- /dev/null +++ b/queue-6.6/arm64-dts-rockchip-fix-mic-in-differential-usage-on-.patch-32164 @@ -0,0 +1,45 @@ +From 493c81bf4ad1f4a225a998f9b95f04690f95830a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 22 Jun 2024 00:57:22 +0300 +Subject: arm64: dts: rockchip: Fix mic-in-differential usage on + rk3568-evb1-v10 + +From: Cristian Ciocaltea + +[ Upstream commit ec03073888ad23223ebb986e62583c20a9ed3c07 ] + +The 'mic-in-differential' DT property supported by the RK809/RK817 audio +codec driver is actually valid if prefixed with 'rockchip,': + + DTC_CHK arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dtb + + rk3568-evb1-v10.dtb: pmic@20: codec: 'mic-in-differential' does not match any of the regexes: 'pinctrl-[0-9]+' + from schema $id: http://devicetree.org/schemas/mfd/rockchip,rk809.yaml# + +Make use of the correct property name. + +Fixes: 3e4c629ca680 ("arm64: dts: rockchip: enable rk809 audio codec on the rk3568 evb1-v10") +Signed-off-by: Cristian Ciocaltea +Link: https://lore.kernel.org/r/20240622-rk809-fixes-v2-5-c0db420d3639@collabora.com +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts +index 19f8fc369b130..8c3ab07d38079 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts +@@ -475,7 +475,7 @@ regulator-state-mem { + }; + + codec { +- mic-in-differential; ++ rockchip,mic-in-differential; + }; + }; + }; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-rockchip-fix-pmu_io-supply-for-lunzn-fastr.patch b/queue-6.6/arm64-dts-rockchip-fix-pmu_io-supply-for-lunzn-fastr.patch new file mode 100644 index 00000000000..67a55776767 --- /dev/null +++ b/queue-6.6/arm64-dts-rockchip-fix-pmu_io-supply-for-lunzn-fastr.patch @@ -0,0 +1,74 @@ +From 5e97aecdab6e52c6b014dc9e40362cbdf101e502 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 30 Jun 2024 23:00:04 +0800 +Subject: arm64: dts: rockchip: fix pmu_io supply for Lunzn Fastrhino R6xS + +From: Chukun Pan + +[ Upstream commit cfeac8e5d05815521f5c5568680735a92ee91fe4 ] + +Fixes pmu_io_domains supply according to the schematic. Among them, +the vccio3 is responsible for the io voltage of sdcard. There is no +sdcard slot on the R68S, and it's connected to vcc_3v3, so describe +the supply of vccio3 separately. + +Fixes: c79dab407afd ("arm64: dts: rockchip: Add Lunzn Fastrhino R66S") +Fixes: b9f8ca655d80 ("arm64: dts: rockchip: Add Lunzn Fastrhino R68S") +Signed-off-by: Chukun Pan +Link: https://lore.kernel.org/r/20240630150010.55729-4-amadeus@jmu.edu.cn +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dts | 4 ++++ + arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi | 4 ++-- + arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts | 4 ++++ + 3 files changed, 10 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dts b/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dts +index 58ab7e9971dbc..b5e67990dd0f8 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dts +@@ -11,6 +11,10 @@ aliases { + }; + }; + ++&pmu_io_domains { ++ vccio3-supply = <&vccio_sd>; ++}; ++ + &sdmmc0 { + bus-width = <4>; + cap-mmc-highspeed; +diff --git a/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi +index 8f587978fa3b6..82577eba31eb5 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi +@@ -397,8 +397,8 @@ vcc5v0_usb_otg_en: vcc5v0-usb-otg-en { + &pmu_io_domains { + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcc3v3_pmu>; +- vccio1-supply = <&vccio_acodec>; +- vccio3-supply = <&vccio_sd>; ++ vccio1-supply = <&vcc_3v3>; ++ vccio2-supply = <&vcc_1v8>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc_1v8>; +diff --git a/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts b/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts +index e1fe5e442689a..a3339186e89c8 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts +@@ -102,6 +102,10 @@ eth_phy1_reset_pin: eth-phy1-reset-pin { + }; + }; + ++&pmu_io_domains { ++ vccio3-supply = <&vcc_3v3>; ++}; ++ + &sdhci { + bus-width = <8>; + max-frequency = <200000000>; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-rockchip-fix-regulator-name-for-lunzn-fast.patch b/queue-6.6/arm64-dts-rockchip-fix-regulator-name-for-lunzn-fast.patch new file mode 100644 index 00000000000..5cf0500e56f --- /dev/null +++ b/queue-6.6/arm64-dts-rockchip-fix-regulator-name-for-lunzn-fast.patch @@ -0,0 +1,57 @@ +From 3daeebe869af9977f46b016f038c9bb3a53ec491 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 30 Jun 2024 23:00:02 +0800 +Subject: arm64: dts: rockchip: fix regulator name for Lunzn Fastrhino R6xS + +From: Chukun Pan + +[ Upstream commit 2dad31528de9ea8b05245ce6ac4f76ebf8dae947 ] + +Make the regulator name the same as those marked by schematics. + +Fixes: c79dab407afd ("arm64: dts: rockchip: Add Lunzn Fastrhino R66S") +Signed-off-by: Chukun Pan +Link: https://lore.kernel.org/r/20240630150010.55729-2-amadeus@jmu.edu.cn +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi +index 89e84e3a92629..93987c8740f7b 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi +@@ -39,9 +39,9 @@ status_led: led-status { + }; + }; + +- dc_12v: dc-12v-regulator { ++ vcc12v_dcin: vcc12v-dcin-regulator { + compatible = "regulator-fixed"; +- regulator-name = "dc_12v"; ++ regulator-name = "vcc12v_dcin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; +@@ -65,7 +65,7 @@ vcc3v3_sys: vcc3v3-sys-regulator { + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; +- vin-supply = <&dc_12v>; ++ vin-supply = <&vcc12v_dcin>; + }; + + vcc5v0_sys: vcc5v0-sys-regulator { +@@ -75,7 +75,7 @@ vcc5v0_sys: vcc5v0-sys-regulator { + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; +- vin-supply = <&dc_12v>; ++ vin-supply = <&vcc12v_dcin>; + }; + + vcc5v0_usb_host: vcc5v0-usb-host-regulator { +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-rockchip-fix-usb-regulator-for-lunzn-fastr.patch b/queue-6.6/arm64-dts-rockchip-fix-usb-regulator-for-lunzn-fastr.patch new file mode 100644 index 00000000000..3cdedc65e30 --- /dev/null +++ b/queue-6.6/arm64-dts-rockchip-fix-usb-regulator-for-lunzn-fastr.patch @@ -0,0 +1,66 @@ +From 7ac78b4182d947b65877e27970b6b812dc18bb09 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 1 Jul 2024 22:30:26 +0800 +Subject: arm64: dts: rockchip: fix usb regulator for Lunzn Fastrhino R6xS + +From: Chukun Pan + +[ Upstream commit 9e823ba92118510c0d1c050b67bb000f9b9a73d7 ] + +Remove the non-existent usb_host regulator and fix the supply according +to the schematic. Also remove the unnecessary always-on and boot-on for +the usb_otg regulator. + +Fixes: c79dab407afd ("arm64: dts: rockchip: Add Lunzn Fastrhino R66S") +Signed-off-by: Chukun Pan +Link: https://lore.kernel.org/r/20240701143028.1203997-2-amadeus@jmu.edu.cn +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + .../boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi | 16 ++++------------ + 1 file changed, 4 insertions(+), 12 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi +index 93987c8740f7b..8f587978fa3b6 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi +@@ -78,15 +78,6 @@ vcc5v0_sys: vcc5v0-sys-regulator { + vin-supply = <&vcc12v_dcin>; + }; + +- vcc5v0_usb_host: vcc5v0-usb-host-regulator { +- compatible = "regulator-fixed"; +- regulator-name = "vcc5v0_usb_host"; +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- }; +- + vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { + compatible = "regulator-fixed"; + enable-active-high; +@@ -94,8 +85,9 @@ vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_usb_otg_en>; + regulator-name = "vcc5v0_usb_otg"; +- regulator-always-on; +- regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc5v0_sys>; + }; + }; + +@@ -460,7 +452,7 @@ &usb2phy0 { + }; + + &usb2phy0_host { +- phy-supply = <&vcc5v0_usb_host>; ++ phy-supply = <&vcc5v0_sys>; + status = "okay"; + }; + +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-rockchip-fixes-phy-reset-for-lunzn-fastrhi.patch b/queue-6.6/arm64-dts-rockchip-fixes-phy-reset-for-lunzn-fastrhi.patch new file mode 100644 index 00000000000..cf31dc6795a --- /dev/null +++ b/queue-6.6/arm64-dts-rockchip-fixes-phy-reset-for-lunzn-fastrhi.patch @@ -0,0 +1,69 @@ +From 7efb3622537d92dca4b65dca10b7bc0b54387e39 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 30 Jun 2024 23:00:07 +0800 +Subject: arm64: dts: rockchip: fixes PHY reset for Lunzn Fastrhino R68S + +From: Chukun Pan + +[ Upstream commit e261bd74000ca80e5483ba8a8bda509de8cbe7fd ] + +Fixed the PHY address and reset GPIOs (does not match the corresponding +pinctrl) for gmac0 and gmac1. + +Fixes: b9f8ca655d80 ("arm64: dts: rockchip: Add Lunzn Fastrhino R68S") +Signed-off-by: Chukun Pan +Link: https://lore.kernel.org/r/20240630150010.55729-7-amadeus@jmu.edu.cn +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + .../boot/dts/rockchip/rk3568-fastrhino-r68s.dts | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts b/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts +index a3339186e89c8..ce2a5e1ccefc3 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r68s.dts +@@ -39,7 +39,7 @@ &gmac0_tx_bus2 + &gmac0_rx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus>; +- snps,reset-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>; ++ snps,reset-gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 15ms, 50ms for rtl8211f */ + snps,reset-delays-us = <0 15000 50000>; +@@ -61,7 +61,7 @@ &gmac1m1_tx_bus2 + &gmac1m1_rx_bus2 + &gmac1m1_rgmii_clk + &gmac1m1_rgmii_bus>; +- snps,reset-gpio = <&gpio0 RK_PB1 GPIO_ACTIVE_LOW>; ++ snps,reset-gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 15ms, 50ms for rtl8211f */ + snps,reset-delays-us = <0 15000 50000>; +@@ -71,18 +71,18 @@ &gmac1m1_rgmii_clk + }; + + &mdio0 { +- rgmii_phy0: ethernet-phy@0 { ++ rgmii_phy0: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; +- reg = <0>; ++ reg = <0x1>; + pinctrl-0 = <ð_phy0_reset_pin>; + pinctrl-names = "default"; + }; + }; + + &mdio1 { +- rgmii_phy1: ethernet-phy@0 { ++ rgmii_phy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; +- reg = <0>; ++ reg = <0x1>; + pinctrl-0 = <ð_phy1_reset_pin>; + pinctrl-names = "default"; + }; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-rockchip-increase-vop-clk-rate-on-rk3328.patch b/queue-6.6/arm64-dts-rockchip-increase-vop-clk-rate-on-rk3328.patch new file mode 100644 index 00000000000..bb4e9665146 --- /dev/null +++ b/queue-6.6/arm64-dts-rockchip-increase-vop-clk-rate-on-rk3328.patch @@ -0,0 +1,42 @@ +From 49e1fb78fbb461c082121eeeeb2811d0768cb1b8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 15 Jun 2024 17:03:52 +0000 +Subject: arm64: dts: rockchip: Increase VOP clk rate on RK3328 + +From: Jonas Karlman + +[ Upstream commit 0f2ddb128fa20f8441d903285632f2c69e90fae1 ] + +The VOP on RK3328 needs to run at a higher rate in order to produce a +proper 3840x2160 signal. + +Change to use 300MHz for VIO clk and 400MHz for VOP clk, same rates used +by vendor 4.4 kernel. + +Fixes: 52e02d377a72 ("arm64: dts: rockchip: add core dtsi file for RK3328 SoCs") +Signed-off-by: Jonas Karlman +Link: https://lore.kernel.org/r/20240615170417.3134517-2-jonas@kwiboo.se +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/rockchip/rk3328.dtsi | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi +index 3778fe5c42a4b..126165ba1ea26 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi +@@ -822,8 +822,8 @@ cru: clock-controller@ff440000 { + <0>, <24000000>, + <24000000>, <24000000>, + <15000000>, <15000000>, +- <100000000>, <100000000>, +- <100000000>, <100000000>, ++ <300000000>, <100000000>, ++ <400000000>, <100000000>, + <50000000>, <100000000>, + <100000000>, <100000000>, + <50000000>, <50000000>, +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-rockchip-remove-unused-usb2-nodes-for-lunz.patch b/queue-6.6/arm64-dts-rockchip-remove-unused-usb2-nodes-for-lunz.patch new file mode 100644 index 00000000000..f7e9689dd2b --- /dev/null +++ b/queue-6.6/arm64-dts-rockchip-remove-unused-usb2-nodes-for-lunz.patch @@ -0,0 +1,63 @@ +From 4faead2ca8e81a062e7f56c705603233536a1f6a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 30 Jun 2024 23:00:05 +0800 +Subject: arm64: dts: rockchip: remove unused usb2 nodes for Lunzn Fastrhino + R6xS + +From: Chukun Pan + +[ Upstream commit cd77139a307fbabe75e6b5cb8a3753e3c700f394 ] + +Fix the following error when booting: +[ 15.851853] platform fd800000.usb: deferred probe pending +[ 15.852384] platform fd840000.usb: deferred probe pending +[ 15.852881] platform fd880000.usb: deferred probe pending + +This is due to usb2phy1 is not enabled. There is no USB 2.0 +port on the board, just remove it. + +Fixes: c79dab407afd ("arm64: dts: rockchip: Add Lunzn Fastrhino R66S") +Signed-off-by: Chukun Pan +Link: https://lore.kernel.org/r/20240630150010.55729-5-amadeus@jmu.edu.cn +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + .../boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi | 16 ---------------- + 1 file changed, 16 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi b/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi +index 82577eba31eb5..e08c9eab6f170 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3568-fastrhino-r66s.dtsi +@@ -421,28 +421,12 @@ &uart2 { + status = "okay"; + }; + +-&usb_host0_ehci { +- status = "okay"; +-}; +- +-&usb_host0_ohci { +- status = "okay"; +-}; +- + &usb_host0_xhci { + dr_mode = "host"; + extcon = <&usb2phy0>; + status = "okay"; + }; + +-&usb_host1_ehci { +- status = "okay"; +-}; +- +-&usb_host1_ohci { +- status = "okay"; +-}; +- + &usb_host1_xhci { + status = "okay"; + }; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-rockchip-update-wifi-bt-related-nodes-on-r.patch b/queue-6.6/arm64-dts-rockchip-update-wifi-bt-related-nodes-on-r.patch new file mode 100644 index 00000000000..9f3c042c8d6 --- /dev/null +++ b/queue-6.6/arm64-dts-rockchip-update-wifi-bt-related-nodes-on-r.patch @@ -0,0 +1,107 @@ +From 472375bcd4c1be9f5e106d9694a3b69d0ed297df Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 21 May 2024 21:10:16 +0000 +Subject: arm64: dts: rockchip: Update WIFi/BT related nodes on + rk3308-rock-pi-s + +From: Jonas Karlman + +[ Upstream commit 12c3ec878cbe3709782e85b88124abecc3bb8617 ] + +Update WiFi SDIO and BT UART related props to better reflect details +about the optional onboard RTL8723DS WiFi/BT module. + +Also correct the compatible used for bluetooth to match the WiFi/BT +module used on the board. + +Fixes: bc3753aed81f ("arm64: dts: rockchip: rock-pi-s add more peripherals") +Signed-off-by: Jonas Karlman +Link: https://lore.kernel.org/r/20240521211029.1236094-14-jonas@kwiboo.se +Signed-off-by: Heiko Stuebner +Signed-off-by: Sasha Levin +--- + .../boot/dts/rockchip/rk3308-rock-pi-s.dts | 40 +++++++++++++++++-- + 1 file changed, 36 insertions(+), 4 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts +index 05e26cd1ab422..5ca0cc19f92c8 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts +@@ -17,6 +17,7 @@ aliases { + ethernet0 = &gmac; + mmc0 = &emmc; + mmc1 = &sdmmc; ++ mmc2 = &sdio; + }; + + chosen { +@@ -173,6 +174,20 @@ &pinctrl { + pinctrl-names = "default"; + pinctrl-0 = <&rtc_32k>; + ++ bluetooth { ++ bt_reg_on: bt-reg-on { ++ rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ bt_wake_host: bt-wake-host { ++ rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ ++ host_wake_bt: host-wake-bt { ++ rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ + gmac { + mac_rst: mac-rst { + rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; +@@ -222,11 +237,24 @@ &sdio { + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; +- max-frequency = <1000000>; ++ max-frequency = <100000000>; + mmc-pwrseq = <&sdio_pwrseq>; ++ no-mmc; ++ no-sd; + non-removable; +- sd-uhs-sdr104; ++ sd-uhs-sdr50; ++ vmmc-supply = <&vcc_io>; ++ vqmmc-supply = <&vcc_1v8>; + status = "okay"; ++ ++ rtl8723ds: wifi@1 { ++ reg = <1>; ++ interrupt-parent = <&gpio0>; ++ interrupts = ; ++ interrupt-names = "host-wake"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_host_wake>; ++ }; + }; + + &sdmmc { +@@ -258,12 +286,16 @@ &uart0 { + }; + + &uart4 { ++ uart-has-rtscts; + status = "okay"; + + bluetooth { +- compatible = "realtek,rtl8723bs-bt"; +- device-wake-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; ++ compatible = "realtek,rtl8723ds-bt"; ++ device-wake-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; ++ enable-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; + host-wake-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&bt_reg_on &bt_wake_host &host_wake_bt>; + }; + }; + +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-ti-k3-am62-verdin-drop-mcasp-afifos.patch b/queue-6.6/arm64-dts-ti-k3-am62-verdin-drop-mcasp-afifos.patch new file mode 100644 index 00000000000..d3604458cb3 --- /dev/null +++ b/queue-6.6/arm64-dts-ti-k3-am62-verdin-drop-mcasp-afifos.patch @@ -0,0 +1,47 @@ +From be8a185a2929b1e0a76e66ca8a9776078c936329 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 Jun 2024 13:37:44 +0530 +Subject: arm64: dts: ti: k3-am62-verdin: Drop McASP AFIFOs + +From: Jai Luthra + +[ Upstream commit fb01352801f08740e9f37cbd71f73866c7044927 ] + +McASP AFIFOs are not necessary with UDMA-P/BCDMA as there is buffering +on the DMA IP. Drop these for better audio latency. + +Fixes: 316b80246b16 ("arm64: dts: ti: add verdin am62") +Acked-by: Francesco Dolcini +Signed-off-by: Jai Luthra +Link: https://lore.kernel.org/r/20240606-mcasp_fifo_drop-v2-5-8c317dabdd0a@ti.com +Signed-off-by: Vignesh Raghavendra +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | 4 ---- + 1 file changed, 4 deletions(-) + +diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi +index d4f8776c9277a..0a5634ca005df 100644 +--- a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi +@@ -1309,8 +1309,6 @@ &mcasp0 { + 0 0 0 0 + >; + tdm-slots = <2>; +- rx-num-evt = <32>; +- tx-num-evt = <32>; + #sound-dai-cells = <0>; + status = "disabled"; + }; +@@ -1327,8 +1325,6 @@ &mcasp1 { + 0 0 0 0 + >; + tdm-slots = <2>; +- rx-num-evt = <32>; +- tx-num-evt = <32>; + #sound-dai-cells = <0>; + status = "disabled"; + }; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-ti-k3-am625-beagleplay-drop-mcasp-afifos.patch b/queue-6.6/arm64-dts-ti-k3-am625-beagleplay-drop-mcasp-afifos.patch new file mode 100644 index 00000000000..187ea83a79f --- /dev/null +++ b/queue-6.6/arm64-dts-ti-k3-am625-beagleplay-drop-mcasp-afifos.patch @@ -0,0 +1,35 @@ +From bd3060cd6d0de345934f50c4ee292c7ab6854df7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 Jun 2024 13:37:43 +0530 +Subject: arm64: dts: ti: k3-am625-beagleplay: Drop McASP AFIFOs + +From: Jai Luthra + +[ Upstream commit 3b4a03357aee07a32a44a49bb6a71f5e82b1ecc1 ] + +McASP AFIFOs are not necessary with UDMA-P/BCDMA as there is buffering +on the DMA IP. Drop these for better audio latency. + +Fixes: 1f7226a5e52c ("arm64: dts: ti: k3-am625-beagleplay: Add HDMI support") +Signed-off-by: Jai Luthra +Link: https://lore.kernel.org/r/20240606-mcasp_fifo_drop-v2-4-8c317dabdd0a@ti.com +Signed-off-by: Vignesh Raghavendra +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts b/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts +index 2de74428a8bde..3560349d63051 100644 +--- a/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts ++++ b/arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts +@@ -903,6 +903,4 @@ &mcasp1 { + 0 0 0 0 + 0 0 0 0 + >; +- tx-num-evt = <32>; +- rx-num-evt = <32>; + }; +-- +2.43.0 + diff --git a/queue-6.6/arm64-dts-ti-k3-am62x-drop-mcasp-afifos.patch b/queue-6.6/arm64-dts-ti-k3-am62x-drop-mcasp-afifos.patch new file mode 100644 index 00000000000..4540b2986cd --- /dev/null +++ b/queue-6.6/arm64-dts-ti-k3-am62x-drop-mcasp-afifos.patch @@ -0,0 +1,37 @@ +From 4232d7d33370bdc9df29111af7bd63d6a8141022 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 Jun 2024 13:37:40 +0530 +Subject: arm64: dts: ti: k3-am62x: Drop McASP AFIFOs + +From: Jai Luthra + +[ Upstream commit 6ee3ca0ec7fabc63603afdb3485da04164dc8747 ] + +McASP AFIFOs are not necessary with UDMA-P/BCDMA as there is buffering +on the DMA IP. Drop these for better audio latency. + +Fixes: b94b43715e91 ("arm64: dts: ti: Enable audio on SK-AM62(-LP)") +Signed-off-by: Jai Luthra +Link: https://lore.kernel.org/r/20240606-mcasp_fifo_drop-v2-1-8c317dabdd0a@ti.com +Signed-off-by: Vignesh Raghavendra +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi +index 677ff8de4b6ec..0f8c0f6a0f573 100644 +--- a/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-common.dtsi +@@ -481,8 +481,6 @@ &mcasp1 { + 0 0 0 0 + 0 0 0 0 + >; +- tx-num-evt = <32>; +- rx-num-evt = <32>; + }; + + &dss { +-- +2.43.0 + diff --git a/queue-6.6/asoc-amd-adjust-error-handling-in-case-of-absent-cod.patch b/queue-6.6/asoc-amd-adjust-error-handling-in-case-of-absent-cod.patch new file mode 100644 index 00000000000..f869beb9642 --- /dev/null +++ b/queue-6.6/asoc-amd-adjust-error-handling-in-case-of-absent-cod.patch @@ -0,0 +1,47 @@ +From 9fa931a122ae4432b56cf6ee423009e8b7e25f9f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 3 Jul 2024 22:10:07 +0300 +Subject: ASoC: amd: Adjust error handling in case of absent codec device + +From: Aleksandr Mishin + +[ Upstream commit 5080808c3339de2220c602ab7c7fa23dc6c1a5a3 ] + +acpi_get_first_physical_node() can return NULL in several cases (no such +device, ACPI table error, reference count drop to 0, etc). +Existing check just emit error message, but doesn't perform return. +Then this NULL pointer is passed to devm_acpi_dev_add_driver_gpios() +where it is dereferenced. + +Adjust this error handling by adding error code return. + +Found by Linux Verification Center (linuxtesting.org) with SVACE. + +Fixes: 02527c3f2300 ("ASoC: amd: add Machine driver for Jadeite platform") +Signed-off-by: Aleksandr Mishin +Link: https://patch.msgid.link/20240703191007.8524-1-amishin@t-argos.ru +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + sound/soc/amd/acp-es8336.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/sound/soc/amd/acp-es8336.c b/sound/soc/amd/acp-es8336.c +index 5e56d3a53be78..49bffc567e68d 100644 +--- a/sound/soc/amd/acp-es8336.c ++++ b/sound/soc/amd/acp-es8336.c +@@ -203,8 +203,10 @@ static int st_es8336_late_probe(struct snd_soc_card *card) + + codec_dev = acpi_get_first_physical_node(adev); + acpi_dev_put(adev); +- if (!codec_dev) ++ if (!codec_dev) { + dev_err(card->dev, "can not find codec dev\n"); ++ return -ENODEV; ++ } + + ret = devm_acpi_dev_add_driver_gpios(codec_dev, acpi_es8336_gpios); + if (ret) +-- +2.43.0 + diff --git a/queue-6.6/asoc-cs35l56-accept-values-greater-than-0-as-irq-num.patch b/queue-6.6/asoc-cs35l56-accept-values-greater-than-0-as-irq-num.patch new file mode 100644 index 00000000000..501b6dbf99c --- /dev/null +++ b/queue-6.6/asoc-cs35l56-accept-values-greater-than-0-as-irq-num.patch @@ -0,0 +1,42 @@ +From 0ae43df7f1d0e5bc69caaa3fd743d28a87db2bc4 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Jun 2024 14:53:38 +0100 +Subject: ASoC: cs35l56: Accept values greater than 0 as IRQ numbers + +From: Simon Trimmer + +[ Upstream commit 3ec1428d7b7c519d757a013cef908d7e33dee882 ] + +IRQ lookup functions such as those in ACPI can return error values when +an IRQ is not defined. The i2c core driver converts the error codes to a +value of 0 and the SPI bus driver passes them unaltered to client device +drivers. + +The cs35l56 driver should only accept positive non-zero values as IRQ +numbers. + +Signed-off-by: Simon Trimmer +Fixes: 8a731fd37f8b ("ASoC: cs35l56: Move utility functions to shared file") +Link: https://msgid.link/r/20240617135338.82006-1-simont@opensource.cirrus.com +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + sound/soc/codecs/cs35l56-shared.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/sound/soc/codecs/cs35l56-shared.c b/sound/soc/codecs/cs35l56-shared.c +index 12291242362b4..69c951e305842 100644 +--- a/sound/soc/codecs/cs35l56-shared.c ++++ b/sound/soc/codecs/cs35l56-shared.c +@@ -354,7 +354,7 @@ int cs35l56_irq_request(struct cs35l56_base *cs35l56_base, int irq) + { + int ret; + +- if (!irq) ++ if (irq < 1) + return 0; + + ret = devm_request_threaded_irq(cs35l56_base->dev, irq, NULL, cs35l56_irq, +-- +2.43.0 + diff --git a/queue-6.6/asoc-max98088-check-for-clk_prepare_enable-error.patch b/queue-6.6/asoc-max98088-check-for-clk_prepare_enable-error.patch new file mode 100644 index 00000000000..675093677f7 --- /dev/null +++ b/queue-6.6/asoc-max98088-check-for-clk_prepare_enable-error.patch @@ -0,0 +1,53 @@ +From 4e88d59588aee4cea755aba385f5e98753c33bba Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 28 Jun 2024 16:05:34 +0800 +Subject: ASoC: max98088: Check for clk_prepare_enable() error + +From: Chen Ni + +[ Upstream commit 1a70579723fde3624a72dfea6e79e55be6e36659 ] + +clk_prepare_enable() may fail, so we should better check its return +value and propagate it in the case of error. + +Fixes: 62a7fc32a628 ("ASoC: max98088: Add master clock handling") +Signed-off-by: Chen Ni +Link: https://patch.msgid.link/20240628080534.843815-1-nichen@iscas.ac.cn +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + sound/soc/codecs/max98088.c | 10 +++++++--- + 1 file changed, 7 insertions(+), 3 deletions(-) + +diff --git a/sound/soc/codecs/max98088.c b/sound/soc/codecs/max98088.c +index 8b56ee550c09e..8b0645c634620 100644 +--- a/sound/soc/codecs/max98088.c ++++ b/sound/soc/codecs/max98088.c +@@ -1318,6 +1318,7 @@ static int max98088_set_bias_level(struct snd_soc_component *component, + enum snd_soc_bias_level level) + { + struct max98088_priv *max98088 = snd_soc_component_get_drvdata(component); ++ int ret; + + switch (level) { + case SND_SOC_BIAS_ON: +@@ -1333,10 +1334,13 @@ static int max98088_set_bias_level(struct snd_soc_component *component, + */ + if (!IS_ERR(max98088->mclk)) { + if (snd_soc_component_get_bias_level(component) == +- SND_SOC_BIAS_ON) ++ SND_SOC_BIAS_ON) { + clk_disable_unprepare(max98088->mclk); +- else +- clk_prepare_enable(max98088->mclk); ++ } else { ++ ret = clk_prepare_enable(max98088->mclk); ++ if (ret) ++ return ret; ++ } + } + break; + +-- +2.43.0 + diff --git a/queue-6.6/asoc-qcom-adjust-issues-in-case-of-dt-error-in-asoc_.patch b/queue-6.6/asoc-qcom-adjust-issues-in-case-of-dt-error-in-asoc_.patch new file mode 100644 index 00000000000..bec4e7d81fb --- /dev/null +++ b/queue-6.6/asoc-qcom-adjust-issues-in-case-of-dt-error-in-asoc_.patch @@ -0,0 +1,51 @@ +From 0d275a1be6ee8683d26ede210a525f5aea11fbb9 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 5 Jun 2024 13:49:53 +0300 +Subject: ASoC: qcom: Adjust issues in case of DT error in + asoc_qcom_lpass_cpu_platform_probe() + +From: Aleksandr Mishin + +[ Upstream commit f9f7f29f64454bb20896c7d918c3abc3a1aa487b ] + +If IORESOURCE_MEM "lpass-rxtx-cdc-dma-lpm" or "lpass-va-cdc-dma-lpm" +resources is not provided in Device Tree due to any error, +platform_get_resource_byname() will return NULL which is later +dereferenced. According to sound/qcom,lpass-cpu.yaml, these resources +are provided, but DT can be broken due to any error. In such cases driver +must be able to protect itself, since the DT is external data for the +driver. +Adjust this issues by adding NULL return check. + +Found by Linux Verification Center (linuxtesting.org) with SVACE. + +Fixes: b138706225c9 ("ASoC: qcom: Add regmap config support for codec dma driver") +Signed-off-by: Aleksandr Mishin +Link: https://patch.msgid.link/20240605104953.12072-1-amishin@t-argos.ru +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + sound/soc/qcom/lpass-cpu.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/sound/soc/qcom/lpass-cpu.c b/sound/soc/qcom/lpass-cpu.c +index 39571fed40019..73b42d9ee2447 100644 +--- a/sound/soc/qcom/lpass-cpu.c ++++ b/sound/soc/qcom/lpass-cpu.c +@@ -1170,9 +1170,13 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev) + } + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "lpass-rxtx-cdc-dma-lpm"); ++ if (!res) ++ return -EINVAL; + drvdata->rxtx_cdc_dma_lpm_buf = res->start; + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "lpass-va-cdc-dma-lpm"); ++ if (!res) ++ return -EINVAL; + drvdata->va_cdc_dma_lpm_buf = res->start; + } + +-- +2.43.0 + diff --git a/queue-6.6/asoc-tas2781-enable-rca-based-playback-without-dsp-f.patch b/queue-6.6/asoc-tas2781-enable-rca-based-playback-without-dsp-f.patch new file mode 100644 index 00000000000..824850f821a --- /dev/null +++ b/queue-6.6/asoc-tas2781-enable-rca-based-playback-without-dsp-f.patch @@ -0,0 +1,175 @@ +From 9ca41361244b7c61f30dd9cd9c47f5ab924236b2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 14 Jun 2024 21:36:45 +0800 +Subject: ASoc: tas2781: Enable RCA-based playback without DSP firmware + download + +From: Shenghao Ding + +[ Upstream commit 9f774c757e3fb2ac32dc4377e8f21f3364a8df81 ] + +In only loading RCA (Reconfigurable Architecture) binary case, no DSP +program will be working inside tas2563/tas2781, that is dsp-bypass mode, +do not support speaker protection, or audio acoustic algorithms in this +mode. + +Fixes: ef3bcde75d06 ("ASoC: tas2781: Add tas2781 driver") +Signed-off-by: Shenghao Ding +Reviewed-by: Pierre-Louis Bossart +Link: https://msgid.link/r/20240614133646.910-1-shenghao-ding@ti.com +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + include/sound/tas2781-dsp.h | 11 +++++++-- + sound/soc/codecs/tas2781-fmwlib.c | 18 ++++++++++---- + sound/soc/codecs/tas2781-i2c.c | 39 ++++++++++++++++++++----------- + 3 files changed, 48 insertions(+), 20 deletions(-) + +diff --git a/include/sound/tas2781-dsp.h b/include/sound/tas2781-dsp.h +index 4ef0f5c6fe6c0..af3319dab230a 100644 +--- a/include/sound/tas2781-dsp.h ++++ b/include/sound/tas2781-dsp.h +@@ -112,10 +112,17 @@ struct tasdevice_fw { + struct device *dev; + }; + +-enum tasdevice_dsp_fw_state { +- TASDEVICE_DSP_FW_NONE = 0, ++enum tasdevice_fw_state { ++ /* Driver in startup mode, not load any firmware. */ + TASDEVICE_DSP_FW_PENDING, ++ /* DSP firmware in the system, but parsing error. */ + TASDEVICE_DSP_FW_FAIL, ++ /* ++ * Only RCA (Reconfigurable Architecture) firmware load ++ * successfully. ++ */ ++ TASDEVICE_RCA_FW_OK, ++ /* Both RCA and DSP firmware load successfully. */ + TASDEVICE_DSP_FW_ALL_OK, + }; + +diff --git a/sound/soc/codecs/tas2781-fmwlib.c b/sound/soc/codecs/tas2781-fmwlib.c +index c6c47297a4fe7..32ff4fb14998e 100644 +--- a/sound/soc/codecs/tas2781-fmwlib.c ++++ b/sound/soc/codecs/tas2781-fmwlib.c +@@ -2354,14 +2354,21 @@ void tasdevice_tuning_switch(void *context, int state) + struct tasdevice_fw *tas_fmw = tas_priv->fmw; + int profile_cfg_id = tas_priv->rcabin.profile_cfg_id; + +- if (tas_priv->fw_state == TASDEVICE_DSP_FW_FAIL) { +- dev_err(tas_priv->dev, "DSP bin file not loaded\n"); ++ /* ++ * Only RCA-based Playback can still work with no dsp program running ++ * inside the chip. ++ */ ++ switch (tas_priv->fw_state) { ++ case TASDEVICE_RCA_FW_OK: ++ case TASDEVICE_DSP_FW_ALL_OK: ++ break; ++ default: + return; + } + + if (state == 0) { +- if (tas_priv->cur_prog < tas_fmw->nr_programs) { +- /*dsp mode or tuning mode*/ ++ if (tas_fmw && tas_priv->cur_prog < tas_fmw->nr_programs) { ++ /* dsp mode or tuning mode */ + profile_cfg_id = tas_priv->rcabin.profile_cfg_id; + tasdevice_select_tuningprm_cfg(tas_priv, + tas_priv->cur_prog, tas_priv->cur_conf, +@@ -2370,9 +2377,10 @@ void tasdevice_tuning_switch(void *context, int state) + + tasdevice_select_cfg_blk(tas_priv, profile_cfg_id, + TASDEVICE_BIN_BLK_PRE_POWER_UP); +- } else ++ } else { + tasdevice_select_cfg_blk(tas_priv, profile_cfg_id, + TASDEVICE_BIN_BLK_PRE_SHUTDOWN); ++ } + } + EXPORT_SYMBOL_NS_GPL(tasdevice_tuning_switch, + SND_SOC_TAS2781_FMWLIB); +diff --git a/sound/soc/codecs/tas2781-i2c.c b/sound/soc/codecs/tas2781-i2c.c +index 7327e9dcc8c02..a9d179e307739 100644 +--- a/sound/soc/codecs/tas2781-i2c.c ++++ b/sound/soc/codecs/tas2781-i2c.c +@@ -378,23 +378,37 @@ static void tasdevice_fw_ready(const struct firmware *fmw, + mutex_lock(&tas_priv->codec_lock); + + ret = tasdevice_rca_parser(tas_priv, fmw); +- if (ret) ++ if (ret) { ++ tasdevice_config_info_remove(tas_priv); + goto out; ++ } + tasdevice_create_control(tas_priv); + + tasdevice_dsp_remove(tas_priv); + tasdevice_calbin_remove(tas_priv); +- tas_priv->fw_state = TASDEVICE_DSP_FW_PENDING; ++ /* ++ * The baseline is the RCA-only case, and then the code attempts to ++ * load DSP firmware but in case of failures just keep going, i.e. ++ * failing to load DSP firmware is NOT an error. ++ */ ++ tas_priv->fw_state = TASDEVICE_RCA_FW_OK; + scnprintf(tas_priv->coef_binaryname, 64, "%s_coef.bin", + tas_priv->dev_name); + ret = tasdevice_dsp_parser(tas_priv); + if (ret) { + dev_err(tas_priv->dev, "dspfw load %s error\n", + tas_priv->coef_binaryname); +- tas_priv->fw_state = TASDEVICE_DSP_FW_FAIL; + goto out; + } +- tasdevice_dsp_create_ctrls(tas_priv); ++ ++ /* ++ * If no dsp-related kcontrol created, the dsp resource will be freed. ++ */ ++ ret = tasdevice_dsp_create_ctrls(tas_priv); ++ if (ret) { ++ dev_err(tas_priv->dev, "dsp controls error\n"); ++ goto out; ++ } + + tas_priv->fw_state = TASDEVICE_DSP_FW_ALL_OK; + +@@ -415,9 +429,8 @@ static void tasdevice_fw_ready(const struct firmware *fmw, + tasdevice_prmg_load(tas_priv, 0); + tas_priv->cur_prog = 0; + out: +- if (tas_priv->fw_state == TASDEVICE_DSP_FW_FAIL) { +- /*If DSP FW fail, kcontrol won't be created */ +- tasdevice_config_info_remove(tas_priv); ++ if (tas_priv->fw_state == TASDEVICE_RCA_FW_OK) { ++ /* If DSP FW fail, DSP kcontrol won't be created. */ + tasdevice_dsp_remove(tas_priv); + } + mutex_unlock(&tas_priv->codec_lock); +@@ -464,14 +477,14 @@ static int tasdevice_startup(struct snd_pcm_substream *substream, + { + struct snd_soc_component *codec = dai->component; + struct tasdevice_priv *tas_priv = snd_soc_component_get_drvdata(codec); +- int ret = 0; + +- if (tas_priv->fw_state != TASDEVICE_DSP_FW_ALL_OK) { +- dev_err(tas_priv->dev, "DSP bin file not loaded\n"); +- ret = -EINVAL; ++ switch (tas_priv->fw_state) { ++ case TASDEVICE_RCA_FW_OK: ++ case TASDEVICE_DSP_FW_ALL_OK: ++ return 0; ++ default: ++ return -EINVAL; + } +- +- return ret; + } + + static int tasdevice_hw_params(struct snd_pcm_substream *substream, +-- +2.43.0 + diff --git a/queue-6.6/block-call-.limit_depth-after-.hctx-has-been-set.patch b/queue-6.6/block-call-.limit_depth-after-.hctx-has-been-set.patch new file mode 100644 index 00000000000..000fd38f43d --- /dev/null +++ b/queue-6.6/block-call-.limit_depth-after-.hctx-has-been-set.patch @@ -0,0 +1,60 @@ +From 56c141ed35d04de24a323c13ea7050f532e98f6d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 9 May 2024 10:01:48 -0700 +Subject: block: Call .limit_depth() after .hctx has been set + +From: Bart Van Assche + +[ Upstream commit 6259151c04d4e0085e00d2dcb471ebdd1778e72e ] + +Call .limit_depth() after data->hctx has been set such that data->hctx can +be used in .limit_depth() implementations. + +Cc: Christoph Hellwig +Cc: Damien Le Moal +Cc: Zhiguo Niu +Fixes: 07757588e507 ("block/mq-deadline: Reserve 25% of scheduler tags for synchronous requests") +Signed-off-by: Bart Van Assche +Tested-by: Zhiguo Niu +Reviewed-by: Christoph Hellwig +Link: https://lore.kernel.org/r/20240509170149.7639-2-bvanassche@acm.org +Signed-off-by: Jens Axboe +Signed-off-by: Sasha Levin +--- + block/blk-mq.c | 12 ++++++------ + 1 file changed, 6 insertions(+), 6 deletions(-) + +diff --git a/block/blk-mq.c b/block/blk-mq.c +index 4c91889affa7c..7cc315527a44c 100644 +--- a/block/blk-mq.c ++++ b/block/blk-mq.c +@@ -447,6 +447,10 @@ static struct request *__blk_mq_alloc_requests(struct blk_mq_alloc_data *data) + if (data->cmd_flags & REQ_NOWAIT) + data->flags |= BLK_MQ_REQ_NOWAIT; + ++retry: ++ data->ctx = blk_mq_get_ctx(q); ++ data->hctx = blk_mq_map_queue(q, data->cmd_flags, data->ctx); ++ + if (q->elevator) { + /* + * All requests use scheduler tags when an I/O scheduler is +@@ -468,13 +472,9 @@ static struct request *__blk_mq_alloc_requests(struct blk_mq_alloc_data *data) + if (ops->limit_depth) + ops->limit_depth(data->cmd_flags, data); + } +- } +- +-retry: +- data->ctx = blk_mq_get_ctx(q); +- data->hctx = blk_mq_map_queue(q, data->cmd_flags, data->ctx); +- if (!(data->rq_flags & RQF_SCHED_TAGS)) ++ } else { + blk_mq_tag_busy(data->hctx); ++ } + + if (data->flags & BLK_MQ_REQ_RESERVED) + data->rq_flags |= RQF_RESV; +-- +2.43.0 + diff --git a/queue-6.6/block-initialize-integrity-buffer-to-zero-before-wri.patch b/queue-6.6/block-initialize-integrity-buffer-to-zero-before-wri.patch new file mode 100644 index 00000000000..24e18051709 --- /dev/null +++ b/queue-6.6/block-initialize-integrity-buffer-to-zero-before-wri.patch @@ -0,0 +1,64 @@ +From 5268ab7f8d6fb735782de12a851df575bf649c20 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 13 Jun 2024 10:48:11 +0200 +Subject: block: initialize integrity buffer to zero before writing it to media + +From: Christoph Hellwig + +[ Upstream commit 899ee2c3829c5ac14bfc7d3c4a5846c0b709b78f ] + +Metadata added by bio_integrity_prep is using plain kmalloc, which leads +to random kernel memory being written media. For PI metadata this is +limited to the app tag that isn't used by kernel generated metadata, +but for non-PI metadata the entire buffer leaks kernel memory. + +Fix this by adding the __GFP_ZERO flag to allocations for writes. + +Fixes: 7ba1ba12eeef ("block: Block layer data integrity support") +Signed-off-by: Christoph Hellwig +Reviewed-by: Martin K. Petersen +Reviewed-by: Kanchan Joshi +Reviewed-by: Chaitanya Kulkarni +Link: https://lore.kernel.org/r/20240613084839.1044015-2-hch@lst.de +Signed-off-by: Jens Axboe +Signed-off-by: Sasha Levin +--- + block/bio-integrity.c | 11 ++++++++++- + 1 file changed, 10 insertions(+), 1 deletion(-) + +diff --git a/block/bio-integrity.c b/block/bio-integrity.c +index ec8ac8cf6e1b9..15e444b2fcc12 100644 +--- a/block/bio-integrity.c ++++ b/block/bio-integrity.c +@@ -217,6 +217,7 @@ bool bio_integrity_prep(struct bio *bio) + unsigned long start, end; + unsigned int len, nr_pages; + unsigned int bytes, offset, i; ++ gfp_t gfp = GFP_NOIO; + + if (!bi) + return true; +@@ -239,11 +240,19 @@ bool bio_integrity_prep(struct bio *bio) + if (!bi->profile->generate_fn || + !(bi->flags & BLK_INTEGRITY_GENERATE)) + return true; ++ ++ /* ++ * Zero the memory allocated to not leak uninitialized kernel ++ * memory to disk. For PI this only affects the app tag, but ++ * for non-integrity metadata it affects the entire metadata ++ * buffer. ++ */ ++ gfp |= __GFP_ZERO; + } + + /* Allocate kernel buffer for protection data */ + len = bio_integrity_bytes(bi, bio_sectors(bio)); +- buf = kmalloc(len, GFP_NOIO); ++ buf = kmalloc(len, gfp); + if (unlikely(buf == NULL)) { + printk(KERN_ERR "could not allocate integrity buffer\n"); + goto err_end_io; +-- +2.43.0 + diff --git a/queue-6.6/block-mq-deadline-fix-the-tag-reservation-code.patch b/queue-6.6/block-mq-deadline-fix-the-tag-reservation-code.patch new file mode 100644 index 00000000000..86dec84aacd --- /dev/null +++ b/queue-6.6/block-mq-deadline-fix-the-tag-reservation-code.patch @@ -0,0 +1,83 @@ +From 4b817e2454c31ae9f2ffa2580205d2e079b8209a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 9 May 2024 10:01:49 -0700 +Subject: block/mq-deadline: Fix the tag reservation code + +From: Bart Van Assche + +[ Upstream commit 39823b47bbd40502632ffba90ebb34fff7c8b5e8 ] + +The current tag reservation code is based on a misunderstanding of the +meaning of data->shallow_depth. Fix the tag reservation code as follows: +* By default, do not reserve any tags for synchronous requests because + for certain use cases reserving tags reduces performance. See also + Harshit Mogalapalli, [bug-report] Performance regression with fio + sequential-write on a multipath setup, 2024-03-07 + (https://lore.kernel.org/linux-block/5ce2ae5d-61e2-4ede-ad55-551112602401@oracle.com/) +* Reduce min_shallow_depth to one because min_shallow_depth must be less + than or equal any shallow_depth value. +* Scale dd->async_depth from the range [1, nr_requests] to [1, + bits_per_sbitmap_word]. + +Cc: Christoph Hellwig +Cc: Damien Le Moal +Cc: Zhiguo Niu +Fixes: 07757588e507 ("block/mq-deadline: Reserve 25% of scheduler tags for synchronous requests") +Signed-off-by: Bart Van Assche +Reviewed-by: Christoph Hellwig +Link: https://lore.kernel.org/r/20240509170149.7639-3-bvanassche@acm.org +Signed-off-by: Jens Axboe +Signed-off-by: Sasha Levin +--- + block/mq-deadline.c | 20 +++++++++++++++++--- + 1 file changed, 17 insertions(+), 3 deletions(-) + +diff --git a/block/mq-deadline.c b/block/mq-deadline.c +index 02a916ba62ee7..78a8aa204c156 100644 +--- a/block/mq-deadline.c ++++ b/block/mq-deadline.c +@@ -621,6 +621,20 @@ static struct request *dd_dispatch_request(struct blk_mq_hw_ctx *hctx) + return rq; + } + ++/* ++ * 'depth' is a number in the range 1..INT_MAX representing a number of ++ * requests. Scale it with a factor (1 << bt->sb.shift) / q->nr_requests since ++ * 1..(1 << bt->sb.shift) is the range expected by sbitmap_get_shallow(). ++ * Values larger than q->nr_requests have the same effect as q->nr_requests. ++ */ ++static int dd_to_word_depth(struct blk_mq_hw_ctx *hctx, unsigned int qdepth) ++{ ++ struct sbitmap_queue *bt = &hctx->sched_tags->bitmap_tags; ++ const unsigned int nrr = hctx->queue->nr_requests; ++ ++ return ((qdepth << bt->sb.shift) + nrr - 1) / nrr; ++} ++ + /* + * Called by __blk_mq_alloc_request(). The shallow_depth value set by this + * function is used by __blk_mq_get_tag(). +@@ -637,7 +651,7 @@ static void dd_limit_depth(blk_opf_t opf, struct blk_mq_alloc_data *data) + * Throttle asynchronous requests and writes such that these requests + * do not block the allocation of synchronous requests. + */ +- data->shallow_depth = dd->async_depth; ++ data->shallow_depth = dd_to_word_depth(data->hctx, dd->async_depth); + } + + /* Called by blk_mq_update_nr_requests(). */ +@@ -647,9 +661,9 @@ static void dd_depth_updated(struct blk_mq_hw_ctx *hctx) + struct deadline_data *dd = q->elevator->elevator_data; + struct blk_mq_tags *tags = hctx->sched_tags; + +- dd->async_depth = max(1UL, 3 * q->nr_requests / 4); ++ dd->async_depth = q->nr_requests; + +- sbitmap_queue_min_shallow_depth(&tags->bitmap_tags, dd->async_depth); ++ sbitmap_queue_min_shallow_depth(&tags->bitmap_tags, 1); + } + + /* Called by blk_mq_init_hctx() and blk_mq_init_sched(). */ +-- +2.43.0 + diff --git a/queue-6.6/bluetooth-btintel-refactor-btintel_set_ppag.patch b/queue-6.6/bluetooth-btintel-refactor-btintel_set_ppag.patch new file mode 100644 index 00000000000..8d777977cba --- /dev/null +++ b/queue-6.6/bluetooth-btintel-refactor-btintel_set_ppag.patch @@ -0,0 +1,204 @@ +From 3ab63fb41050640aff12a07392fabf7b386c82b7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 16 May 2024 17:54:36 +0530 +Subject: Bluetooth: btintel: Refactor btintel_set_ppag() + +From: Kiran K + +[ Upstream commit 0a3e2eca1daa5627c8ecd1554e3146de82d61dd2 ] + +Current flow iterates the ACPI table associated with Bluetooth +controller looking for PPAG method. Method name can be directly passed +to acpi_evaluate_object function instead of iterating the table. + +Fixes: c585a92b2f9c ("Bluetooth: btintel: Set Per Platform Antenna Gain(PPAG)") +Signed-off-by: Kiran K +Signed-off-by: Luiz Augusto von Dentz +Signed-off-by: Sasha Levin +--- + drivers/bluetooth/btintel.c | 119 +++++++++++------------------------- + 1 file changed, 34 insertions(+), 85 deletions(-) + +diff --git a/drivers/bluetooth/btintel.c b/drivers/bluetooth/btintel.c +index ac1562d9ef26b..3da3c266a66f3 100644 +--- a/drivers/bluetooth/btintel.c ++++ b/drivers/bluetooth/btintel.c +@@ -26,21 +26,11 @@ + #define ECDSA_OFFSET 644 + #define ECDSA_HEADER_LEN 320 + +-#define BTINTEL_PPAG_NAME "PPAG" +- + enum { + DSM_SET_WDISABLE2_DELAY = 1, + DSM_SET_RESET_METHOD = 3, + }; + +-/* structure to store the PPAG data read from ACPI table */ +-struct btintel_ppag { +- u32 domain; +- u32 mode; +- acpi_status status; +- struct hci_dev *hdev; +-}; +- + #define CMD_WRITE_BOOT_PARAMS 0xfc0e + struct cmd_write_boot_params { + __le32 boot_addr; +@@ -1312,65 +1302,6 @@ static int btintel_read_debug_features(struct hci_dev *hdev, + return 0; + } + +-static acpi_status btintel_ppag_callback(acpi_handle handle, u32 lvl, void *data, +- void **ret) +-{ +- acpi_status status; +- size_t len; +- struct btintel_ppag *ppag = data; +- union acpi_object *p, *elements; +- struct acpi_buffer string = {ACPI_ALLOCATE_BUFFER, NULL}; +- struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL}; +- struct hci_dev *hdev = ppag->hdev; +- +- status = acpi_get_name(handle, ACPI_FULL_PATHNAME, &string); +- if (ACPI_FAILURE(status)) { +- bt_dev_warn(hdev, "PPAG-BT: ACPI Failure: %s", acpi_format_exception(status)); +- return status; +- } +- +- len = strlen(string.pointer); +- if (len < strlen(BTINTEL_PPAG_NAME)) { +- kfree(string.pointer); +- return AE_OK; +- } +- +- if (strncmp((char *)string.pointer + len - 4, BTINTEL_PPAG_NAME, 4)) { +- kfree(string.pointer); +- return AE_OK; +- } +- kfree(string.pointer); +- +- status = acpi_evaluate_object(handle, NULL, NULL, &buffer); +- if (ACPI_FAILURE(status)) { +- ppag->status = status; +- bt_dev_warn(hdev, "PPAG-BT: ACPI Failure: %s", acpi_format_exception(status)); +- return status; +- } +- +- p = buffer.pointer; +- ppag = (struct btintel_ppag *)data; +- +- if (p->type != ACPI_TYPE_PACKAGE || p->package.count != 2) { +- kfree(buffer.pointer); +- bt_dev_warn(hdev, "PPAG-BT: Invalid object type: %d or package count: %d", +- p->type, p->package.count); +- ppag->status = AE_ERROR; +- return AE_ERROR; +- } +- +- elements = p->package.elements; +- +- /* PPAG table is located at element[1] */ +- p = &elements[1]; +- +- ppag->domain = (u32)p->package.elements[0].integer.value; +- ppag->mode = (u32)p->package.elements[1].integer.value; +- ppag->status = AE_OK; +- kfree(buffer.pointer); +- return AE_CTRL_TERMINATE; +-} +- + static int btintel_set_debug_features(struct hci_dev *hdev, + const struct intel_debug_features *features) + { +@@ -2399,10 +2330,13 @@ static int btintel_configure_offload(struct hci_dev *hdev) + + static void btintel_set_ppag(struct hci_dev *hdev, struct intel_version_tlv *ver) + { +- struct btintel_ppag ppag; + struct sk_buff *skb; + struct hci_ppag_enable_cmd ppag_cmd; + acpi_handle handle; ++ struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL}; ++ union acpi_object *p, *elements; ++ u32 domain, mode; ++ acpi_status status; + + /* PPAG is not supported if CRF is HrP2, Jfp2, JfP1 */ + switch (ver->cnvr_top & 0xFFF) { +@@ -2420,22 +2354,34 @@ static void btintel_set_ppag(struct hci_dev *hdev, struct intel_version_tlv *ver + return; + } + +- memset(&ppag, 0, sizeof(ppag)); +- +- ppag.hdev = hdev; +- ppag.status = AE_NOT_FOUND; +- acpi_walk_namespace(ACPI_TYPE_PACKAGE, handle, 1, NULL, +- btintel_ppag_callback, &ppag, NULL); +- +- if (ACPI_FAILURE(ppag.status)) { +- if (ppag.status == AE_NOT_FOUND) { ++ status = acpi_evaluate_object(handle, "PPAG", NULL, &buffer); ++ if (ACPI_FAILURE(status)) { ++ if (status == AE_NOT_FOUND) { + bt_dev_dbg(hdev, "PPAG-BT: ACPI entry not found"); + return; + } ++ bt_dev_warn(hdev, "PPAG-BT: ACPI Failure: %s", acpi_format_exception(status)); ++ return; ++ } ++ ++ p = buffer.pointer; ++ if (p->type != ACPI_TYPE_PACKAGE || p->package.count != 2) { ++ bt_dev_warn(hdev, "PPAG-BT: Invalid object type: %d or package count: %d", ++ p->type, p->package.count); ++ kfree(buffer.pointer); + return; + } + +- if (ppag.domain != 0x12) { ++ elements = p->package.elements; ++ ++ /* PPAG table is located at element[1] */ ++ p = &elements[1]; ++ ++ domain = (u32)p->package.elements[0].integer.value; ++ mode = (u32)p->package.elements[1].integer.value; ++ kfree(buffer.pointer); ++ ++ if (domain != 0x12) { + bt_dev_dbg(hdev, "PPAG-BT: Bluetooth domain is disabled in ACPI firmware"); + return; + } +@@ -2446,19 +2392,22 @@ static void btintel_set_ppag(struct hci_dev *hdev, struct intel_version_tlv *ver + * BIT 1 : 0 Disabled in China + * 1 Enabled in China + */ +- if ((ppag.mode & 0x01) != BIT(0) && (ppag.mode & 0x02) != BIT(1)) { +- bt_dev_dbg(hdev, "PPAG-BT: EU, China mode are disabled in CB/BIOS"); ++ mode &= 0x03; ++ ++ if (!mode) { ++ bt_dev_dbg(hdev, "PPAG-BT: EU, China mode are disabled in BIOS"); + return; + } + +- ppag_cmd.ppag_enable_flags = cpu_to_le32(ppag.mode); ++ ppag_cmd.ppag_enable_flags = cpu_to_le32(mode); + +- skb = __hci_cmd_sync(hdev, INTEL_OP_PPAG_CMD, sizeof(ppag_cmd), &ppag_cmd, HCI_CMD_TIMEOUT); ++ skb = __hci_cmd_sync(hdev, INTEL_OP_PPAG_CMD, sizeof(ppag_cmd), ++ &ppag_cmd, HCI_CMD_TIMEOUT); + if (IS_ERR(skb)) { + bt_dev_warn(hdev, "Failed to send PPAG Enable (%ld)", PTR_ERR(skb)); + return; + } +- bt_dev_info(hdev, "PPAG-BT: Enabled (Mode %d)", ppag.mode); ++ bt_dev_info(hdev, "PPAG-BT: Enabled (Mode %d)", mode); + kfree_skb(skb); + } + +-- +2.43.0 + diff --git a/queue-6.6/bluetooth-btnxpuart-add-handling-for-boot-signature-.patch b/queue-6.6/bluetooth-btnxpuart-add-handling-for-boot-signature-.patch new file mode 100644 index 00000000000..4478be49297 --- /dev/null +++ b/queue-6.6/bluetooth-btnxpuart-add-handling-for-boot-signature-.patch @@ -0,0 +1,137 @@ +From 5824ddd43048c5fa29ee580b913b1009fd609db0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 14 Jun 2024 13:53:38 +0530 +Subject: Bluetooth: btnxpuart: Add handling for boot-signature timeout errors + +From: Neeraj Sanjay Kale + +[ Upstream commit 27489364299a2ddb5c54cd9f29a3f41bd8d151ab ] + +This handles the timeout error codes sent by the chip as part of the +bootloader signatures during firmware download process. + +When the bootloader does not receive a response packet from the host +within a specific time, it adds an error code to the bootloader +signature while requesting for the FW chunk from the same offset. + +The host is expected to clear this error code with a NAK, and reply to +only those bootloader signatures which have error code 0. + +However, the driver was ignoring this error code and replying with the +firmware chunks instead, which is apparently ignored by the chip and the +chip resends the same bootloader signature with the error code again. This +happens in a loop until the error code self clears and firmware download +proceeds ahead, adding a couple of milliseconds to the total firmware +download time. + +Commit 689ca16e5232 was an initial implementation which simply printed +the following line during driver debug: +- FW Download received err 0x04 from chip + +This commit adds the expected handling to the error codes. + +This error handling is valid for data_req bootloader signatures for V3 +and future bootloader versions. + +Signed-off-by: Neeraj Sanjay Kale +Fixes: 689ca16e5232 ("Bluetooth: NXP: Add protocol support for NXP Bluetooth chipsets") +Signed-off-by: Luiz Augusto von Dentz +Signed-off-by: Sasha Levin +--- + drivers/bluetooth/btnxpuart.c | 52 ++++++++++++++++++++++++++++++++--- + 1 file changed, 48 insertions(+), 4 deletions(-) + +diff --git a/drivers/bluetooth/btnxpuart.c b/drivers/bluetooth/btnxpuart.c +index 5c5a5b752419e..83e8e27a5ecec 100644 +--- a/drivers/bluetooth/btnxpuart.c ++++ b/drivers/bluetooth/btnxpuart.c +@@ -186,6 +186,11 @@ struct btnxpuart_dev { + #define NXP_NAK_V3 0x7b + #define NXP_CRC_ERROR_V3 0x7c + ++/* Bootloader signature error codes */ ++#define NXP_ACK_RX_TIMEOUT 0x0002 /* ACK not received from host */ ++#define NXP_HDR_RX_TIMEOUT 0x0003 /* FW Header chunk not received */ ++#define NXP_DATA_RX_TIMEOUT 0x0004 /* FW Data chunk not received */ ++ + #define HDR_LEN 16 + + #define NXP_RECV_CHIP_VER_V1 \ +@@ -276,6 +281,17 @@ struct nxp_bootloader_cmd { + __be32 crc; + } __packed; + ++struct nxp_v3_rx_timeout_nak { ++ u8 nak; ++ __le32 offset; ++ u8 crc; ++} __packed; ++ ++union nxp_v3_rx_timeout_nak_u { ++ struct nxp_v3_rx_timeout_nak pkt; ++ u8 buf[6]; ++}; ++ + static u8 crc8_table[CRC8_TABLE_SIZE]; + + /* Default configurations */ +@@ -883,6 +899,32 @@ static int nxp_recv_chip_ver_v3(struct hci_dev *hdev, struct sk_buff *skb) + return 0; + } + ++static void nxp_handle_fw_download_error(struct hci_dev *hdev, struct v3_data_req *req) ++{ ++ struct btnxpuart_dev *nxpdev = hci_get_drvdata(hdev); ++ __u32 offset = __le32_to_cpu(req->offset); ++ __u16 err = __le16_to_cpu(req->error); ++ union nxp_v3_rx_timeout_nak_u nak_tx_buf; ++ ++ switch (err) { ++ case NXP_ACK_RX_TIMEOUT: ++ case NXP_HDR_RX_TIMEOUT: ++ case NXP_DATA_RX_TIMEOUT: ++ nak_tx_buf.pkt.nak = NXP_NAK_V3; ++ nak_tx_buf.pkt.offset = __cpu_to_le32(offset); ++ nak_tx_buf.pkt.crc = crc8(crc8_table, nak_tx_buf.buf, ++ sizeof(nak_tx_buf) - 1, 0xff); ++ serdev_device_write_buf(nxpdev->serdev, nak_tx_buf.buf, ++ sizeof(nak_tx_buf)); ++ break; ++ default: ++ bt_dev_dbg(hdev, "Unknown bootloader error code: %d", err); ++ break; ++ ++ } ++ ++} ++ + static int nxp_recv_fw_req_v3(struct hci_dev *hdev, struct sk_buff *skb) + { + struct btnxpuart_dev *nxpdev = hci_get_drvdata(hdev); +@@ -897,7 +939,12 @@ static int nxp_recv_fw_req_v3(struct hci_dev *hdev, struct sk_buff *skb) + if (!req || !nxpdev->fw) + goto free_skb; + +- nxp_send_ack(NXP_ACK_V3, hdev); ++ if (!req->error) { ++ nxp_send_ack(NXP_ACK_V3, hdev); ++ } else { ++ nxp_handle_fw_download_error(hdev, req); ++ goto free_skb; ++ } + + len = __le16_to_cpu(req->len); + +@@ -924,9 +971,6 @@ static int nxp_recv_fw_req_v3(struct hci_dev *hdev, struct sk_buff *skb) + wake_up_interruptible(&nxpdev->fw_dnld_done_wait_q); + goto free_skb; + } +- if (req->error) +- bt_dev_dbg(hdev, "FW Download received err 0x%02x from chip", +- req->error); + + offset = __le32_to_cpu(req->offset); + if (offset < nxpdev->fw_v3_offset_correction) { +-- +2.43.0 + diff --git a/queue-6.6/bluetooth-hci_bcm4377-use-correct-unit-for-timeouts.patch b/queue-6.6/bluetooth-hci_bcm4377-use-correct-unit-for-timeouts.patch new file mode 100644 index 00000000000..29d2bc4ef8d --- /dev/null +++ b/queue-6.6/bluetooth-hci_bcm4377-use-correct-unit-for-timeouts.patch @@ -0,0 +1,36 @@ +From 6591ecbfe2c7b29e8e56dd34f3696eca4cf683a6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 15 May 2024 18:15:02 +0000 +Subject: Bluetooth: hci_bcm4377: Use correct unit for timeouts + +From: Sven Peter + +[ Upstream commit 56c695a823e4ee1e5294a8340d5afe5de73828ec ] + +BCM4377_TIMEOUT is always used to wait for completitions and their API +expects a timeout in jiffies instead of msecs. + +Fixes: 8a06127602de ("Bluetooth: hci_bcm4377: Add new driver for BCM4377 PCIe boards") +Signed-off-by: Sven Peter +Signed-off-by: Luiz Augusto von Dentz +Signed-off-by: Sasha Levin +--- + drivers/bluetooth/hci_bcm4377.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/bluetooth/hci_bcm4377.c b/drivers/bluetooth/hci_bcm4377.c +index cf36cdac652d6..0dc3ca3d41073 100644 +--- a/drivers/bluetooth/hci_bcm4377.c ++++ b/drivers/bluetooth/hci_bcm4377.c +@@ -32,7 +32,7 @@ enum bcm4377_chip { + #define BCM4378_DEVICE_ID 0x5f69 + #define BCM4387_DEVICE_ID 0x5f71 + +-#define BCM4377_TIMEOUT 1000 ++#define BCM4377_TIMEOUT msecs_to_jiffies(1000) + + /* + * These devices only support DMA transactions inside a 32bit window +-- +2.43.0 + diff --git a/queue-6.6/bna-adjust-name-buf-size-of-bna_tcb-and-bna_ccb-stru.patch b/queue-6.6/bna-adjust-name-buf-size-of-bna_tcb-and-bna_ccb-stru.patch new file mode 100644 index 00000000000..ca0a73bc831 --- /dev/null +++ b/queue-6.6/bna-adjust-name-buf-size-of-bna_tcb-and-bna_ccb-stru.patch @@ -0,0 +1,77 @@ +From 7e2b44677716474067a5f4ef4e27397e040453bf Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 8 Jul 2024 10:50:08 +0000 +Subject: bna: adjust 'name' buf size of bna_tcb and bna_ccb structures + +From: Alexey Kodanev + +[ Upstream commit c9741a03dc8e491e57b95fba0058ab46b7e506da ] + +To have enough space to write all possible sprintf() args. Currently +'name' size is 16, but the first '%s' specifier may already need at +least 16 characters, since 'bnad->netdev->name' is used there. + +For '%d' specifiers, assume that they require: + * 1 char for 'tx_id + tx_info->tcb[i]->id' sum, BNAD_MAX_TXQ_PER_TX is 8 + * 2 chars for 'rx_id + rx_info->rx_ctrl[i].ccb->id', BNAD_MAX_RXP_PER_RX + is 16 + +And replace sprintf with snprintf. + +Detected using the static analysis tool - Svace. + +Fixes: 8b230ed8ec96 ("bna: Brocade 10Gb Ethernet device driver") +Signed-off-by: Alexey Kodanev +Reviewed-by: Simon Horman +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/brocade/bna/bna_types.h | 2 +- + drivers/net/ethernet/brocade/bna/bnad.c | 11 ++++++----- + 2 files changed, 7 insertions(+), 6 deletions(-) + +diff --git a/drivers/net/ethernet/brocade/bna/bna_types.h b/drivers/net/ethernet/brocade/bna/bna_types.h +index a5ebd7110e073..986f43d277119 100644 +--- a/drivers/net/ethernet/brocade/bna/bna_types.h ++++ b/drivers/net/ethernet/brocade/bna/bna_types.h +@@ -416,7 +416,7 @@ struct bna_ib { + /* Tx object */ + + /* Tx datapath control structure */ +-#define BNA_Q_NAME_SIZE 16 ++#define BNA_Q_NAME_SIZE (IFNAMSIZ + 6) + struct bna_tcb { + /* Fast path */ + void **sw_qpt; +diff --git a/drivers/net/ethernet/brocade/bna/bnad.c b/drivers/net/ethernet/brocade/bna/bnad.c +index 31191b520b587..6cf06a93bedfb 100644 +--- a/drivers/net/ethernet/brocade/bna/bnad.c ++++ b/drivers/net/ethernet/brocade/bna/bnad.c +@@ -1534,8 +1534,9 @@ bnad_tx_msix_register(struct bnad *bnad, struct bnad_tx_info *tx_info, + + for (i = 0; i < num_txqs; i++) { + vector_num = tx_info->tcb[i]->intr_vector; +- sprintf(tx_info->tcb[i]->name, "%s TXQ %d", bnad->netdev->name, +- tx_id + tx_info->tcb[i]->id); ++ snprintf(tx_info->tcb[i]->name, BNA_Q_NAME_SIZE, "%s TXQ %d", ++ bnad->netdev->name, ++ tx_id + tx_info->tcb[i]->id); + err = request_irq(bnad->msix_table[vector_num].vector, + (irq_handler_t)bnad_msix_tx, 0, + tx_info->tcb[i]->name, +@@ -1585,9 +1586,9 @@ bnad_rx_msix_register(struct bnad *bnad, struct bnad_rx_info *rx_info, + + for (i = 0; i < num_rxps; i++) { + vector_num = rx_info->rx_ctrl[i].ccb->intr_vector; +- sprintf(rx_info->rx_ctrl[i].ccb->name, "%s CQ %d", +- bnad->netdev->name, +- rx_id + rx_info->rx_ctrl[i].ccb->id); ++ snprintf(rx_info->rx_ctrl[i].ccb->name, BNA_Q_NAME_SIZE, ++ "%s CQ %d", bnad->netdev->name, ++ rx_id + rx_info->rx_ctrl[i].ccb->id); + err = request_irq(bnad->msix_table[vector_num].vector, + (irq_handler_t)bnad_msix_rx, 0, + rx_info->rx_ctrl[i].ccb->name, +-- +2.43.0 + diff --git a/queue-6.6/bnxt_re-fix-imm_data-endianness.patch b/queue-6.6/bnxt_re-fix-imm_data-endianness.patch new file mode 100644 index 00000000000..a6abbe96f2d --- /dev/null +++ b/queue-6.6/bnxt_re-fix-imm_data-endianness.patch @@ -0,0 +1,105 @@ +From 1bf6789525d1ea7001ccfb96ef1c7139c683b529 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 10 Jul 2024 14:21:02 +0200 +Subject: bnxt_re: Fix imm_data endianness + +From: Jack Wang + +[ Upstream commit 95b087f87b780daafad1dbb2c84e81b729d5d33f ] + +When map a device between servers with MLX and BCM RoCE nics, RTRS +server complain about unknown imm type, and can't map the device, + +After more debug, it seems bnxt_re wrongly handle the +imm_data, this patch fixed the compat issue with MLX for us. + +In off list discussion, Selvin confirmed HW is working in little endian format +and all data needs to be converted to LE while providing. + +This patch fix the endianness for imm_data + +Fixes: 1ac5a4047975 ("RDMA/bnxt_re: Add bnxt_re RoCE driver") +Signed-off-by: Jack Wang +Link: https://lore.kernel.org/r/20240710122102.37569-1-jinpu.wang@ionos.com +Acked-by: Selvin Xavier +Signed-off-by: Leon Romanovsky +Signed-off-by: Sasha Levin +--- + drivers/infiniband/hw/bnxt_re/ib_verbs.c | 8 ++++---- + drivers/infiniband/hw/bnxt_re/qplib_fp.h | 6 +++--- + 2 files changed, 7 insertions(+), 7 deletions(-) + +diff --git a/drivers/infiniband/hw/bnxt_re/ib_verbs.c b/drivers/infiniband/hw/bnxt_re/ib_verbs.c +index fd69be982ce06..b4d3e7dfc939f 100644 +--- a/drivers/infiniband/hw/bnxt_re/ib_verbs.c ++++ b/drivers/infiniband/hw/bnxt_re/ib_verbs.c +@@ -2467,7 +2467,7 @@ static int bnxt_re_build_send_wqe(struct bnxt_re_qp *qp, + break; + case IB_WR_SEND_WITH_IMM: + wqe->type = BNXT_QPLIB_SWQE_TYPE_SEND_WITH_IMM; +- wqe->send.imm_data = wr->ex.imm_data; ++ wqe->send.imm_data = be32_to_cpu(wr->ex.imm_data); + break; + case IB_WR_SEND_WITH_INV: + wqe->type = BNXT_QPLIB_SWQE_TYPE_SEND_WITH_INV; +@@ -2497,7 +2497,7 @@ static int bnxt_re_build_rdma_wqe(const struct ib_send_wr *wr, + break; + case IB_WR_RDMA_WRITE_WITH_IMM: + wqe->type = BNXT_QPLIB_SWQE_TYPE_RDMA_WRITE_WITH_IMM; +- wqe->rdma.imm_data = wr->ex.imm_data; ++ wqe->rdma.imm_data = be32_to_cpu(wr->ex.imm_data); + break; + case IB_WR_RDMA_READ: + wqe->type = BNXT_QPLIB_SWQE_TYPE_RDMA_READ; +@@ -3545,7 +3545,7 @@ static void bnxt_re_process_res_shadow_qp_wc(struct bnxt_re_qp *gsi_sqp, + wc->byte_len = orig_cqe->length; + wc->qp = &gsi_qp->ib_qp; + +- wc->ex.imm_data = orig_cqe->immdata; ++ wc->ex.imm_data = cpu_to_be32(le32_to_cpu(orig_cqe->immdata)); + wc->src_qp = orig_cqe->src_qp; + memcpy(wc->smac, orig_cqe->smac, ETH_ALEN); + if (bnxt_re_is_vlan_pkt(orig_cqe, &vlan_id, &sl)) { +@@ -3690,7 +3690,7 @@ int bnxt_re_poll_cq(struct ib_cq *ib_cq, int num_entries, struct ib_wc *wc) + (unsigned long)(cqe->qp_handle), + struct bnxt_re_qp, qplib_qp); + wc->qp = &qp->ib_qp; +- wc->ex.imm_data = cqe->immdata; ++ wc->ex.imm_data = cpu_to_be32(le32_to_cpu(cqe->immdata)); + wc->src_qp = cqe->src_qp; + memcpy(wc->smac, cqe->smac, ETH_ALEN); + wc->port_num = 1; +diff --git a/drivers/infiniband/hw/bnxt_re/qplib_fp.h b/drivers/infiniband/hw/bnxt_re/qplib_fp.h +index 113be429f0aac..a6f38d8f12efe 100644 +--- a/drivers/infiniband/hw/bnxt_re/qplib_fp.h ++++ b/drivers/infiniband/hw/bnxt_re/qplib_fp.h +@@ -164,7 +164,7 @@ struct bnxt_qplib_swqe { + /* Send, with imm, inval key */ + struct { + union { +- __be32 imm_data; ++ u32 imm_data; + u32 inv_key; + }; + u32 q_key; +@@ -182,7 +182,7 @@ struct bnxt_qplib_swqe { + /* RDMA write, with imm, read */ + struct { + union { +- __be32 imm_data; ++ u32 imm_data; + u32 inv_key; + }; + u64 remote_va; +@@ -389,7 +389,7 @@ struct bnxt_qplib_cqe { + u16 cfa_meta; + u64 wr_id; + union { +- __be32 immdata; ++ __le32 immdata; + u32 invrkey; + }; + u64 qp_handle; +-- +2.43.0 + diff --git a/queue-6.6/bpf-annotate-btf-show-functions-with-__printf.patch b/queue-6.6/bpf-annotate-btf-show-functions-with-__printf.patch new file mode 100644 index 00000000000..21f454478b6 --- /dev/null +++ b/queue-6.6/bpf-annotate-btf-show-functions-with-__printf.patch @@ -0,0 +1,56 @@ +From 1684f30f8bfa45184e2afab4a7ba0a522eabafdb Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 11 Jul 2024 19:23:21 +0100 +Subject: bpf: annotate BTF show functions with __printf + +From: Alan Maguire + +[ Upstream commit b3470da314fd8018ee237e382000c4154a942420 ] + +-Werror=suggest-attribute=format warns about two functions +in kernel/bpf/btf.c [1]; add __printf() annotations to silence +these warnings since for CONFIG_WERROR=y they will trigger +build failures. + +[1] https://lore.kernel.org/bpf/a8b20c72-6631-4404-9e1f-0410642d7d20@gmail.com/ + +Fixes: 31d0bc81637d ("bpf: Move to generic BTF show support, apply it to seq files/strings") +Reported-by: Mirsad Todorovac +Signed-off-by: Alan Maguire +Tested-by: Mirsad Todorovac +Link: https://lore.kernel.org/r/20240711182321.963667-1-alan.maguire@oracle.com +Signed-off-by: Alexei Starovoitov +Signed-off-by: Sasha Levin +--- + kernel/bpf/btf.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/kernel/bpf/btf.c b/kernel/bpf/btf.c +index a31704a6bb614..896ac05bf1bd1 100644 +--- a/kernel/bpf/btf.c ++++ b/kernel/bpf/btf.c +@@ -7070,8 +7070,8 @@ static void btf_type_show(const struct btf *btf, u32 type_id, void *obj, + btf_type_ops(t)->show(btf, t, type_id, obj, 0, show); + } + +-static void btf_seq_show(struct btf_show *show, const char *fmt, +- va_list args) ++__printf(2, 0) static void btf_seq_show(struct btf_show *show, const char *fmt, ++ va_list args) + { + seq_vprintf((struct seq_file *)show->target, fmt, args); + } +@@ -7104,8 +7104,8 @@ struct btf_show_snprintf { + int len; /* length we would have written */ + }; + +-static void btf_snprintf_show(struct btf_show *show, const char *fmt, +- va_list args) ++__printf(2, 0) static void btf_snprintf_show(struct btf_show *show, const char *fmt, ++ va_list args) + { + struct btf_show_snprintf *ssnprintf = (struct btf_show_snprintf *)show; + int len; +-- +2.43.0 + diff --git a/queue-6.6/bpf-eliminate-remaining-make-w-1-warnings-in-kernel-.patch b/queue-6.6/bpf-eliminate-remaining-make-w-1-warnings-in-kernel-.patch new file mode 100644 index 00000000000..95b3ab6bed0 --- /dev/null +++ b/queue-6.6/bpf-eliminate-remaining-make-w-1-warnings-in-kernel-.patch @@ -0,0 +1,60 @@ +From 38ac0cace1a4150ef606d2bb5125ebfdb21a2146 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 12 Jul 2024 10:28:59 +0100 +Subject: bpf: Eliminate remaining "make W=1" warnings in kernel/bpf/btf.o +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Alan Maguire + +[ Upstream commit 2454075f8e2915cebbe52a1195631bc7efe2b7e1 ] + +As reported by Mirsad [1] we still see format warnings in kernel/bpf/btf.o +at W=1 warning level: + + CC kernel/bpf/btf.o +./kernel/bpf/btf.c: In function ‘btf_type_seq_show_flags’: +./kernel/bpf/btf.c:7553:21: warning: assignment left-hand side might be a candidate for a format attribute [-Wsuggest-attribute=format] + 7553 | sseq.showfn = btf_seq_show; + | ^ +./kernel/bpf/btf.c: In function ‘btf_type_snprintf_show’: +./kernel/bpf/btf.c:7604:31: warning: assignment left-hand side might be a candidate for a format attribute [-Wsuggest-attribute=format] + 7604 | ssnprintf.show.showfn = btf_snprintf_show; + | ^ + +Combined with CONFIG_WERROR=y these can halt the build. + +The fix (annotating the structure field with __printf()) +suggested by Mirsad resolves these. Apologies I missed this last time. +No other W=1 warnings were observed in kernel/bpf after this fix. + +[1] https://lore.kernel.org/bpf/92c9d047-f058-400c-9c7d-81d4dc1ef71b@gmail.com/ + +Fixes: b3470da314fd ("bpf: annotate BTF show functions with __printf") +Reported-by: Mirsad Todorovac +Suggested-by: Mirsad Todorovac +Signed-off-by: Alan Maguire +Signed-off-by: Daniel Borkmann +Link: https://lore.kernel.org/bpf/20240712092859.1390960-1-alan.maguire@oracle.com +Signed-off-by: Sasha Levin +--- + kernel/bpf/btf.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/kernel/bpf/btf.c b/kernel/bpf/btf.c +index 896ac05bf1bd1..fbf9721ba21b6 100644 +--- a/kernel/bpf/btf.c ++++ b/kernel/bpf/btf.c +@@ -405,7 +405,7 @@ const char *btf_type_str(const struct btf_type *t) + struct btf_show { + u64 flags; + void *target; /* target of show operation (seq file, buffer) */ +- void (*showfn)(struct btf_show *show, const char *fmt, va_list args); ++ __printf(2, 0) void (*showfn)(struct btf_show *show, const char *fmt, va_list args); + const struct btf *btf; + /* below are used during iteration */ + struct { +-- +2.43.0 + diff --git a/queue-6.6/bpf-fix-null-pointer-dereference-in-resolve_prog_typ.patch b/queue-6.6/bpf-fix-null-pointer-dereference-in-resolve_prog_typ.patch new file mode 100644 index 00000000000..66e82022ca1 --- /dev/null +++ b/queue-6.6/bpf-fix-null-pointer-dereference-in-resolve_prog_typ.patch @@ -0,0 +1,110 @@ +From 91f9c0368698dfed5e4f52c9463968d492db42c2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 11 Jul 2024 22:58:18 +0800 +Subject: bpf: Fix null pointer dereference in resolve_prog_type() for + BPF_PROG_TYPE_EXT + +From: Tengda Wu + +[ Upstream commit f7866c35873377313ff94398f17d425b28b71de1 ] + +When loading a EXT program without specifying `attr->attach_prog_fd`, +the `prog->aux->dst_prog` will be null. At this time, calling +resolve_prog_type() anywhere will result in a null pointer dereference. + +Example stack trace: + +[ 8.107863] Unable to handle kernel NULL pointer dereference at virtual address 0000000000000004 +[ 8.108262] Mem abort info: +[ 8.108384] ESR = 0x0000000096000004 +[ 8.108547] EC = 0x25: DABT (current EL), IL = 32 bits +[ 8.108722] SET = 0, FnV = 0 +[ 8.108827] EA = 0, S1PTW = 0 +[ 8.108939] FSC = 0x04: level 0 translation fault +[ 8.109102] Data abort info: +[ 8.109203] ISV = 0, ISS = 0x00000004, ISS2 = 0x00000000 +[ 8.109399] CM = 0, WnR = 0, TnD = 0, TagAccess = 0 +[ 8.109614] GCS = 0, Overlay = 0, DirtyBit = 0, Xs = 0 +[ 8.109836] user pgtable: 4k pages, 48-bit VAs, pgdp=0000000101354000 +[ 8.110011] [0000000000000004] pgd=0000000000000000, p4d=0000000000000000 +[ 8.112624] Internal error: Oops: 0000000096000004 [#1] PREEMPT SMP +[ 8.112783] Modules linked in: +[ 8.113120] CPU: 0 PID: 99 Comm: may_access_dire Not tainted 6.10.0-rc3-next-20240613-dirty #1 +[ 8.113230] Hardware name: linux,dummy-virt (DT) +[ 8.113390] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--) +[ 8.113429] pc : may_access_direct_pkt_data+0x24/0xa0 +[ 8.113746] lr : add_subprog_and_kfunc+0x634/0x8e8 +[ 8.113798] sp : ffff80008283b9f0 +[ 8.113813] x29: ffff80008283b9f0 x28: ffff800082795048 x27: 0000000000000001 +[ 8.113881] x26: ffff0000c0bb2600 x25: 0000000000000000 x24: 0000000000000000 +[ 8.113897] x23: ffff0000c1134000 x22: 000000000001864f x21: ffff0000c1138000 +[ 8.113912] x20: 0000000000000001 x19: ffff0000c12b8000 x18: ffffffffffffffff +[ 8.113929] x17: 0000000000000000 x16: 0000000000000000 x15: 0720072007200720 +[ 8.113944] x14: 0720072007200720 x13: 0720072007200720 x12: 0720072007200720 +[ 8.113958] x11: 0720072007200720 x10: 0000000000f9fca4 x9 : ffff80008021f4e4 +[ 8.113991] x8 : 0101010101010101 x7 : 746f72705f6d656d x6 : 000000001e0e0f5f +[ 8.114006] x5 : 000000000001864f x4 : ffff0000c12b8000 x3 : 000000000000001c +[ 8.114020] x2 : 0000000000000002 x1 : 0000000000000000 x0 : 0000000000000000 +[ 8.114126] Call trace: +[ 8.114159] may_access_direct_pkt_data+0x24/0xa0 +[ 8.114202] bpf_check+0x3bc/0x28c0 +[ 8.114214] bpf_prog_load+0x658/0xa58 +[ 8.114227] __sys_bpf+0xc50/0x2250 +[ 8.114240] __arm64_sys_bpf+0x28/0x40 +[ 8.114254] invoke_syscall.constprop.0+0x54/0xf0 +[ 8.114273] do_el0_svc+0x4c/0xd8 +[ 8.114289] el0_svc+0x3c/0x140 +[ 8.114305] el0t_64_sync_handler+0x134/0x150 +[ 8.114331] el0t_64_sync+0x168/0x170 +[ 8.114477] Code: 7100707f 54000081 f9401c00 f9403800 (b9400403) +[ 8.118672] ---[ end trace 0000000000000000 ]--- + +One way to fix it is by forcing `attach_prog_fd` non-empty when +bpf_prog_load(). But this will lead to `libbpf_probe_bpf_prog_type` +API broken which use verifier log to probe prog type and will log +nothing if we reject invalid EXT prog before bpf_check(). + +Another way is by adding null check in resolve_prog_type(). + +The issue was introduced by commit 4a9c7bbe2ed4 ("bpf: Resolve to +prog->aux->dst_prog->type only for BPF_PROG_TYPE_EXT") which wanted +to correct type resolution for BPF_PROG_TYPE_TRACING programs. Before +that, the type resolution of BPF_PROG_TYPE_EXT prog actually follows +the logic below: + + prog->aux->dst_prog ? prog->aux->dst_prog->type : prog->type; + +It implies that when EXT program is not yet attached to `dst_prog`, +the prog type should be EXT itself. This code worked fine in the past. +So just keep using it. + +Fix this by returning `prog->type` for BPF_PROG_TYPE_EXT if `dst_prog` +is not present in resolve_prog_type(). + +Fixes: 4a9c7bbe2ed4 ("bpf: Resolve to prog->aux->dst_prog->type only for BPF_PROG_TYPE_EXT") +Signed-off-by: Tengda Wu +Signed-off-by: Daniel Borkmann +Acked-by: Daniel Borkmann +Cc: Martin KaFai Lau +Link: https://lore.kernel.org/bpf/20240711145819.254178-2-wutengda@huaweicloud.com +Signed-off-by: Sasha Levin +--- + include/linux/bpf_verifier.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/include/linux/bpf_verifier.h b/include/linux/bpf_verifier.h +index 2d84d820a7ba2..b62535fd8de5f 100644 +--- a/include/linux/bpf_verifier.h ++++ b/include/linux/bpf_verifier.h +@@ -760,7 +760,7 @@ static inline u32 type_flag(u32 type) + /* only use after check_attach_btf_id() */ + static inline enum bpf_prog_type resolve_prog_type(const struct bpf_prog *prog) + { +- return prog->type == BPF_PROG_TYPE_EXT ? ++ return (prog->type == BPF_PROG_TYPE_EXT && prog->aux->dst_prog) ? + prog->aux->dst_prog->type : prog->type; + } + +-- +2.43.0 + diff --git a/queue-6.6/bpftool-mount-bpffs-when-pinmaps-path-not-under-the-.patch b/queue-6.6/bpftool-mount-bpffs-when-pinmaps-path-not-under-the-.patch new file mode 100644 index 00000000000..10a5efe2efd --- /dev/null +++ b/queue-6.6/bpftool-mount-bpffs-when-pinmaps-path-not-under-the-.patch @@ -0,0 +1,46 @@ +From dbad3dbe9b38f49bac7e6752a8bc763d921c5072 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 2 Jul 2024 21:11:50 +0800 +Subject: bpftool: Mount bpffs when pinmaps path not under the bpffs + +From: Tao Chen + +[ Upstream commit da5f8fd1f0d393d5eaaba9ad8c22d1c26bb2bf9b ] + +As Quentin said [0], BPF map pinning will fail if the pinmaps path is not +under the bpffs, like: + + libbpf: specified path /home/ubuntu/test/sock_ops_map is not on BPF FS + Error: failed to pin all maps + + [0] https://github.com/libbpf/bpftool/issues/146 + +Fixes: 3767a94b3253 ("bpftool: add pinmaps argument to the load/loadall") +Signed-off-by: Tao Chen +Signed-off-by: Daniel Borkmann +Tested-by: Quentin Monnet +Reviewed-by: Quentin Monnet +Link: https://lore.kernel.org/bpf/20240702131150.15622-1-chen.dylane@gmail.com +Signed-off-by: Sasha Levin +--- + tools/bpf/bpftool/prog.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/tools/bpf/bpftool/prog.c b/tools/bpf/bpftool/prog.c +index 086b93939ce93..e5e0fe3854a35 100644 +--- a/tools/bpf/bpftool/prog.c ++++ b/tools/bpf/bpftool/prog.c +@@ -1809,6 +1809,10 @@ static int load_with_options(int argc, char **argv, bool first_prog_only) + } + + if (pinmaps) { ++ err = create_and_mount_bpffs_dir(pinmaps); ++ if (err) ++ goto err_unpin; ++ + err = bpf_object__pin_maps(obj, pinmaps); + if (err) { + p_err("failed to pin all maps"); +-- +2.43.0 + diff --git a/queue-6.6/bpftool-un-const-bpf_func_info-to-fix-it-for-llvm-17.patch b/queue-6.6/bpftool-un-const-bpf_func_info-to-fix-it-for-llvm-17.patch new file mode 100644 index 00000000000..b4a4515369c --- /dev/null +++ b/queue-6.6/bpftool-un-const-bpf_func_info-to-fix-it-for-llvm-17.patch @@ -0,0 +1,58 @@ +From a3006e9f2453ef1ab21baf061039fad70092e9ea Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 20 May 2024 15:51:49 -0700 +Subject: bpftool: Un-const bpf_func_info to fix it for llvm 17 and newer + +From: Ivan Babrou + +[ Upstream commit f4aba3471cfb9ccf69b476463f19b4c50fef6b14 ] + +LLVM 17 started treating const structs as constants: + +* https://github.com/llvm/llvm-project/commit/0b2d5b967d98 + +Combined with pointer laundering via ptr_to_u64, which takes a const ptr, +but in reality treats the underlying memory as mutable, this makes clang +always pass zero to btf__type_by_id, which breaks full name resolution. + +Disassembly before (LLVM 16) and after (LLVM 17): + + - 8b 75 cc mov -0x34(%rbp),%esi + - e8 47 8d 02 00 call 3f5b0 + + 31 f6 xor %esi,%esi + + e8 a9 8c 02 00 call 3f510 + +It's a bigger project to fix this properly (and a question whether LLVM +itself should detect this), but for right now let's just fix bpftool. + +For more information, see this thread in bpf mailing list: + +* https://lore.kernel.org/bpf/CABWYdi0ymezpYsQsPv7qzpx2fWuTkoD1-wG1eT-9x-TSREFrQg@mail.gmail.com/T/ + +Fixes: b662000aff84 ("bpftool: Adding support for BTF program names") +Signed-off-by: Ivan Babrou +Signed-off-by: Andrii Nakryiko +Acked-by: Nick Desaulniers +Acked-by: Yonghong Song +Link: https://lore.kernel.org/bpf/20240520225149.5517-1-ivan@cloudflare.com +Signed-off-by: Sasha Levin +--- + tools/bpf/bpftool/common.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/tools/bpf/bpftool/common.c b/tools/bpf/bpftool/common.c +index 958e92acca8e2..9b75639434b81 100644 +--- a/tools/bpf/bpftool/common.c ++++ b/tools/bpf/bpftool/common.c +@@ -410,7 +410,7 @@ void get_prog_full_name(const struct bpf_prog_info *prog_info, int prog_fd, + { + const char *prog_name = prog_info->name; + const struct btf_type *func_type; +- const struct bpf_func_info finfo = {}; ++ struct bpf_func_info finfo = {}; + struct bpf_prog_info info = {}; + __u32 info_len = sizeof(info); + struct btf *prog_btf = NULL; +-- +2.43.0 + diff --git a/queue-6.6/cgroup-cpuset-prevent-uaf-in-proc_cpuset_show.patch b/queue-6.6/cgroup-cpuset-prevent-uaf-in-proc_cpuset_show.patch new file mode 100644 index 00000000000..b71c19cf942 --- /dev/null +++ b/queue-6.6/cgroup-cpuset-prevent-uaf-in-proc_cpuset_show.patch @@ -0,0 +1,96 @@ +From eb7ac72a1e311cde83b363380c9501ff4091b714 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 28 Jun 2024 01:36:04 +0000 +Subject: cgroup/cpuset: Prevent UAF in proc_cpuset_show() + +From: Chen Ridong + +[ Upstream commit 1be59c97c83ccd67a519d8a49486b3a8a73ca28a ] + +An UAF can happen when /proc/cpuset is read as reported in [1]. + +This can be reproduced by the following methods: +1.add an mdelay(1000) before acquiring the cgroup_lock In the + cgroup_path_ns function. +2.$cat /proc//cpuset repeatly. +3.$mount -t cgroup -o cpuset cpuset /sys/fs/cgroup/cpuset/ +$umount /sys/fs/cgroup/cpuset/ repeatly. + +The race that cause this bug can be shown as below: + +(umount) | (cat /proc//cpuset) +css_release | proc_cpuset_show +css_release_work_fn | css = task_get_css(tsk, cpuset_cgrp_id); +css_free_rwork_fn | cgroup_path_ns(css->cgroup, ...); +cgroup_destroy_root | mutex_lock(&cgroup_mutex); +rebind_subsystems | +cgroup_free_root | + | // cgrp was freed, UAF + | cgroup_path_ns_locked(cgrp,..); + +When the cpuset is initialized, the root node top_cpuset.css.cgrp +will point to &cgrp_dfl_root.cgrp. In cgroup v1, the mount operation will +allocate cgroup_root, and top_cpuset.css.cgrp will point to the allocated +&cgroup_root.cgrp. When the umount operation is executed, +top_cpuset.css.cgrp will be rebound to &cgrp_dfl_root.cgrp. + +The problem is that when rebinding to cgrp_dfl_root, there are cases +where the cgroup_root allocated by setting up the root for cgroup v1 +is cached. This could lead to a Use-After-Free (UAF) if it is +subsequently freed. The descendant cgroups of cgroup v1 can only be +freed after the css is released. However, the css of the root will never +be released, yet the cgroup_root should be freed when it is unmounted. +This means that obtaining a reference to the css of the root does +not guarantee that css.cgrp->root will not be freed. + +Fix this problem by using rcu_read_lock in proc_cpuset_show(). +As cgroup_root is kfree_rcu after commit d23b5c577715 +("cgroup: Make operations on the cgroup root_list RCU safe"), +css->cgroup won't be freed during the critical section. +To call cgroup_path_ns_locked, css_set_lock is needed, so it is safe to +replace task_get_css with task_css. + +[1] https://syzkaller.appspot.com/bug?extid=9b1ff7be974a403aa4cd + +Fixes: a79a908fd2b0 ("cgroup: introduce cgroup namespaces") +Signed-off-by: Chen Ridong +Signed-off-by: Tejun Heo +Signed-off-by: Sasha Levin +--- + kernel/cgroup/cpuset.c | 13 +++++++++---- + 1 file changed, 9 insertions(+), 4 deletions(-) + +diff --git a/kernel/cgroup/cpuset.c b/kernel/cgroup/cpuset.c +index f2025fa5a168d..3646426c69e25 100644 +--- a/kernel/cgroup/cpuset.c ++++ b/kernel/cgroup/cpuset.c +@@ -21,6 +21,7 @@ + * License. See the file COPYING in the main directory of the Linux + * distribution for more details. + */ ++#include "cgroup-internal.h" + + #include + #include +@@ -4293,10 +4294,14 @@ int proc_cpuset_show(struct seq_file *m, struct pid_namespace *ns, + if (!buf) + goto out; + +- css = task_get_css(tsk, cpuset_cgrp_id); +- retval = cgroup_path_ns(css->cgroup, buf, PATH_MAX, +- current->nsproxy->cgroup_ns); +- css_put(css); ++ rcu_read_lock(); ++ spin_lock_irq(&css_set_lock); ++ css = task_css(tsk, cpuset_cgrp_id); ++ retval = cgroup_path_ns_locked(css->cgroup, buf, PATH_MAX, ++ current->nsproxy->cgroup_ns); ++ spin_unlock_irq(&css_set_lock); ++ rcu_read_unlock(); ++ + if (retval == -E2BIG) + retval = -ENAMETOOLONG; + if (retval < 0) +-- +2.43.0 + diff --git a/queue-6.6/clk-en7523-fix-rate-divider-for-slic-and-spi-clocks.patch b/queue-6.6/clk-en7523-fix-rate-divider-for-slic-and-spi-clocks.patch new file mode 100644 index 00000000000..ffcabd311dd --- /dev/null +++ b/queue-6.6/clk-en7523-fix-rate-divider-for-slic-and-spi-clocks.patch @@ -0,0 +1,88 @@ +From f2707624c9ea977dd2ac1bb66866d184b88e4f6f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Jun 2024 11:25:49 +0200 +Subject: clk: en7523: fix rate divider for slic and spi clocks + +From: Lorenzo Bianconi + +[ Upstream commit 58c53d43142f222221e5a76a7016c4d8f3b84b97 ] + +Introduce div_offset field in en_clk_desc struct in order to fix rate +divider estimation in en7523_get_div routine for slic and spi fixed +rate clocks. +Moreover, fix base_shift for crypto clock. + +Fixes: 1e6273179190 ("clk: en7523: Add clock driver for Airoha EN7523 SoC") +Signed-off-by: Lorenzo Bianconi +Link: https://lore.kernel.org/r/c491bdea05d847f1f1294b94f14725d292eb95d0.1718615934.git.lorenzo@kernel.org +Reviewed-by: AngeloGioacchino Del Regno +Signed-off-by: Stephen Boyd +Signed-off-by: Sasha Levin +--- + drivers/clk/clk-en7523.c | 9 +++++++-- + 1 file changed, 7 insertions(+), 2 deletions(-) + +diff --git a/drivers/clk/clk-en7523.c b/drivers/clk/clk-en7523.c +index 7cde328495e2b..7914e60f3d6c5 100644 +--- a/drivers/clk/clk-en7523.c ++++ b/drivers/clk/clk-en7523.c +@@ -40,6 +40,7 @@ struct en_clk_desc { + u8 div_shift; + u16 div_val0; + u8 div_step; ++ u8 div_offset; + }; + + struct en_clk_gate { +@@ -67,6 +68,7 @@ static const struct en_clk_desc en7523_base_clks[] = { + .div_bits = 3, + .div_shift = 0, + .div_step = 1, ++ .div_offset = 1, + }, { + .id = EN7523_CLK_EMI, + .name = "emi", +@@ -80,6 +82,7 @@ static const struct en_clk_desc en7523_base_clks[] = { + .div_bits = 3, + .div_shift = 0, + .div_step = 1, ++ .div_offset = 1, + }, { + .id = EN7523_CLK_BUS, + .name = "bus", +@@ -93,6 +96,7 @@ static const struct en_clk_desc en7523_base_clks[] = { + .div_bits = 3, + .div_shift = 0, + .div_step = 1, ++ .div_offset = 1, + }, { + .id = EN7523_CLK_SLIC, + .name = "slic", +@@ -133,13 +137,14 @@ static const struct en_clk_desc en7523_base_clks[] = { + .div_bits = 3, + .div_shift = 0, + .div_step = 1, ++ .div_offset = 1, + }, { + .id = EN7523_CLK_CRYPTO, + .name = "crypto", + + .base_reg = REG_CRYPTO_CLKSRC, + .base_bits = 1, +- .base_shift = 8, ++ .base_shift = 0, + .base_values = emi_base, + .n_base_values = ARRAY_SIZE(emi_base), + } +@@ -184,7 +189,7 @@ static u32 en7523_get_div(void __iomem *base, int i) + if (!val && desc->div_val0) + return desc->div_val0; + +- return (val + 1) * desc->div_step; ++ return (val + desc->div_offset) * desc->div_step; + } + + static int en7523_pci_is_enabled(struct clk_hw *hw) +-- +2.43.0 + diff --git a/queue-6.6/clk-qcom-camcc-sc7280-add-parent-dependency-to-all-c.patch b/queue-6.6/clk-qcom-camcc-sc7280-add-parent-dependency-to-all-c.patch new file mode 100644 index 00000000000..50c4d6dae21 --- /dev/null +++ b/queue-6.6/clk-qcom-camcc-sc7280-add-parent-dependency-to-all-c.patch @@ -0,0 +1,73 @@ +From f91054330c59393e8b96a505db21dfe68c3cd4a3 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 31 May 2024 15:21:42 +0530 +Subject: clk: qcom: camcc-sc7280: Add parent dependency to all camera GDSCs + +From: Taniya Das + +[ Upstream commit 63aec3e4d987fd43237f557460345bca3b51e530 ] + +Camera titan top GDSC is a parent supply to all other camera GDSCs. Titan +top GDSC is required to be enabled before enabling any other camera GDSCs +and it should be disabled only after all other camera GDSCs are disabled. +Ensure this behavior by marking titan top GDSC as parent of all other +camera GDSCs. + +Fixes: 1daec8cfebc2 ("clk: qcom: camcc: Add camera clock controller driver for SC7280") +Signed-off-by: Taniya Das +Reviewed-by: Dmitry Baryshkov +Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20240531095142.9688-4-quic_tdas@quicinc.com +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + drivers/clk/qcom/camcc-sc7280.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/drivers/clk/qcom/camcc-sc7280.c b/drivers/clk/qcom/camcc-sc7280.c +index 49f046ea857cb..c1551de51d401 100644 +--- a/drivers/clk/qcom/camcc-sc7280.c ++++ b/drivers/clk/qcom/camcc-sc7280.c +@@ -2260,6 +2260,7 @@ static struct gdsc cam_cc_bps_gdsc = { + .name = "cam_cc_bps_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, ++ .parent = &cam_cc_titan_top_gdsc.pd, + .flags = HW_CTRL | RETAIN_FF_ENABLE, + }; + +@@ -2269,6 +2270,7 @@ static struct gdsc cam_cc_ife_0_gdsc = { + .name = "cam_cc_ife_0_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, ++ .parent = &cam_cc_titan_top_gdsc.pd, + .flags = RETAIN_FF_ENABLE, + }; + +@@ -2278,6 +2280,7 @@ static struct gdsc cam_cc_ife_1_gdsc = { + .name = "cam_cc_ife_1_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, ++ .parent = &cam_cc_titan_top_gdsc.pd, + .flags = RETAIN_FF_ENABLE, + }; + +@@ -2287,6 +2290,7 @@ static struct gdsc cam_cc_ife_2_gdsc = { + .name = "cam_cc_ife_2_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, ++ .parent = &cam_cc_titan_top_gdsc.pd, + .flags = RETAIN_FF_ENABLE, + }; + +@@ -2296,6 +2300,7 @@ static struct gdsc cam_cc_ipe_0_gdsc = { + .name = "cam_cc_ipe_0_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, ++ .parent = &cam_cc_titan_top_gdsc.pd, + .flags = HW_CTRL | RETAIN_FF_ENABLE, + }; + +-- +2.43.0 + diff --git a/queue-6.6/clk-qcom-gcc-sa8775p-update-the-gdsc-wait_val-fields.patch b/queue-6.6/clk-qcom-gcc-sa8775p-update-the-gdsc-wait_val-fields.patch new file mode 100644 index 00000000000..80829168e34 --- /dev/null +++ b/queue-6.6/clk-qcom-gcc-sa8775p-update-the-gdsc-wait_val-fields.patch @@ -0,0 +1,145 @@ +From 0d5c95e0e58b440cc4dc26316444a9bea7b3829e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 12 Jun 2024 16:38:22 +0530 +Subject: clk: qcom: gcc-sa8775p: Update the GDSC wait_val fields and flags + +From: Taniya Das + +[ Upstream commit be208c0ccf7d861fc6109ca06c1a773512739af9 ] + +Update the GDSC wait_val fields as per the default hardware values as +otherwise they would lead to GDSC FSM state to be stuck and causing +failures to power on/off. Also add the GDSC flags as applicable and +add support to control PCIE GDSC's using collapse vote registers. + +Fixes: 08c51ceb12f7 ("clk: qcom: add the GCC driver for sa8775p") +Signed-off-by: Taniya Das +Link: https://lore.kernel.org/r/20240612-sa8775p-v2-gcc-gpucc-fixes-v2-2-adcc756a23df@quicinc.com +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + drivers/clk/qcom/gcc-sa8775p.c | 40 ++++++++++++++++++++++++++++++++++ + 1 file changed, 40 insertions(+) + +diff --git a/drivers/clk/qcom/gcc-sa8775p.c b/drivers/clk/qcom/gcc-sa8775p.c +index 8171d23c96e64..a54438205698c 100644 +--- a/drivers/clk/qcom/gcc-sa8775p.c ++++ b/drivers/clk/qcom/gcc-sa8775p.c +@@ -4305,74 +4305,114 @@ static struct clk_branch gcc_video_axi1_clk = { + + static struct gdsc pcie_0_gdsc = { + .gdscr = 0xa9004, ++ .collapse_ctrl = 0x4b104, ++ .collapse_mask = BIT(0), ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "pcie_0_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, ++ .flags = VOTABLE | RETAIN_FF_ENABLE | POLL_CFG_GDSCR, + }; + + static struct gdsc pcie_1_gdsc = { + .gdscr = 0x77004, ++ .collapse_ctrl = 0x4b104, ++ .collapse_mask = BIT(1), ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "pcie_1_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, ++ .flags = VOTABLE | RETAIN_FF_ENABLE | POLL_CFG_GDSCR, + }; + + static struct gdsc ufs_card_gdsc = { + .gdscr = 0x81004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "ufs_card_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, ++ .flags = RETAIN_FF_ENABLE | POLL_CFG_GDSCR, + }; + + static struct gdsc ufs_phy_gdsc = { + .gdscr = 0x83004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "ufs_phy_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, ++ .flags = RETAIN_FF_ENABLE | POLL_CFG_GDSCR, + }; + + static struct gdsc usb20_prim_gdsc = { + .gdscr = 0x1c004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "usb20_prim_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, ++ .flags = RETAIN_FF_ENABLE | POLL_CFG_GDSCR, + }; + + static struct gdsc usb30_prim_gdsc = { + .gdscr = 0x1b004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "usb30_prim_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, ++ .flags = RETAIN_FF_ENABLE | POLL_CFG_GDSCR, + }; + + static struct gdsc usb30_sec_gdsc = { + .gdscr = 0x2f004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "usb30_sec_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, ++ .flags = RETAIN_FF_ENABLE | POLL_CFG_GDSCR, + }; + + static struct gdsc emac0_gdsc = { + .gdscr = 0xb6004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "emac0_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, ++ .flags = RETAIN_FF_ENABLE | POLL_CFG_GDSCR, + }; + + static struct gdsc emac1_gdsc = { + .gdscr = 0xb4004, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "emac1_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, ++ .flags = RETAIN_FF_ENABLE | POLL_CFG_GDSCR, + }; + + static struct clk_regmap *gcc_sa8775p_clocks[] = { +-- +2.43.0 + diff --git a/queue-6.6/clk-qcom-gcc-sc7280-update-force-mem-core-bit-for-uf.patch b/queue-6.6/clk-qcom-gcc-sc7280-update-force-mem-core-bit-for-uf.patch new file mode 100644 index 00000000000..38bdf22d9fb --- /dev/null +++ b/queue-6.6/clk-qcom-gcc-sc7280-update-force-mem-core-bit-for-uf.patch @@ -0,0 +1,41 @@ +From 5eb3cd90e6606c441c2a574347f188599f1a212b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 31 May 2024 15:21:41 +0530 +Subject: clk: qcom: gcc-sc7280: Update force mem core bit for UFS ICE clock + +From: Taniya Das + +[ Upstream commit f38467b5a920be1473710428a93c4e54b6f8a0c1 ] + +Update the force mem core bit for UFS ICE clock to force the core on signal +to remain active during halt state of the clk. When retention bit of the +clock is set the memories of the subsystem will retain the logic across +power states. + +Fixes: a3cc092196ef ("clk: qcom: Add Global Clock controller (GCC) driver for SC7280") +Signed-off-by: Taniya Das +Reviewed-by: Dmitry Baryshkov +Link: https://lore.kernel.org/r/20240531095142.9688-3-quic_tdas@quicinc.com +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + drivers/clk/qcom/gcc-sc7280.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/clk/qcom/gcc-sc7280.c b/drivers/clk/qcom/gcc-sc7280.c +index 2b661df5de266..bc81026292fc9 100644 +--- a/drivers/clk/qcom/gcc-sc7280.c ++++ b/drivers/clk/qcom/gcc-sc7280.c +@@ -3467,6 +3467,9 @@ static int gcc_sc7280_probe(struct platform_device *pdev) + regmap_update_bits(regmap, 0x71004, BIT(0), BIT(0)); + regmap_update_bits(regmap, 0x7100C, BIT(13), BIT(13)); + ++ /* FORCE_MEM_CORE_ON for ufs phy ice core clocks */ ++ qcom_branch_set_force_mem_core(regmap, gcc_ufs_phy_ice_core_clk, true); ++ + ret = qcom_cc_register_rcg_dfs(regmap, gcc_dfs_clocks, + ARRAY_SIZE(gcc_dfs_clocks)); + if (ret) +-- +2.43.0 + diff --git a/queue-6.6/clk-qcom-gpucc-sa8775p-park-rcg-s-clk-source-at-xo-d.patch b/queue-6.6/clk-qcom-gpucc-sa8775p-park-rcg-s-clk-source-at-xo-d.patch new file mode 100644 index 00000000000..c4e929d784b --- /dev/null +++ b/queue-6.6/clk-qcom-gpucc-sa8775p-park-rcg-s-clk-source-at-xo-d.patch @@ -0,0 +1,67 @@ +From 3354014cd206579ab0d4d9c3a25912e060ae79b3 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 12 Jun 2024 16:38:25 +0530 +Subject: clk: qcom: gpucc-sa8775p: Park RCG's clk source at XO during disable + +From: Taniya Das + +[ Upstream commit dff68b2f74547617dbb75d0d12f404877ec8f8ce ] + +The RCG's clk src has to be parked at XO while disabling as per the +HW recommendation, hence use clk_rcg2_shared_ops to achieve the same. +Also gpu_cc_cb_clk is recommended to be kept always ON, hence use +clk_branch2_aon_ops to keep the clock always ON. + +Fixes: 0afa16afc36d ("clk: qcom: add the GPUCC driver for sa8775p") +Signed-off-by: Taniya Das +Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20240612-sa8775p-v2-gcc-gpucc-fixes-v2-5-adcc756a23df@quicinc.com +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + drivers/clk/qcom/gpucc-sa8775p.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/clk/qcom/gpucc-sa8775p.c b/drivers/clk/qcom/gpucc-sa8775p.c +index 3f05b44c13c53..abcaefa01e386 100644 +--- a/drivers/clk/qcom/gpucc-sa8775p.c ++++ b/drivers/clk/qcom/gpucc-sa8775p.c +@@ -161,7 +161,7 @@ static struct clk_rcg2 gpu_cc_ff_clk_src = { + .name = "gpu_cc_ff_clk_src", + .parent_data = gpu_cc_parent_data_0, + .num_parents = ARRAY_SIZE(gpu_cc_parent_data_0), +- .ops = &clk_rcg2_ops, ++ .ops = &clk_rcg2_shared_ops, + }, + }; + +@@ -181,7 +181,7 @@ static struct clk_rcg2 gpu_cc_gmu_clk_src = { + .parent_data = gpu_cc_parent_data_1, + .num_parents = ARRAY_SIZE(gpu_cc_parent_data_1), + .flags = CLK_SET_RATE_PARENT, +- .ops = &clk_rcg2_ops, ++ .ops = &clk_rcg2_shared_ops, + }, + }; + +@@ -200,7 +200,7 @@ static struct clk_rcg2 gpu_cc_hub_clk_src = { + .name = "gpu_cc_hub_clk_src", + .parent_data = gpu_cc_parent_data_2, + .num_parents = ARRAY_SIZE(gpu_cc_parent_data_2), +- .ops = &clk_rcg2_ops, ++ .ops = &clk_rcg2_shared_ops, + }, + }; + +@@ -294,7 +294,7 @@ static struct clk_branch gpu_cc_cb_clk = { + .enable_mask = BIT(0), + .hw.init = &(const struct clk_init_data){ + .name = "gpu_cc_cb_clk", +- .ops = &clk_branch2_ops, ++ .ops = &clk_branch2_aon_ops, + }, + }, + }; +-- +2.43.0 + diff --git a/queue-6.6/clk-qcom-gpucc-sa8775p-remove-the-clk_is_critical-an.patch b/queue-6.6/clk-qcom-gpucc-sa8775p-remove-the-clk_is_critical-an.patch new file mode 100644 index 00000000000..03adefa8d2b --- /dev/null +++ b/queue-6.6/clk-qcom-gpucc-sa8775p-remove-the-clk_is_critical-an.patch @@ -0,0 +1,171 @@ +From 7beed1bd8a1ee826d972220189bae0c11e8aef8b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 12 Jun 2024 16:38:24 +0530 +Subject: clk: qcom: gpucc-sa8775p: Remove the CLK_IS_CRITICAL and ALWAYS_ON + flags + +From: Taniya Das + +[ Upstream commit e69386d4a42afa5da6bfdcd4ac5ec61e1db04c61 ] + +The GPU clocks/GDSCs have been marked critical from the clock driver +but the GPU driver votes on these resources as per the HW requirement. +In the case where these clocks & GDSCs are left enabled, would have +power impact and also cause GPU stability/corruptions. +Fix the same by removing the CLK_IS_CRITICAL for clocks and ALWAYS_ON +flags for the GPU GDSCs. + +Fixes: 0afa16afc36d ("clk: qcom: add the GPUCC driver for sa8775p") +Signed-off-by: Taniya Das +Link: https://lore.kernel.org/r/20240612-sa8775p-v2-gcc-gpucc-fixes-v2-4-adcc756a23df@quicinc.com +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + drivers/clk/qcom/gpucc-sa8775p.c | 27 +++++++++++---------------- + 1 file changed, 11 insertions(+), 16 deletions(-) + +diff --git a/drivers/clk/qcom/gpucc-sa8775p.c b/drivers/clk/qcom/gpucc-sa8775p.c +index 26ecfa63be193..3f05b44c13c53 100644 +--- a/drivers/clk/qcom/gpucc-sa8775p.c ++++ b/drivers/clk/qcom/gpucc-sa8775p.c +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0-only + /* +- * Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2021-2022, 2024, Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023, Linaro Limited + */ + +@@ -280,7 +280,7 @@ static struct clk_branch gpu_cc_ahb_clk = { + &gpu_cc_hub_ahb_div_clk_src.clkr.hw, + }, + .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, ++ .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -294,7 +294,6 @@ static struct clk_branch gpu_cc_cb_clk = { + .enable_mask = BIT(0), + .hw.init = &(const struct clk_init_data){ + .name = "gpu_cc_cb_clk", +- .flags = CLK_IS_CRITICAL, + .ops = &clk_branch2_ops, + }, + }, +@@ -312,7 +311,7 @@ static struct clk_branch gpu_cc_crc_ahb_clk = { + &gpu_cc_hub_ahb_div_clk_src.clkr.hw, + }, + .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, ++ .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -330,7 +329,7 @@ static struct clk_branch gpu_cc_cx_ff_clk = { + &gpu_cc_ff_clk_src.clkr.hw, + }, + .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, ++ .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -348,7 +347,7 @@ static struct clk_branch gpu_cc_cx_gmu_clk = { + &gpu_cc_gmu_clk_src.clkr.hw, + }, + .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, ++ .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_aon_ops, + }, + }, +@@ -362,7 +361,6 @@ static struct clk_branch gpu_cc_cx_snoc_dvm_clk = { + .enable_mask = BIT(0), + .hw.init = &(const struct clk_init_data){ + .name = "gpu_cc_cx_snoc_dvm_clk", +- .flags = CLK_IS_CRITICAL, + .ops = &clk_branch2_ops, + }, + }, +@@ -380,7 +378,7 @@ static struct clk_branch gpu_cc_cxo_aon_clk = { + &gpu_cc_xo_clk_src.clkr.hw, + }, + .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, ++ .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -398,7 +396,7 @@ static struct clk_branch gpu_cc_cxo_clk = { + &gpu_cc_xo_clk_src.clkr.hw, + }, + .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, ++ .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +@@ -416,7 +414,7 @@ static struct clk_branch gpu_cc_demet_clk = { + &gpu_cc_demet_div_clk_src.clkr.hw, + }, + .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, ++ .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_aon_ops, + }, + }, +@@ -430,7 +428,6 @@ static struct clk_branch gpu_cc_hlos1_vote_gpu_smmu_clk = { + .enable_mask = BIT(0), + .hw.init = &(const struct clk_init_data){ + .name = "gpu_cc_hlos1_vote_gpu_smmu_clk", +- .flags = CLK_IS_CRITICAL, + .ops = &clk_branch2_ops, + }, + }, +@@ -448,7 +445,7 @@ static struct clk_branch gpu_cc_hub_aon_clk = { + &gpu_cc_hub_clk_src.clkr.hw, + }, + .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, ++ .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_aon_ops, + }, + }, +@@ -466,7 +463,7 @@ static struct clk_branch gpu_cc_hub_cx_int_clk = { + &gpu_cc_hub_cx_int_div_clk_src.clkr.hw, + }, + .num_parents = 1, +- .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, ++ .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_aon_ops, + }, + }, +@@ -480,7 +477,6 @@ static struct clk_branch gpu_cc_memnoc_gfx_clk = { + .enable_mask = BIT(0), + .hw.init = &(const struct clk_init_data){ + .name = "gpu_cc_memnoc_gfx_clk", +- .flags = CLK_IS_CRITICAL, + .ops = &clk_branch2_ops, + }, + }, +@@ -494,7 +490,6 @@ static struct clk_branch gpu_cc_sleep_clk = { + .enable_mask = BIT(0), + .hw.init = &(const struct clk_init_data){ + .name = "gpu_cc_sleep_clk", +- .flags = CLK_IS_CRITICAL, + .ops = &clk_branch2_ops, + }, + }, +@@ -533,7 +528,7 @@ static struct gdsc cx_gdsc = { + .name = "cx_gdsc", + }, + .pwrsts = PWRSTS_OFF_ON, +- .flags = VOTABLE | RETAIN_FF_ENABLE | ALWAYS_ON, ++ .flags = VOTABLE | RETAIN_FF_ENABLE, + }; + + static struct gdsc gx_gdsc = { +-- +2.43.0 + diff --git a/queue-6.6/clk-qcom-gpucc-sa8775p-update-wait_val-fields-for-gp.patch b/queue-6.6/clk-qcom-gpucc-sa8775p-update-wait_val-fields-for-gp.patch new file mode 100644 index 00000000000..2df4ab06a06 --- /dev/null +++ b/queue-6.6/clk-qcom-gpucc-sa8775p-update-wait_val-fields-for-gp.patch @@ -0,0 +1,50 @@ +From 3087637367ead0a7b596bfec01ae4af6a7482966 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 12 Jun 2024 16:38:26 +0530 +Subject: clk: qcom: gpucc-sa8775p: Update wait_val fields for GPU GDSC's + +From: Taniya Das + +[ Upstream commit 211681998d706d1e0fff6b62f89efcdf29c24978 ] + +Update wait_val fields as per the default hardware values of the GDSC as +otherwise it would lead to GDSC FSM state stuck causing power on/off +failures of the GSDC. + +Fixes: 0afa16afc36d ("clk: qcom: add the GPUCC driver for sa8775p") +Signed-off-by: Taniya Das +Acked-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20240612-sa8775p-v2-gcc-gpucc-fixes-v2-6-adcc756a23df@quicinc.com +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + drivers/clk/qcom/gpucc-sa8775p.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/drivers/clk/qcom/gpucc-sa8775p.c b/drivers/clk/qcom/gpucc-sa8775p.c +index abcaefa01e386..0d9a8379efaa8 100644 +--- a/drivers/clk/qcom/gpucc-sa8775p.c ++++ b/drivers/clk/qcom/gpucc-sa8775p.c +@@ -523,6 +523,9 @@ static struct clk_regmap *gpu_cc_sa8775p_clocks[] = { + + static struct gdsc cx_gdsc = { + .gdscr = 0x9108, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .gds_hw_ctrl = 0x953c, + .pd = { + .name = "cx_gdsc", +@@ -533,6 +536,9 @@ static struct gdsc cx_gdsc = { + + static struct gdsc gx_gdsc = { + .gdscr = 0x905c, ++ .en_rest_wait_val = 0x2, ++ .en_few_wait_val = 0x2, ++ .clk_dis_wait_val = 0xf, + .pd = { + .name = "gx_gdsc", + .power_on = gdsc_gx_do_nothing_enable, +-- +2.43.0 + diff --git a/queue-6.6/clk-qcom-gpucc-sm8350-park-rcg-s-clk-source-at-xo-du.patch b/queue-6.6/clk-qcom-gpucc-sm8350-park-rcg-s-clk-source-at-xo-du.patch new file mode 100644 index 00000000000..04a71a62b87 --- /dev/null +++ b/queue-6.6/clk-qcom-gpucc-sm8350-park-rcg-s-clk-source-at-xo-du.patch @@ -0,0 +1,56 @@ +From 74a92b371b8fd3ed39b058d4be6206617299c46b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 21 Jun 2024 17:34:23 +0530 +Subject: clk: qcom: gpucc-sm8350: Park RCG's clk source at XO during disable + +From: Taniya Das + +[ Upstream commit 313e2909023bef36ef7b6d1d9ff2d98febcaa28d ] + +The RCG's clk src has to be parked at XO while disabling as per the +HW recommendation, hence use clk_rcg2_shared_ops to achieve the same. + +Fixes: 160758b05ab1 ("clk: qcom: add support for SM8350 GPUCC") +Signed-off-by: Taniya Das +Reviewed-by: Dmitry Baryshkov +Tested-by: Dmitry Baryshkov # SM8350-HDK +Link: https://lore.kernel.org/r/20240621-sm8350-gpucc-fixes-v1-1-22db60c7c5d3@quicinc.com +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + drivers/clk/qcom/gpucc-sm8350.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/drivers/clk/qcom/gpucc-sm8350.c b/drivers/clk/qcom/gpucc-sm8350.c +index 8dc54dff983f3..33c4fb8891caa 100644 +--- a/drivers/clk/qcom/gpucc-sm8350.c ++++ b/drivers/clk/qcom/gpucc-sm8350.c +@@ -2,6 +2,7 @@ + /* + * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. + * Copyright (c) 2022, Linaro Limited ++ * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include +@@ -147,7 +148,7 @@ static struct clk_rcg2 gpu_cc_gmu_clk_src = { + .parent_data = gpu_cc_parent_data_0, + .num_parents = ARRAY_SIZE(gpu_cc_parent_data_0), + .flags = CLK_SET_RATE_PARENT, +- .ops = &clk_rcg2_ops, ++ .ops = &clk_rcg2_shared_ops, + }, + }; + +@@ -169,7 +170,7 @@ static struct clk_rcg2 gpu_cc_hub_clk_src = { + .parent_data = gpu_cc_parent_data_1, + .num_parents = ARRAY_SIZE(gpu_cc_parent_data_1), + .flags = CLK_SET_RATE_PARENT, +- .ops = &clk_rcg2_ops, ++ .ops = &clk_rcg2_shared_ops, + }, + }; + +-- +2.43.0 + diff --git a/queue-6.6/clk-qcom-kpss-xcc-return-of_clk_add_hw_provider-to-t.patch b/queue-6.6/clk-qcom-kpss-xcc-return-of_clk_add_hw_provider-to-t.patch new file mode 100644 index 00000000000..e722603094d --- /dev/null +++ b/queue-6.6/clk-qcom-kpss-xcc-return-of_clk_add_hw_provider-to-t.patch @@ -0,0 +1,41 @@ +From ce161aa17c8c71429d5c3d952f7caa7d2517f1d4 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 4 Jul 2024 15:36:06 +0800 +Subject: clk: qcom: kpss-xcc: Return of_clk_add_hw_provider to transfer the + error + +From: Chen Ni + +[ Upstream commit 9db4585eca22fcd0422a94ac792f87dcbf74b643 ] + +Return of_clk_add_hw_provider() in order to transfer the error if it +fails. + +Fixes: 09be1a39e685 ("clk: qcom: kpss-xcc: register it as clk provider") +Signed-off-by: Chen Ni +Reviewed-by: Dmitry Baryshkov +Link: https://lore.kernel.org/r/20240704073606.1976936-1-nichen@iscas.ac.cn +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + drivers/clk/qcom/kpss-xcc.c | 4 +--- + 1 file changed, 1 insertion(+), 3 deletions(-) + +diff --git a/drivers/clk/qcom/kpss-xcc.c b/drivers/clk/qcom/kpss-xcc.c +index 97358c98c6c98..d8c1f2b41eeb3 100644 +--- a/drivers/clk/qcom/kpss-xcc.c ++++ b/drivers/clk/qcom/kpss-xcc.c +@@ -63,9 +63,7 @@ static int kpss_xcc_driver_probe(struct platform_device *pdev) + if (IS_ERR(hw)) + return PTR_ERR(hw); + +- of_clk_add_hw_provider(dev->of_node, of_clk_hw_simple_get, hw); +- +- return 0; ++ return of_clk_add_hw_provider(dev->of_node, of_clk_hw_simple_get, hw); + } + + static struct platform_driver kpss_xcc_driver = { +-- +2.43.0 + diff --git a/queue-6.6/clk-qcom-park-shared-rcgs-upon-registration.patch b/queue-6.6/clk-qcom-park-shared-rcgs-upon-registration.patch new file mode 100644 index 00000000000..8c1372e0c03 --- /dev/null +++ b/queue-6.6/clk-qcom-park-shared-rcgs-upon-registration.patch @@ -0,0 +1,185 @@ +From 5e67005b62635dbfe9526aa05c6f6dbee64a7955 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 2 May 2024 15:47:02 -0700 +Subject: clk: qcom: Park shared RCGs upon registration +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Stephen Boyd + +[ Upstream commit 01a0a6cc8cfd9952e72677d48d56cf6bc4e3a561 ] + +There's two problems with shared RCGs. + +The first problem is that they incorrectly report the parent after +commit 703db1f5da1e ("clk: qcom: rcg2: Cache CFG register updates for +parked RCGs"). That's because the cached CFG register value needs to be +populated when the clk is registered. clk_rcg2_shared_enable() writes +the cached CFG register value 'parked_cfg'. This value is initially zero +due to static initializers. If a driver calls clk_enable() before +setting a rate or parent, it will set the parent to '0' which is +(almost?) always XO, and may not reflect the parent at registration. In +the worst case, this switches the RCG from sourcing a fast PLL to the +slow crystal speed. + +The second problem is that the force enable bit isn't cleared. The force +enable bit is only used during parking and unparking of shared RCGs. +Otherwise it shouldn't be set because it keeps the RCG enabled even when +all the branches on the output of the RCG are disabled (the hardware has +a feedback mechanism so that any child branches keep the RCG enabled +when the branch enable bit is set). This problem wastes power if the clk +is unused, and is harmful in the case that the clk framework disables +the parent of the force enabled RCG. In the latter case, the GDSC the +shared RCG is associated with will get wedged if the RCG's source clk is +disabled and the GDSC tries to enable the RCG to do "housekeeping" while +powering on. + +Both of these problems combined with incorrect runtime PM usage in the +display driver lead to a black screen on Qualcomm sc7180 Trogdor +chromebooks. What happens is that the bootloader leaves the +'disp_cc_mdss_rot_clk' enabled and the 'disp_cc_mdss_rot_clk_src' force +enabled and parented to 'disp_cc_pll0'. The mdss driver probes and +runtime suspends, disabling the mdss_gdsc which uses the +'disp_cc_mdss_rot_clk_src' for "housekeeping". The +'disp_cc_mdss_rot_clk' is disabled during late init because the clk is +unused, but the parent 'disp_cc_mdss_rot_clk_src' is still force enabled +because the force enable bit was never cleared. Then 'disp_cc_pll0' is +disabled because it is also unused. That's because the clk framework +believes the parent of the RCG is XO when it isn't. A child device of +the mdss device (e.g. DSI) runtime resumes mdss which powers on the +mdss_gdsc. This wedges the GDSC because 'disp_cc_mdss_rot_clk_src' is +parented to 'disp_cc_pll0' and that PLL is off. With the GDSC wedged, +mdss_runtime_resume() tries to enable 'disp_cc_mdss_mdp_clk' but it +can't because the GDSC has wedged all the clks associated with the GDSC +causing clks to stay stuck off. + +This leads to the following warning seen at boot and a black screen +because the display driver fails to probe. + + disp_cc_mdss_mdp_clk status stuck at 'off' + WARNING: CPU: 1 PID: 81 at drivers/clk/qcom/clk-branch.c:87 clk_branch_toggle+0x114/0x168 + Modules linked in: + CPU: 1 PID: 81 Comm: kworker/u16:4 Not tainted 6.7.0-g0dd3ee311255 #1 f5757d475795053fd2ad52247a070cd50dd046f2 + Hardware name: Google Lazor (rev1 - 2) with LTE (DT) + Workqueue: events_unbound deferred_probe_work_func + pstate: 60400009 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--) + pc : clk_branch_toggle+0x114/0x168 + lr : clk_branch_toggle+0x110/0x168 + sp : ffffffc08084b670 + pmr_save: 00000060 + x29: ffffffc08084b680 x28: ffffff808006de00 x27: 0000000000000001 + x26: ffffff8080dbd4f4 x25: 0000000000000000 x24: 0000000000000000 + x23: 0000000000000000 x22: ffffffd838461198 x21: ffffffd838007997 + x20: ffffffd837541d5c x19: 0000000000000001 x18: 0000000000000004 + x17: 0000000000000000 x16: 0000000000000010 x15: ffffffd837070fac + x14: 0000000000000003 x13: 0000000000000004 x12: 0000000000000001 + x11: c0000000ffffdfff x10: ffffffd838347aa0 x9 : 08dadf92e516c000 + x8 : 08dadf92e516c000 x7 : 0000000000000000 x6 : 0000000000000027 + x5 : ffffffd8385a61f2 x4 : 0000000000000000 x3 : ffffffc08084b398 + x2 : ffffffc08084b3a0 x1 : 00000000ffffdfff x0 : 00000000fffffff0 + Call trace: + clk_branch_toggle+0x114/0x168 + clk_branch2_enable+0x24/0x30 + clk_core_enable+0x5c/0x1c8 + clk_enable+0x38/0x58 + clk_bulk_enable+0x40/0xb0 + mdss_runtime_resume+0x68/0x258 + pm_generic_runtime_resume+0x30/0x44 + __genpd_runtime_resume+0x30/0x80 + genpd_runtime_resume+0x124/0x214 + __rpm_callback+0x7c/0x15c + rpm_callback+0x30/0x88 + rpm_resume+0x390/0x4d8 + rpm_resume+0x43c/0x4d8 + __pm_runtime_resume+0x54/0x98 + __device_attach+0xe0/0x170 + device_initial_probe+0x1c/0x28 + bus_probe_device+0x48/0xa4 + device_add+0x52c/0x6fc + mipi_dsi_device_register_full+0x104/0x1a8 + devm_mipi_dsi_device_register_full+0x28/0x78 + ti_sn_bridge_probe+0x1dc/0x2bc + auxiliary_bus_probe+0x4c/0x94 + really_probe+0xf8/0x270 + __driver_probe_device+0xa8/0x130 + driver_probe_device+0x44/0x104 + __device_attach_driver+0xa4/0xcc + bus_for_each_drv+0x94/0xe8 + __device_attach+0xf8/0x170 + device_initial_probe+0x1c/0x28 + bus_probe_device+0x48/0xa4 + deferred_probe_work_func+0x9c/0xd8 + +Fix these problems by parking shared RCGs at boot. This will properly +initialize the parked_cfg struct member so that the parent is reported +properly and ensure that the clk won't get stuck on or off because the +RCG is parented to the safe source (XO). + +Fixes: 703db1f5da1e ("clk: qcom: rcg2: Cache CFG register updates for parked RCGs") +Reported-by: Stephen Boyd +Closes: https://lore.kernel.org/r/1290a5a0f7f584fcce722eeb2a1fd898.sboyd@kernel.org +Closes: https://issuetracker.google.com/319956935 +Reported-by: Laura Nao +Closes: https://lore.kernel.org/r/20231218091806.7155-1-laura.nao@collabora.com +Cc: Bjorn Andersson +Cc: Dmitry Baryshkov +Cc: Douglas Anderson +Cc: Taniya Das +Signed-off-by: Stephen Boyd +Link: https://lore.kernel.org/r/20240502224703.103150-1-swboyd@chromium.org +Reviewed-by: Douglas Anderson +Tested-by: Nícolas F. R. A. Prado +Signed-off-by: Stephen Boyd +Signed-off-by: Sasha Levin +--- + drivers/clk/qcom/clk-rcg2.c | 32 ++++++++++++++++++++++++++++++++ + 1 file changed, 32 insertions(+) + +diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c +index 5183c74b074f8..b9f2a29be927c 100644 +--- a/drivers/clk/qcom/clk-rcg2.c ++++ b/drivers/clk/qcom/clk-rcg2.c +@@ -1138,7 +1138,39 @@ clk_rcg2_shared_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) + return clk_rcg2_recalc_rate(hw, parent_rate); + } + ++static int clk_rcg2_shared_init(struct clk_hw *hw) ++{ ++ /* ++ * This does a few things: ++ * ++ * 1. Sets rcg->parked_cfg to reflect the value at probe so that the ++ * proper parent is reported from clk_rcg2_shared_get_parent(). ++ * ++ * 2. Clears the force enable bit of the RCG because we rely on child ++ * clks (branches) to turn the RCG on/off with a hardware feedback ++ * mechanism and only set the force enable bit in the RCG when we ++ * want to make sure the clk stays on for parent switches or ++ * parking. ++ * ++ * 3. Parks shared RCGs on the safe source at registration because we ++ * can't be certain that the parent clk will stay on during boot, ++ * especially if the parent is shared. If this RCG is enabled at ++ * boot, and the parent is turned off, the RCG will get stuck on. A ++ * GDSC can wedge if is turned on and the RCG is stuck on because ++ * the GDSC's controller will hang waiting for the clk status to ++ * toggle on when it never does. ++ * ++ * The safest option here is to "park" the RCG at init so that the clk ++ * can never get stuck on or off. This ensures the GDSC can't get ++ * wedged. ++ */ ++ clk_rcg2_shared_disable(hw); ++ ++ return 0; ++} ++ + const struct clk_ops clk_rcg2_shared_ops = { ++ .init = clk_rcg2_shared_init, + .enable = clk_rcg2_shared_enable, + .disable = clk_rcg2_shared_disable, + .get_parent = clk_rcg2_shared_get_parent, +-- +2.43.0 + diff --git a/queue-6.6/coresight-fix-ref-leak-when-of_coresight_parse_endpo.patch b/queue-6.6/coresight-fix-ref-leak-when-of_coresight_parse_endpo.patch new file mode 100644 index 00000000000..c7785636110 --- /dev/null +++ b/queue-6.6/coresight-fix-ref-leak-when-of_coresight_parse_endpo.patch @@ -0,0 +1,45 @@ +From 4befb061f5e7857b1df9b3491b732f729ae25259 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 29 May 2024 14:36:26 +0100 +Subject: coresight: Fix ref leak when of_coresight_parse_endpoint() fails + +From: James Clark + +[ Upstream commit 7fcb9cb2fe47294e16067c3cfd25332c8662a115 ] + +of_graph_get_next_endpoint() releases the reference to the previous +endpoint on each iteration, but when parsing fails the loop exits +early meaning the last reference is never dropped. + +Fix it by dropping the refcount in the exit condition. + +Fixes: d375b356e687 ("coresight: Fix support for sparsely populated ports") +Signed-off-by: James Clark +Reported-by: Laurent Pinchart +Reviewed-by: Laurent Pinchart +Signed-off-by: Suzuki K Poulose +Link: https://lore.kernel.org/r/20240529133626.90080-1-james.clark@arm.com +Signed-off-by: Sasha Levin +--- + drivers/hwtracing/coresight/coresight-platform.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/hwtracing/coresight/coresight-platform.c b/drivers/hwtracing/coresight/coresight-platform.c +index 9d550f5697fa8..57a009552cc5c 100644 +--- a/drivers/hwtracing/coresight/coresight-platform.c ++++ b/drivers/hwtracing/coresight/coresight-platform.c +@@ -297,8 +297,10 @@ static int of_get_coresight_platform_data(struct device *dev, + continue; + + ret = of_coresight_parse_endpoint(dev, ep, pdata); +- if (ret) ++ if (ret) { ++ of_node_put(ep); + return ret; ++ } + } + + return 0; +-- +2.43.0 + diff --git a/queue-6.6/cpufreq-amd-pstate-fix-the-scaling_max_freq-setting-.patch b/queue-6.6/cpufreq-amd-pstate-fix-the-scaling_max_freq-setting-.patch new file mode 100644 index 00000000000..76fe18d0f2b --- /dev/null +++ b/queue-6.6/cpufreq-amd-pstate-fix-the-scaling_max_freq-setting-.patch @@ -0,0 +1,105 @@ +From f6ef88b449cbe271e1a4a26f220b2a927b788bd8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 2 Jul 2024 08:14:14 +0000 +Subject: cpufreq/amd-pstate: Fix the scaling_max_freq setting on shared memory + CPPC systems + +From: Dhananjay Ugwekar + +[ Upstream commit 738d7d03571c7e38565bd245c0815a2c74665018 ] + +On shared memory CPPC systems, with amd_pstate=active mode, the change +in scaling_max_freq doesn't get written to the shared memory +region. Due to this, the writes to the scaling_max_freq sysfs file +don't take effect. Fix this by propagating the scaling_max_freq +changes to the shared memory region. + +Fixes: ffa5096a7c33 ("cpufreq: amd-pstate: implement Pstate EPP support for the AMD processors") +Reported-by: David Arcari +Signed-off-by: Dhananjay Ugwekar +Reviewed-by: Mario Limonciello +Link: https://lore.kernel.org/r/20240702081413.5688-3-Dhananjay.Ugwekar@amd.com +Signed-off-by: Mario Limonciello +Signed-off-by: Sasha Levin +--- + drivers/cpufreq/amd-pstate.c | 43 +++++++++++++++++++----------------- + 1 file changed, 23 insertions(+), 20 deletions(-) + +diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c +index 3efc2aef31ce4..23c74e9f04c48 100644 +--- a/drivers/cpufreq/amd-pstate.c ++++ b/drivers/cpufreq/amd-pstate.c +@@ -175,6 +175,26 @@ static int amd_pstate_get_energy_pref_index(struct amd_cpudata *cpudata) + return index; + } + ++static void pstate_update_perf(struct amd_cpudata *cpudata, u32 min_perf, ++ u32 des_perf, u32 max_perf, bool fast_switch) ++{ ++ if (fast_switch) ++ wrmsrl(MSR_AMD_CPPC_REQ, READ_ONCE(cpudata->cppc_req_cached)); ++ else ++ wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, ++ READ_ONCE(cpudata->cppc_req_cached)); ++} ++ ++DEFINE_STATIC_CALL(amd_pstate_update_perf, pstate_update_perf); ++ ++static inline void amd_pstate_update_perf(struct amd_cpudata *cpudata, ++ u32 min_perf, u32 des_perf, ++ u32 max_perf, bool fast_switch) ++{ ++ static_call(amd_pstate_update_perf)(cpudata, min_perf, des_perf, ++ max_perf, fast_switch); ++} ++ + static int amd_pstate_set_epp(struct amd_cpudata *cpudata, u32 epp) + { + int ret; +@@ -191,6 +211,9 @@ static int amd_pstate_set_epp(struct amd_cpudata *cpudata, u32 epp) + if (!ret) + cpudata->epp_cached = epp; + } else { ++ amd_pstate_update_perf(cpudata, cpudata->min_limit_perf, 0U, ++ cpudata->max_limit_perf, false); ++ + perf_ctrls.energy_perf = epp; + ret = cppc_set_epp_perf(cpudata->cpu, &perf_ctrls, 1); + if (ret) { +@@ -361,16 +384,6 @@ static inline int amd_pstate_init_perf(struct amd_cpudata *cpudata) + return static_call(amd_pstate_init_perf)(cpudata); + } + +-static void pstate_update_perf(struct amd_cpudata *cpudata, u32 min_perf, +- u32 des_perf, u32 max_perf, bool fast_switch) +-{ +- if (fast_switch) +- wrmsrl(MSR_AMD_CPPC_REQ, READ_ONCE(cpudata->cppc_req_cached)); +- else +- wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, +- READ_ONCE(cpudata->cppc_req_cached)); +-} +- + static void cppc_update_perf(struct amd_cpudata *cpudata, + u32 min_perf, u32 des_perf, + u32 max_perf, bool fast_switch) +@@ -384,16 +397,6 @@ static void cppc_update_perf(struct amd_cpudata *cpudata, + cppc_set_perf(cpudata->cpu, &perf_ctrls); + } + +-DEFINE_STATIC_CALL(amd_pstate_update_perf, pstate_update_perf); +- +-static inline void amd_pstate_update_perf(struct amd_cpudata *cpudata, +- u32 min_perf, u32 des_perf, +- u32 max_perf, bool fast_switch) +-{ +- static_call(amd_pstate_update_perf)(cpudata, min_perf, des_perf, +- max_perf, fast_switch); +-} +- + static inline bool amd_pstate_sample(struct amd_cpudata *cpudata) + { + u64 aperf, mperf, tsc; +-- +2.43.0 + diff --git a/queue-6.6/cpufreq-amd-pstate-ut-convert-nominal_freq-to-khz-du.patch b/queue-6.6/cpufreq-amd-pstate-ut-convert-nominal_freq-to-khz-du.patch new file mode 100644 index 00000000000..0ef76ee322d --- /dev/null +++ b/queue-6.6/cpufreq-amd-pstate-ut-convert-nominal_freq-to-khz-du.patch @@ -0,0 +1,73 @@ +From ac333983a0338e3009be4d5a59af25fb2da7130c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 2 Jul 2024 08:14:13 +0000 +Subject: cpufreq/amd-pstate-ut: Convert nominal_freq to khz during comparisons + +From: Dhananjay Ugwekar + +[ Upstream commit f21ab5ed4e8758b06230900f44b9dcbcfdc0c3ae ] + +cpudata->nominal_freq being in MHz whereas other frequencies being in +KHz breaks the amd-pstate-ut frequency sanity check. This fixes it. + +Fixes: e4731baaf294 ("cpufreq: amd-pstate: Fix the inconsistency in max frequency units") +Reported-by: David Arcari +Signed-off-by: Dhananjay Ugwekar +Reviewed-by: Mario Limonciello +Reviewed-by: Gautham R. Shenoy +Link: https://lore.kernel.org/r/20240702081413.5688-2-Dhananjay.Ugwekar@amd.com +Signed-off-by: Mario Limonciello +Signed-off-by: Sasha Levin +--- + drivers/cpufreq/amd-pstate-ut.c | 12 +++++++----- + 1 file changed, 7 insertions(+), 5 deletions(-) + +diff --git a/drivers/cpufreq/amd-pstate-ut.c b/drivers/cpufreq/amd-pstate-ut.c +index f04ae67dda372..f5e0151f50083 100644 +--- a/drivers/cpufreq/amd-pstate-ut.c ++++ b/drivers/cpufreq/amd-pstate-ut.c +@@ -201,6 +201,7 @@ static void amd_pstate_ut_check_freq(u32 index) + int cpu = 0; + struct cpufreq_policy *policy = NULL; + struct amd_cpudata *cpudata = NULL; ++ u32 nominal_freq_khz; + + for_each_possible_cpu(cpu) { + policy = cpufreq_cpu_get(cpu); +@@ -208,13 +209,14 @@ static void amd_pstate_ut_check_freq(u32 index) + break; + cpudata = policy->driver_data; + +- if (!((cpudata->max_freq >= cpudata->nominal_freq) && +- (cpudata->nominal_freq > cpudata->lowest_nonlinear_freq) && ++ nominal_freq_khz = cpudata->nominal_freq*1000; ++ if (!((cpudata->max_freq >= nominal_freq_khz) && ++ (nominal_freq_khz > cpudata->lowest_nonlinear_freq) && + (cpudata->lowest_nonlinear_freq > cpudata->min_freq) && + (cpudata->min_freq > 0))) { + amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL; + pr_err("%s cpu%d max=%d >= nominal=%d > lowest_nonlinear=%d > min=%d > 0, the formula is incorrect!\n", +- __func__, cpu, cpudata->max_freq, cpudata->nominal_freq, ++ __func__, cpu, cpudata->max_freq, nominal_freq_khz, + cpudata->lowest_nonlinear_freq, cpudata->min_freq); + goto skip_test; + } +@@ -228,13 +230,13 @@ static void amd_pstate_ut_check_freq(u32 index) + + if (cpudata->boost_supported) { + if ((policy->max == cpudata->max_freq) || +- (policy->max == cpudata->nominal_freq)) ++ (policy->max == nominal_freq_khz)) + amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_PASS; + else { + amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL; + pr_err("%s cpu%d policy_max=%d should be equal cpu_max=%d or cpu_nominal=%d !\n", + __func__, cpu, policy->max, cpudata->max_freq, +- cpudata->nominal_freq); ++ nominal_freq_khz); + goto skip_test; + } + } else { +-- +2.43.0 + diff --git a/queue-6.6/cpufreq-ti-cpufreq-handle-deferred-probe-with-dev_er.patch b/queue-6.6/cpufreq-ti-cpufreq-handle-deferred-probe-with-dev_er.patch new file mode 100644 index 00000000000..7a3481466d5 --- /dev/null +++ b/queue-6.6/cpufreq-ti-cpufreq-handle-deferred-probe-with-dev_er.patch @@ -0,0 +1,36 @@ +From 08989e0da9d0ca036f0cb3a27a45b46c9e2ae547 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 Jun 2024 08:58:47 +0200 +Subject: cpufreq: ti-cpufreq: Handle deferred probe with dev_err_probe() + +From: Primoz Fiser + +[ Upstream commit 101388b8ef1027be72e399beeb97293cce67bb24 ] + +Handle deferred probing gracefully by using dev_err_probe() to not +spam console with unnecessary error messages. + +Fixes: f88d152dc739 ("cpufreq: ti: Migrate to dev_pm_opp_set_config()") +Signed-off-by: Primoz Fiser +Signed-off-by: Viresh Kumar +Signed-off-by: Sasha Levin +--- + drivers/cpufreq/ti-cpufreq.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c +index 3c37d78996607..d88ee87b1cd6f 100644 +--- a/drivers/cpufreq/ti-cpufreq.c ++++ b/drivers/cpufreq/ti-cpufreq.c +@@ -418,7 +418,7 @@ static int ti_cpufreq_probe(struct platform_device *pdev) + + ret = dev_pm_opp_set_config(opp_data->cpu_dev, &config); + if (ret < 0) { +- dev_err(opp_data->cpu_dev, "Failed to set OPP config\n"); ++ dev_err_probe(opp_data->cpu_dev, ret, "Failed to set OPP config\n"); + goto fail_put_node; + } + +-- +2.43.0 + diff --git a/queue-6.6/crypto-qat-extend-scope-of-lock-in-adf_cfg_add_key_v.patch b/queue-6.6/crypto-qat-extend-scope-of-lock-in-adf_cfg_add_key_v.patch new file mode 100644 index 00000000000..2f61fbb01b8 --- /dev/null +++ b/queue-6.6/crypto-qat-extend-scope-of-lock-in-adf_cfg_add_key_v.patch @@ -0,0 +1,52 @@ +From 99b152723620d8ad7683c6e246fd53404aa63763 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 Jun 2024 15:38:50 +0100 +Subject: crypto: qat - extend scope of lock in adf_cfg_add_key_value_param() + +From: Nivas Varadharajan Mugunthakumar + +[ Upstream commit 6424da7d8b938fe66e7e771eaa949bc7b6c29c00 ] + +The function adf_cfg_add_key_value_param() attempts to access and modify +the key value store of the driver without locking. + +Extend the scope of cfg->lock to avoid a potential race condition. + +Fixes: 92bf269fbfe9 ("crypto: qat - change behaviour of adf_cfg_add_key_value_param()") +Signed-off-by: Nivas Varadharajan Mugunthakumar +Signed-off-by: Giovanni Cabiddu +Signed-off-by: Herbert Xu +Signed-off-by: Sasha Levin +--- + drivers/crypto/intel/qat/qat_common/adf_cfg.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/drivers/crypto/intel/qat/qat_common/adf_cfg.c b/drivers/crypto/intel/qat/qat_common/adf_cfg.c +index 8836f015c39c4..2cf102ad4ca82 100644 +--- a/drivers/crypto/intel/qat/qat_common/adf_cfg.c ++++ b/drivers/crypto/intel/qat/qat_common/adf_cfg.c +@@ -290,17 +290,19 @@ int adf_cfg_add_key_value_param(struct adf_accel_dev *accel_dev, + * 3. if the key exists with the same value, then return without doing + * anything (the newly created key_val is freed). + */ ++ down_write(&cfg->lock); + if (!adf_cfg_key_val_get(accel_dev, section_name, key, temp_val)) { + if (strncmp(temp_val, key_val->val, sizeof(temp_val))) { + adf_cfg_keyval_remove(key, section); + } else { + kfree(key_val); +- return 0; ++ goto out; + } + } + +- down_write(&cfg->lock); + adf_cfg_keyval_add(key_val, section); ++ ++out: + up_write(&cfg->lock); + return 0; + } +-- +2.43.0 + diff --git a/queue-6.6/drm-amd-pm-fix-aldebaran-pcie-speed-reporting.patch b/queue-6.6/drm-amd-pm-fix-aldebaran-pcie-speed-reporting.patch new file mode 100644 index 00000000000..d62d2e7de90 --- /dev/null +++ b/queue-6.6/drm-amd-pm-fix-aldebaran-pcie-speed-reporting.patch @@ -0,0 +1,39 @@ +From f684a6aeb2eadbd5c77bef9e4c4b961aa38dbc84 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 9 May 2024 14:14:10 +0530 +Subject: drm/amd/pm: Fix aldebaran pcie speed reporting + +From: Lijo Lazar + +[ Upstream commit b6420021e17e262c57bb289d0556ee181b014f9c ] + +Fix the field definitions for LC_CURRENT_DATA_RATE. + +Fixes: c05d1c401572 ("drm/amd/swsmu: add aldebaran smu13 ip support (v3)") +Signed-off-by: Lijo Lazar +Reviewed-by: Asad Kamal +Reviewed-by: Yang Wang +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c +index c097aed4722b9..c0adfa46ac789 100644 +--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c ++++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c +@@ -79,8 +79,8 @@ MODULE_FIRMWARE("amdgpu/smu_13_0_10.bin"); + #define PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD_MASK 0x00000070L + #define PCIE_LC_LINK_WIDTH_CNTL__LC_LINK_WIDTH_RD__SHIFT 0x4 + #define smnPCIE_LC_SPEED_CNTL 0x11140290 +-#define PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE_MASK 0xC000 +-#define PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE__SHIFT 0xE ++#define PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE_MASK 0xE0 ++#define PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE__SHIFT 0x5 + + static const int link_width[] = {0, 1, 2, 4, 8, 12, 16}; + +-- +2.43.0 + diff --git a/queue-6.6/drm-amdgpu-check-if-nbio-funcs-are-null-in-amdgpu_de.patch b/queue-6.6/drm-amdgpu-check-if-nbio-funcs-are-null-in-amdgpu_de.patch new file mode 100644 index 00000000000..1f6c9a2c358 --- /dev/null +++ b/queue-6.6/drm-amdgpu-check-if-nbio-funcs-are-null-in-amdgpu_de.patch @@ -0,0 +1,43 @@ +From 5f81b0f2d354e53de725e32f82d694333b42c53f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 14 May 2024 09:06:38 +0200 +Subject: drm/amdgpu: Check if NBIO funcs are NULL in amdgpu_device_baco_exit +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Friedrich Vock + +[ Upstream commit 0cdb3f9740844b9d95ca413e3fcff11f81223ecf ] + +The special case for VM passthrough doesn't check adev->nbio.funcs +before dereferencing it. If GPUs that don't have an NBIO block are +passed through, this leads to a NULL pointer dereference on startup. + +Signed-off-by: Friedrich Vock +Fixes: 1bece222eabe ("drm/amdgpu: Clear doorbell interrupt status for Sienna Cichlid") +Cc: Alex Deucher +Cc: Christian König +Acked-by: Christian König +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +index e1227b7c71b16..ea1bce13db941 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +@@ -5645,7 +5645,7 @@ int amdgpu_device_baco_exit(struct drm_device *dev) + adev->nbio.funcs->enable_doorbell_interrupt) + adev->nbio.funcs->enable_doorbell_interrupt(adev, true); + +- if (amdgpu_passthrough(adev) && ++ if (amdgpu_passthrough(adev) && adev->nbio.funcs && + adev->nbio.funcs->clear_doorbell_interrupt) + adev->nbio.funcs->clear_doorbell_interrupt(adev); + +-- +2.43.0 + diff --git a/queue-6.6/drm-amdgpu-fix-memory-range-calculation.patch b/queue-6.6/drm-amdgpu-fix-memory-range-calculation.patch new file mode 100644 index 00000000000..4caa9b9fa32 --- /dev/null +++ b/queue-6.6/drm-amdgpu-fix-memory-range-calculation.patch @@ -0,0 +1,42 @@ +From 89cc63d5d7249d57dbeaff95252fdf19b558a6e5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 10 May 2024 13:30:34 +0530 +Subject: drm/amdgpu: Fix memory range calculation +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Lijo Lazar + +[ Upstream commit ce798376ef6764de51d8f4684ae525b55df295fa ] + +Consider the 16M reserved region also before range calculation for GMC +9.4.3 SOCs. + +Fixes: a433f1f59484 ("drm/amdgpu: Initialize memory ranges for GC 9.4.3") +Signed-off-by: Lijo Lazar +Acked-by: Christian König +Reviewed-by: Le Ma +Reviewed-by: Hawking Zhang +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +index 8ace3f6210d37..6d2b9d260d92c 100644 +--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c ++++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +@@ -1949,7 +1949,7 @@ gmc_v9_0_init_sw_mem_ranges(struct amdgpu_device *adev, + break; + } + +- size = adev->gmc.real_vram_size >> AMDGPU_GPU_PAGE_SHIFT; ++ size = (adev->gmc.real_vram_size + SZ_16M) >> AMDGPU_GPU_PAGE_SHIFT; + size /= adev->gmc.num_mem_partitions; + + for (i = 0; i < adev->gmc.num_mem_partitions; ++i) { +-- +2.43.0 + diff --git a/queue-6.6/drm-amdgpu-remove-gc-hw-ip-9.3.0-from-noretry-1.patch b/queue-6.6/drm-amdgpu-remove-gc-hw-ip-9.3.0-from-noretry-1.patch new file mode 100644 index 00000000000..afb302b7ee6 --- /dev/null +++ b/queue-6.6/drm-amdgpu-remove-gc-hw-ip-9.3.0-from-noretry-1.patch @@ -0,0 +1,41 @@ +From cb3d6083aa326a985b64d4486c8ec428ad54cfa4 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 16 May 2024 11:57:25 -0600 +Subject: drm/amdgpu: Remove GC HW IP 9.3.0 from noretry=1 + +From: Tim Van Patten + +[ Upstream commit 1446226d32a45bb7c4f63195a59be8c08defe658 ] + +The following commit updated gmc->noretry from 0 to 1 for GC HW IP +9.3.0: + + commit 5f3854f1f4e2 ("drm/amdgpu: add more cases to noretry=1") + +This causes the device to hang when a page fault occurs, until the +device is rebooted. Instead, revert back to gmc->noretry=0 so the device +is still responsive. + +Fixes: 5f3854f1f4e2 ("drm/amdgpu: add more cases to noretry=1") +Signed-off-by: Tim Van Patten +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c +index bc0eda1a729c5..0b6a0e149f1c4 100644 +--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c ++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c +@@ -650,7 +650,6 @@ void amdgpu_gmc_noretry_set(struct amdgpu_device *adev) + struct amdgpu_gmc *gmc = &adev->gmc; + uint32_t gc_ver = adev->ip_versions[GC_HWIP][0]; + bool noretry_default = (gc_ver == IP_VERSION(9, 0, 1) || +- gc_ver == IP_VERSION(9, 3, 0) || + gc_ver == IP_VERSION(9, 4, 0) || + gc_ver == IP_VERSION(9, 4, 1) || + gc_ver == IP_VERSION(9, 4, 2) || +-- +2.43.0 + diff --git a/queue-6.6/drm-amdkfd-fix-cu-masking-for-gfx-9.4.3.patch b/queue-6.6/drm-amdkfd-fix-cu-masking-for-gfx-9.4.3.patch new file mode 100644 index 00000000000..ce14d687aab --- /dev/null +++ b/queue-6.6/drm-amdkfd-fix-cu-masking-for-gfx-9.4.3.patch @@ -0,0 +1,39 @@ +From 6622f2b40ca2c248838c8956efd41a7821558c91 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 9 May 2024 17:29:25 -0400 +Subject: drm/amdkfd: Fix CU Masking for GFX 9.4.3 + +From: Mukul Joshi + +[ Upstream commit 85cf43c554e438e2e12b0fe109688c9533e4d93f ] + +We are incorrectly passing the first XCC's MQD when +updating CU masks for other XCCs in the partition. Fix +this by passing the MQD for the XCC currently being +updated with CU mask to update_cu_mask function. + +Fixes: fc6efed2c728 ("drm/amdkfd: Update CU masking for GFX 9.4.3") +Signed-off-by: Mukul Joshi +Reviewed-by: Harish Kasiviswanathan +Signed-off-by: Alex Deucher +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c +index 42d881809dc70..1ac66c5337df4 100644 +--- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c ++++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c +@@ -686,7 +686,7 @@ static void update_mqd_v9_4_3(struct mqd_manager *mm, void *mqd, + m = get_mqd(mqd + size * xcc); + update_mqd(mm, m, q, minfo); + +- update_cu_mask(mm, mqd, minfo, xcc); ++ update_cu_mask(mm, m, minfo, xcc); + + if (q->format == KFD_QUEUE_FORMAT_AQL) { + switch (xcc) { +-- +2.43.0 + diff --git a/queue-6.6/drm-arm-komeda-fix-komeda-probe-failing-if-there-are.patch b/queue-6.6/drm-arm-komeda-fix-komeda-probe-failing-if-there-are.patch new file mode 100644 index 00000000000..41b3720fa73 --- /dev/null +++ b/queue-6.6/drm-arm-komeda-fix-komeda-probe-failing-if-there-are.patch @@ -0,0 +1,114 @@ +From 1dabec47b26450bfeeee9ca303eabd9a03d54870 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 19 Feb 2024 15:39:13 +0530 +Subject: drm/arm/komeda: Fix komeda probe failing if there are no links in the + secondary pipeline + +From: Faiz Abbas + +[ Upstream commit 9054c46d479b55768adae31031a1afa1b7d62228 ] + +Since commit 4cfe5cc02e3f ("drm/arm/komeda: Remove component framework and +add a simple encoder"), the devm_drm_of_get_bridge() call happens +regardless of whether any remote nodes are available on the pipeline. Fix +this by moving the bridge attach to its own function and calling it +conditional on there being an output link. + +Fixes: 4cfe5cc02e3f ("drm/arm/komeda: Remove component framework and add a simple encoder") +Signed-off-by: Faiz Abbas +[Corrected Commit-id of the fixed patch to match mainline] +Signed-off-by: Liviu Dudau +Acked-by: Liviu Dudau +Link: https://patchwork.freedesktop.org/patch/msgid/20240219100915.192475-2-faiz.abbas@arm.com +Signed-off-by: Sasha Levin +--- + .../gpu/drm/arm/display/komeda/komeda_crtc.c | 43 ++++++++++++++----- + 1 file changed, 32 insertions(+), 11 deletions(-) + +diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c +index 2c661f28410ed..b645c5998230b 100644 +--- a/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c ++++ b/drivers/gpu/drm/arm/display/komeda/komeda_crtc.c +@@ -5,6 +5,7 @@ + * + */ + #include ++#include + #include + #include + +@@ -610,12 +611,34 @@ get_crtc_primary(struct komeda_kms_dev *kms, struct komeda_crtc *crtc) + return NULL; + } + ++static int komeda_attach_bridge(struct device *dev, ++ struct komeda_pipeline *pipe, ++ struct drm_encoder *encoder) ++{ ++ struct drm_bridge *bridge; ++ int err; ++ ++ bridge = devm_drm_of_get_bridge(dev, pipe->of_node, ++ KOMEDA_OF_PORT_OUTPUT, 0); ++ if (IS_ERR(bridge)) ++ return dev_err_probe(dev, PTR_ERR(bridge), "remote bridge not found for pipe: %s\n", ++ of_node_full_name(pipe->of_node)); ++ ++ err = drm_bridge_attach(encoder, bridge, NULL, 0); ++ if (err) ++ dev_err(dev, "bridge_attach() failed for pipe: %s\n", ++ of_node_full_name(pipe->of_node)); ++ ++ return err; ++} ++ + static int komeda_crtc_add(struct komeda_kms_dev *kms, + struct komeda_crtc *kcrtc) + { + struct drm_crtc *crtc = &kcrtc->base; + struct drm_device *base = &kms->base; +- struct drm_bridge *bridge; ++ struct komeda_pipeline *pipe = kcrtc->master; ++ struct drm_encoder *encoder = &kcrtc->encoder; + int err; + + err = drm_crtc_init_with_planes(base, crtc, +@@ -626,27 +649,25 @@ static int komeda_crtc_add(struct komeda_kms_dev *kms, + + drm_crtc_helper_add(crtc, &komeda_crtc_helper_funcs); + +- crtc->port = kcrtc->master->of_output_port; ++ crtc->port = pipe->of_output_port; + + /* Construct an encoder for each pipeline and attach it to the remote + * bridge + */ + kcrtc->encoder.possible_crtcs = drm_crtc_mask(crtc); +- err = drm_simple_encoder_init(base, &kcrtc->encoder, +- DRM_MODE_ENCODER_TMDS); ++ err = drm_simple_encoder_init(base, encoder, DRM_MODE_ENCODER_TMDS); + if (err) + return err; + +- bridge = devm_drm_of_get_bridge(base->dev, kcrtc->master->of_node, +- KOMEDA_OF_PORT_OUTPUT, 0); +- if (IS_ERR(bridge)) +- return PTR_ERR(bridge); +- +- err = drm_bridge_attach(&kcrtc->encoder, bridge, NULL, 0); ++ if (pipe->of_output_links[0]) { ++ err = komeda_attach_bridge(base->dev, pipe, encoder); ++ if (err) ++ return err; ++ } + + drm_crtc_enable_color_mgmt(crtc, 0, true, KOMEDA_COLOR_LUT_SIZE); + +- return err; ++ return 0; + } + + int komeda_kms_add_crtcs(struct komeda_kms_dev *kms, struct komeda_dev *mdev) +-- +2.43.0 + diff --git a/queue-6.6/drm-bridge-fixed-a-dp-link-training-bug.patch b/queue-6.6/drm-bridge-fixed-a-dp-link-training-bug.patch new file mode 100644 index 00000000000..99793cb2c9c --- /dev/null +++ b/queue-6.6/drm-bridge-fixed-a-dp-link-training-bug.patch @@ -0,0 +1,52 @@ +From 4b754950e249efcefeba6f08a9479752bd27bcdf Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 21 Dec 2023 17:30:57 +0800 +Subject: drm/bridge: Fixed a DP link training bug + +From: xiazhengqiao + +[ Upstream commit ca077ff8cac5af8a5a3c476983a6dd54aa3511b7 ] + +To have better compatibility for DP sink, there is a retry mechanism +for the link training process to switch between different training process. +The original driver code doesn't reset the retry counter when training +state is pass. If the system triggers link training over 3 times, +there will be a chance to causes the driver to use the wrong training +method and return a training fail result. + +To Fix this, we reset the retry counter when training state is pass +each time. + +Signed-off-by: Allen Chen +Signed-off-by: xiazhengqiao +Reviewed-by: Robert Foss +Signed-off-by: Robert Foss +Link: https://patchwork.freedesktop.org/patch/msgid/20231221093057.7073-1-xiazhengqiao@huaqin.corp-partner.google.com +Stable-dep-of: 484436ec5c2b ("drm/bridge: it6505: fix hibernate to resume no display issue") +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/bridge/ite-it6505.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c +index 2f300f5ca051c..b589136ca6da9 100644 +--- a/drivers/gpu/drm/bridge/ite-it6505.c ++++ b/drivers/gpu/drm/bridge/ite-it6505.c +@@ -2240,11 +2240,13 @@ static void it6505_link_training_work(struct work_struct *work) + ret = it6505_link_start_auto_train(it6505); + DRM_DEV_DEBUG_DRIVER(dev, "auto train %s, auto_train_retry: %d", + ret ? "pass" : "failed", it6505->auto_train_retry); +- it6505->auto_train_retry--; + + if (ret) { ++ it6505->auto_train_retry = AUTO_TRAIN_RETRY; + it6505_link_train_ok(it6505); + return; ++ } else { ++ it6505->auto_train_retry--; + } + + it6505_dump(it6505); +-- +2.43.0 + diff --git a/queue-6.6/drm-bridge-it6505-fix-hibernate-to-resume-no-display.patch b/queue-6.6/drm-bridge-it6505-fix-hibernate-to-resume-no-display.patch new file mode 100644 index 00000000000..37a213fbac9 --- /dev/null +++ b/queue-6.6/drm-bridge-it6505-fix-hibernate-to-resume-no-display.patch @@ -0,0 +1,162 @@ +From 72d083801458500681dd6dc5fa08516a73a8e40b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 22 May 2024 14:55:28 +0800 +Subject: drm/bridge: it6505: fix hibernate to resume no display issue + +From: Kuro Chung + +[ Upstream commit 484436ec5c2bffe8f346a09ae1cbc4cbf5e50005 ] + +When the system power resumes, the TTL input of IT6505 may experience +some noise before the video signal stabilizes, necessitating a video +reset. This patch is implemented to prevent a loop of video error +interrupts, which can occur when a video reset in the video FIFO error +interrupt triggers another such interrupt. The patch processes the SCDT +and FIFO error interrupts simultaneously and ignores any video FIFO +error interrupts caused by a video reset. + +Fixes: b5c84a9edcd4 ("drm/bridge: add it6505 driver") +Signed-off-by: Kuro Chung +Signed-off-by: Hermes Wu +Reviewed-by: AngeloGioacchino Del Regno +Signed-off-by: Robert Foss +Link: https://patchwork.freedesktop.org/patch/msgid/20240522065528.1053439-1-kuro.chung@ite.com.tw +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/bridge/ite-it6505.c | 73 +++++++++++++++++++---------- + 1 file changed, 49 insertions(+), 24 deletions(-) + +diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c +index b589136ca6da9..4ad527fe04f27 100644 +--- a/drivers/gpu/drm/bridge/ite-it6505.c ++++ b/drivers/gpu/drm/bridge/ite-it6505.c +@@ -1306,9 +1306,15 @@ static void it6505_video_reset(struct it6505 *it6505) + it6505_link_reset_step_train(it6505); + it6505_set_bits(it6505, REG_DATA_MUTE_CTRL, EN_VID_MUTE, EN_VID_MUTE); + it6505_set_bits(it6505, REG_INFOFRAME_CTRL, EN_VID_CTRL_PKT, 0x00); +- it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, VIDEO_RESET); ++ ++ it6505_set_bits(it6505, REG_VID_BUS_CTRL1, TX_FIFO_RESET, TX_FIFO_RESET); ++ it6505_set_bits(it6505, REG_VID_BUS_CTRL1, TX_FIFO_RESET, 0x00); ++ + it6505_set_bits(it6505, REG_501_FIFO_CTRL, RST_501_FIFO, RST_501_FIFO); + it6505_set_bits(it6505, REG_501_FIFO_CTRL, RST_501_FIFO, 0x00); ++ ++ it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, VIDEO_RESET); ++ usleep_range(1000, 2000); + it6505_set_bits(it6505, REG_RESET_CTRL, VIDEO_RESET, 0x00); + } + +@@ -2244,12 +2250,11 @@ static void it6505_link_training_work(struct work_struct *work) + if (ret) { + it6505->auto_train_retry = AUTO_TRAIN_RETRY; + it6505_link_train_ok(it6505); +- return; + } else { + it6505->auto_train_retry--; ++ it6505_dump(it6505); + } + +- it6505_dump(it6505); + } + + static void it6505_plugged_status_to_codec(struct it6505 *it6505) +@@ -2470,31 +2475,53 @@ static void it6505_irq_link_train_fail(struct it6505 *it6505) + schedule_work(&it6505->link_works); + } + +-static void it6505_irq_video_fifo_error(struct it6505 *it6505) ++static bool it6505_test_bit(unsigned int bit, const unsigned int *addr) + { +- struct device *dev = it6505->dev; +- +- DRM_DEV_DEBUG_DRIVER(dev, "video fifo overflow interrupt"); +- it6505->auto_train_retry = AUTO_TRAIN_RETRY; +- flush_work(&it6505->link_works); +- it6505_stop_hdcp(it6505); +- it6505_video_reset(it6505); ++ return 1 & (addr[bit / BITS_PER_BYTE] >> (bit % BITS_PER_BYTE)); + } + +-static void it6505_irq_io_latch_fifo_overflow(struct it6505 *it6505) ++static void it6505_irq_video_handler(struct it6505 *it6505, const int *int_status) + { + struct device *dev = it6505->dev; ++ int reg_0d, reg_int03; + +- DRM_DEV_DEBUG_DRIVER(dev, "IO latch fifo overflow interrupt"); +- it6505->auto_train_retry = AUTO_TRAIN_RETRY; +- flush_work(&it6505->link_works); +- it6505_stop_hdcp(it6505); +- it6505_video_reset(it6505); +-} ++ /* ++ * When video SCDT change with video not stable, ++ * Or video FIFO error, need video reset ++ */ + +-static bool it6505_test_bit(unsigned int bit, const unsigned int *addr) +-{ +- return 1 & (addr[bit / BITS_PER_BYTE] >> (bit % BITS_PER_BYTE)); ++ if ((!it6505_get_video_status(it6505) && ++ (it6505_test_bit(INT_SCDT_CHANGE, (unsigned int *)int_status))) || ++ (it6505_test_bit(BIT_INT_IO_FIFO_OVERFLOW, ++ (unsigned int *)int_status)) || ++ (it6505_test_bit(BIT_INT_VID_FIFO_ERROR, ++ (unsigned int *)int_status))) { ++ it6505->auto_train_retry = AUTO_TRAIN_RETRY; ++ flush_work(&it6505->link_works); ++ it6505_stop_hdcp(it6505); ++ it6505_video_reset(it6505); ++ ++ usleep_range(10000, 11000); ++ ++ /* ++ * Clear FIFO error IRQ to prevent fifo error -> reset loop ++ * HW will trigger SCDT change IRQ again when video stable ++ */ ++ ++ reg_int03 = it6505_read(it6505, INT_STATUS_03); ++ reg_0d = it6505_read(it6505, REG_SYSTEM_STS); ++ ++ reg_int03 &= (BIT(INT_VID_FIFO_ERROR) | BIT(INT_IO_LATCH_FIFO_OVERFLOW)); ++ it6505_write(it6505, INT_STATUS_03, reg_int03); ++ ++ DRM_DEV_DEBUG_DRIVER(dev, "reg08 = 0x%02x", reg_int03); ++ DRM_DEV_DEBUG_DRIVER(dev, "reg0D = 0x%02x", reg_0d); ++ ++ return; ++ } ++ ++ if (it6505_test_bit(INT_SCDT_CHANGE, (unsigned int *)int_status)) ++ it6505_irq_scdt(it6505); + } + + static irqreturn_t it6505_int_threaded_handler(int unused, void *data) +@@ -2507,15 +2534,12 @@ static irqreturn_t it6505_int_threaded_handler(int unused, void *data) + } irq_vec[] = { + { BIT_INT_HPD, it6505_irq_hpd }, + { BIT_INT_HPD_IRQ, it6505_irq_hpd_irq }, +- { BIT_INT_SCDT, it6505_irq_scdt }, + { BIT_INT_HDCP_FAIL, it6505_irq_hdcp_fail }, + { BIT_INT_HDCP_DONE, it6505_irq_hdcp_done }, + { BIT_INT_AUX_CMD_FAIL, it6505_irq_aux_cmd_fail }, + { BIT_INT_HDCP_KSV_CHECK, it6505_irq_hdcp_ksv_check }, + { BIT_INT_AUDIO_FIFO_ERROR, it6505_irq_audio_fifo_error }, + { BIT_INT_LINK_TRAIN_FAIL, it6505_irq_link_train_fail }, +- { BIT_INT_VID_FIFO_ERROR, it6505_irq_video_fifo_error }, +- { BIT_INT_IO_FIFO_OVERFLOW, it6505_irq_io_latch_fifo_overflow }, + }; + int int_status[3], i; + +@@ -2545,6 +2569,7 @@ static irqreturn_t it6505_int_threaded_handler(int unused, void *data) + if (it6505_test_bit(irq_vec[i].bit, (unsigned int *)int_status)) + irq_vec[i].handler(it6505); + } ++ it6505_irq_video_handler(it6505, (unsigned int *)int_status); + } + + pm_runtime_put_sync(dev); +-- +2.43.0 + diff --git a/queue-6.6/drm-etnaviv-fix-dma-direction-handling-for-cached-rw.patch b/queue-6.6/drm-etnaviv-fix-dma-direction-handling-for-cached-rw.patch new file mode 100644 index 00000000000..e7bc9f96368 --- /dev/null +++ b/queue-6.6/drm-etnaviv-fix-dma-direction-handling-for-cached-rw.patch @@ -0,0 +1,42 @@ +From 670feac2aed6e7b7317969c0d83d4d6497e89b95 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 21 Jun 2024 19:11:06 +0200 +Subject: drm/etnaviv: fix DMA direction handling for cached RW buffers + +From: Lucas Stach + +[ Upstream commit 58979ad6330a70450ed78837be3095107d022ea9 ] + +The dma sync operation needs to be done with DMA_BIDIRECTIONAL when +the BO is prepared for both read and write operations. + +Fixes: a8c21a5451d8 ("drm/etnaviv: add initial etnaviv DRM driver") +Signed-off-by: Lucas Stach +Reviewed-by: Philipp Zabel +Reviewed-by: Christian Gmeiner +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/etnaviv/etnaviv_gem.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem.c b/drivers/gpu/drm/etnaviv/etnaviv_gem.c +index b5f73502e3dd4..69fccbcd92c62 100644 +--- a/drivers/gpu/drm/etnaviv/etnaviv_gem.c ++++ b/drivers/gpu/drm/etnaviv/etnaviv_gem.c +@@ -356,9 +356,11 @@ static void *etnaviv_gem_vmap_impl(struct etnaviv_gem_object *obj) + + static inline enum dma_data_direction etnaviv_op_to_dma_dir(u32 op) + { +- if (op & ETNA_PREP_READ) ++ op &= ETNA_PREP_READ | ETNA_PREP_WRITE; ++ ++ if (op == ETNA_PREP_READ) + return DMA_FROM_DEVICE; +- else if (op & ETNA_PREP_WRITE) ++ else if (op == ETNA_PREP_WRITE) + return DMA_TO_DEVICE; + else + return DMA_BIDIRECTIONAL; +-- +2.43.0 + diff --git a/queue-6.6/drm-mediatek-add-missing-plane-settings-when-async-u.patch b/queue-6.6/drm-mediatek-add-missing-plane-settings-when-async-u.patch new file mode 100644 index 00000000000..8444d35267b --- /dev/null +++ b/queue-6.6/drm-mediatek-add-missing-plane-settings-when-async-u.patch @@ -0,0 +1,41 @@ +From 72e7f884940dc861205b98b65158791139d4a330 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 Jun 2024 00:38:41 +0800 +Subject: drm/mediatek: Add missing plane settings when async update + +From: Hsiao Chien Sung + +[ Upstream commit 86b89dc669c400576dc23aa923bcf302f99e8e3a ] + +Fix an issue that plane coordinate was not saved when +calling async update. + +Fixes: 920fffcc8912 ("drm/mediatek: update cursors by using async atomic update") + +Reviewed-by: CK Hu +Reviewed-by: AngeloGioacchino Del Regno +Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.") +Signed-off-by: Hsiao Chien Sung +Link: https://patchwork.kernel.org/project/dri-devel/patch/20240620-igt-v3-1-a9d62d2e2c7e@mediatek.com/ +Signed-off-by: Chun-Kuang Hu +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/mediatek/mtk_drm_plane.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/gpu/drm/mediatek/mtk_drm_plane.c b/drivers/gpu/drm/mediatek/mtk_drm_plane.c +index ddc9355b06d51..f10d4cc6c2234 100644 +--- a/drivers/gpu/drm/mediatek/mtk_drm_plane.c ++++ b/drivers/gpu/drm/mediatek/mtk_drm_plane.c +@@ -227,6 +227,8 @@ static void mtk_plane_atomic_async_update(struct drm_plane *plane, + plane->state->src_y = new_state->src_y; + plane->state->src_h = new_state->src_h; + plane->state->src_w = new_state->src_w; ++ plane->state->dst.x1 = new_state->dst.x1; ++ plane->state->dst.y1 = new_state->dst.y1; + + mtk_plane_update_new_state(new_state, new_plane_state); + swap(plane->state->fb, new_state->fb); +-- +2.43.0 + diff --git a/queue-6.6/drm-mediatek-add-ovl-compatible-name-for-mt8195.patch b/queue-6.6/drm-mediatek-add-ovl-compatible-name-for-mt8195.patch new file mode 100644 index 00000000000..52ee5301e5c --- /dev/null +++ b/queue-6.6/drm-mediatek-add-ovl-compatible-name-for-mt8195.patch @@ -0,0 +1,39 @@ +From b4d9f0450238d514a651ed06b39835f2a23f5338 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 Jun 2024 00:38:47 +0800 +Subject: drm/mediatek: Add OVL compatible name for MT8195 + +From: Hsiao Chien Sung + +[ Upstream commit 6fb7a0985fd16868b5d72eb3e3de7524a6000e6e ] + +Add OVL compatible name for MT8195. +Without this commit, DRM won't work after modifying the device tree. + +Reviewed-by: CK Hu +Reviewed-by: AngeloGioacchino Del Regno +Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.") +Signed-off-by: Hsiao Chien Sung +Link: https://patchwork.kernel.org/project/dri-devel/patch/20240620-igt-v3-7-a9d62d2e2c7e@mediatek.com/ +Signed-off-by: Chun-Kuang Hu +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c +index 37d8113ba92f0..ffe016d6cbcfe 100644 +--- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c ++++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c +@@ -719,6 +719,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = { + .data = (void *)MTK_DISP_OVL }, + { .compatible = "mediatek,mt8192-disp-ovl", + .data = (void *)MTK_DISP_OVL }, ++ { .compatible = "mediatek,mt8195-disp-ovl", ++ .data = (void *)MTK_DISP_OVL }, + { .compatible = "mediatek,mt8183-disp-ovl-2l", + .data = (void *)MTK_DISP_OVL_2L }, + { .compatible = "mediatek,mt8192-disp-ovl-2l", +-- +2.43.0 + diff --git a/queue-6.6/drm-mediatek-dp-fix-spurious-kfree.patch b/queue-6.6/drm-mediatek-dp-fix-spurious-kfree.patch new file mode 100644 index 00000000000..2fb600f1567 --- /dev/null +++ b/queue-6.6/drm-mediatek-dp-fix-spurious-kfree.patch @@ -0,0 +1,49 @@ +From 58f2510db8f12ff92aecbb8faa334e1f892c6234 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 4 Jun 2024 10:33:37 +0200 +Subject: drm/mediatek/dp: Fix spurious kfree() + +From: Michael Walle + +[ Upstream commit 8ad49a92cff4bab13eb2f2725243f5f31eff3f3b ] + +drm_edid_to_sad() might return an error or just zero. If that is the +case, we must not free the SADs because there was no allocation in +the first place. + +Fixes: dab12fa8d2bd ("drm/mediatek/dp: fix memory leak on ->get_edid callback audio detection") +Signed-off-by: Michael Walle +Reviewed-by: AngeloGioacchino Del Regno +Reviewed-by: Jani Nikula +Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20240604083337.1879188-1-mwalle@kernel.org/ +Signed-off-by: Chun-Kuang Hu +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/mediatek/mtk_dp.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c +index ff8436fb6e0d8..48a4defbc66cc 100644 +--- a/drivers/gpu/drm/mediatek/mtk_dp.c ++++ b/drivers/gpu/drm/mediatek/mtk_dp.c +@@ -2058,9 +2058,15 @@ static const struct drm_edid *mtk_dp_edid_read(struct drm_bridge *bridge, + */ + const struct edid *edid = drm_edid_raw(drm_edid); + struct cea_sad *sads; ++ int ret; + +- audio_caps->sad_count = drm_edid_to_sad(edid, &sads); +- kfree(sads); ++ ret = drm_edid_to_sad(edid, &sads); ++ /* Ignore any errors */ ++ if (ret < 0) ++ ret = 0; ++ if (ret) ++ kfree(sads); ++ audio_caps->sad_count = ret; + + /* + * FIXME: This should use connector->display_info.has_audio from +-- +2.43.0 + diff --git a/queue-6.6/drm-mediatek-dp-switch-to-edid_read-callback.patch b/queue-6.6/drm-mediatek-dp-switch-to-edid_read-callback.patch new file mode 100644 index 00000000000..fb6c2d08eae --- /dev/null +++ b/queue-6.6/drm-mediatek-dp-switch-to-edid_read-callback.patch @@ -0,0 +1,102 @@ +From 265faf6ca59be092b8b85456fd7f23d23aa49dee Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 23 Jan 2024 21:37:32 +0200 +Subject: drm/mediatek/dp: switch to ->edid_read callback + +From: Jani Nikula + +[ Upstream commit 0c13bd9bf444b0dfb2e9ea0d26915f310cc8ad6a ] + +Prefer using the struct drm_edid based callback and functions. + +Signed-off-by: Jani Nikula +Reviewed-by: Neil Armstrong +Link: https://patchwork.freedesktop.org/patch/msgid/3d783478e25e71f12f66c2caedb1f9205d4d8a44.1706038510.git.jani.nikula@intel.com +Stable-dep-of: 8ad49a92cff4 ("drm/mediatek/dp: Fix spurious kfree()") +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/mediatek/mtk_dp.c | 31 ++++++++++++++++++++----------- + 1 file changed, 20 insertions(+), 11 deletions(-) + +diff --git a/drivers/gpu/drm/mediatek/mtk_dp.c b/drivers/gpu/drm/mediatek/mtk_dp.c +index af03a22772fed..ff8436fb6e0d8 100644 +--- a/drivers/gpu/drm/mediatek/mtk_dp.c ++++ b/drivers/gpu/drm/mediatek/mtk_dp.c +@@ -2027,12 +2027,12 @@ static enum drm_connector_status mtk_dp_bdg_detect(struct drm_bridge *bridge) + return ret; + } + +-static struct edid *mtk_dp_get_edid(struct drm_bridge *bridge, +- struct drm_connector *connector) ++static const struct drm_edid *mtk_dp_edid_read(struct drm_bridge *bridge, ++ struct drm_connector *connector) + { + struct mtk_dp *mtk_dp = mtk_dp_from_bridge(bridge); + bool enabled = mtk_dp->enabled; +- struct edid *new_edid = NULL; ++ const struct drm_edid *drm_edid; + struct mtk_dp_audio_cfg *audio_caps = &mtk_dp->info.audio_cur_cfg; + + if (!enabled) { +@@ -2040,7 +2040,7 @@ static struct edid *mtk_dp_get_edid(struct drm_bridge *bridge, + mtk_dp_aux_panel_poweron(mtk_dp, true); + } + +- new_edid = drm_get_edid(connector, &mtk_dp->aux.ddc); ++ drm_edid = drm_edid_read_ddc(connector, &mtk_dp->aux.ddc); + + /* + * Parse capability here to let atomic_get_input_bus_fmts and +@@ -2048,17 +2048,26 @@ static struct edid *mtk_dp_get_edid(struct drm_bridge *bridge, + */ + if (mtk_dp_parse_capabilities(mtk_dp)) { + drm_err(mtk_dp->drm_dev, "Can't parse capabilities\n"); +- kfree(new_edid); +- new_edid = NULL; ++ drm_edid_free(drm_edid); ++ drm_edid = NULL; + } + +- if (new_edid) { ++ if (drm_edid) { ++ /* ++ * FIXME: get rid of drm_edid_raw() ++ */ ++ const struct edid *edid = drm_edid_raw(drm_edid); + struct cea_sad *sads; + +- audio_caps->sad_count = drm_edid_to_sad(new_edid, &sads); ++ audio_caps->sad_count = drm_edid_to_sad(edid, &sads); + kfree(sads); + +- audio_caps->detect_monitor = drm_detect_monitor_audio(new_edid); ++ /* ++ * FIXME: This should use connector->display_info.has_audio from ++ * a path that has read the EDID and called ++ * drm_edid_connector_update(). ++ */ ++ audio_caps->detect_monitor = drm_detect_monitor_audio(edid); + } + + if (!enabled) { +@@ -2066,7 +2075,7 @@ static struct edid *mtk_dp_get_edid(struct drm_bridge *bridge, + drm_atomic_bridge_chain_post_disable(bridge, connector->state->state); + } + +- return new_edid; ++ return drm_edid; + } + + static ssize_t mtk_dp_aux_transfer(struct drm_dp_aux *mtk_aux, +@@ -2418,7 +2427,7 @@ static const struct drm_bridge_funcs mtk_dp_bridge_funcs = { + .atomic_enable = mtk_dp_bridge_atomic_enable, + .atomic_disable = mtk_dp_bridge_atomic_disable, + .mode_valid = mtk_dp_bridge_mode_valid, +- .get_edid = mtk_dp_get_edid, ++ .edid_read = mtk_dp_edid_read, + .detect = mtk_dp_bdg_detect, + }; + +-- +2.43.0 + diff --git a/queue-6.6/drm-mediatek-fix-destination-alpha-error-in-ovl.patch b/queue-6.6/drm-mediatek-fix-destination-alpha-error-in-ovl.patch new file mode 100644 index 00000000000..61dbf810321 --- /dev/null +++ b/queue-6.6/drm-mediatek-fix-destination-alpha-error-in-ovl.patch @@ -0,0 +1,70 @@ +From 5d63145fcc0b6408b7ecd9101450e8a785cd2cdc Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 Jun 2024 00:38:45 +0800 +Subject: drm/mediatek: Fix destination alpha error in OVL + +From: Hsiao Chien Sung + +[ Upstream commit 31c0fbf67c8c0bb38d7fb21d404ea3dbd619d99e ] + +The formula of Coverage alpha blending is: +dst.a = dst.a * (0xff - src.a * SCA / 0xff) / 0xff + + src.a * SCA / 0xff + +dst.a: destination alpha +src.a: pixel alpha +SCA : plane alpha + +When SCA = 0xff, the formula becomes: +dst.a = dst.a * (0xff - src.a) + src.a + +This patch is to set the destination alpha (background) to 0xff: +- When dst.a = 0 (before), dst.a = src.a +- When dst.a = 0xff (after) , dst.a = 0xff * (0xff - src.a) + src.a + +According to the fomula above: +- When src.a = 0 , dst.a = 0 +- When src.a = 0xff, dst.a = 0xff +This two cases are just still correct. But when src.a is +between 0 and 0xff, the difference starts to appear + +Fixes: 616443ca577e ("drm/mediatek: Move cmdq_reg info from struct mtk_ddp_comp to sub driver private data") +Signed-off-by: Hsiao Chien Sung +Link: https://patchwork.kernel.org/project/dri-devel/patch/20240620-igt-v3-5-a9d62d2e2c7e@mediatek.com/ +Signed-off-by: Chun-Kuang Hu +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 10 +++++++++- + 1 file changed, 9 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +index 6c25fbc3db294..6f15069da8b02 100644 +--- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c ++++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +@@ -72,6 +72,8 @@ + #define OVL_CON_VIRT_FLIP BIT(9) + #define OVL_CON_HORZ_FLIP BIT(10) + ++#define OVL_COLOR_ALPHA GENMASK(31, 24) ++ + static const u32 mt8173_formats[] = { + DRM_FORMAT_XRGB8888, + DRM_FORMAT_ARGB8888, +@@ -274,7 +276,13 @@ void mtk_ovl_config(struct device *dev, unsigned int w, + if (w != 0 && h != 0) + mtk_ddp_write_relaxed(cmdq_pkt, h << 16 | w, &ovl->cmdq_reg, ovl->regs, + DISP_REG_OVL_ROI_SIZE); +- mtk_ddp_write_relaxed(cmdq_pkt, 0x0, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_ROI_BGCLR); ++ ++ /* ++ * The background color must be opaque black (ARGB), ++ * otherwise the alpha blending will have no effect ++ */ ++ mtk_ddp_write_relaxed(cmdq_pkt, OVL_COLOR_ALPHA, &ovl->cmdq_reg, ++ ovl->regs, DISP_REG_OVL_ROI_BGCLR); + + mtk_ddp_write(cmdq_pkt, 0x1, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_RST); + mtk_ddp_write(cmdq_pkt, 0x0, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_RST); +-- +2.43.0 + diff --git a/queue-6.6/drm-mediatek-fix-xrgb-setting-error-in-mixer.patch b/queue-6.6/drm-mediatek-fix-xrgb-setting-error-in-mixer.patch new file mode 100644 index 00000000000..3639f8b1cc5 --- /dev/null +++ b/queue-6.6/drm-mediatek-fix-xrgb-setting-error-in-mixer.patch @@ -0,0 +1,56 @@ +From a326be785ca2cb24c12ad5833f8faa60d3feaa1d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 Jun 2024 00:38:44 +0800 +Subject: drm/mediatek: Fix XRGB setting error in Mixer + +From: Hsiao Chien Sung + +[ Upstream commit 8e418bee401b7cfd0bc40d187afea2c6b08b44ec ] + +Although the alpha channel in XRGB formats can be ignored, ALPHA_CON +must be configured accordingly when using XRGB formats or it will still +affects CRC generation. + +Fixes: d886c0009bd0 ("drm/mediatek: Add ETHDR support for MT8195") +Reviewed-by: CK Hu +Reviewed-by: AngeloGioacchino Del Regno +Signed-off-by: Hsiao Chien Sung +Link: https://patchwork.kernel.org/project/dri-devel/patch/20240620-igt-v3-4-a9d62d2e2c7e@mediatek.com/ +Signed-off-by: Chun-Kuang Hu +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/mediatek/mtk_ethdr.c | 11 ++++++++++- + 1 file changed, 10 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediatek/mtk_ethdr.c +index 5b5a0e149e0a3..5a740d85bea65 100644 +--- a/drivers/gpu/drm/mediatek/mtk_ethdr.c ++++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c +@@ -153,6 +153,7 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx, + unsigned int offset = (pending->x & 1) << 31 | pending->y << 16 | pending->x; + unsigned int align_width = ALIGN_DOWN(pending->width, 2); + unsigned int alpha_con = 0; ++ bool replace_src_a = false; + + dev_dbg(dev, "%s+ idx:%d", __func__, idx); + +@@ -167,7 +168,15 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx, + if (state->base.fb && state->base.fb->format->has_alpha) + alpha_con = MIXER_ALPHA_AEN | MIXER_ALPHA; + +- mtk_mmsys_mixer_in_config(priv->mmsys_dev, idx + 1, alpha_con ? false : true, ++ if (state->base.fb && !state->base.fb->format->has_alpha) { ++ /* ++ * Mixer doesn't support CONST_BLD mode, ++ * use a trick to make the output equivalent ++ */ ++ replace_src_a = true; ++ } ++ ++ mtk_mmsys_mixer_in_config(priv->mmsys_dev, idx + 1, replace_src_a, + MIXER_ALPHA, + pending->x & 1 ? MIXER_INX_MODE_EVEN_EXTEND : + MIXER_INX_MODE_BYPASS, align_width / 2 - 1, cmdq_pkt); +-- +2.43.0 + diff --git a/queue-6.6/drm-mediatek-fix-xrgb-setting-error-in-ovl.patch b/queue-6.6/drm-mediatek-fix-xrgb-setting-error-in-ovl.patch new file mode 100644 index 00000000000..024f7e0c28a --- /dev/null +++ b/queue-6.6/drm-mediatek-fix-xrgb-setting-error-in-ovl.patch @@ -0,0 +1,73 @@ +From a26bf50741663cfcf02cc8fd5b9229122c19b02e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 Jun 2024 00:38:43 +0800 +Subject: drm/mediatek: Fix XRGB setting error in OVL + +From: Hsiao Chien Sung + +[ Upstream commit 765f284f1fe172573021056f7e337ee53f252969 ] + +CONST_BLD must be enabled for XRGB formats although the alpha channel +can be ignored, or OVL will still read the value from memory. +This error only affects CRC generation. + +Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.") +Reviewed-by: CK Hu +Reviewed-by: AngeloGioacchino Del Regno +Signed-off-by: Hsiao Chien Sung +Link: https://patchwork.kernel.org/project/dri-devel/patch/20240620-igt-v3-3-a9d62d2e2c7e@mediatek.com/ +Signed-off-by: Chun-Kuang Hu +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 14 ++++++++++++-- + 1 file changed, 12 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +index 2bffe42454666..6c25fbc3db294 100644 +--- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c ++++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +@@ -38,6 +38,7 @@ + #define DISP_REG_OVL_PITCH_MSB(n) (0x0040 + 0x20 * (n)) + #define OVL_PITCH_MSB_2ND_SUBBUF BIT(16) + #define DISP_REG_OVL_PITCH(n) (0x0044 + 0x20 * (n)) ++#define OVL_CONST_BLEND BIT(28) + #define DISP_REG_OVL_RDMA_CTRL(n) (0x00c0 + 0x20 * (n)) + #define DISP_REG_OVL_RDMA_GMC(n) (0x00c8 + 0x20 * (n)) + #define DISP_REG_OVL_ADDR_MT2701 0x0040 +@@ -407,6 +408,7 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx, + unsigned int fmt = pending->format; + unsigned int offset = (pending->y << 16) | pending->x; + unsigned int src_size = (pending->height << 16) | pending->width; ++ unsigned int ignore_pixel_alpha = 0; + unsigned int con; + bool is_afbc = pending->modifier != DRM_FORMAT_MOD_LINEAR; + union overlay_pitch { +@@ -428,6 +430,14 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx, + if (state->base.fb && state->base.fb->format->has_alpha) + con |= OVL_CON_AEN | OVL_CON_ALPHA; + ++ /* CONST_BLD must be enabled for XRGB formats although the alpha channel ++ * can be ignored, or OVL will still read the value from memory. ++ * For RGB888 related formats, whether CONST_BLD is enabled or not won't ++ * affect the result. Therefore we use !has_alpha as the condition. ++ */ ++ if (state->base.fb && !state->base.fb->format->has_alpha) ++ ignore_pixel_alpha = OVL_CONST_BLEND; ++ + if (pending->rotation & DRM_MODE_REFLECT_Y) { + con |= OVL_CON_VIRT_FLIP; + addr += (pending->height - 1) * pending->pitch; +@@ -443,8 +453,8 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx, + + mtk_ddp_write_relaxed(cmdq_pkt, con, &ovl->cmdq_reg, ovl->regs, + DISP_REG_OVL_CON(idx)); +- mtk_ddp_write_relaxed(cmdq_pkt, overlay_pitch.split_pitch.lsb, &ovl->cmdq_reg, ovl->regs, +- DISP_REG_OVL_PITCH(idx)); ++ mtk_ddp_write_relaxed(cmdq_pkt, overlay_pitch.split_pitch.lsb | ignore_pixel_alpha, ++ &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_PITCH(idx)); + mtk_ddp_write_relaxed(cmdq_pkt, src_size, &ovl->cmdq_reg, ovl->regs, + DISP_REG_OVL_SRC_SIZE(idx)); + mtk_ddp_write_relaxed(cmdq_pkt, offset, &ovl->cmdq_reg, ovl->regs, +-- +2.43.0 + diff --git a/queue-6.6/drm-mediatek-remove-less-than-zero-comparison-of-an-.patch b/queue-6.6/drm-mediatek-remove-less-than-zero-comparison-of-an-.patch new file mode 100644 index 00000000000..ca38683c7cb --- /dev/null +++ b/queue-6.6/drm-mediatek-remove-less-than-zero-comparison-of-an-.patch @@ -0,0 +1,38 @@ +From ab6f9e9c3244f2c7b309835d70819a31fe570777 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 14 Jun 2024 11:49:37 +0800 +Subject: drm/mediatek: Remove less-than-zero comparison of an unsigned value + +From: Hsiao Chien Sung + +[ Upstream commit 4ed9dd7fde22ed614384c03f8049723cbe7e6a58 ] + +Fix a Coverity error that less-than-zero comparison of an unsigned value +is never true. + +Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.") +Signed-off-by: Hsiao Chien Sung +Reviewed-by: CK Hu +Link: https://patchwork.kernel.org/project/dri-devel/patch/20240614034937.23978-1-shawn.sung@mediatek.com/ +Signed-off-by: Chun-Kuang Hu +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c +index 771f4e1733539..66ccde966e3c1 100644 +--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c ++++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c +@@ -553,7 +553,7 @@ int mtk_ddp_comp_init(struct device_node *node, struct mtk_ddp_comp *comp, + int ret; + #endif + +- if (comp_id < 0 || comp_id >= DDP_COMPONENT_DRM_ID_MAX) ++ if (comp_id >= DDP_COMPONENT_DRM_ID_MAX) + return -EINVAL; + + type = mtk_ddp_matches[comp_id].type; +-- +2.43.0 + diff --git a/queue-6.6/drm-mediatek-turn-off-the-layers-with-zero-width-or-.patch b/queue-6.6/drm-mediatek-turn-off-the-layers-with-zero-width-or-.patch new file mode 100644 index 00000000000..caed30e9ef9 --- /dev/null +++ b/queue-6.6/drm-mediatek-turn-off-the-layers-with-zero-width-or-.patch @@ -0,0 +1,61 @@ +From a046ba82104cb6dc28280ec0ad97ac301fef14af Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 Jun 2024 00:38:46 +0800 +Subject: drm/mediatek: Turn off the layers with zero width or height + +From: Hsiao Chien Sung + +[ Upstream commit 6b9946f4550d8dad8bc1af2db97286ca449af786 ] + +We found that IGT (Intel GPU Tool) will try to commit layers with +zero width or height and lead to undefined behaviors in hardware. +Disable the layers in such a situation. + +Fixes: 453c3364632a ("drm/mediatek: Add ovl_adaptor support for MT8195") +Fixes: d886c0009bd0 ("drm/mediatek: Add ETHDR support for MT8195") +Reviewed-by: CK Hu +Reviewed-by: AngeloGioacchino Del Regno +Fixes: 119f5173628a ("drm/mediatek: Add DRM Driver for Mediatek SoC MT8173.") +Signed-off-by: Hsiao Chien Sung +Link: https://patchwork.kernel.org/project/dri-devel/patch/20240620-igt-v3-6-a9d62d2e2c7e@mediatek.com/ +Signed-off-by: Chun-Kuang Hu +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 2 +- + drivers/gpu/drm/mediatek/mtk_ethdr.c | 7 ++++++- + 2 files changed, 7 insertions(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c +index 6bf6367853fba..8f0c47e868748 100644 +--- a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c ++++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c +@@ -111,7 +111,7 @@ void mtk_ovl_adaptor_layer_config(struct device *dev, unsigned int idx, + merge = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_MERGE0 + idx]; + ethdr = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_ETHDR0]; + +- if (!pending->enable) { ++ if (!pending->enable || !pending->width || !pending->height) { + mtk_merge_stop_cmdq(merge, cmdq_pkt); + mtk_mdp_rdma_stop(rdma_l, cmdq_pkt); + mtk_mdp_rdma_stop(rdma_r, cmdq_pkt); +diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediatek/mtk_ethdr.c +index 5a740d85bea65..0cf8c88994156 100644 +--- a/drivers/gpu/drm/mediatek/mtk_ethdr.c ++++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c +@@ -160,7 +160,12 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx, + if (idx >= 4) + return; + +- if (!pending->enable) { ++ if (!pending->enable || !pending->width || !pending->height) { ++ /* ++ * instead of disabling layer with MIX_SRC_CON directly ++ * set the size to 0 to avoid screen shift due to mixer ++ * mode switch (hardware behavior) ++ */ + mtk_ddp_write(cmdq_pkt, 0, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_SIZE(idx)); + return; + } +-- +2.43.0 + diff --git a/queue-6.6/drm-mediatek-use-8-bit-alpha-in-ethdr.patch b/queue-6.6/drm-mediatek-use-8-bit-alpha-in-ethdr.patch new file mode 100644 index 00000000000..2126bb759c2 --- /dev/null +++ b/queue-6.6/drm-mediatek-use-8-bit-alpha-in-ethdr.patch @@ -0,0 +1,48 @@ +From d4a3eb2504b22d60f7768a2252347fa9822cffcb Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 Jun 2024 00:38:42 +0800 +Subject: drm/mediatek: Use 8-bit alpha in ETHDR + +From: Hsiao Chien Sung + +[ Upstream commit 231c020141cb150a59f5b28379cad82ff7bad899 ] + +9-bit alpha (max=0x100) is designed for special HDR related +calculation, which should be disabled by default. +Change the alpha value from 0x100 to 0xff in 8-bit form. + +Fixes: d886c0009bd0 ("drm/mediatek: Add ETHDR support for MT8195") +Reviewed-by: AngeloGioacchino Del Regno +Reviewed-by: CK Hu +Signed-off-by: Hsiao Chien Sung +Link: https://patchwork.kernel.org/project/dri-devel/patch/20240620-igt-v3-2-a9d62d2e2c7e@mediatek.com/ +Signed-off-by: Chun-Kuang Hu +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/mediatek/mtk_ethdr.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediatek/mtk_ethdr.c +index db7ac666ec5e1..5b5a0e149e0a3 100644 +--- a/drivers/gpu/drm/mediatek/mtk_ethdr.c ++++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c +@@ -50,7 +50,6 @@ + + #define MIXER_INX_MODE_BYPASS 0 + #define MIXER_INX_MODE_EVEN_EXTEND 1 +-#define DEFAULT_9BIT_ALPHA 0x100 + #define MIXER_ALPHA_AEN BIT(8) + #define MIXER_ALPHA 0xff + #define ETHDR_CLK_NUM 13 +@@ -169,7 +168,7 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx, + alpha_con = MIXER_ALPHA_AEN | MIXER_ALPHA; + + mtk_mmsys_mixer_in_config(priv->mmsys_dev, idx + 1, alpha_con ? false : true, +- DEFAULT_9BIT_ALPHA, ++ MIXER_ALPHA, + pending->x & 1 ? MIXER_INX_MODE_EVEN_EXTEND : + MIXER_INX_MODE_BYPASS, align_width / 2 - 1, cmdq_pkt); + +-- +2.43.0 + diff --git a/queue-6.6/drm-meson-fix-canvas-release-in-bind-function.patch b/queue-6.6/drm-meson-fix-canvas-release-in-bind-function.patch new file mode 100644 index 00000000000..3e21dcd04e6 --- /dev/null +++ b/queue-6.6/drm-meson-fix-canvas-release-in-bind-function.patch @@ -0,0 +1,106 @@ +From dbfe6fca06c326b7f1f06e6deb48ac21bad04cdb Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 3 Jul 2024 15:58:27 +0000 +Subject: drm/meson: fix canvas release in bind function + +From: Yao Zi + +[ Upstream commit a695949b2e9bb6b6700a764c704731a306c4bebf ] + +Allocated canvases may not be released on the error exit path of +meson_drv_bind_master(), leading to resource leaking. Rewrite exit path +to release canvases on error. + +Fixes: 2bf6b5b0e374 ("drm/meson: exclusively use the canvas provider module") +Signed-off-by: Yao Zi +Reviewed-by: Neil Armstrong +Link: https://lore.kernel.org/r/20240703155826.10385-2-ziyao@disroot.org +Signed-off-by: Neil Armstrong +Link: https://patchwork.freedesktop.org/patch/msgid/20240703155826.10385-2-ziyao@disroot.org +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/meson/meson_drv.c | 37 +++++++++++++++---------------- + 1 file changed, 18 insertions(+), 19 deletions(-) + +diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c +index cb674966e9aca..095f634ff7c79 100644 +--- a/drivers/gpu/drm/meson/meson_drv.c ++++ b/drivers/gpu/drm/meson/meson_drv.c +@@ -250,29 +250,20 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) + if (ret) + goto free_drm; + ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0); +- if (ret) { +- meson_canvas_free(priv->canvas, priv->canvas_id_osd1); +- goto free_drm; +- } ++ if (ret) ++ goto free_canvas_osd1; + ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1); +- if (ret) { +- meson_canvas_free(priv->canvas, priv->canvas_id_osd1); +- meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); +- goto free_drm; +- } ++ if (ret) ++ goto free_canvas_vd1_0; + ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2); +- if (ret) { +- meson_canvas_free(priv->canvas, priv->canvas_id_osd1); +- meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); +- meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); +- goto free_drm; +- } ++ if (ret) ++ goto free_canvas_vd1_1; + + priv->vsync_irq = platform_get_irq(pdev, 0); + + ret = drm_vblank_init(drm, 1); + if (ret) +- goto free_drm; ++ goto free_canvas_vd1_2; + + /* Assign limits per soc revision/package */ + for (i = 0 ; i < ARRAY_SIZE(meson_drm_soc_attrs) ; ++i) { +@@ -288,11 +279,11 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) + */ + ret = drm_aperture_remove_framebuffers(&meson_driver); + if (ret) +- goto free_drm; ++ goto free_canvas_vd1_2; + + ret = drmm_mode_config_init(drm); + if (ret) +- goto free_drm; ++ goto free_canvas_vd1_2; + drm->mode_config.max_width = 3840; + drm->mode_config.max_height = 2160; + drm->mode_config.funcs = &meson_mode_config_funcs; +@@ -307,7 +298,7 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) + if (priv->afbcd.ops) { + ret = priv->afbcd.ops->init(priv); + if (ret) +- goto free_drm; ++ goto free_canvas_vd1_2; + } + + /* Encoder Initialization */ +@@ -371,6 +362,14 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) + exit_afbcd: + if (priv->afbcd.ops) + priv->afbcd.ops->exit(priv); ++free_canvas_vd1_2: ++ meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2); ++free_canvas_vd1_1: ++ meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1); ++free_canvas_vd1_0: ++ meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0); ++free_canvas_osd1: ++ meson_canvas_free(priv->canvas, priv->canvas_id_osd1); + free_drm: + drm_dev_put(drm); + +-- +2.43.0 + diff --git a/queue-6.6/drm-mipi-dsi-fix-theoretical-int-overflow-in-mipi_ds.patch b/queue-6.6/drm-mipi-dsi-fix-theoretical-int-overflow-in-mipi_ds.patch new file mode 100644 index 00000000000..2ab07c08e67 --- /dev/null +++ b/queue-6.6/drm-mipi-dsi-fix-theoretical-int-overflow-in-mipi_ds.patch @@ -0,0 +1,78 @@ +From 66f4b0135fda2c7e39f7451860b91ab6988aebde Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 14 May 2024 10:20:51 -0700 +Subject: drm/mipi-dsi: Fix theoretical int overflow in + mipi_dsi_dcs_write_seq() + +From: Douglas Anderson + +[ Upstream commit 0b03829fdece47beba9ecb7dbcbde4585ee3663e ] + +The mipi_dsi_dcs_write_seq() macro makes a call to +mipi_dsi_dcs_write_buffer() which returns a type ssize_t. The macro +then stores it in an int and checks to see if it's negative. This +could theoretically be a problem if "ssize_t" is larger than "int". + +To see the issue, imagine that "ssize_t" is 32-bits and "int" is +16-bits, you could see a problem if there was some code out there that +looked like: + + mipi_dsi_dcs_write_seq(dsi, cmd, <32767 bytes as arguments>); + +...since we'd get back that 32768 bytes were transferred and 32768 +stored in a 16-bit int would look negative. + +Though there are no callsites where we'd actually hit this (even if +"int" was only 16-bit), it's cleaner to make the types match so let's +fix it. + +Fixes: 2a9e9daf7523 ("drm/mipi-dsi: Introduce mipi_dsi_dcs_write_seq macro") +Reviewed-by: Neil Armstrong +Reviewed-by: Linus Walleij +Signed-off-by: Douglas Anderson +Link: https://lore.kernel.org/r/20240514102056.v5.1.I30fa4c8348ea316c886ef8a522a52fed617f930d@changeid +Signed-off-by: Neil Armstrong +Link: https://patchwork.freedesktop.org/patch/msgid/20240514102056.v5.1.I30fa4c8348ea316c886ef8a522a52fed617f930d@changeid +Signed-off-by: Sasha Levin +--- + include/drm/drm_mipi_dsi.h | 24 ++++++++++++------------ + 1 file changed, 12 insertions(+), 12 deletions(-) + +diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h +index 3011d33eccbd2..e0e2c17832e89 100644 +--- a/include/drm/drm_mipi_dsi.h ++++ b/include/drm/drm_mipi_dsi.h +@@ -324,18 +324,18 @@ int mipi_dsi_dcs_get_display_brightness_large(struct mipi_dsi_device *dsi, + * @cmd: Command + * @seq: buffer containing data to be transmitted + */ +-#define mipi_dsi_dcs_write_seq(dsi, cmd, seq...) \ +- do { \ +- static const u8 d[] = { cmd, seq }; \ +- struct device *dev = &dsi->dev; \ +- int ret; \ +- ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \ +- if (ret < 0) { \ +- dev_err_ratelimited( \ +- dev, "sending command %#02x failed: %d\n", \ +- cmd, ret); \ +- return ret; \ +- } \ ++#define mipi_dsi_dcs_write_seq(dsi, cmd, seq...) \ ++ do { \ ++ static const u8 d[] = { cmd, seq }; \ ++ struct device *dev = &dsi->dev; \ ++ ssize_t ret; \ ++ ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \ ++ if (ret < 0) { \ ++ dev_err_ratelimited( \ ++ dev, "sending command %#02x failed: %zd\n", \ ++ cmd, ret); \ ++ return ret; \ ++ } \ + } while (0) + + /** +-- +2.43.0 + diff --git a/queue-6.6/drm-mipi-dsi-fix-theoretical-int-overflow-in-mipi_ds.patch-22770 b/queue-6.6/drm-mipi-dsi-fix-theoretical-int-overflow-in-mipi_ds.patch-22770 new file mode 100644 index 00000000000..ce813811087 --- /dev/null +++ b/queue-6.6/drm-mipi-dsi-fix-theoretical-int-overflow-in-mipi_ds.patch-22770 @@ -0,0 +1,76 @@ +From 6f10ee587fa121eb02c82c47a2e4b25e9a5231b7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 14 May 2024 10:20:52 -0700 +Subject: drm/mipi-dsi: Fix theoretical int overflow in + mipi_dsi_generic_write_seq() + +From: Douglas Anderson + +[ Upstream commit 24acbcce5cc673886c2f4f9b3f6f89a9c6a53b7e ] + +The mipi_dsi_generic_write_seq() macro makes a call to +mipi_dsi_generic_write() which returns a type ssize_t. The macro then +stores it in an int and checks to see if it's negative. This could +theoretically be a problem if "ssize_t" is larger than "int". + +To see the issue, imagine that "ssize_t" is 32-bits and "int" is +16-bits, you could see a problem if there was some code out there that +looked like: + + mipi_dsi_generic_write_seq(dsi, <32768 bytes as arguments>); + +...since we'd get back that 32768 bytes were transferred and 32768 +stored in a 16-bit int would look negative. + +Though there are no callsites where we'd actually hit this (even if +"int" was only 16-bit), it's cleaner to make the types match so let's +fix it. + +Fixes: a9015ce59320 ("drm/mipi-dsi: Add a mipi_dsi_dcs_write_seq() macro") +Reviewed-by: Neil Armstrong +Reviewed-by: Linus Walleij +Signed-off-by: Douglas Anderson +Link: https://lore.kernel.org/r/20240514102056.v5.2.Iadb65b8add19ed3ae3ed6425011beb97e380a912@changeid +Signed-off-by: Neil Armstrong +Link: https://patchwork.freedesktop.org/patch/msgid/20240514102056.v5.2.Iadb65b8add19ed3ae3ed6425011beb97e380a912@changeid +Signed-off-by: Sasha Levin +--- + include/drm/drm_mipi_dsi.h | 22 +++++++++++----------- + 1 file changed, 11 insertions(+), 11 deletions(-) + +diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h +index e0e2c17832e89..900262f4c2349 100644 +--- a/include/drm/drm_mipi_dsi.h ++++ b/include/drm/drm_mipi_dsi.h +@@ -305,17 +305,17 @@ int mipi_dsi_dcs_get_display_brightness_large(struct mipi_dsi_device *dsi, + * @dsi: DSI peripheral device + * @seq: buffer containing the payload + */ +-#define mipi_dsi_generic_write_seq(dsi, seq...) \ +- do { \ +- static const u8 d[] = { seq }; \ +- struct device *dev = &dsi->dev; \ +- int ret; \ +- ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \ +- if (ret < 0) { \ +- dev_err_ratelimited(dev, "transmit data failed: %d\n", \ +- ret); \ +- return ret; \ +- } \ ++#define mipi_dsi_generic_write_seq(dsi, seq...) \ ++ do { \ ++ static const u8 d[] = { seq }; \ ++ struct device *dev = &dsi->dev; \ ++ ssize_t ret; \ ++ ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \ ++ if (ret < 0) { \ ++ dev_err_ratelimited(dev, "transmit data failed: %zd\n", \ ++ ret); \ ++ return ret; \ ++ } \ + } while (0) + + /** +-- +2.43.0 + diff --git a/queue-6.6/drm-msm-dpu-drop-validity-checks-for-clear_pending_f.patch b/queue-6.6/drm-msm-dpu-drop-validity-checks-for-clear_pending_f.patch new file mode 100644 index 00000000000..e0bef9b1275 --- /dev/null +++ b/queue-6.6/drm-msm-dpu-drop-validity-checks-for-clear_pending_f.patch @@ -0,0 +1,84 @@ +From cfb150073a5e0117be2fc14d236352acb452dabf Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 Jun 2024 13:17:30 -0700 +Subject: drm/msm/dpu: drop validity checks for clear_pending_flush() ctl op + +From: Abhinav Kumar + +[ Upstream commit 3d68e3dedd4b48f0358bdc187277e3315d8aa559 ] + +clear_pending_flush() ctl op is always assigned irrespective of the DPU +hardware revision. Hence there is no needed to check whether the op has +been assigned before calling it. + +Drop the checks across the driver for clear_pending_flush() and also +update its documentation that it is always expected to be assigned. + +changes in v2: + - instead of adding more validity checks just drop the one for clear_pending_flush + - update the documentation for clear_pending_flush() ctl op + - update the commit text reflecting these changes + +changes in v3: + - simplify the documentation of clear_pending_flush + +Fixes: d7d0e73f7de3 ("drm/msm/dpu: introduce the dpu_encoder_phys_* for writeback") +Reported-by: Dan Carpenter +Closes: https://lore.kernel.org/all/464fbd84-0d1c-43c3-a40b-31656ac06456@moroto.mountain/T/ +Signed-off-by: Abhinav Kumar +Reviewed-by: Dmitry Baryshkov +Patchwork: https://patchwork.freedesktop.org/patch/600241/ +Link: https://lore.kernel.org/r/20240620201731.3694593-1-quic_abhinavk@quicinc.com +Signed-off-by: Dmitry Baryshkov +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 3 +-- + drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 3 +-- + drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 3 ++- + 3 files changed, 4 insertions(+), 5 deletions(-) + +diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +index 5fb7e2e10801d..e454b80907121 100644 +--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c ++++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +@@ -1672,8 +1672,7 @@ void dpu_encoder_trigger_kickoff_pending(struct drm_encoder *drm_enc) + phys = dpu_enc->phys_encs[i]; + + ctl = phys->hw_ctl; +- if (ctl->ops.clear_pending_flush) +- ctl->ops.clear_pending_flush(ctl); ++ ctl->ops.clear_pending_flush(ctl); + + /* update only for command mode primary ctl */ + if ((phys == dpu_enc->cur_master) && +diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c +index 870a1f5060e30..a81a9ee71a86c 100644 +--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c ++++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c +@@ -528,8 +528,7 @@ static void dpu_encoder_phys_wb_disable(struct dpu_encoder_phys *phys_enc) + } + + /* reset h/w before final flush */ +- if (phys_enc->hw_ctl->ops.clear_pending_flush) +- phys_enc->hw_ctl->ops.clear_pending_flush(phys_enc->hw_ctl); ++ phys_enc->hw_ctl->ops.clear_pending_flush(phys_enc->hw_ctl); + + /* + * New CTL reset sequence from 5.0 MDP onwards. +diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h +index 1c242298ff2ee..dca87ea78e251 100644 +--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h ++++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h +@@ -81,7 +81,8 @@ struct dpu_hw_ctl_ops { + + /** + * Clear the value of the cached pending_flush_mask +- * No effect on hardware ++ * No effect on hardware. ++ * Required to be implemented. + * @ctx : ctl path ctx pointer + */ + void (*clear_pending_flush)(struct dpu_hw_ctl *ctx); +-- +2.43.0 + diff --git a/queue-6.6/drm-msm-dsi-set-video_compression_mode_ctrl_wc.patch b/queue-6.6/drm-msm-dsi-set-video_compression_mode_ctrl_wc.patch new file mode 100644 index 00000000000..73b7ccb16b9 --- /dev/null +++ b/queue-6.6/drm-msm-dsi-set-video_compression_mode_ctrl_wc.patch @@ -0,0 +1,59 @@ +From a76312e0803b3e05f59ef8b1eb84bf3d9fcecf2c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 30 May 2024 13:56:49 +0800 +Subject: drm/msm/dsi: set VIDEO_COMPRESSION_MODE_CTRL_WC + +From: Jonathan Marek + +[ Upstream commit 9ecd0ddd223b68b4603e4766a1d51f6c6cda346e ] + +Video mode DSC won't work if this field is not set correctly. Set it to fix +video mode DSC (for slice_per_pkt==1 cases at least). + +Fixes: 08802f515c3c ("drm/msm/dsi: Add support for DSC configuration") +Signed-off-by: Jonathan Marek +Reviewed-by: Dmitry Baryshkov +Signed-off-by: Jun Nie +Tested-by: Neil Armstrong # on SM8550-QRD +Tested-by: Neil Armstrong # on SM8650-QRD +Tested-by: Neil Armstrong # on SM8650-HDK +Reviewed-by: Jessica Zhang +Patchwork: https://patchwork.freedesktop.org/patch/596234/ +Link: https://lore.kernel.org/r/20240530-msm-drm-dsc-dsi-video-upstream-4-v6-5-2ab1d334c657@linaro.org +Signed-off-by: Dmitry Baryshkov +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/msm/dsi/dsi_host.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c +index ab393bdaba6cd..77b805eacb1b1 100644 +--- a/drivers/gpu/drm/msm/dsi/dsi_host.c ++++ b/drivers/gpu/drm/msm/dsi/dsi_host.c +@@ -832,6 +832,7 @@ static void dsi_update_dsc_timing(struct msm_dsi_host *msm_host, bool is_cmd_mod + u32 slice_per_intf, total_bytes_per_intf; + u32 pkt_per_line; + u32 eol_byte_num; ++ u32 bytes_per_pkt; + + /* first calculate dsc parameters and then program + * compress mode registers +@@ -839,6 +840,7 @@ static void dsi_update_dsc_timing(struct msm_dsi_host *msm_host, bool is_cmd_mod + slice_per_intf = msm_dsc_get_slices_per_intf(dsc, hdisplay); + + total_bytes_per_intf = dsc->slice_chunk_size * slice_per_intf; ++ bytes_per_pkt = dsc->slice_chunk_size; /* * slice_per_pkt; */ + + eol_byte_num = total_bytes_per_intf % 3; + +@@ -876,6 +878,7 @@ static void dsi_update_dsc_timing(struct msm_dsi_host *msm_host, bool is_cmd_mod + dsi_write(msm_host, REG_DSI_COMMAND_COMPRESSION_MODE_CTRL, reg_ctrl); + dsi_write(msm_host, REG_DSI_COMMAND_COMPRESSION_MODE_CTRL2, reg_ctrl2); + } else { ++ reg |= DSI_VIDEO_COMPRESSION_MODE_CTRL_WC(bytes_per_pkt); + dsi_write(msm_host, REG_DSI_VIDEO_COMPRESSION_MODE_CTRL, reg); + } + } +-- +2.43.0 + diff --git a/queue-6.6/drm-panel-boe-tv101wum-nl6-check-for-errors-on-the-n.patch b/queue-6.6/drm-panel-boe-tv101wum-nl6-check-for-errors-on-the-n.patch new file mode 100644 index 00000000000..a5a6d94a566 --- /dev/null +++ b/queue-6.6/drm-panel-boe-tv101wum-nl6-check-for-errors-on-the-n.patch @@ -0,0 +1,49 @@ +From 52fed48c845b3b572ec74040d254f7eb9e950098 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 17 May 2024 14:36:38 -0700 +Subject: drm/panel: boe-tv101wum-nl6: Check for errors on the NOP in prepare() + +From: Douglas Anderson + +[ Upstream commit 6320b9199dd99622668649c234d4e8a99e44a9c8 ] + +The mipi_dsi_dcs_nop() function returns an error but we weren't +checking it in boe_panel_prepare(). Add a check. This is highly +unlikely to matter in practice. If the NOP failed then likely later +MIPI commands would fail too. + +Found by code inspection. + +Fixes: 812562b8d881 ("drm/panel: boe-tv101wum-nl6: Fine tune the panel power sequence") +Signed-off-by: Douglas Anderson +Reviewed-by: AngeloGioacchino Del Regno +Reviewed-by: Dmitry Baryshkov +Reviewed-by: Linus Walleij +Link: https://lore.kernel.org/r/20240517143643.3.Ibffbaa5b4999ac0e55f43bf353144433b099d727@changeid +Signed-off-by: Neil Armstrong +Link: https://patchwork.freedesktop.org/patch/msgid/20240517143643.3.Ibffbaa5b4999ac0e55f43bf353144433b099d727@changeid +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c +index 688efb2253a16..cfa5b54ed6fe7 100644 +--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c ++++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c +@@ -1847,7 +1847,11 @@ static int boe_panel_prepare(struct drm_panel *panel) + usleep_range(10000, 11000); + + if (boe->desc->lp11_before_reset) { +- mipi_dsi_dcs_nop(boe->dsi); ++ ret = mipi_dsi_dcs_nop(boe->dsi); ++ if (ret < 0) { ++ dev_err(&boe->dsi->dev, "Failed to send NOP: %d\n", ret); ++ goto poweroff; ++ } + usleep_range(1000, 2000); + } + gpiod_set_value(boe->enable_gpio, 1); +-- +2.43.0 + diff --git a/queue-6.6/drm-panel-boe-tv101wum-nl6-if-prepare-fails-disable-.patch b/queue-6.6/drm-panel-boe-tv101wum-nl6-if-prepare-fails-disable-.patch new file mode 100644 index 00000000000..a31eb5af195 --- /dev/null +++ b/queue-6.6/drm-panel-boe-tv101wum-nl6-if-prepare-fails-disable-.patch @@ -0,0 +1,48 @@ +From 668be4d4791decd5d76e95143ae5312c4a3d9000 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 17 May 2024 14:36:37 -0700 +Subject: drm/panel: boe-tv101wum-nl6: If prepare fails, disable GPIO before + regulators + +From: Douglas Anderson + +[ Upstream commit 587c48f622374e5d47b1d515c6006a4df4dee882 ] + +The enable GPIO should clearly be set low before turning off +regulators. That matches both the inverse order that things were +enabled and also the order in unprepare(). + +Fixes: a869b9db7adf ("drm/panel: support for boe tv101wum-nl6 wuxga dsi video mode panel") +Signed-off-by: Douglas Anderson +Reviewed-by: Dmitry Baryshkov +Reviewed-by: Linus Walleij +Link: https://lore.kernel.org/r/20240517143643.2.Ieac346cd0f1606948ba39ceea06b55359fe972b6@changeid +Signed-off-by: Neil Armstrong +Link: https://patchwork.freedesktop.org/patch/msgid/20240517143643.2.Ieac346cd0f1606948ba39ceea06b55359fe972b6@changeid +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c +index 7990c519a56b1..688efb2253a16 100644 +--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c ++++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c +@@ -1868,13 +1868,13 @@ static int boe_panel_prepare(struct drm_panel *panel) + return 0; + + poweroff: ++ gpiod_set_value(boe->enable_gpio, 0); + regulator_disable(boe->avee); + poweroffavdd: + regulator_disable(boe->avdd); + poweroff1v8: + usleep_range(5000, 7000); + regulator_disable(boe->pp1800); +- gpiod_set_value(boe->enable_gpio, 0); + + return ret; + } +-- +2.43.0 + diff --git a/queue-6.6/drm-panel-himax-hx8394-handle-errors-from-mipi_dsi_d.patch b/queue-6.6/drm-panel-himax-hx8394-handle-errors-from-mipi_dsi_d.patch new file mode 100644 index 00000000000..9b6df340922 --- /dev/null +++ b/queue-6.6/drm-panel-himax-hx8394-handle-errors-from-mipi_dsi_d.patch @@ -0,0 +1,50 @@ +From 6afdcef53f7491b4d17fb610df2ac44df2766753 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 17 May 2024 14:36:36 -0700 +Subject: drm/panel: himax-hx8394: Handle errors from + mipi_dsi_dcs_set_display_on() better + +From: Douglas Anderson + +[ Upstream commit cc2db2ef8d9eebc0df03808ac0dadbdb96733499 ] + +If mipi_dsi_dcs_set_display_on() returned an error then we'd store +that in the "ret" variable and jump to error handling. We'd then +attempt an orderly poweroff. Unfortunately we then blew away the value +stored in "ret". That means that if the orderly poweroff actually +worked then we're return 0 (no error) from hx8394_enable() even though +the panel wasn't enabled. + +Fix this by not blowing away "ret". + +Found by code inspection. + +Fixes: 65dc9360f741 ("drm: panel: Add Himax HX8394 panel controller driver") +Signed-off-by: Douglas Anderson +Reviewed-by: Dmitry Baryshkov +Reviewed-by: Linus Walleij +Link: https://lore.kernel.org/r/20240517143643.1.I0a6836fffd8d7620f353becb3df2370d2898f803@changeid +Signed-off-by: Neil Armstrong +Link: https://patchwork.freedesktop.org/patch/msgid/20240517143643.1.I0a6836fffd8d7620f353becb3df2370d2898f803@changeid +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/panel/panel-himax-hx8394.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/drivers/gpu/drm/panel/panel-himax-hx8394.c b/drivers/gpu/drm/panel/panel-himax-hx8394.c +index c73243d85de71..631420d28be4c 100644 +--- a/drivers/gpu/drm/panel/panel-himax-hx8394.c ++++ b/drivers/gpu/drm/panel/panel-himax-hx8394.c +@@ -234,8 +234,7 @@ static int hx8394_enable(struct drm_panel *panel) + + sleep_in: + /* This will probably fail, but let's try orderly power off anyway. */ +- ret = mipi_dsi_dcs_enter_sleep_mode(dsi); +- if (!ret) ++ if (!mipi_dsi_dcs_enter_sleep_mode(dsi)) + msleep(50); + + return ret; +-- +2.43.0 + diff --git a/queue-6.6/drm-qxl-add-check-for-drm_cvt_mode.patch b/queue-6.6/drm-qxl-add-check-for-drm_cvt_mode.patch new file mode 100644 index 00000000000..824407ed604 --- /dev/null +++ b/queue-6.6/drm-qxl-add-check-for-drm_cvt_mode.patch @@ -0,0 +1,39 @@ +From 23e575a1e42fb7f62487780396e87919e0e725ef Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 21 Jun 2024 15:10:31 +0800 +Subject: drm/qxl: Add check for drm_cvt_mode + +From: Chen Ni + +[ Upstream commit 7bd09a2db0f617377027a2bb0b9179e6959edff3 ] + +Add check for the return value of drm_cvt_mode() and return the error if +it fails in order to avoid NULL pointer dereference. + +Fixes: 1b043677d4be ("drm/qxl: add qxl_add_mode helper function") +Signed-off-by: Chen Ni +Reviewed-by: Heng Qi +Signed-off-by: Maxime Ripard +Link: https://patchwork.freedesktop.org/patch/msgid/20240621071031.1987974-1-nichen@iscas.ac.cn +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/qxl/qxl_display.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/gpu/drm/qxl/qxl_display.c b/drivers/gpu/drm/qxl/qxl_display.c +index 404b0483bb7cb..8ee614be9adf3 100644 +--- a/drivers/gpu/drm/qxl/qxl_display.c ++++ b/drivers/gpu/drm/qxl/qxl_display.c +@@ -236,6 +236,9 @@ static int qxl_add_mode(struct drm_connector *connector, + return 0; + + mode = drm_cvt_mode(dev, width, height, 60, false, false, false); ++ if (!mode) ++ return 0; ++ + if (preferred) + mode->type |= DRM_MODE_TYPE_PREFERRED; + mode->hdisplay = width; +-- +2.43.0 + diff --git a/queue-6.6/drm-rockchip-vop2-fix-the-port-mux-of-vp2.patch b/queue-6.6/drm-rockchip-vop2-fix-the-port-mux-of-vp2.patch new file mode 100644 index 00000000000..ea4dc3e485f --- /dev/null +++ b/queue-6.6/drm-rockchip-vop2-fix-the-port-mux-of-vp2.patch @@ -0,0 +1,38 @@ +From 080a72c9d9cf63c448b0d4fef09cac71b2c06153 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 22 Apr 2024 18:19:05 +0800 +Subject: drm/rockchip: vop2: Fix the port mux of VP2 + +From: Andy Yan + +[ Upstream commit 2bdb481bf7a93c22b9fea8daefa2834aab23a70f ] + +The port mux of VP2 should be RK3568_OVL_PORT_SET__PORT2_MUX. + +Fixes: 604be85547ce ("drm/rockchip: Add VOP2 driver") +Signed-off-by: Andy Yan +Acked-by: Sascha Hauer +Tested-by: Heiko Stuebner +Signed-off-by: Heiko Stuebner +Link: https://patchwork.freedesktop.org/patch/msgid/20240422101905.32703-2-andyshrk@163.com +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +index c5ec4169616de..f2a956f973613 100644 +--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c ++++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +@@ -1927,7 +1927,7 @@ static void vop2_setup_layer_mixer(struct vop2_video_port *vp) + port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT2_MUX, + (vp2->nlayers + vp1->nlayers + vp0->nlayers - 1)); + else +- port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT1_MUX, 8); ++ port_sel |= FIELD_PREP(RK3568_OVL_PORT_SET__PORT2_MUX, 8); + + layer_sel = vop2_readl(vop2, RK3568_OVL_LAYER_SEL); + +-- +2.43.0 + diff --git a/queue-6.6/drm-zynqmp_dpsub-fix-an-error-handling-path-in-zynqm.patch b/queue-6.6/drm-zynqmp_dpsub-fix-an-error-handling-path-in-zynqm.patch new file mode 100644 index 00000000000..25626b6c34e --- /dev/null +++ b/queue-6.6/drm-zynqmp_dpsub-fix-an-error-handling-path-in-zynqm.patch @@ -0,0 +1,38 @@ +From 7faf6d0623a6d9e84448578d9fafa459234ec3f4 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 20 May 2024 11:40:37 +0200 +Subject: drm: zynqmp_dpsub: Fix an error handling path in zynqmp_dpsub_probe() + +From: Christophe JAILLET + +[ Upstream commit 4ea3deda1341fef7b923ad9cfe5dd46b1b51bfa8 ] + +If zynqmp_dpsub_drm_init() fails, we must undo the previous +drm_bridge_add() call. + +Fixes: be3f3042391d ("drm: zynqmp_dpsub: Always register bridge") +Signed-off-by: Christophe JAILLET +Reviewed-by: Sean Anderson +Reviewed-by: Laurent Pinchart +Signed-off-by: Tomi Valkeinen +Link: https://patchwork.freedesktop.org/patch/msgid/974d1b062d7c61ee6db00d16fa7c69aa1218ee02.1716198025.git.christophe.jaillet@wanadoo.fr +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/xlnx/zynqmp_dpsub.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/gpu/drm/xlnx/zynqmp_dpsub.c b/drivers/gpu/drm/xlnx/zynqmp_dpsub.c +index face8d6b2a6fb..f5781939de9c3 100644 +--- a/drivers/gpu/drm/xlnx/zynqmp_dpsub.c ++++ b/drivers/gpu/drm/xlnx/zynqmp_dpsub.c +@@ -269,6 +269,7 @@ static int zynqmp_dpsub_probe(struct platform_device *pdev) + return 0; + + err_disp: ++ drm_bridge_remove(dpsub->bridge); + zynqmp_disp_remove(dpsub); + err_dp: + zynqmp_dp_remove(dpsub); +-- +2.43.0 + diff --git a/queue-6.6/drm-zynqmp_kms-fix-aux-bus-not-getting-unregistered.patch b/queue-6.6/drm-zynqmp_kms-fix-aux-bus-not-getting-unregistered.patch new file mode 100644 index 00000000000..7ca5290939c --- /dev/null +++ b/queue-6.6/drm-zynqmp_kms-fix-aux-bus-not-getting-unregistered.patch @@ -0,0 +1,78 @@ +From 02b9c4109cb1c3f91f4a656a7bd313632b86d247 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 3 May 2024 15:29:13 -0400 +Subject: drm: zynqmp_kms: Fix AUX bus not getting unregistered + +From: Sean Anderson + +[ Upstream commit 0743dafefd3f2b92116213f2225ea355001b7948 ] + +drm_encoder_cleanup is responsible for calling drm_bridge_detach for +each bridge attached to the encoder. zynqmp_dp_bridge_detach is in turn +responsible for unregistering the AUX bus. However, we never ended up +calling drm_encoder_cleanup in the remove or error paths, so the AUX bus +would stick around after the rest of the driver had been removed. + +I don't really understand why drm_mode_config_cleanup doesn't call +drm_encoder_cleanup for us. It will call destroy (which for +simple_encoder is drm_encoder_cleanup) on encoders in the mode_config's +encoder_list. + +Should drm_encoder_cleanup get called before or after +drm_atomic_helper_shutdown? + +Fixes: 2dfd045c8435 ("drm: xlnx: zynqmp_dpsub: Register AUX bus at bridge attach time") +Signed-off-by: Sean Anderson +Signed-off-by: Tomi Valkeinen +Link: https://patchwork.freedesktop.org/patch/msgid/20240503192922.2172314-2-sean.anderson@linux.dev +Signed-off-by: Sasha Levin +--- + drivers/gpu/drm/xlnx/zynqmp_kms.c | 12 +++++++++--- + 1 file changed, 9 insertions(+), 3 deletions(-) + +diff --git a/drivers/gpu/drm/xlnx/zynqmp_kms.c b/drivers/gpu/drm/xlnx/zynqmp_kms.c +index a7f8611be6f42..44d4a510ad7d6 100644 +--- a/drivers/gpu/drm/xlnx/zynqmp_kms.c ++++ b/drivers/gpu/drm/xlnx/zynqmp_kms.c +@@ -434,23 +434,28 @@ static int zynqmp_dpsub_kms_init(struct zynqmp_dpsub *dpsub) + DRM_BRIDGE_ATTACH_NO_CONNECTOR); + if (ret) { + dev_err(dpsub->dev, "failed to attach bridge to encoder\n"); +- return ret; ++ goto err_encoder; + } + + /* Create the connector for the chain of bridges. */ + connector = drm_bridge_connector_init(&dpsub->drm->dev, encoder); + if (IS_ERR(connector)) { + dev_err(dpsub->dev, "failed to created connector\n"); +- return PTR_ERR(connector); ++ ret = PTR_ERR(connector); ++ goto err_encoder; + } + + ret = drm_connector_attach_encoder(connector, encoder); + if (ret < 0) { + dev_err(dpsub->dev, "failed to attach connector to encoder\n"); +- return ret; ++ goto err_encoder; + } + + return 0; ++ ++err_encoder: ++ drm_encoder_cleanup(encoder); ++ return ret; + } + + static void zynqmp_dpsub_drm_release(struct drm_device *drm, void *res) +@@ -530,5 +535,6 @@ void zynqmp_dpsub_drm_cleanup(struct zynqmp_dpsub *dpsub) + + drm_dev_unregister(drm); + drm_atomic_helper_shutdown(drm); ++ drm_encoder_cleanup(&dpsub->drm->encoder); + drm_kms_helper_poll_fini(drm); + } +-- +2.43.0 + diff --git a/queue-6.6/edac-i10nm-make-skx_common.o-a-separate-module.patch b/queue-6.6/edac-i10nm-make-skx_common.o-a-separate-module.patch new file mode 100644 index 00000000000..b3825b3b427 --- /dev/null +++ b/queue-6.6/edac-i10nm-make-skx_common.o-a-separate-module.patch @@ -0,0 +1,190 @@ +From b3ee72ca8e4f39037873a7af98fb08fbae098cad Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 29 May 2024 11:51:11 +0200 +Subject: EDAC, i10nm: make skx_common.o a separate module + +From: Arnd Bergmann + +[ Upstream commit 123b158635505c89ed0d3ef45c5845ff9030a466 ] + +Commit 598afa050403 ("kbuild: warn objects shared among multiple modules") +was added to track down cases where the same object is linked into +multiple modules. This can cause serious problems if some modules are +builtin while others are not. + +That test triggers this warning: + +scripts/Makefile.build:236: drivers/edac/Makefile: skx_common.o is added to multiple modules: i10nm_edac skx_edac + +Make this a separate module instead. + +[Tony: Added more background details to commit message] + +Fixes: d4dc89d069aa ("EDAC, i10nm: Add a driver for Intel 10nm server processors") +Signed-off-by: Arnd Bergmann +Signed-off-by: Tony Luck +Link: https://lore.kernel.org/all/20240529095132.1929397-1-arnd@kernel.org/ +Signed-off-by: Sasha Levin +--- + drivers/edac/Makefile | 10 ++++++---- + drivers/edac/skx_common.c | 21 +++++++++++++++++++-- + drivers/edac/skx_common.h | 4 ++-- + 3 files changed, 27 insertions(+), 8 deletions(-) + +diff --git a/drivers/edac/Makefile b/drivers/edac/Makefile +index 61945d3113cc3..446364264e2b1 100644 +--- a/drivers/edac/Makefile ++++ b/drivers/edac/Makefile +@@ -54,11 +54,13 @@ obj-$(CONFIG_EDAC_MPC85XX) += mpc85xx_edac_mod.o + layerscape_edac_mod-y := fsl_ddr_edac.o layerscape_edac.o + obj-$(CONFIG_EDAC_LAYERSCAPE) += layerscape_edac_mod.o + +-skx_edac-y := skx_common.o skx_base.o +-obj-$(CONFIG_EDAC_SKX) += skx_edac.o ++skx_edac_common-y := skx_common.o + +-i10nm_edac-y := skx_common.o i10nm_base.o +-obj-$(CONFIG_EDAC_I10NM) += i10nm_edac.o ++skx_edac-y := skx_base.o ++obj-$(CONFIG_EDAC_SKX) += skx_edac.o skx_edac_common.o ++ ++i10nm_edac-y := i10nm_base.o ++obj-$(CONFIG_EDAC_I10NM) += i10nm_edac.o skx_edac_common.o + + obj-$(CONFIG_EDAC_CELL) += cell_edac.o + obj-$(CONFIG_EDAC_PPC4XX) += ppc4xx_edac.o +diff --git a/drivers/edac/skx_common.c b/drivers/edac/skx_common.c +index ce3e0069e028d..03d7a74ca22dc 100644 +--- a/drivers/edac/skx_common.c ++++ b/drivers/edac/skx_common.c +@@ -48,7 +48,7 @@ static u64 skx_tolm, skx_tohm; + static LIST_HEAD(dev_edac_list); + static bool skx_mem_cfg_2lm; + +-int __init skx_adxl_get(void) ++int skx_adxl_get(void) + { + const char * const *names; + int i, j; +@@ -110,12 +110,14 @@ int __init skx_adxl_get(void) + + return -ENODEV; + } ++EXPORT_SYMBOL_GPL(skx_adxl_get); + +-void __exit skx_adxl_put(void) ++void skx_adxl_put(void) + { + kfree(adxl_values); + kfree(adxl_msg); + } ++EXPORT_SYMBOL_GPL(skx_adxl_put); + + static bool skx_adxl_decode(struct decoded_addr *res, bool error_in_1st_level_mem) + { +@@ -187,12 +189,14 @@ void skx_set_mem_cfg(bool mem_cfg_2lm) + { + skx_mem_cfg_2lm = mem_cfg_2lm; + } ++EXPORT_SYMBOL_GPL(skx_set_mem_cfg); + + void skx_set_decode(skx_decode_f decode, skx_show_retry_log_f show_retry_log) + { + driver_decode = decode; + skx_show_retry_rd_err_log = show_retry_log; + } ++EXPORT_SYMBOL_GPL(skx_set_decode); + + int skx_get_src_id(struct skx_dev *d, int off, u8 *id) + { +@@ -206,6 +210,7 @@ int skx_get_src_id(struct skx_dev *d, int off, u8 *id) + *id = GET_BITFIELD(reg, 12, 14); + return 0; + } ++EXPORT_SYMBOL_GPL(skx_get_src_id); + + int skx_get_node_id(struct skx_dev *d, u8 *id) + { +@@ -219,6 +224,7 @@ int skx_get_node_id(struct skx_dev *d, u8 *id) + *id = GET_BITFIELD(reg, 0, 2); + return 0; + } ++EXPORT_SYMBOL_GPL(skx_get_node_id); + + static int get_width(u32 mtr) + { +@@ -284,6 +290,7 @@ int skx_get_all_bus_mappings(struct res_config *cfg, struct list_head **list) + *list = &dev_edac_list; + return ndev; + } ++EXPORT_SYMBOL_GPL(skx_get_all_bus_mappings); + + int skx_get_hi_lo(unsigned int did, int off[], u64 *tolm, u64 *tohm) + { +@@ -323,6 +330,7 @@ int skx_get_hi_lo(unsigned int did, int off[], u64 *tolm, u64 *tohm) + pci_dev_put(pdev); + return -ENODEV; + } ++EXPORT_SYMBOL_GPL(skx_get_hi_lo); + + static int skx_get_dimm_attr(u32 reg, int lobit, int hibit, int add, + int minval, int maxval, const char *name) +@@ -394,6 +402,7 @@ int skx_get_dimm_info(u32 mtr, u32 mcmtr, u32 amap, struct dimm_info *dimm, + + return 1; + } ++EXPORT_SYMBOL_GPL(skx_get_dimm_info); + + int skx_get_nvdimm_info(struct dimm_info *dimm, struct skx_imc *imc, + int chan, int dimmno, const char *mod_str) +@@ -442,6 +451,7 @@ int skx_get_nvdimm_info(struct dimm_info *dimm, struct skx_imc *imc, + + return (size == 0 || size == ~0ull) ? 0 : 1; + } ++EXPORT_SYMBOL_GPL(skx_get_nvdimm_info); + + int skx_register_mci(struct skx_imc *imc, struct pci_dev *pdev, + const char *ctl_name, const char *mod_str, +@@ -512,6 +522,7 @@ int skx_register_mci(struct skx_imc *imc, struct pci_dev *pdev, + imc->mci = NULL; + return rc; + } ++EXPORT_SYMBOL_GPL(skx_register_mci); + + static void skx_unregister_mci(struct skx_imc *imc) + { +@@ -684,6 +695,7 @@ int skx_mce_check_error(struct notifier_block *nb, unsigned long val, + mce->kflags |= MCE_HANDLED_EDAC; + return NOTIFY_DONE; + } ++EXPORT_SYMBOL_GPL(skx_mce_check_error); + + void skx_remove(void) + { +@@ -721,3 +733,8 @@ void skx_remove(void) + kfree(d); + } + } ++EXPORT_SYMBOL_GPL(skx_remove); ++ ++MODULE_LICENSE("GPL v2"); ++MODULE_AUTHOR("Tony Luck"); ++MODULE_DESCRIPTION("MC Driver for Intel server processors"); +diff --git a/drivers/edac/skx_common.h b/drivers/edac/skx_common.h +index b6d3607dffe27..11faf1db4fa48 100644 +--- a/drivers/edac/skx_common.h ++++ b/drivers/edac/skx_common.h +@@ -231,8 +231,8 @@ typedef int (*get_dimm_config_f)(struct mem_ctl_info *mci, + typedef bool (*skx_decode_f)(struct decoded_addr *res); + typedef void (*skx_show_retry_log_f)(struct decoded_addr *res, char *msg, int len, bool scrub_err); + +-int __init skx_adxl_get(void); +-void __exit skx_adxl_put(void); ++int skx_adxl_get(void); ++void skx_adxl_put(void); + void skx_set_decode(skx_decode_f decode, skx_show_retry_log_f show_retry_log); + void skx_set_mem_cfg(bool mem_cfg_2lm); + +-- +2.43.0 + diff --git a/queue-6.6/ext4-avoid-writing-unitialized-memory-to-disk-in-ea-.patch b/queue-6.6/ext4-avoid-writing-unitialized-memory-to-disk-in-ea-.patch new file mode 100644 index 00000000000..c4ed4d2d4c4 --- /dev/null +++ b/queue-6.6/ext4-avoid-writing-unitialized-memory-to-disk-in-ea-.patch @@ -0,0 +1,46 @@ +From 0c712ea2781174f837093665b710cc457c802529 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 13 Jun 2024 17:02:34 +0200 +Subject: ext4: avoid writing unitialized memory to disk in EA inodes + +From: Jan Kara + +[ Upstream commit 65121eff3e4c8c90f8126debf3c369228691c591 ] + +If the extended attribute size is not a multiple of block size, the last +block in the EA inode will have uninitialized tail which will get +written to disk. We will never expose the data to userspace but still +this is not a good practice so just zero out the tail of the block as it +isn't going to cause a noticeable performance overhead. + +Fixes: e50e5129f384 ("ext4: xattr-in-inode support") +Reported-by: syzbot+9c1fe13fcb51574b249b@syzkaller.appspotmail.com +Reported-by: Hugh Dickins +Signed-off-by: Jan Kara +Link: https://patch.msgid.link/20240613150234.25176-1-jack@suse.cz +Signed-off-by: Theodore Ts'o +Signed-off-by: Sasha Levin +--- + fs/ext4/xattr.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/fs/ext4/xattr.c b/fs/ext4/xattr.c +index 41b4630b17d64..c58cbe9f7809c 100644 +--- a/fs/ext4/xattr.c ++++ b/fs/ext4/xattr.c +@@ -1433,6 +1433,12 @@ static int ext4_xattr_inode_write(handle_t *handle, struct inode *ea_inode, + goto out; + + memcpy(bh->b_data, buf, csize); ++ /* ++ * Zero out block tail to avoid writing uninitialized memory ++ * to disk. ++ */ ++ if (csize < blocksize) ++ memset(bh->b_data + csize, 0, blocksize - csize); + set_buffer_uptodate(bh); + ext4_handle_dirty_metadata(handle, ea_inode, bh); + +-- +2.43.0 + diff --git a/queue-6.6/ext4-don-t-track-ranges-in-fast_commit-if-inode-has-.patch b/queue-6.6/ext4-don-t-track-ranges-in-fast_commit-if-inode-has-.patch new file mode 100644 index 00000000000..1d7113c7a80 --- /dev/null +++ b/queue-6.6/ext4-don-t-track-ranges-in-fast_commit-if-inode-has-.patch @@ -0,0 +1,49 @@ +From 1cfda6e30c3198afac6c43d0b9b0e044494acaa7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 18 Jun 2024 15:43:12 +0100 +Subject: ext4: don't track ranges in fast_commit if inode has inlined data + +From: Luis Henriques (SUSE) + +[ Upstream commit 7882b0187bbeb647967a7b5998ce4ad26ef68a9a ] + +When fast-commit needs to track ranges, it has to handle inodes that have +inlined data in a different way because ext4_fc_write_inode_data(), in the +actual commit path, will attempt to map the required blocks for the range. +However, inodes that have inlined data will have it's data stored in +inode->i_block and, eventually, in the extended attribute space. + +Unfortunately, because fast commit doesn't currently support extended +attributes, the solution is to mark this commit as ineligible. + +Link: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=1039883 +Signed-off-by: Luis Henriques (SUSE) +Tested-by: Ben Hutchings +Fixes: 9725958bb75c ("ext4: fast commit may miss tracking unwritten range during ftruncate") +Link: https://patch.msgid.link/20240618144312.17786-1-luis.henriques@linux.dev +Signed-off-by: Theodore Ts'o +Signed-off-by: Sasha Levin +--- + fs/ext4/fast_commit.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/fs/ext4/fast_commit.c b/fs/ext4/fast_commit.c +index b06de728b3b6c..5d473e50598f9 100644 +--- a/fs/ext4/fast_commit.c ++++ b/fs/ext4/fast_commit.c +@@ -649,6 +649,12 @@ void ext4_fc_track_range(handle_t *handle, struct inode *inode, ext4_lblk_t star + if (ext4_test_mount_flag(inode->i_sb, EXT4_MF_FC_INELIGIBLE)) + return; + ++ if (ext4_has_inline_data(inode)) { ++ ext4_fc_mark_ineligible(inode->i_sb, EXT4_FC_REASON_XATTR, ++ handle); ++ return; ++ } ++ + args.start = start; + args.end = end; + +-- +2.43.0 + diff --git a/queue-6.6/ext4-fix-infinite-loop-when-replaying-fast_commit.patch b/queue-6.6/ext4-fix-infinite-loop-when-replaying-fast_commit.patch new file mode 100644 index 00000000000..544c80496b6 --- /dev/null +++ b/queue-6.6/ext4-fix-infinite-loop-when-replaying-fast_commit.patch @@ -0,0 +1,48 @@ +From 1eca0845e51616d5db488e0f80d98813a1535b2b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 15 May 2024 09:28:57 +0100 +Subject: ext4: fix infinite loop when replaying fast_commit + +From: Luis Henriques (SUSE) + +[ Upstream commit 907c3fe532253a6ef4eb9c4d67efb71fab58c706 ] + +When doing fast_commit replay an infinite loop may occur due to an +uninitialized extent_status struct. ext4_ext_determine_insert_hole() does +not detect the replay and calls ext4_es_find_extent_range(), which will +return immediately without initializing the 'es' variable. + +Because 'es' contains garbage, an integer overflow may happen causing an +infinite loop in this function, easily reproducible using fstest generic/039. + +This commit fixes this issue by unconditionally initializing the structure +in function ext4_es_find_extent_range(). + +Thanks to Zhang Yi, for figuring out the real problem! + +Fixes: 8016e29f4362 ("ext4: fast commit recovery path") +Signed-off-by: Luis Henriques (SUSE) +Reviewed-by: Zhang Yi +Link: https://patch.msgid.link/20240515082857.32730-1-luis.henriques@linux.dev +Signed-off-by: Theodore Ts'o +Signed-off-by: Sasha Levin +--- + fs/ext4/extents_status.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/fs/ext4/extents_status.c b/fs/ext4/extents_status.c +index f4b50652f0cce..d9d5cfb9c951a 100644 +--- a/fs/ext4/extents_status.c ++++ b/fs/ext4/extents_status.c +@@ -310,6 +310,8 @@ void ext4_es_find_extent_range(struct inode *inode, + ext4_lblk_t lblk, ext4_lblk_t end, + struct extent_status *es) + { ++ es->es_lblk = es->es_len = es->es_pblk = 0; ++ + if (EXT4_SB(inode->i_sb)->s_mount_state & EXT4_FC_REPLAY) + return; + +-- +2.43.0 + diff --git a/queue-6.6/firmware-turris-mox-rwtm-do-not-complete-if-there-ar.patch b/queue-6.6/firmware-turris-mox-rwtm-do-not-complete-if-there-ar.patch new file mode 100644 index 00000000000..852d1c937cd --- /dev/null +++ b/queue-6.6/firmware-turris-mox-rwtm-do-not-complete-if-there-ar.patch @@ -0,0 +1,50 @@ +From 307672602aa4a45cdfd8fc3079c7b9a6981d9a73 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 15 Jul 2024 13:59:10 +0200 +Subject: firmware: turris-mox-rwtm: Do not complete if there are no waiters +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Marek Behún + +[ Upstream commit 0bafb172b111ab27251af0eb684e7bde9570ce4c ] + +Do not complete the "command done" completion if there are no waiters. +This can happen if a wait_for_completion() timed out or was interrupted. + +Fixes: 389711b37493 ("firmware: Add Turris Mox rWTM firmware driver") +Signed-off-by: Marek Behún +Reviewed-by: Andy Shevchenko +Signed-off-by: Arnd Bergmann +Signed-off-by: Sasha Levin +--- + drivers/firmware/turris-mox-rwtm.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +diff --git a/drivers/firmware/turris-mox-rwtm.c b/drivers/firmware/turris-mox-rwtm.c +index 2de0fb139ce17..efd35d308aac9 100644 +--- a/drivers/firmware/turris-mox-rwtm.c ++++ b/drivers/firmware/turris-mox-rwtm.c +@@ -2,7 +2,7 @@ + /* + * Turris Mox rWTM firmware driver + * +- * Copyright (C) 2019 Marek Behún ++ * Copyright (C) 2019, 2024 Marek Behún + */ + + #include +@@ -174,6 +174,9 @@ static void mox_rwtm_rx_callback(struct mbox_client *cl, void *data) + struct mox_rwtm *rwtm = dev_get_drvdata(cl->dev); + struct armada_37xx_rwtm_rx_msg *msg = data; + ++ if (completion_done(&rwtm->cmd_done)) ++ return; ++ + rwtm->reply = *msg; + complete(&rwtm->cmd_done); + } +-- +2.43.0 + diff --git a/queue-6.6/firmware-turris-mox-rwtm-fix-checking-return-value-o.patch b/queue-6.6/firmware-turris-mox-rwtm-fix-checking-return-value-o.patch new file mode 100644 index 00000000000..d72a331889b --- /dev/null +++ b/queue-6.6/firmware-turris-mox-rwtm-fix-checking-return-value-o.patch @@ -0,0 +1,70 @@ +From 5a5646cda10e6dc22d850c083fb82bb947386c05 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 15 Jul 2024 13:59:11 +0200 +Subject: firmware: turris-mox-rwtm: Fix checking return value of + wait_for_completion_timeout() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Marek Behún + +[ Upstream commit 8467cfe821ac3526f7598682ad5f90689fa8cc49 ] + +The wait_for_completion_timeout() function returns 0 if timed out, and a +positive value if completed. Fix the usage of this function. + +Fixes: 389711b37493 ("firmware: Add Turris Mox rWTM firmware driver") +Fixes: 2eab59cf0d20 ("firmware: turris-mox-rwtm: fail probing when firmware does not support hwrng") +Signed-off-by: Marek Behún +Reviewed-by: Ilpo Järvinen +Reviewed-by: Andy Shevchenko +Signed-off-by: Arnd Bergmann +Signed-off-by: Sasha Levin +--- + drivers/firmware/turris-mox-rwtm.c | 15 ++++++--------- + 1 file changed, 6 insertions(+), 9 deletions(-) + +diff --git a/drivers/firmware/turris-mox-rwtm.c b/drivers/firmware/turris-mox-rwtm.c +index efd35d308aac9..4b92ac3339872 100644 +--- a/drivers/firmware/turris-mox-rwtm.c ++++ b/drivers/firmware/turris-mox-rwtm.c +@@ -202,9 +202,8 @@ static int mox_get_board_info(struct mox_rwtm *rwtm) + if (ret < 0) + return ret; + +- ret = wait_for_completion_timeout(&rwtm->cmd_done, HZ / 2); +- if (ret < 0) +- return ret; ++ if (!wait_for_completion_timeout(&rwtm->cmd_done, HZ / 2)) ++ return -ETIMEDOUT; + + ret = mox_get_status(MBOX_CMD_BOARD_INFO, reply->retval); + if (ret == -ENODATA) { +@@ -238,9 +237,8 @@ static int mox_get_board_info(struct mox_rwtm *rwtm) + if (ret < 0) + return ret; + +- ret = wait_for_completion_timeout(&rwtm->cmd_done, HZ / 2); +- if (ret < 0) +- return ret; ++ if (!wait_for_completion_timeout(&rwtm->cmd_done, HZ / 2)) ++ return -ETIMEDOUT; + + ret = mox_get_status(MBOX_CMD_ECDSA_PUB_KEY, reply->retval); + if (ret == -ENODATA) { +@@ -277,9 +275,8 @@ static int check_get_random_support(struct mox_rwtm *rwtm) + if (ret < 0) + return ret; + +- ret = wait_for_completion_timeout(&rwtm->cmd_done, HZ / 2); +- if (ret < 0) +- return ret; ++ if (!wait_for_completion_timeout(&rwtm->cmd_done, HZ / 2)) ++ return -ETIMEDOUT; + + return mox_get_status(MBOX_CMD_GET_RANDOM, rwtm->reply.retval); + } +-- +2.43.0 + diff --git a/queue-6.6/firmware-turris-mox-rwtm-initialize-completion-befor.patch b/queue-6.6/firmware-turris-mox-rwtm-initialize-completion-befor.patch new file mode 100644 index 00000000000..e1499f858d9 --- /dev/null +++ b/queue-6.6/firmware-turris-mox-rwtm-initialize-completion-befor.patch @@ -0,0 +1,47 @@ +From 7e349cf4eedb558d84746eecc0eb91b784cb23e5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 15 Jul 2024 13:59:12 +0200 +Subject: firmware: turris-mox-rwtm: Initialize completion before mailbox +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Marek Behún + +[ Upstream commit 49e24c80d3c81c43e2a56101449e1eea32fcf292 ] + +Initialize the completion before the mailbox channel is requested. + +Fixes: 389711b37493 ("firmware: Add Turris Mox rWTM firmware driver") +Signed-off-by: Marek Behún +Reviewed-by: Andy Shevchenko +Signed-off-by: Arnd Bergmann +Signed-off-by: Sasha Levin +--- + drivers/firmware/turris-mox-rwtm.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/drivers/firmware/turris-mox-rwtm.c b/drivers/firmware/turris-mox-rwtm.c +index 4b92ac3339872..3d354ebd38c28 100644 +--- a/drivers/firmware/turris-mox-rwtm.c ++++ b/drivers/firmware/turris-mox-rwtm.c +@@ -499,6 +499,7 @@ static int turris_mox_rwtm_probe(struct platform_device *pdev) + platform_set_drvdata(pdev, rwtm); + + mutex_init(&rwtm->busy); ++ init_completion(&rwtm->cmd_done); + + rwtm->mbox_client.dev = dev; + rwtm->mbox_client.rx_callback = mox_rwtm_rx_callback; +@@ -512,8 +513,6 @@ static int turris_mox_rwtm_probe(struct platform_device *pdev) + goto remove_files; + } + +- init_completion(&rwtm->cmd_done); +- + ret = mox_get_board_info(rwtm); + if (ret < 0) + dev_warn(dev, "Cannot read board information: %i\n", ret); +-- +2.43.0 + diff --git a/queue-6.6/fs-ntfs3-add-missing-.dirty_folio-in-address_space_o.patch b/queue-6.6/fs-ntfs3-add-missing-.dirty_folio-in-address_space_o.patch new file mode 100644 index 00000000000..fbd05f04e8e --- /dev/null +++ b/queue-6.6/fs-ntfs3-add-missing-.dirty_folio-in-address_space_o.patch @@ -0,0 +1,36 @@ +From 34b673f06ec197ecdbba1ca8095ac932160659a0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 3 Jun 2024 09:58:13 +0300 +Subject: fs/ntfs3: Add missing .dirty_folio in address_space_operations + +From: Konstantin Komarov + +[ Upstream commit 0f9579d9e0331b6255132ac06bdf2c0a01cceb90 ] + +After switching from pages to folio [1], it became evident that +the initialization of .dirty_folio for page cache operations was missed for +compressed files. + +[1] https://lore.kernel.org/ntfs3/20240422193203.3534108-1-willy@infradead.org + +Fixes: 82cae269cfa95 ("fs/ntfs3: Add initialization of super block") +Signed-off-by: Konstantin Komarov +Signed-off-by: Sasha Levin +--- + fs/ntfs3/inode.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/fs/ntfs3/inode.c b/fs/ntfs3/inode.c +index fab86300eb8a2..86ade4a9ec8f3 100644 +--- a/fs/ntfs3/inode.c ++++ b/fs/ntfs3/inode.c +@@ -2117,5 +2117,6 @@ const struct address_space_operations ntfs_aops = { + const struct address_space_operations ntfs_aops_cmpr = { + .read_folio = ntfs_read_folio, + .readahead = ntfs_readahead, ++ .dirty_folio = block_dirty_folio, + }; + // clang-format on +-- +2.43.0 + diff --git a/queue-6.6/fs-ntfs3-correct-undo-if-ntfs_create_inode-failed.patch b/queue-6.6/fs-ntfs3-correct-undo-if-ntfs_create_inode-failed.patch new file mode 100644 index 00000000000..3f1b31e6ee3 --- /dev/null +++ b/queue-6.6/fs-ntfs3-correct-undo-if-ntfs_create_inode-failed.patch @@ -0,0 +1,50 @@ +From 2ca9523c88bd7efc42724061994e2a291c9b5e8f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 30 May 2024 10:59:13 +0300 +Subject: fs/ntfs3: Correct undo if ntfs_create_inode failed + +From: Konstantin Komarov + +[ Upstream commit f28d0866d8ff798aa497971f93d0cc58f442d946 ] + +Clusters allocated for Extended Attributes, must be freed +when rolling back inode creation. + +Fixes: 82cae269cfa95 ("fs/ntfs3: Add initialization of super block") +Signed-off-by: Konstantin Komarov +Signed-off-by: Sasha Levin +--- + fs/ntfs3/inode.c | 10 +++++++++- + 1 file changed, 9 insertions(+), 1 deletion(-) + +diff --git a/fs/ntfs3/inode.c b/fs/ntfs3/inode.c +index 86ade4a9ec8f3..1545262995da2 100644 +--- a/fs/ntfs3/inode.c ++++ b/fs/ntfs3/inode.c +@@ -1652,7 +1652,9 @@ struct inode *ntfs_create_inode(struct mnt_idmap *idmap, struct inode *dir, + * The packed size of extended attribute is stored in direntry too. + * 'fname' here points to inside new_de. + */ +- ntfs_save_wsl_perm(inode, &fname->dup.ea_size); ++ err = ntfs_save_wsl_perm(inode, &fname->dup.ea_size); ++ if (err) ++ goto out6; + + /* + * update ea_size in file_name attribute too. +@@ -1694,6 +1696,12 @@ struct inode *ntfs_create_inode(struct mnt_idmap *idmap, struct inode *dir, + goto out2; + + out6: ++ attr = ni_find_attr(ni, NULL, NULL, ATTR_EA, NULL, 0, NULL, NULL); ++ if (attr && attr->non_res) { ++ /* Delete ATTR_EA, if non-resident. */ ++ attr_set_size(ni, ATTR_EA, NULL, 0, NULL, 0, NULL, false, NULL); ++ } ++ + if (rp_inserted) + ntfs_remove_reparse(sbi, IO_REPARSE_TAG_SYMLINK, &new_de->ref); + +-- +2.43.0 + diff --git a/queue-6.6/fs-ntfs3-deny-getting-attr-data-block-in-compressed-.patch b/queue-6.6/fs-ntfs3-deny-getting-attr-data-block-in-compressed-.patch new file mode 100644 index 00000000000..c78eec90f4d --- /dev/null +++ b/queue-6.6/fs-ntfs3-deny-getting-attr-data-block-in-compressed-.patch @@ -0,0 +1,46 @@ +From 869e004cd72f605d0caf14c8967cb510ea2aec5e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 3 Jun 2024 20:07:44 +0300 +Subject: fs/ntfs3: Deny getting attr data block in compressed frame + +From: Konstantin Komarov + +[ Upstream commit 69943484b95267c94331cba41e9e64ba7b24f136 ] + +Attempting to retrieve an attribute data block in a compressed frame +is ignored. + +Fixes: be71b5cba2e64 ("fs/ntfs3: Add attrib operations") +Signed-off-by: Konstantin Komarov +Signed-off-by: Sasha Levin +--- + fs/ntfs3/attrib.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +diff --git a/fs/ntfs3/attrib.c b/fs/ntfs3/attrib.c +index e6c0e12d1380b..60a764ebaf570 100644 +--- a/fs/ntfs3/attrib.c ++++ b/fs/ntfs3/attrib.c +@@ -975,6 +975,19 @@ int attr_data_get_block(struct ntfs_inode *ni, CLST vcn, CLST clen, CLST *lcn, + if (err) + goto out; + ++ /* Check for compressed frame. */ ++ err = attr_is_frame_compressed(ni, attr, vcn >> NTFS_LZNT_CUNIT, &hint); ++ if (err) ++ goto out; ++ ++ if (hint) { ++ /* if frame is compressed - don't touch it. */ ++ *lcn = COMPRESSED_LCN; ++ *len = hint; ++ err = -EOPNOTSUPP; ++ goto out; ++ } ++ + if (!*len) { + if (run_lookup_entry(run, vcn, lcn, len, NULL)) { + if (*lcn != SPARSE_LCN || !new) +-- +2.43.0 + diff --git a/queue-6.6/fs-ntfs3-drop-stray-backslash-in-formatting-string.patch b/queue-6.6/fs-ntfs3-drop-stray-backslash-in-formatting-string.patch new file mode 100644 index 00000000000..eff0b8989cb --- /dev/null +++ b/queue-6.6/fs-ntfs3-drop-stray-backslash-in-formatting-string.patch @@ -0,0 +1,38 @@ +From 8ed7ad47fcfc955324dc418a1b294a8ef3e869d1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 24 Apr 2024 00:01:01 +0300 +Subject: fs/ntfs3: Drop stray '\' (backslash) in formatting string + +From: Andy Shevchenko + +[ Upstream commit b366809dd151e8abb29decda02fd6a78b498831f ] + +CHECK /home/andy/prj/linux-topic-uart/fs/ntfs3/super.c +fs/ntfs3/super.c:471:23: warning: unknown escape sequence: '\%' + +Drop stray '\' (backslash) in formatting string. + +Fixes: d27e202b9ac4 ("fs/ntfs3: Add more info into /proc/fs/ntfs3//volinfo") +Signed-off-by: Andy Shevchenko +Signed-off-by: Konstantin Komarov +Signed-off-by: Sasha Levin +--- + fs/ntfs3/super.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/fs/ntfs3/super.c b/fs/ntfs3/super.c +index 10659817f98c7..79ebe62f00017 100644 +--- a/fs/ntfs3/super.c ++++ b/fs/ntfs3/super.c +@@ -463,7 +463,7 @@ static int ntfs3_volinfo(struct seq_file *m, void *o) + struct super_block *sb = m->private; + struct ntfs_sb_info *sbi = sb->s_fs_info; + +- seq_printf(m, "ntfs%d.%d\n%u\n%zu\n\%zu\n%zu\n%s\n%s\n", ++ seq_printf(m, "ntfs%d.%d\n%u\n%zu\n%zu\n%zu\n%s\n%s\n", + sbi->volume.major_ver, sbi->volume.minor_ver, + sbi->cluster_size, sbi->used.bitmap.nbits, + sbi->mft.bitmap.nbits, +-- +2.43.0 + diff --git a/queue-6.6/fs-ntfs3-fix-field-spanning-write-in-index_hdr.patch b/queue-6.6/fs-ntfs3-fix-field-spanning-write-in-index_hdr.patch new file mode 100644 index 00000000000..0053c728f82 --- /dev/null +++ b/queue-6.6/fs-ntfs3-fix-field-spanning-write-in-index_hdr.patch @@ -0,0 +1,84 @@ +From bc45afb785ba3832723644fdd365ff44331afac8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Jun 2024 15:13:09 +0300 +Subject: fs/ntfs3: Fix field-spanning write in INDEX_HDR + +From: Konstantin Komarov + +[ Upstream commit 2f3e176fee66ac86ae387787bf06457b101d9f7a ] + +Fields flags and res[3] replaced with one 4 byte flags. + +Fixes: 4534a70b7056 ("fs/ntfs3: Add headers and misc files") +Signed-off-by: Konstantin Komarov +Signed-off-by: Sasha Levin +--- + fs/ntfs3/index.c | 4 ++-- + fs/ntfs3/ntfs.h | 9 +++++---- + 2 files changed, 7 insertions(+), 6 deletions(-) + +diff --git a/fs/ntfs3/index.c b/fs/ntfs3/index.c +index 14284f0ed46aa..0d8a96136b084 100644 +--- a/fs/ntfs3/index.c ++++ b/fs/ntfs3/index.c +@@ -978,7 +978,7 @@ static struct indx_node *indx_new(struct ntfs_index *indx, + hdr->used = + cpu_to_le32(eo + sizeof(struct NTFS_DE) + sizeof(u64)); + de_set_vbn_le(e, *sub_vbn); +- hdr->flags = 1; ++ hdr->flags = NTFS_INDEX_HDR_HAS_SUBNODES; + } else { + e->size = cpu_to_le16(sizeof(struct NTFS_DE)); + hdr->used = cpu_to_le32(eo + sizeof(struct NTFS_DE)); +@@ -1682,7 +1682,7 @@ static int indx_insert_into_root(struct ntfs_index *indx, struct ntfs_inode *ni, + e->size = cpu_to_le16(sizeof(struct NTFS_DE) + sizeof(u64)); + e->flags = NTFS_IE_HAS_SUBNODES | NTFS_IE_LAST; + +- hdr->flags = 1; ++ hdr->flags = NTFS_INDEX_HDR_HAS_SUBNODES; + hdr->used = hdr->total = + cpu_to_le32(new_root_size - offsetof(struct INDEX_ROOT, ihdr)); + +diff --git a/fs/ntfs3/ntfs.h b/fs/ntfs3/ntfs.h +index 5bd69049227bf..964e27c7b9016 100644 +--- a/fs/ntfs3/ntfs.h ++++ b/fs/ntfs3/ntfs.h +@@ -693,14 +693,15 @@ static inline bool de_has_vcn_ex(const struct NTFS_DE *e) + offsetof(struct ATTR_FILE_NAME, name) + \ + NTFS_NAME_LEN * sizeof(short), 8) + ++#define NTFS_INDEX_HDR_HAS_SUBNODES cpu_to_le32(1) ++ + struct INDEX_HDR { + __le32 de_off; // 0x00: The offset from the start of this structure + // to the first NTFS_DE. + __le32 used; // 0x04: The size of this structure plus all + // entries (quad-word aligned). + __le32 total; // 0x08: The allocated size of for this structure plus all entries. +- u8 flags; // 0x0C: 0x00 = Small directory, 0x01 = Large directory. +- u8 res[3]; ++ __le32 flags; // 0x0C: 0x00 = Small directory, 0x01 = Large directory. + + // + // de_off + used <= total +@@ -748,7 +749,7 @@ static inline struct NTFS_DE *hdr_next_de(const struct INDEX_HDR *hdr, + + static inline bool hdr_has_subnode(const struct INDEX_HDR *hdr) + { +- return hdr->flags & 1; ++ return hdr->flags & NTFS_INDEX_HDR_HAS_SUBNODES; + } + + struct INDEX_BUFFER { +@@ -768,7 +769,7 @@ static inline bool ib_is_empty(const struct INDEX_BUFFER *ib) + + static inline bool ib_is_leaf(const struct INDEX_BUFFER *ib) + { +- return !(ib->ihdr.flags & 1); ++ return !(ib->ihdr.flags & NTFS_INDEX_HDR_HAS_SUBNODES); + } + + /* Index root structure ( 0x90 ). */ +-- +2.43.0 + diff --git a/queue-6.6/fs-ntfs3-fix-getting-file-type.patch b/queue-6.6/fs-ntfs3-fix-getting-file-type.patch new file mode 100644 index 00000000000..e25a57cdb0f --- /dev/null +++ b/queue-6.6/fs-ntfs3-fix-getting-file-type.patch @@ -0,0 +1,36 @@ +From e6cae82653048b2d72efbcc2257019d9634c2921 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 4 Jun 2024 10:41:39 +0300 +Subject: fs/ntfs3: Fix getting file type + +From: Konstantin Komarov + +[ Upstream commit 24c5100aceedcd47af89aaa404d4c96cd2837523 ] + +An additional condition causes the mft record to be read from disk +and get the file type dt_type. + +Fixes: 22457c047ed97 ("fs/ntfs3: Modified fix directory element type detection") +Signed-off-by: Konstantin Komarov +Signed-off-by: Sasha Levin +--- + fs/ntfs3/dir.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/fs/ntfs3/dir.c b/fs/ntfs3/dir.c +index ac8eb8657f1a9..9d0a09f00b384 100644 +--- a/fs/ntfs3/dir.c ++++ b/fs/ntfs3/dir.c +@@ -326,7 +326,8 @@ static inline int ntfs_filldir(struct ntfs_sb_info *sbi, struct ntfs_inode *ni, + * It does additional locks/reads just to get the type of name. + * Should we use additional mount option to enable branch below? + */ +- if ((fname->dup.fa & FILE_ATTRIBUTE_REPARSE_POINT) && ++ if (((fname->dup.fa & FILE_ATTRIBUTE_REPARSE_POINT) || ++ fname->dup.ea_size) && + ino != ni->mi.rno) { + struct inode *inode = ntfs_iget5(sbi->sb, &e->ref, NULL); + if (!IS_ERR_OR_NULL(inode)) { +-- +2.43.0 + diff --git a/queue-6.6/fs-ntfs3-fix-the-format-of-the-nocase-mount-option.patch b/queue-6.6/fs-ntfs3-fix-the-format-of-the-nocase-mount-option.patch new file mode 100644 index 00000000000..341c42b5cc1 --- /dev/null +++ b/queue-6.6/fs-ntfs3-fix-the-format-of-the-nocase-mount-option.patch @@ -0,0 +1,36 @@ +From 9599228a2eda5fc6079daa712f37f9a40676fafe Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 Jun 2024 09:57:33 +0300 +Subject: fs/ntfs3: Fix the format of the "nocase" mount option + +From: Konstantin Komarov + +[ Upstream commit d392e85fd1e8d58e460c17ca7d0d5c157848d9c1 ] + +The 'nocase' option was mistakenly added as fsparam_flag_no +with the 'no' prefix, causing the case-insensitive mode to require +the 'nonocase' option to be enabled. + +Fixes: a3a956c78efa ("fs/ntfs3: Add option "nocase"") +Signed-off-by: Konstantin Komarov +Signed-off-by: Sasha Levin +--- + fs/ntfs3/super.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/fs/ntfs3/super.c b/fs/ntfs3/super.c +index 79ebe62f00017..d47cfa215a367 100644 +--- a/fs/ntfs3/super.c ++++ b/fs/ntfs3/super.c +@@ -276,7 +276,7 @@ static const struct fs_parameter_spec ntfs_fs_parameters[] = { + fsparam_flag_no("acl", Opt_acl), + fsparam_string("iocharset", Opt_iocharset), + fsparam_flag_no("prealloc", Opt_prealloc), +- fsparam_flag_no("nocase", Opt_nocase), ++ fsparam_flag_no("case", Opt_nocase), + {} + }; + // clang-format on +-- +2.43.0 + diff --git a/queue-6.6/fs-ntfs3-fix-transform-resident-to-nonresident-for-c.patch b/queue-6.6/fs-ntfs3-fix-transform-resident-to-nonresident-for-c.patch new file mode 100644 index 00000000000..a47e38126d5 --- /dev/null +++ b/queue-6.6/fs-ntfs3-fix-transform-resident-to-nonresident-for-c.patch @@ -0,0 +1,56 @@ +From 8c5844cd61fba50df185176dde575643c40119d7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 16 May 2024 01:10:01 +0300 +Subject: fs/ntfs3: Fix transform resident to nonresident for compressed files +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Konstantin Komarov + +[ Upstream commit 25610ff98d4a34e6a85cbe4fd8671be6b0829f8f ] + +Сorrected calculation of required space len (in clusters) +for attribute data storage in case of compression. + +Fixes: be71b5cba2e64 ("fs/ntfs3: Add attrib operations") +Signed-off-by: Konstantin Komarov +Signed-off-by: Sasha Levin +--- + fs/ntfs3/attrib.c | 13 ++++++++----- + 1 file changed, 8 insertions(+), 5 deletions(-) + +diff --git a/fs/ntfs3/attrib.c b/fs/ntfs3/attrib.c +index 47d388699f5f0..e6c0e12d1380b 100644 +--- a/fs/ntfs3/attrib.c ++++ b/fs/ntfs3/attrib.c +@@ -231,7 +231,7 @@ int attr_make_nonresident(struct ntfs_inode *ni, struct ATTRIB *attr, + struct ntfs_sb_info *sbi; + struct ATTRIB *attr_s; + struct MFT_REC *rec; +- u32 used, asize, rsize, aoff, align; ++ u32 used, asize, rsize, aoff; + bool is_data; + CLST len, alen; + char *next; +@@ -252,10 +252,13 @@ int attr_make_nonresident(struct ntfs_inode *ni, struct ATTRIB *attr, + rsize = le32_to_cpu(attr->res.data_size); + is_data = attr->type == ATTR_DATA && !attr->name_len; + +- align = sbi->cluster_size; +- if (is_attr_compressed(attr)) +- align <<= NTFS_LZNT_CUNIT; +- len = (rsize + align - 1) >> sbi->cluster_bits; ++ /* len - how many clusters required to store 'rsize' bytes */ ++ if (is_attr_compressed(attr)) { ++ u8 shift = sbi->cluster_bits + NTFS_LZNT_CUNIT; ++ len = ((rsize + (1u << shift) - 1) >> shift) << NTFS_LZNT_CUNIT; ++ } else { ++ len = bytes_to_cluster(sbi, rsize); ++ } + + run_init(run); + +-- +2.43.0 + diff --git a/queue-6.6/fs-ntfs3-keep-runs-for-mft-attr_data-and-mft-attr_bi.patch b/queue-6.6/fs-ntfs3-keep-runs-for-mft-attr_data-and-mft-attr_bi.patch new file mode 100644 index 00000000000..1af02918e19 --- /dev/null +++ b/queue-6.6/fs-ntfs3-keep-runs-for-mft-attr_data-and-mft-attr_bi.patch @@ -0,0 +1,36 @@ +From 799622f0b034a8d2b11544266081aec8ef58a139 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 18 Jun 2024 17:11:37 +0300 +Subject: fs/ntfs3: Keep runs for $MFT::$ATTR_DATA and $MFT::$ATTR_BITMAP + +From: Konstantin Komarov + +[ Upstream commit eb95678ee930d67d79fc83f0a700245ae7230455 ] + +We skip the run_truncate_head call also for $MFT::$ATTR_BITMAP. +Otherwise wnd_map()/run_lookup_entry will not find the disk position for the bitmap parts. + +Fixes: 0e5b044cbf3a ("fs/ntfs3: Refactoring attr_set_size to restore after errors") +Signed-off-by: Konstantin Komarov +Signed-off-by: Sasha Levin +--- + fs/ntfs3/attrib.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/fs/ntfs3/attrib.c b/fs/ntfs3/attrib.c +index f8cc49f14c7d3..fc6cea60044ed 100644 +--- a/fs/ntfs3/attrib.c ++++ b/fs/ntfs3/attrib.c +@@ -673,7 +673,8 @@ int attr_set_size(struct ntfs_inode *ni, enum ATTR_TYPE type, + goto undo_2; + } + +- if (!is_mft) ++ /* keep runs for $MFT::$ATTR_DATA and $MFT::$ATTR_BITMAP. */ ++ if (ni->mi.rno != MFT_REC_MFT) + run_truncate_head(run, evcn + 1); + + svcn = le64_to_cpu(attr->nres.svcn); +-- +2.43.0 + diff --git a/queue-6.6/fs-ntfs3-merge-synonym-compression_unit-and-ntfs_lzn.patch b/queue-6.6/fs-ntfs3-merge-synonym-compression_unit-and-ntfs_lzn.patch new file mode 100644 index 00000000000..cb116365648 --- /dev/null +++ b/queue-6.6/fs-ntfs3-merge-synonym-compression_unit-and-ntfs_lzn.patch @@ -0,0 +1,94 @@ +From eb6e3ab5deec21636df9ec48a1af7889fe2c76f0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 16 May 2024 00:41:02 +0300 +Subject: fs/ntfs3: Merge synonym COMPRESSION_UNIT and NTFS_LZNT_CUNIT + +From: Konstantin Komarov + +[ Upstream commit 487f8d482a7e51a640b8f955a398f906a4f83951 ] + +COMPRESSION_UNIT and NTFS_LZNT_CUNIT mean the same thing +(1u< +Stable-dep-of: 25610ff98d4a ("fs/ntfs3: Fix transform resident to nonresident for compressed files") +Signed-off-by: Sasha Levin +--- + fs/ntfs3/attrib.c | 2 +- + fs/ntfs3/frecord.c | 2 +- + fs/ntfs3/fslog.c | 2 +- + fs/ntfs3/inode.c | 2 +- + fs/ntfs3/ntfs.h | 3 --- + 5 files changed, 4 insertions(+), 7 deletions(-) + +diff --git a/fs/ntfs3/attrib.c b/fs/ntfs3/attrib.c +index 7aadf50109994..47d388699f5f0 100644 +--- a/fs/ntfs3/attrib.c ++++ b/fs/ntfs3/attrib.c +@@ -254,7 +254,7 @@ int attr_make_nonresident(struct ntfs_inode *ni, struct ATTRIB *attr, + + align = sbi->cluster_size; + if (is_attr_compressed(attr)) +- align <<= COMPRESSION_UNIT; ++ align <<= NTFS_LZNT_CUNIT; + len = (rsize + align - 1) >> sbi->cluster_bits; + + run_init(run); +diff --git a/fs/ntfs3/frecord.c b/fs/ntfs3/frecord.c +index 22fe7f58ad638..424865dfca74b 100644 +--- a/fs/ntfs3/frecord.c ++++ b/fs/ntfs3/frecord.c +@@ -1501,7 +1501,7 @@ int ni_insert_nonresident(struct ntfs_inode *ni, enum ATTR_TYPE type, + + if (is_ext) { + if (flags & ATTR_FLAG_COMPRESSED) +- attr->nres.c_unit = COMPRESSION_UNIT; ++ attr->nres.c_unit = NTFS_LZNT_CUNIT; + attr->nres.total_size = attr->nres.alloc_size; + } + +diff --git a/fs/ntfs3/fslog.c b/fs/ntfs3/fslog.c +index c14ab9d5cfc70..75b594769b367 100644 +--- a/fs/ntfs3/fslog.c ++++ b/fs/ntfs3/fslog.c +@@ -2996,7 +2996,7 @@ static struct ATTRIB *attr_create_nonres_log(struct ntfs_sb_info *sbi, + if (is_ext) { + attr->name_off = SIZEOF_NONRESIDENT_EX_LE; + if (is_attr_compressed(attr)) +- attr->nres.c_unit = COMPRESSION_UNIT; ++ attr->nres.c_unit = NTFS_LZNT_CUNIT; + + attr->nres.run_off = + cpu_to_le16(SIZEOF_NONRESIDENT_EX + name_size); +diff --git a/fs/ntfs3/inode.c b/fs/ntfs3/inode.c +index 6af705ccba65a..fab86300eb8a2 100644 +--- a/fs/ntfs3/inode.c ++++ b/fs/ntfs3/inode.c +@@ -1498,7 +1498,7 @@ struct inode *ntfs_create_inode(struct mnt_idmap *idmap, struct inode *dir, + attr->size = cpu_to_le32(SIZEOF_NONRESIDENT_EX + 8); + attr->name_off = SIZEOF_NONRESIDENT_EX_LE; + attr->flags = ATTR_FLAG_COMPRESSED; +- attr->nres.c_unit = COMPRESSION_UNIT; ++ attr->nres.c_unit = NTFS_LZNT_CUNIT; + asize = SIZEOF_NONRESIDENT_EX + 8; + } else { + attr->size = cpu_to_le32(SIZEOF_NONRESIDENT + 8); +diff --git a/fs/ntfs3/ntfs.h b/fs/ntfs3/ntfs.h +index b70288cc5f6fa..5bd69049227bf 100644 +--- a/fs/ntfs3/ntfs.h ++++ b/fs/ntfs3/ntfs.h +@@ -82,9 +82,6 @@ typedef u32 CLST; + #define RESIDENT_LCN ((CLST)-2) + #define COMPRESSED_LCN ((CLST)-3) + +-#define COMPRESSION_UNIT 4 +-#define COMPRESS_MAX_CLUSTER 0x1000 +- + enum RECORD_NUM { + MFT_REC_MFT = 0, + MFT_REC_MIRR = 1, +-- +2.43.0 + diff --git a/queue-6.6/fs-ntfs3-missed-error-return.patch b/queue-6.6/fs-ntfs3-missed-error-return.patch new file mode 100644 index 00000000000..b4b8c0540e1 --- /dev/null +++ b/queue-6.6/fs-ntfs3-missed-error-return.patch @@ -0,0 +1,32 @@ +From 176423d415c91c600e64ee8769a0c09695e4d93c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Jun 2024 13:43:09 +0300 +Subject: fs/ntfs3: Missed error return + +From: Konstantin Komarov + +[ Upstream commit 2cbbd96820255fff4f0ad1533197370c9ccc570b ] + +Fixes: 3f3b442b5ad2 ("fs/ntfs3: Add bitmap") +Signed-off-by: Konstantin Komarov +Signed-off-by: Sasha Levin +--- + fs/ntfs3/bitmap.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/fs/ntfs3/bitmap.c b/fs/ntfs3/bitmap.c +index 845f9b22deef0..931a7744d1865 100644 +--- a/fs/ntfs3/bitmap.c ++++ b/fs/ntfs3/bitmap.c +@@ -1382,7 +1382,7 @@ int wnd_extend(struct wnd_bitmap *wnd, size_t new_bits) + + err = ntfs_vbo_to_lbo(sbi, &wnd->run, vbo, &lbo, &bytes); + if (err) +- break; ++ return err; + + bh = ntfs_bread(sb, lbo >> sb->s_blocksize_bits); + if (!bh) +-- +2.43.0 + diff --git a/queue-6.6/fs-ntfs3-missed-ni_flag_update_parent-setting.patch b/queue-6.6/fs-ntfs3-missed-ni_flag_update_parent-setting.patch new file mode 100644 index 00000000000..06a6492f740 --- /dev/null +++ b/queue-6.6/fs-ntfs3-missed-ni_flag_update_parent-setting.patch @@ -0,0 +1,31 @@ +From 6dba8910223fc23c47ca2199dc47e079bd5be4d2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 3 Jun 2024 20:36:03 +0300 +Subject: fs/ntfs3: Missed NI_FLAG_UPDATE_PARENT setting + +From: Konstantin Komarov + +[ Upstream commit 1c308ace1fd6de93bd0b7e1a5e8963ab27e2c016 ] + +Fixes: be71b5cba2e64 ("fs/ntfs3: Add attrib operations") +Signed-off-by: Konstantin Komarov +Signed-off-by: Sasha Levin +--- + fs/ntfs3/attrib.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/fs/ntfs3/attrib.c b/fs/ntfs3/attrib.c +index 60a764ebaf570..f8cc49f14c7d3 100644 +--- a/fs/ntfs3/attrib.c ++++ b/fs/ntfs3/attrib.c +@@ -1738,6 +1738,7 @@ int attr_allocate_frame(struct ntfs_inode *ni, CLST frame, size_t compr_size, + + attr_b->nres.total_size = cpu_to_le64(total_size); + inode_set_bytes(&ni->vfs_inode, total_size); ++ ni->ni_flags |= NI_FLAG_UPDATE_PARENT; + + mi_b->dirty = true; + mark_inode_dirty(&ni->vfs_inode); +-- +2.43.0 + diff --git a/queue-6.6/fs-ntfs3-replace-inode_trylock-with-inode_lock.patch b/queue-6.6/fs-ntfs3-replace-inode_trylock-with-inode_lock.patch new file mode 100644 index 00000000000..0d263ee6973 --- /dev/null +++ b/queue-6.6/fs-ntfs3-replace-inode_trylock-with-inode_lock.patch @@ -0,0 +1,37 @@ +From d3a5c101f43ce499a6fcc3be31de1e024bbd5bc3 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 30 May 2024 10:54:07 +0300 +Subject: fs/ntfs3: Replace inode_trylock with inode_lock + +From: Konstantin Komarov + +[ Upstream commit 69505fe98f198ee813898cbcaf6770949636430b ] + +The issue was detected due to xfstest 465 failing. + +Fixes: 4342306f0f0d ("fs/ntfs3: Add file operations and implementation") +Signed-off-by: Konstantin Komarov +Signed-off-by: Sasha Levin +--- + fs/ntfs3/file.c | 5 +---- + 1 file changed, 1 insertion(+), 4 deletions(-) + +diff --git a/fs/ntfs3/file.c b/fs/ntfs3/file.c +index dfd5402a42e44..cd69cbd0aaae7 100644 +--- a/fs/ntfs3/file.c ++++ b/fs/ntfs3/file.c +@@ -299,10 +299,7 @@ static int ntfs_file_mmap(struct file *file, struct vm_area_struct *vma) + } + + if (ni->i_valid < to) { +- if (!inode_trylock(inode)) { +- err = -EAGAIN; +- goto out; +- } ++ inode_lock(inode); + err = ntfs_extend_initialized_size(file, ni, + ni->i_valid, to); + inode_unlock(inode); +-- +2.43.0 + diff --git a/queue-6.6/fs-proc-task_mmu-don-t-indicate-pm_mmap_exclusive-wi.patch b/queue-6.6/fs-proc-task_mmu-don-t-indicate-pm_mmap_exclusive-wi.patch new file mode 100644 index 00000000000..43dce8046f8 --- /dev/null +++ b/queue-6.6/fs-proc-task_mmu-don-t-indicate-pm_mmap_exclusive-wi.patch @@ -0,0 +1,94 @@ +From 79c3f4018d725abf32e4afb4a28239b36bcca712 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 7 Jun 2024 14:23:53 +0200 +Subject: fs/proc/task_mmu: don't indicate PM_MMAP_EXCLUSIVE without PM_PRESENT + +From: David Hildenbrand + +[ Upstream commit da7f31ed0f4df8f61e8195e527aa83dd54896ba3 ] + +Relying on the mapcount for non-present PTEs that reference pages doesn't +make any sense: they are not accounted in the mapcount, so page_mapcount() +== 1 won't return the result we actually want to know. + +While we don't check the mapcount for migration entries already, we could +end up checking it for swap, hwpoison, device exclusive, ... entries, +which we really shouldn't. + +There is one exception: device private entries, which we consider +fake-present (e.g., incremented the mapcount). But we won't care about +that for now for PM_MMAP_EXCLUSIVE, because indicating PM_SWAP for them +although they are fake-present already sounds suspiciously wrong. + +Let's never indicate PM_MMAP_EXCLUSIVE without PM_PRESENT. + +Link: https://lkml.kernel.org/r/20240607122357.115423-3-david@redhat.com +Signed-off-by: David Hildenbrand +Reviewed-by: Oscar Salvador +Cc: Alexey Dobriyan +Cc: Jonathan Corbet +Cc: Kirill A. Shutemov +Cc: Lance Yang +Signed-off-by: Andrew Morton +Stable-dep-of: 2c1f057e5be6 ("fs/proc/task_mmu: properly detect PM_MMAP_EXCLUSIVE per page of PMD-mapped THPs") +Signed-off-by: Sasha Levin +--- + fs/proc/task_mmu.c | 8 ++------ + 1 file changed, 2 insertions(+), 6 deletions(-) + +diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c +index e327d1c77de88..a5a946bef0ac4 100644 +--- a/fs/proc/task_mmu.c ++++ b/fs/proc/task_mmu.c +@@ -1411,7 +1411,6 @@ static pagemap_entry_t pte_to_pagemap_entry(struct pagemapread *pm, + { + u64 frame = 0, flags = 0; + struct page *page = NULL; +- bool migration = false; + + if (pte_present(pte)) { + if (pm->show_pfn) +@@ -1443,7 +1442,6 @@ static pagemap_entry_t pte_to_pagemap_entry(struct pagemapread *pm, + (offset << MAX_SWAPFILES_SHIFT); + } + flags |= PM_SWAP; +- migration = is_migration_entry(entry); + if (is_pfn_swap_entry(entry)) + page = pfn_swap_entry_to_page(entry); + if (pte_marker_entry_uffd_wp(entry)) +@@ -1452,7 +1450,7 @@ static pagemap_entry_t pte_to_pagemap_entry(struct pagemapread *pm, + + if (page && !PageAnon(page)) + flags |= PM_FILE; +- if (page && !migration && page_mapcount(page) == 1) ++ if (page && (flags & PM_PRESENT) && page_mapcount(page) == 1) + flags |= PM_MMAP_EXCLUSIVE; + if (vma->vm_flags & VM_SOFTDIRTY) + flags |= PM_SOFT_DIRTY; +@@ -1469,7 +1467,6 @@ static int pagemap_pmd_range(pmd_t *pmdp, unsigned long addr, unsigned long end, + pte_t *pte, *orig_pte; + int err = 0; + #ifdef CONFIG_TRANSPARENT_HUGEPAGE +- bool migration = false; + + ptl = pmd_trans_huge_lock(pmdp, vma); + if (ptl) { +@@ -1513,14 +1510,13 @@ static int pagemap_pmd_range(pmd_t *pmdp, unsigned long addr, unsigned long end, + if (pmd_swp_uffd_wp(pmd)) + flags |= PM_UFFD_WP; + VM_BUG_ON(!is_pmd_migration_entry(pmd)); +- migration = is_migration_entry(entry); + page = pfn_swap_entry_to_page(entry); + } + #endif + + if (page && !PageAnon(page)) + flags |= PM_FILE; +- if (page && !migration && page_mapcount(page) == 1) ++ if (page && (flags & PM_PRESENT) && page_mapcount(page) == 1) + flags |= PM_MMAP_EXCLUSIVE; + + for (; addr != end; addr += PAGE_SIZE) { +-- +2.43.0 + diff --git a/queue-6.6/fs-proc-task_mmu-indicate-pm_file-for-pmd-mapped-fil.patch b/queue-6.6/fs-proc-task_mmu-indicate-pm_file-for-pmd-mapped-fil.patch new file mode 100644 index 00000000000..25725ef53e7 --- /dev/null +++ b/queue-6.6/fs-proc-task_mmu-indicate-pm_file-for-pmd-mapped-fil.patch @@ -0,0 +1,65 @@ +From d236f111e9c84bb77a9f977644dca5dd3764b9b6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 7 Jun 2024 14:23:52 +0200 +Subject: fs/proc/task_mmu: indicate PM_FILE for PMD-mapped file THP + +From: David Hildenbrand + +[ Upstream commit 3f9f022e975d930709848a86a1c79775b0585202 ] + +Patch series "fs/proc: move page_mapcount() to fs/proc/internal.h". + +With all other page_mapcount() users in the tree gone, move +page_mapcount() to fs/proc/internal.h, rename it and extend the +documentation to prevent future (ab)use. + +... of course, I find some issues while working on that code that I sort +first ;) + +We'll now only end up calling page_mapcount() [now +folio_precise_page_mapcount()] on pages mapped via present page table +entries. Except for /proc/kpagecount, that still does questionable +things, but we'll leave that legacy interface as is for now. + +Did a quick sanity check. Likely we would want some better selfestest for +/proc/$/pagemap + smaps. I'll see if I can find some time to write some +more. + +This patch (of 6): + +Looks like we never taught pagemap_pmd_range() about the existence of +PMD-mapped file THPs. Seems to date back to the times when we first added +support for non-anon THPs in the form of shmem THP. + +Link: https://lkml.kernel.org/r/20240607122357.115423-1-david@redhat.com +Link: https://lkml.kernel.org/r/20240607122357.115423-2-david@redhat.com +Signed-off-by: David Hildenbrand +Fixes: 800d8c63b2e9 ("shmem: add huge pages support") +Acked-by: Kirill A. Shutemov +Reviewed-by: Lance Yang +Reviewed-by: Oscar Salvador +Cc: David Hildenbrand +Cc: Jonathan Corbet +Cc: Alexey Dobriyan +Signed-off-by: Andrew Morton +Signed-off-by: Sasha Levin +--- + fs/proc/task_mmu.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c +index ac605f143762f..0f5c06b8bb342 100644 +--- a/fs/proc/task_mmu.c ++++ b/fs/proc/task_mmu.c +@@ -1519,6 +1519,8 @@ static int pagemap_pmd_range(pmd_t *pmdp, unsigned long addr, unsigned long end, + } + #endif + ++ if (page && !PageAnon(page)) ++ flags |= PM_FILE; + if (page && !migration && page_mapcount(page) == 1) + flags |= PM_MMAP_EXCLUSIVE; + +-- +2.43.0 + diff --git a/queue-6.6/fs-proc-task_mmu-properly-detect-pm_mmap_exclusive-p.patch b/queue-6.6/fs-proc-task_mmu-properly-detect-pm_mmap_exclusive-p.patch new file mode 100644 index 00000000000..0f5c1b93e5e --- /dev/null +++ b/queue-6.6/fs-proc-task_mmu-properly-detect-pm_mmap_exclusive-p.patch @@ -0,0 +1,99 @@ +From af012573c38a3fc8099259479d0f405fea3996e5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 7 Jun 2024 14:23:54 +0200 +Subject: fs/proc/task_mmu: properly detect PM_MMAP_EXCLUSIVE per page of + PMD-mapped THPs + +From: David Hildenbrand + +[ Upstream commit 2c1f057e5be63e890f2dd89e4c25ab5eef084a91 ] + +We added PM_MMAP_EXCLUSIVE in 2015 via commit 77bb499bb60f ("pagemap: add +mmap-exclusive bit for marking pages mapped only here"), when THPs could +not be partially mapped and page_mapcount() returned something that was +true for all pages of the THP. + +In 2016, we added support for partially mapping THPs via commit +53f9263baba6 ("mm: rework mapcount accounting to enable 4k mapping of +THPs") but missed to determine PM_MMAP_EXCLUSIVE as well per page. + +Checking page_mapcount() on the head page does not tell the whole story. + +We should check each individual page. In a future without per-page +mapcounts it will be different, but we'll change that to be consistent +with PTE-mapped THPs once we deal with that. + +Link: https://lkml.kernel.org/r/20240607122357.115423-4-david@redhat.com +Fixes: 53f9263baba6 ("mm: rework mapcount accounting to enable 4k mapping of THPs") +Signed-off-by: David Hildenbrand +Reviewed-by: Oscar Salvador +Cc: Kirill A. Shutemov +Cc: Alexey Dobriyan +Cc: Jonathan Corbet +Cc: Lance Yang +Signed-off-by: Andrew Morton +Signed-off-by: Sasha Levin +--- + fs/proc/task_mmu.c | 22 ++++++++++++---------- + 1 file changed, 12 insertions(+), 10 deletions(-) + +diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c +index a5a946bef0ac4..59571737e1677 100644 +--- a/fs/proc/task_mmu.c ++++ b/fs/proc/task_mmu.c +@@ -1470,6 +1470,7 @@ static int pagemap_pmd_range(pmd_t *pmdp, unsigned long addr, unsigned long end, + + ptl = pmd_trans_huge_lock(pmdp, vma); + if (ptl) { ++ unsigned int idx = (addr & ~PMD_MASK) >> PAGE_SHIFT; + u64 flags = 0, frame = 0; + pmd_t pmd = *pmdp; + struct page *page = NULL; +@@ -1486,8 +1487,7 @@ static int pagemap_pmd_range(pmd_t *pmdp, unsigned long addr, unsigned long end, + if (pmd_uffd_wp(pmd)) + flags |= PM_UFFD_WP; + if (pm->show_pfn) +- frame = pmd_pfn(pmd) + +- ((addr & ~PMD_MASK) >> PAGE_SHIFT); ++ frame = pmd_pfn(pmd) + idx; + } + #ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION + else if (is_swap_pmd(pmd)) { +@@ -1496,11 +1496,9 @@ static int pagemap_pmd_range(pmd_t *pmdp, unsigned long addr, unsigned long end, + + if (pm->show_pfn) { + if (is_pfn_swap_entry(entry)) +- offset = swp_offset_pfn(entry); ++ offset = swp_offset_pfn(entry) + idx; + else +- offset = swp_offset(entry); +- offset = offset + +- ((addr & ~PMD_MASK) >> PAGE_SHIFT); ++ offset = swp_offset(entry) + idx; + frame = swp_type(entry) | + (offset << MAX_SWAPFILES_SHIFT); + } +@@ -1516,12 +1514,16 @@ static int pagemap_pmd_range(pmd_t *pmdp, unsigned long addr, unsigned long end, + + if (page && !PageAnon(page)) + flags |= PM_FILE; +- if (page && (flags & PM_PRESENT) && page_mapcount(page) == 1) +- flags |= PM_MMAP_EXCLUSIVE; + +- for (; addr != end; addr += PAGE_SIZE) { +- pagemap_entry_t pme = make_pme(frame, flags); ++ for (; addr != end; addr += PAGE_SIZE, idx++) { ++ unsigned long cur_flags = flags; ++ pagemap_entry_t pme; ++ ++ if (page && (flags & PM_PRESENT) && ++ page_mapcount(page + idx) == 1) ++ cur_flags |= PM_MMAP_EXCLUSIVE; + ++ pme = make_pme(frame, cur_flags); + err = add_to_pagemap(&pme, pm); + if (err) + break; +-- +2.43.0 + diff --git a/queue-6.6/fs-proc-task_mmu.c-add_to_pagemap-remove-useless-par.patch b/queue-6.6/fs-proc-task_mmu.c-add_to_pagemap-remove-useless-par.patch new file mode 100644 index 00000000000..b25ac8ae39d --- /dev/null +++ b/queue-6.6/fs-proc-task_mmu.c-add_to_pagemap-remove-useless-par.patch @@ -0,0 +1,92 @@ +From 1198f5c6b220beb93f2b5396146943fad598a15d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 11 Jan 2024 08:45:33 +0000 +Subject: fs/proc/task_mmu.c: add_to_pagemap: remove useless parameter addr + +From: Hui Zhu + +[ Upstream commit cabbb6d51e2af4fc2f3c763f58a12c628f228987 ] + +Function parameter addr of add_to_pagemap() is useless. Remove it. + +Link: https://lkml.kernel.org/r/20240111084533.40038-1-teawaterz@linux.alibaba.com +Signed-off-by: Hui Zhu +Reviewed-by: Muhammad Usama Anjum +Tested-by: Muhammad Usama Anjum +Cc: Alexey Dobriyan +Cc: Andrei Vagin +Cc: David Hildenbrand +Cc: Hugh Dickins +Cc: Kefeng Wang +Cc: Liam R. Howlett +Cc: Peter Xu +Cc: Ryan Roberts +Signed-off-by: Andrew Morton +Stable-dep-of: 2c1f057e5be6 ("fs/proc/task_mmu: properly detect PM_MMAP_EXCLUSIVE per page of PMD-mapped THPs") +Signed-off-by: Sasha Levin +--- + fs/proc/task_mmu.c | 13 ++++++------- + 1 file changed, 6 insertions(+), 7 deletions(-) + +diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c +index 0f5c06b8bb342..e327d1c77de88 100644 +--- a/fs/proc/task_mmu.c ++++ b/fs/proc/task_mmu.c +@@ -1358,8 +1358,7 @@ static inline pagemap_entry_t make_pme(u64 frame, u64 flags) + return (pagemap_entry_t) { .pme = (frame & PM_PFRAME_MASK) | flags }; + } + +-static int add_to_pagemap(unsigned long addr, pagemap_entry_t *pme, +- struct pagemapread *pm) ++static int add_to_pagemap(pagemap_entry_t *pme, struct pagemapread *pm) + { + pm->buffer[pm->pos++] = *pme; + if (pm->pos >= pm->len) +@@ -1386,7 +1385,7 @@ static int pagemap_pte_hole(unsigned long start, unsigned long end, + hole_end = end; + + for (; addr < hole_end; addr += PAGE_SIZE) { +- err = add_to_pagemap(addr, &pme, pm); ++ err = add_to_pagemap(&pme, pm); + if (err) + goto out; + } +@@ -1398,7 +1397,7 @@ static int pagemap_pte_hole(unsigned long start, unsigned long end, + if (vma->vm_flags & VM_SOFTDIRTY) + pme = make_pme(0, PM_SOFT_DIRTY); + for (; addr < min(end, vma->vm_end); addr += PAGE_SIZE) { +- err = add_to_pagemap(addr, &pme, pm); ++ err = add_to_pagemap(&pme, pm); + if (err) + goto out; + } +@@ -1527,7 +1526,7 @@ static int pagemap_pmd_range(pmd_t *pmdp, unsigned long addr, unsigned long end, + for (; addr != end; addr += PAGE_SIZE) { + pagemap_entry_t pme = make_pme(frame, flags); + +- err = add_to_pagemap(addr, &pme, pm); ++ err = add_to_pagemap(&pme, pm); + if (err) + break; + if (pm->show_pfn) { +@@ -1555,7 +1554,7 @@ static int pagemap_pmd_range(pmd_t *pmdp, unsigned long addr, unsigned long end, + pagemap_entry_t pme; + + pme = pte_to_pagemap_entry(pm, vma, addr, ptep_get(pte)); +- err = add_to_pagemap(addr, &pme, pm); ++ err = add_to_pagemap(&pme, pm); + if (err) + break; + } +@@ -1605,7 +1604,7 @@ static int pagemap_hugetlb_range(pte_t *ptep, unsigned long hmask, + for (; addr != end; addr += PAGE_SIZE) { + pagemap_entry_t pme = make_pme(frame, flags); + +- err = add_to_pagemap(addr, &pme, pm); ++ err = add_to_pagemap(&pme, pm); + if (err) + return err; + if (pm->show_pfn && (flags & PM_PRESENT)) +-- +2.43.0 + diff --git a/queue-6.6/gss_krb5-fix-the-error-handling-path-for-crypto_sync.patch b/queue-6.6/gss_krb5-fix-the-error-handling-path-for-crypto_sync.patch new file mode 100644 index 00000000000..7501929f4c1 --- /dev/null +++ b/queue-6.6/gss_krb5-fix-the-error-handling-path-for-crypto_sync.patch @@ -0,0 +1,38 @@ +From 6c0d52493dc84ea5a6ffa9eb632a08cec882404d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 6 Jul 2024 14:50:08 +0800 +Subject: gss_krb5: Fix the error handling path for crypto_sync_skcipher_setkey + +From: Gaosheng Cui + +[ Upstream commit a3123341dc358952ce2bf8067fbdfb7eaadf71bb ] + +If we fail to call crypto_sync_skcipher_setkey, we should free the +memory allocation for cipher, replace err_return with err_free_cipher +to free the memory of cipher. + +Fixes: 4891f2d008e4 ("gss_krb5: import functionality to derive keys into the kernel") +Signed-off-by: Gaosheng Cui +Reviewed-by: Simon Horman +Signed-off-by: Chuck Lever +Signed-off-by: Sasha Levin +--- + net/sunrpc/auth_gss/gss_krb5_keys.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/net/sunrpc/auth_gss/gss_krb5_keys.c b/net/sunrpc/auth_gss/gss_krb5_keys.c +index 06d8ee0db000f..4eb19c3a54c70 100644 +--- a/net/sunrpc/auth_gss/gss_krb5_keys.c ++++ b/net/sunrpc/auth_gss/gss_krb5_keys.c +@@ -168,7 +168,7 @@ static int krb5_DK(const struct gss_krb5_enctype *gk5e, + goto err_return; + blocksize = crypto_sync_skcipher_blocksize(cipher); + if (crypto_sync_skcipher_setkey(cipher, inkey->data, inkey->len)) +- goto err_return; ++ goto err_free_cipher; + + ret = -ENOMEM; + inblockdata = kmalloc(blocksize, gfp_mask); +-- +2.43.0 + diff --git a/queue-6.6/gve-fix-xdp-tx-completion-handling-when-counters-ove.patch b/queue-6.6/gve-fix-xdp-tx-completion-handling-when-counters-ove.patch new file mode 100644 index 00000000000..13bf335e545 --- /dev/null +++ b/queue-6.6/gve-fix-xdp-tx-completion-handling-when-counters-ove.patch @@ -0,0 +1,52 @@ +From c208f78cb1e43fe957e1440cbc0087fa22eb04ba Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 16 Jul 2024 10:10:41 -0700 +Subject: gve: Fix XDP TX completion handling when counters overflow + +From: Joshua Washington + +[ Upstream commit 03b54bad26f3c78bb1f90410ec3e4e7fe197adc9 ] + +In gve_clean_xdp_done, the driver processes the TX completions based on +a 32-bit NIC counter and a 32-bit completion counter stored in the tx +queue. + +Fix the for loop so that the counter wraparound is handled correctly. + +Fixes: 75eaae158b1b ("gve: Add XDP DROP and TX support for GQI-QPL format") +Signed-off-by: Joshua Washington +Signed-off-by: Praveen Kaligineedi +Reviewed-by: Simon Horman +Link: https://patch.msgid.link/20240716171041.1561142-1-pkaligineedi@google.com +Signed-off-by: Jakub Kicinski +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/google/gve/gve_tx.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/ethernet/google/gve/gve_tx.c b/drivers/net/ethernet/google/gve/gve_tx.c +index 9f6ffc4a54f0b..2ae891a62875c 100644 +--- a/drivers/net/ethernet/google/gve/gve_tx.c ++++ b/drivers/net/ethernet/google/gve/gve_tx.c +@@ -158,15 +158,16 @@ static int gve_clean_xdp_done(struct gve_priv *priv, struct gve_tx_ring *tx, + u32 to_do) + { + struct gve_tx_buffer_state *info; +- u32 clean_end = tx->done + to_do; + u64 pkts = 0, bytes = 0; + size_t space_freed = 0; + u32 xsk_complete = 0; + u32 idx; ++ int i; + +- for (; tx->done < clean_end; tx->done++) { ++ for (i = 0; i < to_do; i++) { + idx = tx->done & tx->mask; + info = &tx->info[idx]; ++ tx->done++; + + if (unlikely(!info->xdp.size)) + continue; +-- +2.43.0 + diff --git a/queue-6.6/hfsplus-fix-to-avoid-false-alarm-of-circular-locking.patch b/queue-6.6/hfsplus-fix-to-avoid-false-alarm-of-circular-locking.patch new file mode 100644 index 00000000000..e8e535098bc --- /dev/null +++ b/queue-6.6/hfsplus-fix-to-avoid-false-alarm-of-circular-locking.patch @@ -0,0 +1,211 @@ +From 79eb370566f00c98a1ecf0f06e96eebb72b512f5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 7 Jun 2024 22:23:04 +0800 +Subject: hfsplus: fix to avoid false alarm of circular locking +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Chao Yu + +[ Upstream commit be4edd1642ee205ed7bbf66edc0453b1be1fb8d7 ] + +Syzbot report potential ABBA deadlock as below: + +loop0: detected capacity change from 0 to 1024 +====================================================== +WARNING: possible circular locking dependency detected +6.9.0-syzkaller-10323-g8f6a15f095a6 #0 Not tainted +------------------------------------------------------ +syz-executor171/5344 is trying to acquire lock: +ffff88807cb980b0 (&tree->tree_lock){+.+.}-{3:3}, at: hfsplus_file_truncate+0x811/0xb50 fs/hfsplus/extents.c:595 + +but task is already holding lock: +ffff88807a930108 (&HFSPLUS_I(inode)->extents_lock){+.+.}-{3:3}, at: hfsplus_file_truncate+0x2da/0xb50 fs/hfsplus/extents.c:576 + +which lock already depends on the new lock. + +the existing dependency chain (in reverse order) is: + +-> #1 (&HFSPLUS_I(inode)->extents_lock){+.+.}-{3:3}: + lock_acquire+0x1ed/0x550 kernel/locking/lockdep.c:5754 + __mutex_lock_common kernel/locking/mutex.c:608 [inline] + __mutex_lock+0x136/0xd70 kernel/locking/mutex.c:752 + hfsplus_file_extend+0x21b/0x1b70 fs/hfsplus/extents.c:457 + hfsplus_bmap_reserve+0x105/0x4e0 fs/hfsplus/btree.c:358 + hfsplus_rename_cat+0x1d0/0x1050 fs/hfsplus/catalog.c:456 + hfsplus_rename+0x12e/0x1c0 fs/hfsplus/dir.c:552 + vfs_rename+0xbdb/0xf00 fs/namei.c:4887 + do_renameat2+0xd94/0x13f0 fs/namei.c:5044 + __do_sys_rename fs/namei.c:5091 [inline] + __se_sys_rename fs/namei.c:5089 [inline] + __x64_sys_rename+0x86/0xa0 fs/namei.c:5089 + do_syscall_x64 arch/x86/entry/common.c:52 [inline] + do_syscall_64+0xf5/0x240 arch/x86/entry/common.c:83 + entry_SYSCALL_64_after_hwframe+0x77/0x7f + +-> #0 (&tree->tree_lock){+.+.}-{3:3}: + check_prev_add kernel/locking/lockdep.c:3134 [inline] + check_prevs_add kernel/locking/lockdep.c:3253 [inline] + validate_chain+0x18cb/0x58e0 kernel/locking/lockdep.c:3869 + __lock_acquire+0x1346/0x1fd0 kernel/locking/lockdep.c:5137 + lock_acquire+0x1ed/0x550 kernel/locking/lockdep.c:5754 + __mutex_lock_common kernel/locking/mutex.c:608 [inline] + __mutex_lock+0x136/0xd70 kernel/locking/mutex.c:752 + hfsplus_file_truncate+0x811/0xb50 fs/hfsplus/extents.c:595 + hfsplus_setattr+0x1ce/0x280 fs/hfsplus/inode.c:265 + notify_change+0xb9d/0xe70 fs/attr.c:497 + do_truncate+0x220/0x310 fs/open.c:65 + handle_truncate fs/namei.c:3308 [inline] + do_open fs/namei.c:3654 [inline] + path_openat+0x2a3d/0x3280 fs/namei.c:3807 + do_filp_open+0x235/0x490 fs/namei.c:3834 + do_sys_openat2+0x13e/0x1d0 fs/open.c:1406 + do_sys_open fs/open.c:1421 [inline] + __do_sys_creat fs/open.c:1497 [inline] + __se_sys_creat fs/open.c:1491 [inline] + __x64_sys_creat+0x123/0x170 fs/open.c:1491 + do_syscall_x64 arch/x86/entry/common.c:52 [inline] + do_syscall_64+0xf5/0x240 arch/x86/entry/common.c:83 + entry_SYSCALL_64_after_hwframe+0x77/0x7f + +other info that might help us debug this: + + Possible unsafe locking scenario: + + CPU0 CPU1 + ---- ---- + lock(&HFSPLUS_I(inode)->extents_lock); + lock(&tree->tree_lock); + lock(&HFSPLUS_I(inode)->extents_lock); + lock(&tree->tree_lock); + +This is a false alarm as tree_lock mutex are different, one is +from sbi->cat_tree, and another is from sbi->ext_tree: + +Thread A Thread B +- hfsplus_rename + - hfsplus_rename_cat + - hfs_find_init + - mutext_lock(cat_tree->tree_lock) + - hfsplus_setattr + - hfsplus_file_truncate + - mutex_lock(hip->extents_lock) + - hfs_find_init + - mutext_lock(ext_tree->tree_lock) + - hfs_bmap_reserve + - hfsplus_file_extend + - mutex_lock(hip->extents_lock) + +So, let's call mutex_lock_nested for tree_lock mutex lock, and pass +correct lock class for it. + +Fixes: 31651c607151 ("hfsplus: avoid deadlock on file truncation") +Reported-by: syzbot+6030b3b1b9bf70e538c4@syzkaller.appspotmail.com +Closes: https://lore.kernel.org/linux-fsdevel/000000000000e37a4005ef129563@google.com +Cc: Ernesto A. Fernández +Signed-off-by: Chao Yu +Link: https://lore.kernel.org/r/20240607142304.455441-1-chao@kernel.org +Signed-off-by: Christian Brauner +Signed-off-by: Sasha Levin +--- + fs/hfsplus/bfind.c | 15 ++------------- + fs/hfsplus/extents.c | 9 ++++++--- + fs/hfsplus/hfsplus_fs.h | 21 +++++++++++++++++++++ + 3 files changed, 29 insertions(+), 16 deletions(-) + +diff --git a/fs/hfsplus/bfind.c b/fs/hfsplus/bfind.c +index ca2ba8c9f82ef..901e83d65d202 100644 +--- a/fs/hfsplus/bfind.c ++++ b/fs/hfsplus/bfind.c +@@ -25,19 +25,8 @@ int hfs_find_init(struct hfs_btree *tree, struct hfs_find_data *fd) + fd->key = ptr + tree->max_key_len + 2; + hfs_dbg(BNODE_REFS, "find_init: %d (%p)\n", + tree->cnid, __builtin_return_address(0)); +- switch (tree->cnid) { +- case HFSPLUS_CAT_CNID: +- mutex_lock_nested(&tree->tree_lock, CATALOG_BTREE_MUTEX); +- break; +- case HFSPLUS_EXT_CNID: +- mutex_lock_nested(&tree->tree_lock, EXTENTS_BTREE_MUTEX); +- break; +- case HFSPLUS_ATTR_CNID: +- mutex_lock_nested(&tree->tree_lock, ATTR_BTREE_MUTEX); +- break; +- default: +- BUG(); +- } ++ mutex_lock_nested(&tree->tree_lock, ++ hfsplus_btree_lock_class(tree)); + return 0; + } + +diff --git a/fs/hfsplus/extents.c b/fs/hfsplus/extents.c +index 3c572e44f2adf..9c51867dddc51 100644 +--- a/fs/hfsplus/extents.c ++++ b/fs/hfsplus/extents.c +@@ -430,7 +430,8 @@ int hfsplus_free_fork(struct super_block *sb, u32 cnid, + hfsplus_free_extents(sb, ext_entry, total_blocks - start, + total_blocks); + total_blocks = start; +- mutex_lock(&fd.tree->tree_lock); ++ mutex_lock_nested(&fd.tree->tree_lock, ++ hfsplus_btree_lock_class(fd.tree)); + } while (total_blocks > blocks); + hfs_find_exit(&fd); + +@@ -592,7 +593,8 @@ void hfsplus_file_truncate(struct inode *inode) + alloc_cnt, alloc_cnt - blk_cnt); + hfsplus_dump_extent(hip->first_extents); + hip->first_blocks = blk_cnt; +- mutex_lock(&fd.tree->tree_lock); ++ mutex_lock_nested(&fd.tree->tree_lock, ++ hfsplus_btree_lock_class(fd.tree)); + break; + } + res = __hfsplus_ext_cache_extent(&fd, inode, alloc_cnt); +@@ -606,7 +608,8 @@ void hfsplus_file_truncate(struct inode *inode) + hfsplus_free_extents(sb, hip->cached_extents, + alloc_cnt - start, alloc_cnt - blk_cnt); + hfsplus_dump_extent(hip->cached_extents); +- mutex_lock(&fd.tree->tree_lock); ++ mutex_lock_nested(&fd.tree->tree_lock, ++ hfsplus_btree_lock_class(fd.tree)); + if (blk_cnt > start) { + hip->extent_state |= HFSPLUS_EXT_DIRTY; + break; +diff --git a/fs/hfsplus/hfsplus_fs.h b/fs/hfsplus/hfsplus_fs.h +index 7ededcb720c12..583c196ecd520 100644 +--- a/fs/hfsplus/hfsplus_fs.h ++++ b/fs/hfsplus/hfsplus_fs.h +@@ -552,6 +552,27 @@ static inline __be32 __hfsp_ut2mt(time64_t ut) + return cpu_to_be32(lower_32_bits(ut) + HFSPLUS_UTC_OFFSET); + } + ++static inline enum hfsplus_btree_mutex_classes ++hfsplus_btree_lock_class(struct hfs_btree *tree) ++{ ++ enum hfsplus_btree_mutex_classes class; ++ ++ switch (tree->cnid) { ++ case HFSPLUS_CAT_CNID: ++ class = CATALOG_BTREE_MUTEX; ++ break; ++ case HFSPLUS_EXT_CNID: ++ class = EXTENTS_BTREE_MUTEX; ++ break; ++ case HFSPLUS_ATTR_CNID: ++ class = ATTR_BTREE_MUTEX; ++ break; ++ default: ++ BUG(); ++ } ++ return class; ++} ++ + /* compatibility */ + #define hfsp_mt2ut(t) (struct timespec64){ .tv_sec = __hfsp_mt2ut(t) } + #define hfsp_ut2mt(t) __hfsp_ut2mt((t).tv_sec) +-- +2.43.0 + diff --git a/queue-6.6/hwmon-adt7475-fix-default-duty-on-fan-is-disabled.patch b/queue-6.6/hwmon-adt7475-fix-default-duty-on-fan-is-disabled.patch new file mode 100644 index 00000000000..e4243dcb8a8 --- /dev/null +++ b/queue-6.6/hwmon-adt7475-fix-default-duty-on-fan-is-disabled.patch @@ -0,0 +1,38 @@ +From 4df394a5e10d40ebacd085cd1d4e0434adf2735c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 1 Jul 2024 15:32:52 +0800 +Subject: hwmon: (adt7475) Fix default duty on fan is disabled + +From: Wayne Tung + +[ Upstream commit 39b24cced70fdc336dbc0070f8b3bde61d8513a8 ] + +According to the comments on fan is disabled, we change to manual mode +and set the duty cycle to 0. +For setting the duty cycle part, the register is wrong. Fix it. + +Fixes: 1c301fc5394f ("hwmon: Add a driver for the ADT7475 hardware monitoring chip") +Signed-off-by: Wayne Tung +Link: https://lore.kernel.org/r/20240701073252.317397-1-chineweff@gmail.com +Signed-off-by: Guenter Roeck +Signed-off-by: Sasha Levin +--- + drivers/hwmon/adt7475.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/hwmon/adt7475.c b/drivers/hwmon/adt7475.c +index 03acadc3a6cb4..14b2547adae8d 100644 +--- a/drivers/hwmon/adt7475.c ++++ b/drivers/hwmon/adt7475.c +@@ -1862,7 +1862,7 @@ static void adt7475_read_pwm(struct i2c_client *client, int index) + data->pwm[CONTROL][index] &= ~0xE0; + data->pwm[CONTROL][index] |= (7 << 5); + +- i2c_smbus_write_byte_data(client, PWM_CONFIG_REG(index), ++ i2c_smbus_write_byte_data(client, PWM_REG(index), + data->pwm[INPUT][index]); + + i2c_smbus_write_byte_data(client, PWM_CONFIG_REG(index), +-- +2.43.0 + diff --git a/queue-6.6/hwmon-max6697-fix-swapped-temp-1-8-critical-alarms.patch b/queue-6.6/hwmon-max6697-fix-swapped-temp-1-8-critical-alarms.patch new file mode 100644 index 00000000000..77b66a37f81 --- /dev/null +++ b/queue-6.6/hwmon-max6697-fix-swapped-temp-1-8-critical-alarms.patch @@ -0,0 +1,48 @@ +From 4b851a875fefba0c72b2f487219cb6960c62fa73 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 13 Jul 2024 12:03:53 -0700 +Subject: hwmon: (max6697) Fix swapped temp{1,8} critical alarms + +From: Guenter Roeck + +[ Upstream commit 1ea3fd1eb9869fcdcbc9c68f9728bfc47b9503f1 ] + +The critical alarm bit for the local temperature sensor (temp1) is in +bit 7 of register 0x45 (not bit 6), and the critical alarm bit for remote +temperature sensor 7 (temp8) is in bit 6 (not bit 7). + +This only affects MAX6581 since all other chips supported by this driver +do not support those critical alarms. + +Fixes: 5372d2d71c46 ("hwmon: Driver for Maxim MAX6697 and compatibles") +Reviewed-by: Tzung-Bi Shih +Signed-off-by: Guenter Roeck +Signed-off-by: Sasha Levin +--- + drivers/hwmon/max6697.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/hwmon/max6697.c b/drivers/hwmon/max6697.c +index 8a5a54d2b3d0e..a338dd4e990d5 100644 +--- a/drivers/hwmon/max6697.c ++++ b/drivers/hwmon/max6697.c +@@ -429,14 +429,14 @@ static SENSOR_DEVICE_ATTR_RO(temp6_max_alarm, alarm, 20); + static SENSOR_DEVICE_ATTR_RO(temp7_max_alarm, alarm, 21); + static SENSOR_DEVICE_ATTR_RO(temp8_max_alarm, alarm, 23); + +-static SENSOR_DEVICE_ATTR_RO(temp1_crit_alarm, alarm, 14); ++static SENSOR_DEVICE_ATTR_RO(temp1_crit_alarm, alarm, 15); + static SENSOR_DEVICE_ATTR_RO(temp2_crit_alarm, alarm, 8); + static SENSOR_DEVICE_ATTR_RO(temp3_crit_alarm, alarm, 9); + static SENSOR_DEVICE_ATTR_RO(temp4_crit_alarm, alarm, 10); + static SENSOR_DEVICE_ATTR_RO(temp5_crit_alarm, alarm, 11); + static SENSOR_DEVICE_ATTR_RO(temp6_crit_alarm, alarm, 12); + static SENSOR_DEVICE_ATTR_RO(temp7_crit_alarm, alarm, 13); +-static SENSOR_DEVICE_ATTR_RO(temp8_crit_alarm, alarm, 15); ++static SENSOR_DEVICE_ATTR_RO(temp8_crit_alarm, alarm, 14); + + static SENSOR_DEVICE_ATTR_RO(temp2_fault, alarm, 1); + static SENSOR_DEVICE_ATTR_RO(temp3_fault, alarm, 2); +-- +2.43.0 + diff --git a/queue-6.6/hwmon-max6697-fix-underflow-when-writing-limit-attri.patch b/queue-6.6/hwmon-max6697-fix-underflow-when-writing-limit-attri.patch new file mode 100644 index 00000000000..2b085b19995 --- /dev/null +++ b/queue-6.6/hwmon-max6697-fix-underflow-when-writing-limit-attri.patch @@ -0,0 +1,40 @@ +From 8f425f3862b784f07e73f138f076dd926a911cc3 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 13 Jul 2024 14:26:19 -0700 +Subject: hwmon: (max6697) Fix underflow when writing limit attributes + +From: Guenter Roeck + +[ Upstream commit cbf7467828cd4ec7ceac7a8b5b5ddb2f69f07b0e ] + +Using DIV_ROUND_CLOSEST() on an unbound value can result in underflows. +Indeed, module test scripts report: + +temp1_max: Suspected underflow: [min=0, read 255000, written -9223372036854775808] +temp1_crit: Suspected underflow: [min=0, read 255000, written -9223372036854775808] + +Fix by introducing an extra set of clamping. + +Fixes: 5372d2d71c46 ("hwmon: Driver for Maxim MAX6697 and compatibles") +Reviewed-by: Tzung-Bi Shih +Signed-off-by: Guenter Roeck +Signed-off-by: Sasha Levin +--- + drivers/hwmon/max6697.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/hwmon/max6697.c b/drivers/hwmon/max6697.c +index 7d10dd434f2e1..8a5a54d2b3d0e 100644 +--- a/drivers/hwmon/max6697.c ++++ b/drivers/hwmon/max6697.c +@@ -311,6 +311,7 @@ static ssize_t temp_store(struct device *dev, + return ret; + + mutex_lock(&data->update_lock); ++ temp = clamp_val(temp, -1000000, 1000000); /* prevent underflow */ + temp = DIV_ROUND_CLOSEST(temp, 1000) + data->temp_offset; + temp = clamp_val(temp, 0, data->type == max6581 ? 255 : 127); + data->temp[nr][index] = temp; +-- +2.43.0 + diff --git a/queue-6.6/hwrng-core-fix-wrong-quality-calculation-at-hw-rng-r.patch b/queue-6.6/hwrng-core-fix-wrong-quality-calculation-at-hw-rng-r.patch new file mode 100644 index 00000000000..c02e7c89b3d --- /dev/null +++ b/queue-6.6/hwrng-core-fix-wrong-quality-calculation-at-hw-rng-r.patch @@ -0,0 +1,68 @@ +From 41e3eaf47c11d2f1aab0295cf1c934e154bf92d0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 21 Jun 2024 17:02:24 +0200 +Subject: hwrng: core - Fix wrong quality calculation at hw rng registration + +From: Harald Freudenberger + +[ Upstream commit 95c0f5c3b8bb7acdc5c4f04bc6a7d3f40d319e9e ] + +When there are rng sources registering at the hwrng core via +hwrng_register() a struct hwrng is delivered. There is a quality +field in there which is used to decide which of the registered +hw rng sources will be used by the hwrng core. + +With commit 16bdbae39428 ("hwrng: core - treat default_quality as +a maximum and default to 1024") there came in a new default of +1024 in case this field is empty and all the known hw rng sources +at that time had been reworked to not fill this field and thus +use the default of 1024. + +The code choosing the 'better' hw rng source during registration +of a new hw rng source has never been adapted to this and thus +used 0 if the hw rng implementation does not fill the quality field. +So when two rng sources register, one with 0 (meaning 1024) and +the other one with 999, the 999 hw rng will be chosen. + +As the later invoked function hwrng_init() anyway adjusts the +quality field of the hw rng source, this adjustment is now done +during registration of this new hw rng source. + +Tested on s390 with two hardware rng sources: crypto cards and +trng true random generator device driver. + +Fixes: 16bdbae39428 ("hwrng: core - treat default_quality as a maximum and default to 1024") +Reported-by: Christian Rund +Suggested-by: Herbert Xu +Signed-off-by: Harald Freudenberger +Signed-off-by: Herbert Xu +Signed-off-by: Sasha Levin +--- + drivers/char/hw_random/core.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/char/hw_random/core.c b/drivers/char/hw_random/core.c +index a3bbdd6e60fca..a182fe794f985 100644 +--- a/drivers/char/hw_random/core.c ++++ b/drivers/char/hw_random/core.c +@@ -174,7 +174,6 @@ static int hwrng_init(struct hwrng *rng) + reinit_completion(&rng->cleanup_done); + + skip_init: +- rng->quality = min_t(u16, min_t(u16, default_quality, 1024), rng->quality ?: 1024); + current_quality = rng->quality; /* obsolete */ + + return 0; +@@ -563,6 +562,9 @@ int hwrng_register(struct hwrng *rng) + complete(&rng->cleanup_done); + init_completion(&rng->dying); + ++ /* Adjust quality field to always have a proper value */ ++ rng->quality = min_t(u16, min_t(u16, default_quality, 1024), rng->quality ?: 1024); ++ + if (!current_rng || + (!cur_rng_set_by_user && rng->quality > current_rng->quality)) { + /* +-- +2.43.0 + diff --git a/queue-6.6/iio-fix-the-sorting-functionality-in-iio_gts_build_a.patch b/queue-6.6/iio-fix-the-sorting-functionality-in-iio_gts_build_a.patch new file mode 100644 index 00000000000..8d95618098a --- /dev/null +++ b/queue-6.6/iio-fix-the-sorting-functionality-in-iio_gts_build_a.patch @@ -0,0 +1,71 @@ +From d9825578d7875f539b0c87f4a3d89a82c8fee651 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 30 Apr 2024 15:44:53 +0300 +Subject: iio: Fix the sorting functionality in iio_gts_build_avail_time_table + +From: Chenyuan Yang + +[ Upstream commit 5acc3f971a01be48d5ff4252d8f9cdb87998cdfb ] + +The sorting in iio_gts_build_avail_time_table is not working as intended. +It could result in an out-of-bounds access when the time is zero. + +Here are more details: + +1. When the gts->itime_table[i].time_us is zero, e.g., the time +sequence is `3, 0, 1`, the inner for-loop will not terminate and do +out-of-bound writes. This is because once `times[j] > new`, the value +`new` will be added in the current position and the `times[j]` will be +moved to `j+1` position, which makes the if-condition always hold. +Meanwhile, idx will be added one, making the loop keep running without +termination and out-of-bound write. +2. If none of the gts->itime_table[i].time_us is zero, the elements +will just be copied without being sorted as described in the comment +"Sort times from all tables to one and remove duplicates". + +For more details, please refer to +https://lore.kernel.org/all/6dd0d822-046c-4dd2-9532-79d7ab96ec05@gmail.com. + +Reported-by: Chenyuan Yang +Suggested-by: Matti Vaittinen +Fixes: 38416c28e168 ("iio: light: Add gain-time-scale helpers") +Signed-off-by: Chenyuan Yang +Co-developed-by: Matti Vaittinen +Signed-off-by: Matti Vaittinen +Link: https://lore.kernel.org/r/d501ade8c1f7b202d34c6404eda423489cab1df5.1714480171.git.mazziesaccount@gmail.com +Signed-off-by: Jonathan Cameron +Signed-off-by: Sasha Levin +--- + drivers/iio/industrialio-gts-helper.c | 7 +++++-- + 1 file changed, 5 insertions(+), 2 deletions(-) + +diff --git a/drivers/iio/industrialio-gts-helper.c b/drivers/iio/industrialio-gts-helper.c +index b51eb6cb766f3..59d7615c0f565 100644 +--- a/drivers/iio/industrialio-gts-helper.c ++++ b/drivers/iio/industrialio-gts-helper.c +@@ -362,17 +362,20 @@ static int iio_gts_build_avail_time_table(struct iio_gts *gts) + for (i = gts->num_itime - 1; i >= 0; i--) { + int new = gts->itime_table[i].time_us; + +- if (times[idx] < new) { ++ if (idx == 0 || times[idx - 1] < new) { + times[idx++] = new; + continue; + } + +- for (j = 0; j <= idx; j++) { ++ for (j = 0; j < idx; j++) { ++ if (times[j] == new) ++ break; + if (times[j] > new) { + memmove(×[j + 1], ×[j], + (idx - j) * sizeof(int)); + times[j] = new; + idx++; ++ break; + } + } + } +-- +2.43.0 + diff --git a/queue-6.6/iio-frequency-adrf6780-rm-clk-provider-include.patch b/queue-6.6/iio-frequency-adrf6780-rm-clk-provider-include.patch new file mode 100644 index 00000000000..d0f3df51bf0 --- /dev/null +++ b/queue-6.6/iio-frequency-adrf6780-rm-clk-provider-include.patch @@ -0,0 +1,36 @@ +From 8be4946b8f014eb32abb1ba8cb389350598c9db3 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 30 May 2024 12:28:34 +0300 +Subject: iio: frequency: adrf6780: rm clk provider include + +From: Antoniu Miclaus + +[ Upstream commit e2261b4a4de2804698935eb44f98dc897e1c44c3 ] + +The driver has no clock provider implementation, therefore remove the +include. + +Fixes: 63aaf6d06d87 ("iio: frequency: adrf6780: add support for ADRF6780") +Signed-off-by: Antoniu Miclaus +Link: https://lore.kernel.org/r/20240530092835.36892-1-antoniu.miclaus@analog.com +Signed-off-by: Jonathan Cameron +Signed-off-by: Sasha Levin +--- + drivers/iio/frequency/adrf6780.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/drivers/iio/frequency/adrf6780.c b/drivers/iio/frequency/adrf6780.c +index b4defb82f37e3..3f46032c92752 100644 +--- a/drivers/iio/frequency/adrf6780.c ++++ b/drivers/iio/frequency/adrf6780.c +@@ -9,7 +9,6 @@ + #include + #include + #include +-#include + #include + #include + #include +-- +2.43.0 + diff --git a/queue-6.6/input-elan_i2c-do-not-leave-interrupt-disabled-on-su.patch b/queue-6.6/input-elan_i2c-do-not-leave-interrupt-disabled-on-su.patch new file mode 100644 index 00000000000..60636f33337 --- /dev/null +++ b/queue-6.6/input-elan_i2c-do-not-leave-interrupt-disabled-on-su.patch @@ -0,0 +1,36 @@ +From bbe33749d471446622a731d04ae5ea29c2436b0f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 Jun 2024 23:02:48 -0700 +Subject: Input: elan_i2c - do not leave interrupt disabled on suspend failure + +From: Dmitry Torokhov + +[ Upstream commit 5f82c1e04721e7cd98e604eb4e58f0724d8e5a65 ] + +Make sure interrupts are not left disabled when we fail to suspend the +touch controller. + +Fixes: 6696777c6506 ("Input: add driver for Elan I2C/SMbus touchpad") +Link: https://lore.kernel.org/r/ZmKiiL-1wzKrhqBj@google.com +Signed-off-by: Dmitry Torokhov +Signed-off-by: Sasha Levin +--- + drivers/input/mouse/elan_i2c_core.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/input/mouse/elan_i2c_core.c b/drivers/input/mouse/elan_i2c_core.c +index 148a601396f92..dc80e407fb860 100644 +--- a/drivers/input/mouse/elan_i2c_core.c ++++ b/drivers/input/mouse/elan_i2c_core.c +@@ -1356,6 +1356,8 @@ static int elan_suspend(struct device *dev) + } + + err: ++ if (ret) ++ enable_irq(client->irq); + mutex_unlock(&data->sysfs_mutex); + return ret; + } +-- +2.43.0 + diff --git a/queue-6.6/input-qt1050-handle-chip_id-reading-error.patch b/queue-6.6/input-qt1050-handle-chip_id-reading-error.patch new file mode 100644 index 00000000000..309a0ec5745 --- /dev/null +++ b/queue-6.6/input-qt1050-handle-chip_id-reading-error.patch @@ -0,0 +1,49 @@ +From 98eba3ecd60f9c11791922531b0aabd7706dbe22 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Jun 2024 20:30:18 +0200 +Subject: Input: qt1050 - handle CHIP_ID reading error + +From: Andrei Lalaev + +[ Upstream commit 866a5c7e2781cf1b019072288f1f5c64186dcb63 ] + +If the device is missing, we get the following error: + + qt1050 3-0041: ID -1340767592 not supported + +Let's handle this situation and print more informative error +when reading of CHIP_ID fails: + + qt1050 3-0041: Failed to read chip ID: -6 + +Fixes: cbebf5addec1 ("Input: qt1050 - add Microchip AT42QT1050 support") +Signed-off-by: Andrei Lalaev +Reviewed-by: Marco Felsch +Link: https://lore.kernel.org/r/20240617183018.916234-1-andrey.lalaev@gmail.com +Signed-off-by: Dmitry Torokhov +Signed-off-by: Sasha Levin +--- + drivers/input/keyboard/qt1050.c | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +diff --git a/drivers/input/keyboard/qt1050.c b/drivers/input/keyboard/qt1050.c +index 6953097db4456..cd2f4216daf86 100644 +--- a/drivers/input/keyboard/qt1050.c ++++ b/drivers/input/keyboard/qt1050.c +@@ -226,7 +226,12 @@ static bool qt1050_identify(struct qt1050_priv *ts) + int err; + + /* Read Chip ID */ +- regmap_read(ts->regmap, QT1050_CHIP_ID, &val); ++ err = regmap_read(ts->regmap, QT1050_CHIP_ID, &val); ++ if (err) { ++ dev_err(&ts->client->dev, "Failed to read chip ID: %d\n", err); ++ return false; ++ } ++ + if (val != QT1050_CHIP_ID_VER) { + dev_err(&ts->client->dev, "ID %d not supported\n", val); + return false; +-- +2.43.0 + diff --git a/queue-6.6/interconnect-qcom-qcm2290-fix-mas_snoc_bimc-rpm-mast.patch b/queue-6.6/interconnect-qcom-qcm2290-fix-mas_snoc_bimc-rpm-mast.patch new file mode 100644 index 00000000000..7e1b886fc77 --- /dev/null +++ b/queue-6.6/interconnect-qcom-qcm2290-fix-mas_snoc_bimc-rpm-mast.patch @@ -0,0 +1,39 @@ +From 2aaaa517bb1666ad553803e73e5f1d6a79ef252c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 18 Jun 2024 16:42:18 +0200 +Subject: interconnect: qcom: qcm2290: Fix mas_snoc_bimc RPM master ID + +From: Konrad Dybcio + +[ Upstream commit cd5ce4589081190281cc2537301edd4275fe55eb ] + +The value was wrong, resulting in misprogramming of the hardware. +Fix it. + +Fixes: 1a14b1ac3935 ("interconnect: qcom: Add QCM2290 driver support") +Reported-by: Stephan Gerhold +Closes: https://lore.kernel.org/linux-arm-msm/ZgMs_xZVzWH5uK-v@gerhold.net/ +Signed-off-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20240618-topic-2290_icc_2-v1-1-64446888a133@linaro.org +Signed-off-by: Georgi Djakov +Signed-off-by: Sasha Levin +--- + drivers/interconnect/qcom/qcm2290.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/interconnect/qcom/qcm2290.c b/drivers/interconnect/qcom/qcm2290.c +index 52346f7319acc..69960a357a682 100644 +--- a/drivers/interconnect/qcom/qcm2290.c ++++ b/drivers/interconnect/qcom/qcm2290.c +@@ -163,7 +163,7 @@ static struct qcom_icc_node mas_snoc_bimc = { + .qos.ap_owned = true, + .qos.qos_port = 6, + .qos.qos_mode = NOC_QOS_MODE_BYPASS, +- .mas_rpm_id = 164, ++ .mas_rpm_id = 3, + .slv_rpm_id = -1, + .num_links = ARRAY_SIZE(mas_snoc_bimc_links), + .links = mas_snoc_bimc_links, +-- +2.43.0 + diff --git a/queue-6.6/iommu-vt-d-fix-identity-map-bounds-in-si_domain_init.patch b/queue-6.6/iommu-vt-d-fix-identity-map-bounds-in-si_domain_init.patch new file mode 100644 index 00000000000..75d9f219fe5 --- /dev/null +++ b/queue-6.6/iommu-vt-d-fix-identity-map-bounds-in-si_domain_init.patch @@ -0,0 +1,43 @@ +From 891dfa570e8f0b630fa3da3d69f0dd25d232fa76 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 9 Jul 2024 16:49:13 -0700 +Subject: iommu/vt-d: Fix identity map bounds in si_domain_init() + +From: Jon Pan-Doh + +[ Upstream commit 31000732d56b43765d51e08cccb68818fbc0032c ] + +Intel IOMMU operates on inclusive bounds (both generally aas well as +iommu_domain_identity_map()). Meanwhile, for_each_mem_pfn_range() uses +exclusive bounds for end_pfn. This creates an off-by-one error when +switching between the two. + +Fixes: c5395d5c4a82 ("intel-iommu: Clean up iommu_domain_identity_map()") +Signed-off-by: Jon Pan-Doh +Tested-by: Sudheer Dantuluri +Suggested-by: Gary Zibrat +Reviewed-by: Lu Baolu +Reviewed-by: Kevin Tian +Link: https://lore.kernel.org/r/20240709234913.2749386-1-pandoh@google.com +Signed-off-by: Will Deacon +Signed-off-by: Sasha Levin +--- + drivers/iommu/intel/iommu.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c +index 744e4e6b8d72d..9918af222c516 100644 +--- a/drivers/iommu/intel/iommu.c ++++ b/drivers/iommu/intel/iommu.c +@@ -2411,7 +2411,7 @@ static int __init si_domain_init(int hw) + for_each_mem_pfn_range(i, nid, &start_pfn, &end_pfn, NULL) { + ret = iommu_domain_identity_map(si_domain, + mm_to_dma_pfn_start(start_pfn), +- mm_to_dma_pfn_end(end_pfn)); ++ mm_to_dma_pfn_end(end_pfn-1)); + if (ret) + return ret; + } +-- +2.43.0 + diff --git a/queue-6.6/ipmi-ssif_bmc-prevent-integer-overflow-on-32bit-syst.patch b/queue-6.6/ipmi-ssif_bmc-prevent-integer-overflow-on-32bit-syst.patch new file mode 100644 index 00000000000..e63b77bb25f --- /dev/null +++ b/queue-6.6/ipmi-ssif_bmc-prevent-integer-overflow-on-32bit-syst.patch @@ -0,0 +1,53 @@ +From c94e30b692d2a72c0b1aefe34e0fbd9ee1326674 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 14 Jun 2024 20:30:44 +0300 +Subject: ipmi: ssif_bmc: prevent integer overflow on 32bit systems + +From: Dan Carpenter + +[ Upstream commit 0627cef36145c9ff9845bdfd7ddf485bbac1f981 ] + +There are actually two bugs here. First, we need to ensure that count +is at least sizeof(u32) or msg.len will be uninitialized data. + +The "msg.len" variable is a u32 that comes from the user. On 32bit +systems the "sizeof_field(struct ipmi_ssif_msg, len) + msg.len" +addition can overflow if "msg.len" is greater than U32_MAX - 4. + +Valid lengths for "msg.len" are 1-254. Add a check for that to +prevent the integer overflow. + +Fixes: dd2bc5cc9e25 ("ipmi: ssif_bmc: Add SSIF BMC driver") +Signed-off-by: Dan Carpenter +Message-Id: <1431ca2e-4e9c-4520-bfc0-6879313c30e9@moroto.mountain> +Signed-off-by: Corey Minyard +Signed-off-by: Sasha Levin +--- + drivers/char/ipmi/ssif_bmc.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/drivers/char/ipmi/ssif_bmc.c b/drivers/char/ipmi/ssif_bmc.c +index 56346fb328727..ab4e87a99f087 100644 +--- a/drivers/char/ipmi/ssif_bmc.c ++++ b/drivers/char/ipmi/ssif_bmc.c +@@ -177,13 +177,15 @@ static ssize_t ssif_bmc_write(struct file *file, const char __user *buf, size_t + unsigned long flags; + ssize_t ret; + +- if (count > sizeof(struct ipmi_ssif_msg)) ++ if (count < sizeof(msg.len) || ++ count > sizeof(struct ipmi_ssif_msg)) + return -EINVAL; + + if (copy_from_user(&msg, buf, count)) + return -EFAULT; + +- if (!msg.len || count < sizeof_field(struct ipmi_ssif_msg, len) + msg.len) ++ if (!msg.len || msg.len > IPMI_SSIF_PAYLOAD_MAX || ++ count < sizeof_field(struct ipmi_ssif_msg, len) + msg.len) + return -EINVAL; + + spin_lock_irqsave(&ssif_bmc->lock, flags); +-- +2.43.0 + diff --git a/queue-6.6/ipv4-fix-incorrect-tos-in-fibmatch-route-get-reply.patch b/queue-6.6/ipv4-fix-incorrect-tos-in-fibmatch-route-get-reply.patch new file mode 100644 index 00000000000..06e97c447d9 --- /dev/null +++ b/queue-6.6/ipv4-fix-incorrect-tos-in-fibmatch-route-get-reply.patch @@ -0,0 +1,135 @@ +From 8ee94e29d5b38d4c5259b28edbf3495f96abbd35 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 15 Jul 2024 17:23:54 +0300 +Subject: ipv4: Fix incorrect TOS in fibmatch route get reply + +From: Ido Schimmel + +[ Upstream commit f036e68212c11e5a7edbb59b5e25299341829485 ] + +The TOS value that is returned to user space in the route get reply is +the one with which the lookup was performed ('fl4->flowi4_tos'). This is +fine when the matched route is configured with a TOS as it would not +match if its TOS value did not match the one with which the lookup was +performed. + +However, matching on TOS is only performed when the route's TOS is not +zero. It is therefore possible to have the kernel incorrectly return a +non-zero TOS: + + # ip link add name dummy1 up type dummy + # ip address add 192.0.2.1/24 dev dummy1 + # ip route get fibmatch 192.0.2.2 tos 0xfc + 192.0.2.0/24 tos 0x1c dev dummy1 proto kernel scope link src 192.0.2.1 + +Fix by instead returning the DSCP field from the FIB result structure +which was populated during the route lookup. + +Output after the patch: + + # ip link add name dummy1 up type dummy + # ip address add 192.0.2.1/24 dev dummy1 + # ip route get fibmatch 192.0.2.2 tos 0xfc + 192.0.2.0/24 dev dummy1 proto kernel scope link src 192.0.2.1 + +Extend the existing selftests to not only verify that the correct route +is returned, but that it is also returned with correct "tos" value (or +without it). + +Fixes: b61798130f1b ("net: ipv4: RTM_GETROUTE: return matched fib result when requested") +Signed-off-by: Ido Schimmel +Reviewed-by: David Ahern +Reviewed-by: Guillaume Nault +Signed-off-by: Paolo Abeni +Signed-off-by: Sasha Levin +--- + net/ipv4/route.c | 2 +- + tools/testing/selftests/net/fib_tests.sh | 24 ++++++++++++------------ + 2 files changed, 13 insertions(+), 13 deletions(-) + +diff --git a/net/ipv4/route.c b/net/ipv4/route.c +index 810779d537bec..4d169573148f6 100644 +--- a/net/ipv4/route.c ++++ b/net/ipv4/route.c +@@ -3394,7 +3394,7 @@ static int inet_rtm_getroute(struct sk_buff *in_skb, struct nlmsghdr *nlh, + fri.tb_id = table_id; + fri.dst = res.prefix; + fri.dst_len = res.prefixlen; +- fri.dscp = inet_dsfield_to_dscp(fl4.flowi4_tos); ++ fri.dscp = res.dscp; + fri.type = rt->rt_type; + fri.offload = 0; + fri.trap = 0; +diff --git a/tools/testing/selftests/net/fib_tests.sh b/tools/testing/selftests/net/fib_tests.sh +index 66d0db7a2614d..ede2c0ec2a9dd 100755 +--- a/tools/testing/selftests/net/fib_tests.sh ++++ b/tools/testing/selftests/net/fib_tests.sh +@@ -1643,53 +1643,53 @@ ipv4_rt_dsfield() + + # DSCP 0x10 should match the specific route, no matter the ECN bits + $IP route get fibmatch 172.16.102.1 dsfield 0x10 | \ +- grep -q "via 172.16.103.2" ++ grep -q "172.16.102.0/24 tos 0x10 via 172.16.103.2" + log_test $? 0 "IPv4 route with DSCP and ECN:Not-ECT" + + $IP route get fibmatch 172.16.102.1 dsfield 0x11 | \ +- grep -q "via 172.16.103.2" ++ grep -q "172.16.102.0/24 tos 0x10 via 172.16.103.2" + log_test $? 0 "IPv4 route with DSCP and ECN:ECT(1)" + + $IP route get fibmatch 172.16.102.1 dsfield 0x12 | \ +- grep -q "via 172.16.103.2" ++ grep -q "172.16.102.0/24 tos 0x10 via 172.16.103.2" + log_test $? 0 "IPv4 route with DSCP and ECN:ECT(0)" + + $IP route get fibmatch 172.16.102.1 dsfield 0x13 | \ +- grep -q "via 172.16.103.2" ++ grep -q "172.16.102.0/24 tos 0x10 via 172.16.103.2" + log_test $? 0 "IPv4 route with DSCP and ECN:CE" + + # Unknown DSCP should match the generic route, no matter the ECN bits + $IP route get fibmatch 172.16.102.1 dsfield 0x14 | \ +- grep -q "via 172.16.101.2" ++ grep -q "172.16.102.0/24 via 172.16.101.2" + log_test $? 0 "IPv4 route with unknown DSCP and ECN:Not-ECT" + + $IP route get fibmatch 172.16.102.1 dsfield 0x15 | \ +- grep -q "via 172.16.101.2" ++ grep -q "172.16.102.0/24 via 172.16.101.2" + log_test $? 0 "IPv4 route with unknown DSCP and ECN:ECT(1)" + + $IP route get fibmatch 172.16.102.1 dsfield 0x16 | \ +- grep -q "via 172.16.101.2" ++ grep -q "172.16.102.0/24 via 172.16.101.2" + log_test $? 0 "IPv4 route with unknown DSCP and ECN:ECT(0)" + + $IP route get fibmatch 172.16.102.1 dsfield 0x17 | \ +- grep -q "via 172.16.101.2" ++ grep -q "172.16.102.0/24 via 172.16.101.2" + log_test $? 0 "IPv4 route with unknown DSCP and ECN:CE" + + # Null DSCP should match the generic route, no matter the ECN bits + $IP route get fibmatch 172.16.102.1 dsfield 0x00 | \ +- grep -q "via 172.16.101.2" ++ grep -q "172.16.102.0/24 via 172.16.101.2" + log_test $? 0 "IPv4 route with no DSCP and ECN:Not-ECT" + + $IP route get fibmatch 172.16.102.1 dsfield 0x01 | \ +- grep -q "via 172.16.101.2" ++ grep -q "172.16.102.0/24 via 172.16.101.2" + log_test $? 0 "IPv4 route with no DSCP and ECN:ECT(1)" + + $IP route get fibmatch 172.16.102.1 dsfield 0x02 | \ +- grep -q "via 172.16.101.2" ++ grep -q "172.16.102.0/24 via 172.16.101.2" + log_test $? 0 "IPv4 route with no DSCP and ECN:ECT(0)" + + $IP route get fibmatch 172.16.102.1 dsfield 0x03 | \ +- grep -q "via 172.16.101.2" ++ grep -q "172.16.102.0/24 via 172.16.101.2" + log_test $? 0 "IPv4 route with no DSCP and ECN:CE" + } + +-- +2.43.0 + diff --git a/queue-6.6/ipv4-fix-incorrect-tos-in-route-get-reply.patch b/queue-6.6/ipv4-fix-incorrect-tos-in-route-get-reply.patch new file mode 100644 index 00000000000..9debbeea563 --- /dev/null +++ b/queue-6.6/ipv4-fix-incorrect-tos-in-route-get-reply.patch @@ -0,0 +1,122 @@ +From 70b4452f18acec9e72bc6ab3f7743d53e61d42a3 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 15 Jul 2024 17:23:53 +0300 +Subject: ipv4: Fix incorrect TOS in route get reply + +From: Ido Schimmel + +[ Upstream commit 338bb57e4c2a1c2c6fc92f9c0bd35be7587adca7 ] + +The TOS value that is returned to user space in the route get reply is +the one with which the lookup was performed ('fl4->flowi4_tos'). This is +fine when the matched route is configured with a TOS as it would not +match if its TOS value did not match the one with which the lookup was +performed. + +However, matching on TOS is only performed when the route's TOS is not +zero. It is therefore possible to have the kernel incorrectly return a +non-zero TOS: + + # ip link add name dummy1 up type dummy + # ip address add 192.0.2.1/24 dev dummy1 + # ip route get 192.0.2.2 tos 0xfc + 192.0.2.2 tos 0x1c dev dummy1 src 192.0.2.1 uid 0 + cache + +Fix by adding a DSCP field to the FIB result structure (inside an +existing 4 bytes hole), populating it in the route lookup and using it +when filling the route get reply. + +Output after the patch: + + # ip link add name dummy1 up type dummy + # ip address add 192.0.2.1/24 dev dummy1 + # ip route get 192.0.2.2 tos 0xfc + 192.0.2.2 dev dummy1 src 192.0.2.1 uid 0 + cache + +Fixes: 1a00fee4ffb2 ("ipv4: Remove rt_key_{src,dst,tos} from struct rtable.") +Signed-off-by: Ido Schimmel +Reviewed-by: David Ahern +Reviewed-by: Guillaume Nault +Signed-off-by: Paolo Abeni +Signed-off-by: Sasha Levin +--- + include/net/ip_fib.h | 1 + + net/ipv4/fib_trie.c | 1 + + net/ipv4/route.c | 14 +++++++------- + 3 files changed, 9 insertions(+), 7 deletions(-) + +diff --git a/include/net/ip_fib.h b/include/net/ip_fib.h +index 15de07d365405..ca1700c2a5733 100644 +--- a/include/net/ip_fib.h ++++ b/include/net/ip_fib.h +@@ -173,6 +173,7 @@ struct fib_result { + unsigned char type; + unsigned char scope; + u32 tclassid; ++ dscp_t dscp; + struct fib_nh_common *nhc; + struct fib_info *fi; + struct fib_table *table; +diff --git a/net/ipv4/fib_trie.c b/net/ipv4/fib_trie.c +index 9bdfdab906fe0..77b97c48da5ea 100644 +--- a/net/ipv4/fib_trie.c ++++ b/net/ipv4/fib_trie.c +@@ -1628,6 +1628,7 @@ int fib_table_lookup(struct fib_table *tb, const struct flowi4 *flp, + res->nhc = nhc; + res->type = fa->fa_type; + res->scope = fi->fib_scope; ++ res->dscp = fa->fa_dscp; + res->fi = fi; + res->table = tb; + res->fa_head = &n->leaf; +diff --git a/net/ipv4/route.c b/net/ipv4/route.c +index 40b9c579c917e..810779d537bec 100644 +--- a/net/ipv4/route.c ++++ b/net/ipv4/route.c +@@ -2930,9 +2930,9 @@ EXPORT_SYMBOL_GPL(ip_route_output_tunnel); + + /* called with rcu_read_lock held */ + static int rt_fill_info(struct net *net, __be32 dst, __be32 src, +- struct rtable *rt, u32 table_id, struct flowi4 *fl4, +- struct sk_buff *skb, u32 portid, u32 seq, +- unsigned int flags) ++ struct rtable *rt, u32 table_id, dscp_t dscp, ++ struct flowi4 *fl4, struct sk_buff *skb, u32 portid, ++ u32 seq, unsigned int flags) + { + struct rtmsg *r; + struct nlmsghdr *nlh; +@@ -2948,7 +2948,7 @@ static int rt_fill_info(struct net *net, __be32 dst, __be32 src, + r->rtm_family = AF_INET; + r->rtm_dst_len = 32; + r->rtm_src_len = 0; +- r->rtm_tos = fl4 ? fl4->flowi4_tos : 0; ++ r->rtm_tos = inet_dscp_to_dsfield(dscp); + r->rtm_table = table_id < 256 ? table_id : RT_TABLE_COMPAT; + if (nla_put_u32(skb, RTA_TABLE, table_id)) + goto nla_put_failure; +@@ -3098,7 +3098,7 @@ static int fnhe_dump_bucket(struct net *net, struct sk_buff *skb, + goto next; + + err = rt_fill_info(net, fnhe->fnhe_daddr, 0, rt, +- table_id, NULL, skb, ++ table_id, 0, NULL, skb, + NETLINK_CB(cb->skb).portid, + cb->nlh->nlmsg_seq, flags); + if (err) +@@ -3421,8 +3421,8 @@ static int inet_rtm_getroute(struct sk_buff *in_skb, struct nlmsghdr *nlh, + err = fib_dump_info(skb, NETLINK_CB(in_skb).portid, + nlh->nlmsg_seq, RTM_NEWROUTE, &fri, 0); + } else { +- err = rt_fill_info(net, dst, src, rt, table_id, &fl4, skb, +- NETLINK_CB(in_skb).portid, ++ err = rt_fill_info(net, dst, src, rt, table_id, res.dscp, &fl4, ++ skb, NETLINK_CB(in_skb).portid, + nlh->nlmsg_seq, 0); + } + if (err < 0) +-- +2.43.0 + diff --git a/queue-6.6/ipvs-avoid-unnecessary-calls-to-skb_is_gso_sctp.patch b/queue-6.6/ipvs-avoid-unnecessary-calls-to-skb_is_gso_sctp.patch new file mode 100644 index 00000000000..f9164bfd6fa --- /dev/null +++ b/queue-6.6/ipvs-avoid-unnecessary-calls-to-skb_is_gso_sctp.patch @@ -0,0 +1,47 @@ +From da162d0577c899d8af28ca828042e44ffd0a13f1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 23 May 2024 18:54:44 +0200 +Subject: ipvs: Avoid unnecessary calls to skb_is_gso_sctp + +From: Ismael Luceno + +[ Upstream commit 53796b03295cf7ab1fc8600016fa6dfbf4a494a0 ] + +In the context of the SCTP SNAT/DNAT handler, these calls can only +return true. + +Fixes: e10d3ba4d434 ("ipvs: Fix checksumming on GSO of SCTP packets") +Signed-off-by: Ismael Luceno +Acked-by: Julian Anastasov +Acked-by: Simon Horman +Signed-off-by: Pablo Neira Ayuso +Signed-off-by: Sasha Levin +--- + net/netfilter/ipvs/ip_vs_proto_sctp.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/net/netfilter/ipvs/ip_vs_proto_sctp.c b/net/netfilter/ipvs/ip_vs_proto_sctp.c +index 1e689c7141271..83e452916403d 100644 +--- a/net/netfilter/ipvs/ip_vs_proto_sctp.c ++++ b/net/netfilter/ipvs/ip_vs_proto_sctp.c +@@ -126,7 +126,7 @@ sctp_snat_handler(struct sk_buff *skb, struct ip_vs_protocol *pp, + if (sctph->source != cp->vport || payload_csum || + skb->ip_summed == CHECKSUM_PARTIAL) { + sctph->source = cp->vport; +- if (!skb_is_gso(skb) || !skb_is_gso_sctp(skb)) ++ if (!skb_is_gso(skb)) + sctp_nat_csum(skb, sctph, sctphoff); + } else { + skb->ip_summed = CHECKSUM_UNNECESSARY; +@@ -175,7 +175,7 @@ sctp_dnat_handler(struct sk_buff *skb, struct ip_vs_protocol *pp, + (skb->ip_summed == CHECKSUM_PARTIAL && + !(skb_dst(skb)->dev->features & NETIF_F_SCTP_CRC))) { + sctph->dest = cp->dport; +- if (!skb_is_gso(skb) || !skb_is_gso_sctp(skb)) ++ if (!skb_is_gso(skb)) + sctp_nat_csum(skb, sctph, sctphoff); + } else if (skb->ip_summed != CHECKSUM_PARTIAL) { + skb->ip_summed = CHECKSUM_UNNECESSARY; +-- +2.43.0 + diff --git a/queue-6.6/ipvs-properly-dereference-pe-in-ip_vs_add_service.patch b/queue-6.6/ipvs-properly-dereference-pe-in-ip_vs_add_service.patch new file mode 100644 index 00000000000..11d97522b88 --- /dev/null +++ b/queue-6.6/ipvs-properly-dereference-pe-in-ip_vs_add_service.patch @@ -0,0 +1,54 @@ +From b7ad9df288a596c4661e2cb679e5f27f23bdb528 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 27 Jun 2024 14:15:15 +0800 +Subject: ipvs: properly dereference pe in ip_vs_add_service + +From: Chen Hanxiao + +[ Upstream commit cbd070a4ae62f119058973f6d2c984e325bce6e7 ] + +Use pe directly to resolve sparse warning: + + net/netfilter/ipvs/ip_vs_ctl.c:1471:27: warning: dereference of noderef expression + +Fixes: 39b972231536 ("ipvs: handle connections started by real-servers") +Signed-off-by: Chen Hanxiao +Acked-by: Julian Anastasov +Acked-by: Simon Horman +Signed-off-by: Pablo Neira Ayuso +Signed-off-by: Sasha Levin +--- + net/netfilter/ipvs/ip_vs_ctl.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +diff --git a/net/netfilter/ipvs/ip_vs_ctl.c b/net/netfilter/ipvs/ip_vs_ctl.c +index 143a341bbc0a4..dec5309d9f1f5 100644 +--- a/net/netfilter/ipvs/ip_vs_ctl.c ++++ b/net/netfilter/ipvs/ip_vs_ctl.c +@@ -1459,18 +1459,18 @@ ip_vs_add_service(struct netns_ipvs *ipvs, struct ip_vs_service_user_kern *u, + if (ret < 0) + goto out_err; + +- /* Bind the ct retriever */ +- RCU_INIT_POINTER(svc->pe, pe); +- pe = NULL; +- + /* Update the virtual service counters */ + if (svc->port == FTPPORT) + atomic_inc(&ipvs->ftpsvc_counter); + else if (svc->port == 0) + atomic_inc(&ipvs->nullsvc_counter); +- if (svc->pe && svc->pe->conn_out) ++ if (pe && pe->conn_out) + atomic_inc(&ipvs->conn_out_counter); + ++ /* Bind the ct retriever */ ++ RCU_INIT_POINTER(svc->pe, pe); ++ pe = NULL; ++ + /* Count only IPv4 services for old get/setsockopt interface */ + if (svc->af == AF_INET) + ipvs->num_services++; +-- +2.43.0 + diff --git a/queue-6.6/jump_label-fix-concurrency-issues-in-static_key_slow.patch b/queue-6.6/jump_label-fix-concurrency-issues-in-static_key_slow.patch new file mode 100644 index 00000000000..ae11b51c76e --- /dev/null +++ b/queue-6.6/jump_label-fix-concurrency-issues-in-static_key_slow.patch @@ -0,0 +1,143 @@ +From 1a42b27fc9b3fe7207d54f1f2cb9ebaf3145a153 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 10 Jun 2024 14:46:36 +0200 +Subject: jump_label: Fix concurrency issues in static_key_slow_dec() + +From: Thomas Gleixner + +[ Upstream commit 83ab38ef0a0b2407d43af9575bb32333fdd74fb2 ] + +The commit which tried to fix the concurrency issues of concurrent +static_key_slow_inc() failed to fix the equivalent issues +vs. static_key_slow_dec(): + +CPU0 CPU1 + +static_key_slow_dec() + static_key_slow_try_dec() + + key->enabled == 1 + val = atomic_fetch_add_unless(&key->enabled, -1, 1); + if (val == 1) + return false; + + jump_label_lock(); + if (atomic_dec_and_test(&key->enabled)) { + --> key->enabled == 0 + __jump_label_update() + + static_key_slow_dec() + static_key_slow_try_dec() + + key->enabled == 0 + val = atomic_fetch_add_unless(&key->enabled, -1, 1); + + --> key->enabled == -1 <- FAIL + +There is another bug in that code, when there is a concurrent +static_key_slow_inc() which enables the key as that sets key->enabled to -1 +so on the other CPU + + val = atomic_fetch_add_unless(&key->enabled, -1, 1); + +will succeed and decrement to -2, which is invalid. + +Cure all of this by replacing the atomic_fetch_add_unless() with a +atomic_try_cmpxchg() loop similar to static_key_fast_inc_not_disabled(). + +[peterz: add WARN_ON_ONCE for the -1 race] +Fixes: 4c5ea0a9cd02 ("locking/static_key: Fix concurrent static_key_slow_inc()") +Reported-by: Yue Sun +Reported-by: Xingwei Lee +Signed-off-by: Thomas Gleixner +Signed-off-by: Peter Zijlstra (Intel) +Link: https://lkml.kernel.org/r/20240610124406.422897838@linutronix.de +Signed-off-by: Sasha Levin +--- + kernel/jump_label.c | 45 +++++++++++++++++++++++++++++---------------- + 1 file changed, 29 insertions(+), 16 deletions(-) + +diff --git a/kernel/jump_label.c b/kernel/jump_label.c +index d9c822bbffb8d..eec802175ccc6 100644 +--- a/kernel/jump_label.c ++++ b/kernel/jump_label.c +@@ -131,7 +131,7 @@ bool static_key_fast_inc_not_disabled(struct static_key *key) + STATIC_KEY_CHECK_USE(key); + /* + * Negative key->enabled has a special meaning: it sends +- * static_key_slow_inc() down the slow path, and it is non-zero ++ * static_key_slow_inc/dec() down the slow path, and it is non-zero + * so it counts as "enabled" in jump_label_update(). Note that + * atomic_inc_unless_negative() checks >= 0, so roll our own. + */ +@@ -150,7 +150,7 @@ bool static_key_slow_inc_cpuslocked(struct static_key *key) + lockdep_assert_cpus_held(); + + /* +- * Careful if we get concurrent static_key_slow_inc() calls; ++ * Careful if we get concurrent static_key_slow_inc/dec() calls; + * later calls must wait for the first one to _finish_ the + * jump_label_update() process. At the same time, however, + * the jump_label_update() call below wants to see +@@ -247,20 +247,32 @@ EXPORT_SYMBOL_GPL(static_key_disable); + + static bool static_key_slow_try_dec(struct static_key *key) + { +- int val; +- +- val = atomic_fetch_add_unless(&key->enabled, -1, 1); +- if (val == 1) +- return false; ++ int v; + + /* +- * The negative count check is valid even when a negative +- * key->enabled is in use by static_key_slow_inc(); a +- * __static_key_slow_dec() before the first static_key_slow_inc() +- * returns is unbalanced, because all other static_key_slow_inc() +- * instances block while the update is in progress. ++ * Go into the slow path if key::enabled is less than or equal than ++ * one. One is valid to shut down the key, anything less than one ++ * is an imbalance, which is handled at the call site. ++ * ++ * That includes the special case of '-1' which is set in ++ * static_key_slow_inc_cpuslocked(), but that's harmless as it is ++ * fully serialized in the slow path below. By the time this task ++ * acquires the jump label lock the value is back to one and the ++ * retry under the lock must succeed. + */ +- WARN(val < 0, "jump label: negative count!\n"); ++ v = atomic_read(&key->enabled); ++ do { ++ /* ++ * Warn about the '-1' case though; since that means a ++ * decrement is concurrent with a first (0->1) increment. IOW ++ * people are trying to disable something that wasn't yet fully ++ * enabled. This suggests an ordering problem on the user side. ++ */ ++ WARN_ON_ONCE(v < 0); ++ if (v <= 1) ++ return false; ++ } while (!likely(atomic_try_cmpxchg(&key->enabled, &v, v - 1))); ++ + return true; + } + +@@ -271,10 +283,11 @@ static void __static_key_slow_dec_cpuslocked(struct static_key *key) + if (static_key_slow_try_dec(key)) + return; + +- jump_label_lock(); +- if (atomic_dec_and_test(&key->enabled)) ++ guard(mutex)(&jump_label_mutex); ++ if (atomic_cmpxchg(&key->enabled, 1, 0)) + jump_label_update(key); +- jump_label_unlock(); ++ else ++ WARN_ON_ONCE(!static_key_slow_try_dec(key)); + } + + static void __static_key_slow_dec(struct static_key *key) +-- +2.43.0 + diff --git a/queue-6.6/kernfs-convert-kernfs_path_from_node_locked-from-str.patch b/queue-6.6/kernfs-convert-kernfs_path_from_node_locked-from-str.patch new file mode 100644 index 00000000000..f4cc772e52f --- /dev/null +++ b/queue-6.6/kernfs-convert-kernfs_path_from_node_locked-from-str.patch @@ -0,0 +1,220 @@ +From d61ec34dba45baeacf365297ba0af607bdf0333e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 12 Dec 2023 13:17:40 -0800 +Subject: kernfs: Convert kernfs_path_from_node_locked() from strlcpy() to + strscpy() + +From: Kees Cook + +[ Upstream commit ff6d413b0b59466e5acf2e42f294b1842ae130a1 ] + +One of the last remaining users of strlcpy() in the kernel is +kernfs_path_from_node_locked(), which passes back the problematic "length +we _would_ have copied" return value to indicate truncation. Convert the +chain of all callers to use the negative return value (some of which +already doing this explicitly). All callers were already also checking +for negative return values, so the risk to missed checks looks very low. + +In this analysis, it was found that cgroup1_release_agent() actually +didn't handle the "too large" condition, so this is technically also a +bug fix. :) + +Here's the chain of callers, and resolution identifying each one as now +handling the correct return value: + +kernfs_path_from_node_locked() + kernfs_path_from_node() + pr_cont_kernfs_path() + returns void + kernfs_path() + sysfs_warn_dup() + return value ignored + cgroup_path() + blkg_path() + bfq_bic_update_cgroup() + return value ignored + TRACE_IOCG_PATH() + return value ignored + TRACE_CGROUP_PATH() + return value ignored + perf_event_cgroup() + return value ignored + task_group_path() + return value ignored + damon_sysfs_memcg_path_eq() + return value ignored + get_mm_memcg_path() + return value ignored + lru_gen_seq_show() + return value ignored + cgroup_path_from_kernfs_id() + return value ignored + cgroup_show_path() + already converted "too large" error to negative value + cgroup_path_ns_locked() + cgroup_path_ns() + bpf_iter_cgroup_show_fdinfo() + return value ignored + cgroup1_release_agent() + wasn't checking "too large" error + proc_cgroup_show() + already converted "too large" to negative value + +Cc: Greg Kroah-Hartman +Cc: Tejun Heo +Cc: Zefan Li +Cc: Johannes Weiner +Cc: Waiman Long +Cc: +Co-developed-by: Azeem Shaikh +Signed-off-by: Azeem Shaikh +Link: https://lore.kernel.org/r/20231116192127.1558276-3-keescook@chromium.org +Signed-off-by: Kees Cook +Link: https://lore.kernel.org/r/20231212211741.164376-3-keescook@chromium.org +Signed-off-by: Greg Kroah-Hartman +Stable-dep-of: 1be59c97c83c ("cgroup/cpuset: Prevent UAF in proc_cpuset_show()") +Signed-off-by: Sasha Levin +--- + fs/kernfs/dir.c | 34 +++++++++++++++++----------------- + kernel/cgroup/cgroup-v1.c | 2 +- + kernel/cgroup/cgroup.c | 4 ++-- + kernel/cgroup/cpuset.c | 2 +- + 4 files changed, 21 insertions(+), 21 deletions(-) + +diff --git a/fs/kernfs/dir.c b/fs/kernfs/dir.c +index 2405aeb39b9a2..b068ed32d7b32 100644 +--- a/fs/kernfs/dir.c ++++ b/fs/kernfs/dir.c +@@ -127,7 +127,7 @@ static struct kernfs_node *kernfs_common_ancestor(struct kernfs_node *a, + * + * [3] when @kn_to is %NULL result will be "(null)" + * +- * Return: the length of the full path. If the full length is equal to or ++ * Return: the length of the constructed path. If the path would have been + * greater than @buflen, @buf contains the truncated path with the trailing + * '\0'. On error, -errno is returned. + */ +@@ -138,16 +138,17 @@ static int kernfs_path_from_node_locked(struct kernfs_node *kn_to, + struct kernfs_node *kn, *common; + const char parent_str[] = "/.."; + size_t depth_from, depth_to, len = 0; ++ ssize_t copied; + int i, j; + + if (!kn_to) +- return strlcpy(buf, "(null)", buflen); ++ return strscpy(buf, "(null)", buflen); + + if (!kn_from) + kn_from = kernfs_root(kn_to)->kn; + + if (kn_from == kn_to) +- return strlcpy(buf, "/", buflen); ++ return strscpy(buf, "/", buflen); + + common = kernfs_common_ancestor(kn_from, kn_to); + if (WARN_ON(!common)) +@@ -158,18 +159,19 @@ static int kernfs_path_from_node_locked(struct kernfs_node *kn_to, + + buf[0] = '\0'; + +- for (i = 0; i < depth_from; i++) +- len += strlcpy(buf + len, parent_str, +- len < buflen ? buflen - len : 0); ++ for (i = 0; i < depth_from; i++) { ++ copied = strscpy(buf + len, parent_str, buflen - len); ++ if (copied < 0) ++ return copied; ++ len += copied; ++ } + + /* Calculate how many bytes we need for the rest */ + for (i = depth_to - 1; i >= 0; i--) { + for (kn = kn_to, j = 0; j < i; j++) + kn = kn->parent; +- len += strlcpy(buf + len, "/", +- len < buflen ? buflen - len : 0); +- len += strlcpy(buf + len, kn->name, +- len < buflen ? buflen - len : 0); ++ ++ len += scnprintf(buf + len, buflen - len, "/%s", kn->name); + } + + return len; +@@ -214,7 +216,7 @@ int kernfs_name(struct kernfs_node *kn, char *buf, size_t buflen) + * path (which includes '..'s) as needed to reach from @from to @to is + * returned. + * +- * Return: the length of the full path. If the full length is equal to or ++ * Return: the length of the constructed path. If the path would have been + * greater than @buflen, @buf contains the truncated path with the trailing + * '\0'. On error, -errno is returned. + */ +@@ -265,12 +267,10 @@ void pr_cont_kernfs_path(struct kernfs_node *kn) + sz = kernfs_path_from_node(kn, NULL, kernfs_pr_cont_buf, + sizeof(kernfs_pr_cont_buf)); + if (sz < 0) { +- pr_cont("(error)"); +- goto out; +- } +- +- if (sz >= sizeof(kernfs_pr_cont_buf)) { +- pr_cont("(name too long)"); ++ if (sz == -E2BIG) ++ pr_cont("(name too long)"); ++ else ++ pr_cont("(error)"); + goto out; + } + +diff --git a/kernel/cgroup/cgroup-v1.c b/kernel/cgroup/cgroup-v1.c +index 76db6c67e39a9..9cb00ebe9ac6d 100644 +--- a/kernel/cgroup/cgroup-v1.c ++++ b/kernel/cgroup/cgroup-v1.c +@@ -802,7 +802,7 @@ void cgroup1_release_agent(struct work_struct *work) + goto out_free; + + ret = cgroup_path_ns(cgrp, pathbuf, PATH_MAX, &init_cgroup_ns); +- if (ret < 0 || ret >= PATH_MAX) ++ if (ret < 0) + goto out_free; + + argv[0] = agentbuf; +diff --git a/kernel/cgroup/cgroup.c b/kernel/cgroup/cgroup.c +index 518725b57200c..094f513319259 100644 +--- a/kernel/cgroup/cgroup.c ++++ b/kernel/cgroup/cgroup.c +@@ -1887,7 +1887,7 @@ int cgroup_show_path(struct seq_file *sf, struct kernfs_node *kf_node, + len = kernfs_path_from_node(kf_node, ns_cgroup->kn, buf, PATH_MAX); + spin_unlock_irq(&css_set_lock); + +- if (len >= PATH_MAX) ++ if (len == -E2BIG) + len = -ERANGE; + else if (len > 0) { + seq_escape(sf, buf, " \t\n\\"); +@@ -6277,7 +6277,7 @@ int proc_cgroup_show(struct seq_file *m, struct pid_namespace *ns, + if (cgroup_on_dfl(cgrp) || !(tsk->flags & PF_EXITING)) { + retval = cgroup_path_ns_locked(cgrp, buf, PATH_MAX, + current->nsproxy->cgroup_ns); +- if (retval >= PATH_MAX) ++ if (retval == -E2BIG) + retval = -ENAMETOOLONG; + if (retval < 0) + goto out_unlock; +diff --git a/kernel/cgroup/cpuset.c b/kernel/cgroup/cpuset.c +index 679460ebccfbf..f2025fa5a168d 100644 +--- a/kernel/cgroup/cpuset.c ++++ b/kernel/cgroup/cpuset.c +@@ -4297,7 +4297,7 @@ int proc_cpuset_show(struct seq_file *m, struct pid_namespace *ns, + retval = cgroup_path_ns(css->cgroup, buf, PATH_MAX, + current->nsproxy->cgroup_ns); + css_put(css); +- if (retval >= PATH_MAX) ++ if (retval == -E2BIG) + retval = -ENAMETOOLONG; + if (retval < 0) + goto out_free; +-- +2.43.0 + diff --git a/queue-6.6/kvm-ppc-book3s-hv-fix-the-get_one_reg-of-sdar.patch b/queue-6.6/kvm-ppc-book3s-hv-fix-the-get_one_reg-of-sdar.patch new file mode 100644 index 00000000000..fc07753a4e5 --- /dev/null +++ b/queue-6.6/kvm-ppc-book3s-hv-fix-the-get_one_reg-of-sdar.patch @@ -0,0 +1,41 @@ +From 86ef168a4a005809c8d2422e46579f0f53f38b01 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 5 Jun 2024 13:06:28 +0000 +Subject: KVM: PPC: Book3S HV: Fix the get_one_reg of SDAR + +From: Shivaprasad G Bhat + +[ Upstream commit 009f6f42c67e9de737d6d3d199f92b21a8cb9622 ] + +The kvmppc_get_one_reg_hv() for SDAR is wrongly getting the SIAR +instead of SDAR, possibly a paste error emanating from the previous +refactoring. + +Patch fixes the wrong get_one_reg() for the same. + +Fixes: ebc88ea7a6ad ("KVM: PPC: Book3S HV: Use accessors for VCPU registers") +Signed-off-by: Shivaprasad G Bhat +Reviewed-by: Nicholas Piggin +Signed-off-by: Michael Ellerman +Link: https://msgid.link/171759278410.1480.16404209606556979576.stgit@linux.ibm.com +Signed-off-by: Sasha Levin +--- + arch/powerpc/kvm/book3s_hv.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c +index 1e668e238a288..1bb00c7215440 100644 +--- a/arch/powerpc/kvm/book3s_hv.c ++++ b/arch/powerpc/kvm/book3s_hv.c +@@ -2249,7 +2249,7 @@ static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, + *val = get_reg_val(id, kvmppc_get_siar_hv(vcpu)); + break; + case KVM_REG_PPC_SDAR: +- *val = get_reg_val(id, kvmppc_get_siar_hv(vcpu)); ++ *val = get_reg_val(id, kvmppc_get_sdar_hv(vcpu)); + break; + case KVM_REG_PPC_SIER: + *val = get_reg_val(id, kvmppc_get_sier_hv(vcpu, 0)); +-- +2.43.0 + diff --git a/queue-6.6/kvm-ppc-book3s-hv-fix-the-set_one_reg-for-mmcr3.patch b/queue-6.6/kvm-ppc-book3s-hv-fix-the-set_one_reg-for-mmcr3.patch new file mode 100644 index 00000000000..8d764c227a8 --- /dev/null +++ b/queue-6.6/kvm-ppc-book3s-hv-fix-the-set_one_reg-for-mmcr3.patch @@ -0,0 +1,38 @@ +From 79a7cd06aac800711aaaaca41ea13cc458360d67 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 5 Jun 2024 13:06:16 +0000 +Subject: KVM: PPC: Book3S HV: Fix the set_one_reg for MMCR3 + +From: Shivaprasad G Bhat + +[ Upstream commit f9ca6a10be20479d526f27316cc32cfd1785ed39 ] + +The kvmppc_set_one_reg_hv() wrongly get() the value +instead of set() for MMCR3. Fix the same. + +Fixes: 5752fe0b811b ("KVM: PPC: Book3S HV: Save/restore new PMU registers") +Signed-off-by: Shivaprasad G Bhat +Reviewed-by: Nicholas Piggin +Signed-off-by: Michael Ellerman +Link: https://msgid.link/171759276847.1480.16387950124201117847.stgit@linux.ibm.com +Signed-off-by: Sasha Levin +--- + arch/powerpc/kvm/book3s_hv.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c +index 0429488ba170d..1e668e238a288 100644 +--- a/arch/powerpc/kvm/book3s_hv.c ++++ b/arch/powerpc/kvm/book3s_hv.c +@@ -2484,7 +2484,7 @@ static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, + vcpu->arch.mmcrs = set_reg_val(id, *val); + break; + case KVM_REG_PPC_MMCR3: +- *val = get_reg_val(id, vcpu->arch.mmcr[3]); ++ kvmppc_set_mmcr_hv(vcpu, 3, set_reg_val(id, *val)); + break; + case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: + i = id - KVM_REG_PPC_PMC1; +-- +2.43.0 + diff --git a/queue-6.6/leds-flash-leds-qcom-flash-test-the-correct-variable.patch b/queue-6.6/leds-flash-leds-qcom-flash-test-the-correct-variable.patch new file mode 100644 index 00000000000..47cd8b472e6 --- /dev/null +++ b/queue-6.6/leds-flash-leds-qcom-flash-test-the-correct-variable.patch @@ -0,0 +1,53 @@ +From a6da1282b1a02339f00f06d57ee1fdcc61106937 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 4 Jul 2024 10:19:32 -0500 +Subject: leds: flash: leds-qcom-flash: Test the correct variable in init + +From: Dan Carpenter + +[ Upstream commit 87e552ad654554be73e62dd43c923bcee215287d ] + +This code was passing the incorrect pointer to PTR_ERR_OR_ZERO() so it +always returned success. It should have been checking the array element +instead of the array itself. + +Fixes: 96a2e242a5dc ("leds: flash: Add driver to support flash LED module in QCOM PMICs") +Signed-off-by: Dan Carpenter +Link: https://lore.kernel.org/r/ZoWJS_epjIMCYITg@stanley.mountain +Signed-off-by: Lee Jones +Signed-off-by: Sasha Levin +--- + drivers/leds/flash/leds-qcom-flash.c | 10 +++++++--- + 1 file changed, 7 insertions(+), 3 deletions(-) + +diff --git a/drivers/leds/flash/leds-qcom-flash.c b/drivers/leds/flash/leds-qcom-flash.c +index a73d3ea5c97a3..17391aefeb941 100644 +--- a/drivers/leds/flash/leds-qcom-flash.c ++++ b/drivers/leds/flash/leds-qcom-flash.c +@@ -505,6 +505,7 @@ qcom_flash_v4l2_init(struct device *dev, struct qcom_flash_led *led, struct fwno + struct qcom_flash_data *flash_data = led->flash_data; + struct v4l2_flash_config v4l2_cfg = { 0 }; + struct led_flash_setting *intensity = &v4l2_cfg.intensity; ++ struct v4l2_flash *v4l2_flash; + + if (!(led->flash.led_cdev.flags & LED_DEV_CAP_FLASH)) + return 0; +@@ -523,9 +524,12 @@ qcom_flash_v4l2_init(struct device *dev, struct qcom_flash_led *led, struct fwno + LED_FAULT_OVER_TEMPERATURE | + LED_FAULT_TIMEOUT; + +- flash_data->v4l2_flash[flash_data->leds_count] = +- v4l2_flash_init(dev, fwnode, &led->flash, &qcom_v4l2_flash_ops, &v4l2_cfg); +- return PTR_ERR_OR_ZERO(flash_data->v4l2_flash); ++ v4l2_flash = v4l2_flash_init(dev, fwnode, &led->flash, &qcom_v4l2_flash_ops, &v4l2_cfg); ++ if (IS_ERR(v4l2_flash)) ++ return PTR_ERR(v4l2_flash); ++ ++ flash_data->v4l2_flash[flash_data->leds_count] = v4l2_flash; ++ return 0; + } + # else + static int +-- +2.43.0 + diff --git a/queue-6.6/leds-trigger-unregister-sysfs-attributes-before-call.patch b/queue-6.6/leds-trigger-unregister-sysfs-attributes-before-call.patch new file mode 100644 index 00000000000..b64e45a84f3 --- /dev/null +++ b/queue-6.6/leds-trigger-unregister-sysfs-attributes-before-call.patch @@ -0,0 +1,57 @@ +From 559fa4d0032d3b0a986b31ecfca8f971be75383c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 4 May 2024 18:25:33 +0200 +Subject: leds: trigger: Unregister sysfs attributes before calling + deactivate() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Hans de Goede + +[ Upstream commit c0dc9adf9474ecb7106e60e5472577375aedaed3 ] + +Triggers which have trigger specific sysfs attributes typically store +related data in trigger-data allocated by the activate() callback and +freed by the deactivate() callback. + +Calling device_remove_groups() after calling deactivate() leaves a window +where the sysfs attributes show/store functions could be called after +deactivation and then operate on the just freed trigger-data. + +Move the device_remove_groups() call to before deactivate() to close +this race window. + +This also makes the deactivation path properly do things in reverse order +of the activation path which calls the activate() callback before calling +device_add_groups(). + +Fixes: a7e7a3156300 ("leds: triggers: add device attribute support") +Cc: Uwe Kleine-König +Signed-off-by: Hans de Goede +Acked-by: Uwe Kleine-König +Link: https://lore.kernel.org/r/20240504162533.76780-1-hdegoede@redhat.com +Signed-off-by: Lee Jones +Signed-off-by: Sasha Levin +--- + drivers/leds/led-triggers.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/leds/led-triggers.c b/drivers/leds/led-triggers.c +index 6a5e1f41f9a45..4f5829b726a75 100644 +--- a/drivers/leds/led-triggers.c ++++ b/drivers/leds/led-triggers.c +@@ -179,9 +179,9 @@ int led_trigger_set(struct led_classdev *led_cdev, struct led_trigger *trig) + + cancel_work_sync(&led_cdev->set_brightness_work); + led_stop_software_blink(led_cdev); ++ device_remove_groups(led_cdev->dev, led_cdev->trigger->groups); + if (led_cdev->trigger->deactivate) + led_cdev->trigger->deactivate(led_cdev); +- device_remove_groups(led_cdev->dev, led_cdev->trigger->groups); + led_cdev->trigger = NULL; + led_cdev->trigger_data = NULL; + led_cdev->activated = false; +-- +2.43.0 + diff --git a/queue-6.6/lib-objagg-fix-general-protection-fault.patch b/queue-6.6/lib-objagg-fix-general-protection-fault.patch new file mode 100644 index 00000000000..d3744369052 --- /dev/null +++ b/queue-6.6/lib-objagg-fix-general-protection-fault.patch @@ -0,0 +1,75 @@ +From b267ec882535259aec40430be370f88cf3c75cf1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 Jun 2024 16:49:41 +0200 +Subject: lib: objagg: Fix general protection fault + +From: Ido Schimmel + +[ Upstream commit b4a3a89fffcdf09702b1f161b914e52abca1894d ] + +The library supports aggregation of objects into other objects only if +the parent object does not have a parent itself. That is, nesting is not +supported. + +Aggregation happens in two cases: Without and with hints, where hints +are a pre-computed recommendation on how to aggregate the provided +objects. + +Nesting is not possible in the first case due to a check that prevents +it, but in the second case there is no check because the assumption is +that nesting cannot happen when creating objects based on hints. The +violation of this assumption leads to various warnings and eventually to +a general protection fault [1]. + +Before fixing the root cause, error out when nesting happens and warn. + +[1] +general protection fault, probably for non-canonical address 0xdead000000000d90: 0000 [#1] PREEMPT SMP PTI +CPU: 1 PID: 1083 Comm: kworker/1:9 Tainted: G W 6.9.0-rc6-custom-gd9b4f1cca7fb #7 +Hardware name: Mellanox Technologies Ltd. MSN3700/VMOD0005, BIOS 5.11 01/06/2019 +Workqueue: mlxsw_core mlxsw_sp_acl_tcam_vregion_rehash_work +RIP: 0010:mlxsw_sp_acl_erp_bf_insert+0x25/0x80 +[...] +Call Trace: + + mlxsw_sp_acl_atcam_entry_add+0x256/0x3c0 + mlxsw_sp_acl_tcam_entry_create+0x5e/0xa0 + mlxsw_sp_acl_tcam_vchunk_migrate_one+0x16b/0x270 + mlxsw_sp_acl_tcam_vregion_rehash_work+0xbe/0x510 + process_one_work+0x151/0x370 + worker_thread+0x2cb/0x3e0 + kthread+0xd0/0x100 + ret_from_fork+0x34/0x50 + ret_from_fork_asm+0x1a/0x30 + + +Fixes: 9069a3817d82 ("lib: objagg: implement optimization hints assembly and use hints for object creation") +Reported-by: Alexander Zubkov +Signed-off-by: Ido Schimmel +Reviewed-by: Amit Cohen +Tested-by: Alexander Zubkov +Signed-off-by: Petr Machata +Reviewed-by: Simon Horman +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + lib/objagg.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/lib/objagg.c b/lib/objagg.c +index 1e248629ed643..90f3aa68c30a0 100644 +--- a/lib/objagg.c ++++ b/lib/objagg.c +@@ -167,6 +167,9 @@ static int objagg_obj_parent_assign(struct objagg *objagg, + { + void *delta_priv; + ++ if (WARN_ON(!objagg_obj_is_root(parent))) ++ return -EINVAL; ++ + delta_priv = objagg->ops->delta_create(objagg->priv, parent->obj, + objagg_obj->obj); + if (IS_ERR(delta_priv)) +-- +2.43.0 + diff --git a/queue-6.6/libbpf-checking-the-btf_type-kind-when-fixing-variab.patch b/queue-6.6/libbpf-checking-the-btf_type-kind-when-fixing-variab.patch new file mode 100644 index 00000000000..eb881cefcdc --- /dev/null +++ b/queue-6.6/libbpf-checking-the-btf_type-kind-when-fixing-variab.patch @@ -0,0 +1,78 @@ +From c43fddbdc002eb4af082c0e287ded4b35ae4349b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 19 Jun 2024 05:23:55 -0700 +Subject: libbpf: Checking the btf_type kind when fixing variable offsets + +From: Donglin Peng + +[ Upstream commit cc5083d1f3881624ad2de1f3cbb3a07e152cb254 ] + +I encountered an issue when building the test_progs from the repository [1]: + + $ pwd + /work/Qemu/x86_64/linux-6.10-rc2/tools/testing/selftests/bpf/ + + $ make test_progs V=1 + [...] + ./tools/sbin/bpftool gen object ./ip_check_defrag.bpf.linked2.o ./ip_check_defrag.bpf.linked1.o + libbpf: failed to find symbol for variable 'bpf_dynptr_slice' in section '.ksyms' + Error: failed to link './ip_check_defrag.bpf.linked1.o': No such file or directory (2) + [...] + +Upon investigation, I discovered that the btf_types referenced in the '.ksyms' +section had a kind of BTF_KIND_FUNC instead of BTF_KIND_VAR: + + $ bpftool btf dump file ./ip_check_defrag.bpf.linked1.o + [...] + [2] DATASEC '.ksyms' size=0 vlen=2 + type_id=16 offset=0 size=0 (FUNC 'bpf_dynptr_from_skb') + type_id=17 offset=0 size=0 (FUNC 'bpf_dynptr_slice') + [...] + [16] FUNC 'bpf_dynptr_from_skb' type_id=82 linkage=extern + [17] FUNC 'bpf_dynptr_slice' type_id=85 linkage=extern + [...] + +For a detailed analysis, please refer to [2]. We can add a kind checking to +fix the issue. + + [1] https://github.com/eddyz87/bpf/tree/binsort-btf-dedup + [2] https://lore.kernel.org/all/0c0ef20c-c05e-4db9-bad7-2cbc0d6dfae7@oracle.com/ + +Fixes: 8fd27bf69b86 ("libbpf: Add BPF static linker BTF and BTF.ext support") +Signed-off-by: Donglin Peng +Signed-off-by: Daniel Borkmann +Reviewed-by: Alan Maguire +Acked-by: Eduard Zingerman +Link: https://lore.kernel.org/bpf/20240619122355.426405-1-dolinux.peng@gmail.com +Signed-off-by: Sasha Levin +--- + tools/lib/bpf/linker.c | 11 +++++++++-- + 1 file changed, 9 insertions(+), 2 deletions(-) + +diff --git a/tools/lib/bpf/linker.c b/tools/lib/bpf/linker.c +index 5ced96d99f8c5..b311bb91f672e 100644 +--- a/tools/lib/bpf/linker.c ++++ b/tools/lib/bpf/linker.c +@@ -2194,10 +2194,17 @@ static int linker_fixup_btf(struct src_obj *obj) + vi = btf_var_secinfos(t); + for (j = 0, m = btf_vlen(t); j < m; j++, vi++) { + const struct btf_type *vt = btf__type_by_id(obj->btf, vi->type); +- const char *var_name = btf__str_by_offset(obj->btf, vt->name_off); +- int var_linkage = btf_var(vt)->linkage; ++ const char *var_name; ++ int var_linkage; + Elf64_Sym *sym; + ++ /* could be a variable or function */ ++ if (!btf_is_var(vt)) ++ continue; ++ ++ var_name = btf__str_by_offset(obj->btf, vt->name_off); ++ var_linkage = btf_var(vt)->linkage; ++ + /* no need to patch up static or extern vars */ + if (var_linkage != BTF_VAR_GLOBAL_ALLOCATED) + continue; +-- +2.43.0 + diff --git a/queue-6.6/locking-rwsem-add-__always_inline-annotation-to-__do.patch b/queue-6.6/locking-rwsem-add-__always_inline-annotation-to-__do.patch new file mode 100644 index 00000000000..2869eee97ac --- /dev/null +++ b/queue-6.6/locking-rwsem-add-__always_inline-annotation-to-__do.patch @@ -0,0 +1,71 @@ +From eaa647ae44d6cacb0a1eeaa5c1d36a3b73cf67ec Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 8 Jul 2024 23:08:27 -0700 +Subject: locking/rwsem: Add __always_inline annotation to + __down_write_common() and inlined callers + +From: John Stultz + +[ Upstream commit e81859fe64ad42dccefe134d1696e0635f78d763 ] + +Apparently despite it being marked inline, the compiler +may not inline __down_write_common() which makes it difficult +to identify the cause of lock contention, as the wchan of the +blocked function will always be listed as __down_write_common(). + +So add __always_inline annotation to the common function (as +well as the inlined helper callers) to force it to be inlined +so a more useful blocking function will be listed (via wchan). + +This mirrors commit 92cc5d00a431 ("locking/rwsem: Add +__always_inline annotation to __down_read_common() and inlined +callers") which did the same for __down_read_common. + +I sort of worry that I'm playing wack-a-mole here, and talking +with compiler people, they tell me inline means nothing, which +makes me want to cry a little. So I'm wondering if we need to +replace all the inlines with __always_inline, or remove them +because either we mean something by it, or not. + +Fixes: c995e638ccbb ("locking/rwsem: Fold __down_{read,write}*()") +Reported-by: Tim Murray +Signed-off-by: John Stultz +Signed-off-by: Peter Zijlstra (Intel) +Acked-by: Waiman Long +Link: https://lkml.kernel.org/r/20240709060831.495366-1-jstultz@google.com +Signed-off-by: Sasha Levin +--- + kernel/locking/rwsem.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/kernel/locking/rwsem.c b/kernel/locking/rwsem.c +index 9eabd585ce7af..11ed7ce6579e8 100644 +--- a/kernel/locking/rwsem.c ++++ b/kernel/locking/rwsem.c +@@ -1297,7 +1297,7 @@ static inline int __down_read_trylock(struct rw_semaphore *sem) + /* + * lock for writing + */ +-static inline int __down_write_common(struct rw_semaphore *sem, int state) ++static __always_inline int __down_write_common(struct rw_semaphore *sem, int state) + { + int ret = 0; + +@@ -1310,12 +1310,12 @@ static inline int __down_write_common(struct rw_semaphore *sem, int state) + return ret; + } + +-static inline void __down_write(struct rw_semaphore *sem) ++static __always_inline void __down_write(struct rw_semaphore *sem) + { + __down_write_common(sem, TASK_UNINTERRUPTIBLE); + } + +-static inline int __down_write_killable(struct rw_semaphore *sem) ++static __always_inline int __down_write_killable(struct rw_semaphore *sem) + { + return __down_write_common(sem, TASK_KILLABLE); + } +-- +2.43.0 + diff --git a/queue-6.6/loongarch-check-tif_load_watch-to-enable-user-space-.patch b/queue-6.6/loongarch-check-tif_load_watch-to-enable-user-space-.patch new file mode 100644 index 00000000000..974eb8866ab --- /dev/null +++ b/queue-6.6/loongarch-check-tif_load_watch-to-enable-user-space-.patch @@ -0,0 +1,63 @@ +From 82d36d28040523e62c06743a268822d2fa5c969a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 20 Jul 2024 22:41:07 +0800 +Subject: LoongArch: Check TIF_LOAD_WATCH to enable user space watchpoint + +From: Tiezhu Yang + +[ Upstream commit 3892b11eac5aaaeefbf717f1953288b77759d9e2 ] + +Currently, there are some places to set CSR.PRMD.PWE, the first one is +in hw_breakpoint_thread_switch() to enable user space singlestep via +checking TIF_SINGLESTEP, the second one is in hw_breakpoint_control() to +enable user space watchpoint. For the latter case, it should also check +TIF_LOAD_WATCH to make the logic correct and clear. + +Fixes: c8e57ab0995c ("LoongArch: Trigger user-space watchpoints correctly") +Signed-off-by: Tiezhu Yang +Signed-off-by: Huacai Chen +Signed-off-by: Sasha Levin +--- + arch/loongarch/kernel/hw_breakpoint.c | 2 +- + arch/loongarch/kernel/ptrace.c | 3 +++ + 2 files changed, 4 insertions(+), 1 deletion(-) + +diff --git a/arch/loongarch/kernel/hw_breakpoint.c b/arch/loongarch/kernel/hw_breakpoint.c +index 621ad7634df71..a6e4b605bfa8d 100644 +--- a/arch/loongarch/kernel/hw_breakpoint.c ++++ b/arch/loongarch/kernel/hw_breakpoint.c +@@ -221,7 +221,7 @@ static int hw_breakpoint_control(struct perf_event *bp, + } + enable = csr_read64(LOONGARCH_CSR_CRMD); + csr_write64(CSR_CRMD_WE | enable, LOONGARCH_CSR_CRMD); +- if (bp->hw.target) ++ if (bp->hw.target && test_tsk_thread_flag(bp->hw.target, TIF_LOAD_WATCH)) + regs->csr_prmd |= CSR_PRMD_PWE; + break; + case HW_BREAKPOINT_UNINSTALL: +diff --git a/arch/loongarch/kernel/ptrace.c b/arch/loongarch/kernel/ptrace.c +index 200109de1971a..19dc6eff45ccc 100644 +--- a/arch/loongarch/kernel/ptrace.c ++++ b/arch/loongarch/kernel/ptrace.c +@@ -589,6 +589,7 @@ static int ptrace_hbp_set_ctrl(unsigned int note_type, + struct perf_event *bp; + struct perf_event_attr attr; + struct arch_hw_breakpoint_ctrl ctrl; ++ struct thread_info *ti = task_thread_info(tsk); + + bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx); + if (IS_ERR(bp)) +@@ -613,8 +614,10 @@ static int ptrace_hbp_set_ctrl(unsigned int note_type, + if (err) + return err; + attr.disabled = 0; ++ set_ti_thread_flag(ti, TIF_LOAD_WATCH); + } else { + attr.disabled = 1; ++ clear_ti_thread_flag(ti, TIF_LOAD_WATCH); + } + + return modify_user_hw_breakpoint(bp, &attr); +-- +2.43.0 + diff --git a/queue-6.6/m68k-atari-fix-tt-bootup-freeze-unexpected-scu-inter.patch b/queue-6.6/m68k-atari-fix-tt-bootup-freeze-unexpected-scu-inter.patch new file mode 100644 index 00000000000..25e11f1edd3 --- /dev/null +++ b/queue-6.6/m68k-atari-fix-tt-bootup-freeze-unexpected-scu-inter.patch @@ -0,0 +1,58 @@ +From f18ff47b8df04a6cb25f264a68f2b96349dc9e60 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 24 Jun 2024 17:49:01 +0300 +Subject: m68k: atari: Fix TT bootup freeze / unexpected (SCU) interrupt + messages +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Eero Tamminen + +[ Upstream commit f70065a9fd988983b2c693631b801f25a615fc04 ] + +Avoid freeze on Atari TT / MegaSTe boot with continuous messages of: + + unexpected interrupt from 112 + +Which was due to VBL interrupt being enabled in SCU sys mask, but there +being no handler for that any more. + +(Bug and fix were first verified on real Atari TT HW by Christian, + this patch later on in Hatari emulator.) + +Fixes: 1fa0b29f3a43f9dd ("fbdev: Kill Atari vblank cursor blinking") +Reported-by: Nicolas Pomarède +Closes: https://listengine.tuxfamily.org/lists.tuxfamily.org/hatari-devel/2024/06/msg00016.html +Closes: https://lore.kernel.org/all/9aa793d7-82ed-4fbd-bce5-60810d8a9119@helsinkinet.fi +Tested-by: Christian Zietz +Signed-off-by: Eero Tamminen +Reviewed-by: Michael Schmitz +Reviewed-by: Geert Uytterhoeven +Link: https://lore.kernel.org/20240624144901.5236-1-oak@helsinkinet.fi +Signed-off-by: Geert Uytterhoeven +Signed-off-by: Sasha Levin +--- + arch/m68k/atari/ataints.c | 6 +----- + 1 file changed, 1 insertion(+), 5 deletions(-) + +diff --git a/arch/m68k/atari/ataints.c b/arch/m68k/atari/ataints.c +index 56f02ea2c248d..715d1e0d973e6 100644 +--- a/arch/m68k/atari/ataints.c ++++ b/arch/m68k/atari/ataints.c +@@ -302,11 +302,7 @@ void __init atari_init_IRQ(void) + + if (ATARIHW_PRESENT(SCU)) { + /* init the SCU if present */ +- tt_scu.sys_mask = 0x10; /* enable VBL (for the cursor) and +- * disable HSYNC interrupts (who +- * needs them?) MFP and SCC are +- * enabled in VME mask +- */ ++ tt_scu.sys_mask = 0x0; /* disable all interrupts */ + tt_scu.vme_mask = 0x60; /* enable MFP and SCC ints */ + } else { + /* If no SCU and no Hades, the HSYNC interrupt needs to be +-- +2.43.0 + diff --git a/queue-6.6/m68k-cmpxchg-fix-return-value-for-default-case-in-__.patch b/queue-6.6/m68k-cmpxchg-fix-return-value-for-default-case-in-__.patch new file mode 100644 index 00000000000..7614514a57c --- /dev/null +++ b/queue-6.6/m68k-cmpxchg-fix-return-value-for-default-case-in-__.patch @@ -0,0 +1,38 @@ +From 3770700508f7f9988148f81acdfad5890cc9a92d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 2 Jul 2024 05:41:17 +0200 +Subject: m68k: cmpxchg: Fix return value for default case in __arch_xchg() + +From: Thorsten Blum + +[ Upstream commit 21b9e722ad28c19c2bc83f18f540b3dbd89bf762 ] + +The return value of __invalid_xchg_size() is assigned to tmp instead of +the return variable x. Assign it to x instead. + +Fixes: 2501cf768e4009a0 ("m68k: Fix xchg/cmpxchg to fail to link if given an inappropriate pointer") +Signed-off-by: Thorsten Blum +Reviewed-by: Geert Uytterhoeven +Link: https://lore.kernel.org/20240702034116.140234-2-thorsten.blum@toblux.com +Signed-off-by: Geert Uytterhoeven +Signed-off-by: Sasha Levin +--- + arch/m68k/include/asm/cmpxchg.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/m68k/include/asm/cmpxchg.h b/arch/m68k/include/asm/cmpxchg.h +index d7f3de9c5d6f7..4ba14f3535fcb 100644 +--- a/arch/m68k/include/asm/cmpxchg.h ++++ b/arch/m68k/include/asm/cmpxchg.h +@@ -32,7 +32,7 @@ static inline unsigned long __arch_xchg(unsigned long x, volatile void * ptr, in + x = tmp; + break; + default: +- tmp = __invalid_xchg_size(x, ptr, size); ++ x = __invalid_xchg_size(x, ptr, size); + break; + } + +-- +2.43.0 + diff --git a/queue-6.6/macintosh-therm_windtunnel-fix-module-unload.patch b/queue-6.6/macintosh-therm_windtunnel-fix-module-unload.patch new file mode 100644 index 00000000000..42b57d6d05d --- /dev/null +++ b/queue-6.6/macintosh-therm_windtunnel-fix-module-unload.patch @@ -0,0 +1,48 @@ +From 516783e2568da47fa7f0105be99adf73bd832880 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 10 Jul 2024 23:54:17 -0400 +Subject: macintosh/therm_windtunnel: fix module unload. + +From: Nick Bowler + +[ Upstream commit fd748e177194ebcbbaf98df75152a30e08230cc6 ] + +The of_device_unregister call in therm_windtunnel's module_exit procedure +does not fully reverse the effects of of_platform_device_create in the +module_init prodedure. Once you unload this module, it is impossible +to load it ever again since only the first of_platform_device_create +call on the fan node succeeds. + +This driver predates first git commit, and it turns out back then +of_platform_device_create worked differently than it does today. +So this is actually an old regression. + +The appropriate function to undo of_platform_device_create now appears +to be of_platform_device_destroy, and switching to use this makes it +possible to unload and load the module as expected. + +Signed-off-by: Nick Bowler +Fixes: c6e126de43e7 ("of: Keep track of populated platform devices") +Signed-off-by: Michael Ellerman +Link: https://msgid.link/20240711035428.16696-1-nbowler@draconx.ca +Signed-off-by: Sasha Levin +--- + drivers/macintosh/therm_windtunnel.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/macintosh/therm_windtunnel.c b/drivers/macintosh/therm_windtunnel.c +index 3c1b29476ce24..5c001105cdd9e 100644 +--- a/drivers/macintosh/therm_windtunnel.c ++++ b/drivers/macintosh/therm_windtunnel.c +@@ -551,7 +551,7 @@ g4fan_exit( void ) + platform_driver_unregister( &therm_of_driver ); + + if( x.of_dev ) +- of_device_unregister( x.of_dev ); ++ of_platform_device_destroy(&x.of_dev->dev, NULL); + } + + module_init(g4fan_init); +-- +2.43.0 + diff --git a/queue-6.6/md-don-t-wait-for-md_recovery_needed-for-hot_remove_.patch b/queue-6.6/md-don-t-wait-for-md_recovery_needed-for-hot_remove_.patch new file mode 100644 index 00000000000..5b73e7735bc --- /dev/null +++ b/queue-6.6/md-don-t-wait-for-md_recovery_needed-for-hot_remove_.patch @@ -0,0 +1,57 @@ +From 401d4997b93b04f3d421940a9031260756f66db1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 27 Jun 2024 19:23:21 +0800 +Subject: md: Don't wait for MD_RECOVERY_NEEDED for HOT_REMOVE_DISK ioctl + +From: Yu Kuai + +[ Upstream commit a1fd37f97808db4fa1bf55da0275790c42521e45 ] + +Commit 90f5f7ad4f38 ("md: Wait for md_check_recovery before attempting +device removal.") explained in the commit message that failed device +must be reomoved from the personality first by md_check_recovery(), +before it can be removed from the array. That's the reason the commit +add the code to wait for MD_RECOVERY_NEEDED. + +However, this is not the case now, because remove_and_add_spares() is +called directly from hot_remove_disk() from ioctl path, hence failed +device(marked faulty) can be removed from the personality by ioctl. + +On the other hand, the commit introduced a performance problem that +if MD_RECOVERY_NEEDED is set and the array is not running, ioctl will +wait for 5s before it can return failure to user. + +Since the waiting is not needed now, fix the problem by removing the +waiting. + +Fixes: 90f5f7ad4f38 ("md: Wait for md_check_recovery before attempting device removal.") +Reported-by: Mateusz Kusiak +Closes: https://lore.kernel.org/all/814ff6ee-47a2-4ba0-963e-cf256ee4ecfa@linux.intel.com/ +Signed-off-by: Yu Kuai +Signed-off-by: Song Liu +Link: https://lore.kernel.org/r/20240627112321.3044744-1-yukuai1@huaweicloud.com +Signed-off-by: Sasha Levin +--- + drivers/md/md.c | 6 ------ + 1 file changed, 6 deletions(-) + +diff --git a/drivers/md/md.c b/drivers/md/md.c +index ba732b1d00b5b..b5dea664f946d 100644 +--- a/drivers/md/md.c ++++ b/drivers/md/md.c +@@ -7684,12 +7684,6 @@ static int md_ioctl(struct block_device *bdev, blk_mode_t mode, + + } + +- if (cmd == HOT_REMOVE_DISK) +- /* need to ensure recovery thread has run */ +- wait_event_interruptible_timeout(mddev->sb_wait, +- !test_bit(MD_RECOVERY_NEEDED, +- &mddev->recovery), +- msecs_to_jiffies(5000)); + if (cmd == STOP_ARRAY || cmd == STOP_ARRAY_RO) { + /* Need to flush page cache, and ensure no-one else opens + * and writes +-- +2.43.0 + diff --git a/queue-6.6/md-fix-deadlock-between-mddev_suspend-and-flush-bio.patch b/queue-6.6/md-fix-deadlock-between-mddev_suspend-and-flush-bio.patch new file mode 100644 index 00000000000..50c56e9ae95 --- /dev/null +++ b/queue-6.6/md-fix-deadlock-between-mddev_suspend-and-flush-bio.patch @@ -0,0 +1,144 @@ +From 9eea98ba01766ef69666c102f43a9be5f9b75571 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 26 May 2024 02:52:57 +0800 +Subject: md: fix deadlock between mddev_suspend and flush bio + +From: Li Nan + +[ Upstream commit 611d5cbc0b35a752e657a83eebadf40d814d006b ] + +Deadlock occurs when mddev is being suspended while some flush bio is in +progress. It is a complex issue. + +T1. the first flush is at the ending stage, it clears 'mddev->flush_bio' + and tries to submit data, but is blocked because mddev is suspended + by T4. +T2. the second flush sets 'mddev->flush_bio', and attempts to queue + md_submit_flush_data(), which is already running (T1) and won't + execute again if on the same CPU as T1. +T3. the third flush inc active_io and tries to flush, but is blocked because + 'mddev->flush_bio' is not NULL (set by T2). +T4. mddev_suspend() is called and waits for active_io dec to 0 which is inc + by T3. + + T1 T2 T3 T4 + (flush 1) (flush 2) (third 3) (suspend) + md_submit_flush_data + mddev->flush_bio = NULL; + . + . md_flush_request + . mddev->flush_bio = bio + . queue submit_flushes + . . + . . md_handle_request + . . active_io + 1 + . . md_flush_request + . . wait !mddev->flush_bio + . . + . . mddev_suspend + . . wait !active_io + . . + . submit_flushes + . queue_work md_submit_flush_data + . //md_submit_flush_data is already running (T1) + . + md_handle_request + wait resume + +The root issue is non-atomic inc/dec of active_io during flush process. +active_io is dec before md_submit_flush_data is queued, and inc soon +after md_submit_flush_data() run. + md_flush_request + active_io + 1 + submit_flushes + active_io - 1 + md_submit_flush_data + md_handle_request + active_io + 1 + make_request + active_io - 1 + +If active_io is dec after md_handle_request() instead of within +submit_flushes(), make_request() can be called directly intead of +md_handle_request() in md_submit_flush_data(), and active_io will +only inc and dec once in the whole flush process. Deadlock will be +fixed. + +Additionally, the only difference between fixing the issue and before is +that there is no return error handling of make_request(). But after +previous patch cleaned md_write_start(), make_requst() only return error +in raid5_make_request() by dm-raid, see commit 41425f96d7aa ("dm-raid456, +md/raid456: fix a deadlock for dm-raid456 while io concurrent with +reshape)". Since dm always splits data and flush operation into two +separate io, io size of flush submitted by dm always is 0, make_request() +will not be called in md_submit_flush_data(). To prevent future +modifications from introducing issues, add WARN_ON to ensure +make_request() no error is returned in this context. + +Fixes: fa2bbff7b0b4 ("md: synchronize flush io with array reconfiguration") +Signed-off-by: Li Nan +Signed-off-by: Song Liu +Link: https://lore.kernel.org/r/20240525185257.3896201-3-linan666@huaweicloud.com +Signed-off-by: Sasha Levin +--- + drivers/md/md.c | 26 +++++++++++++++----------- + 1 file changed, 15 insertions(+), 11 deletions(-) + +diff --git a/drivers/md/md.c b/drivers/md/md.c +index e4d3741234d90..ba732b1d00b5b 100644 +--- a/drivers/md/md.c ++++ b/drivers/md/md.c +@@ -493,13 +493,9 @@ static void md_end_flush(struct bio *bio) + + rdev_dec_pending(rdev, mddev); + +- if (atomic_dec_and_test(&mddev->flush_pending)) { +- /* The pair is percpu_ref_get() from md_flush_request() */ +- percpu_ref_put(&mddev->active_io); +- ++ if (atomic_dec_and_test(&mddev->flush_pending)) + /* The pre-request flush has finished */ + queue_work(md_wq, &mddev->flush_work); +- } + } + + static void md_submit_flush_data(struct work_struct *ws); +@@ -530,12 +526,8 @@ static void submit_flushes(struct work_struct *ws) + rcu_read_lock(); + } + rcu_read_unlock(); +- if (atomic_dec_and_test(&mddev->flush_pending)) { +- /* The pair is percpu_ref_get() from md_flush_request() */ +- percpu_ref_put(&mddev->active_io); +- ++ if (atomic_dec_and_test(&mddev->flush_pending)) + queue_work(md_wq, &mddev->flush_work); +- } + } + + static void md_submit_flush_data(struct work_struct *ws) +@@ -560,8 +552,20 @@ static void md_submit_flush_data(struct work_struct *ws) + bio_endio(bio); + } else { + bio->bi_opf &= ~REQ_PREFLUSH; +- md_handle_request(mddev, bio); ++ ++ /* ++ * make_requst() will never return error here, it only ++ * returns error in raid5_make_request() by dm-raid. ++ * Since dm always splits data and flush operation into ++ * two separate io, io size of flush submitted by dm ++ * always is 0, make_request() will not be called here. ++ */ ++ if (WARN_ON_ONCE(!mddev->pers->make_request(mddev, bio))) ++ bio_io_error(bio);; + } ++ ++ /* The pair is percpu_ref_get() from md_flush_request() */ ++ percpu_ref_put(&mddev->active_io); + } + + /* +-- +2.43.0 + diff --git a/queue-6.6/media-dvb-usb-fix-unexpected-infinite-loop-in-dvb_us.patch b/queue-6.6/media-dvb-usb-fix-unexpected-infinite-loop-in-dvb_us.patch new file mode 100644 index 00000000000..43d98a65a46 --- /dev/null +++ b/queue-6.6/media-dvb-usb-fix-unexpected-infinite-loop-in-dvb_us.patch @@ -0,0 +1,144 @@ +From 01490813195150e0029e3a6fe83ae0d87dd90dd6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 9 May 2024 20:44:14 +0800 +Subject: media: dvb-usb: Fix unexpected infinite loop in + dvb_usb_read_remote_control() + +From: Zheng Yejian + +[ Upstream commit 2052138b7da52ad5ccaf74f736d00f39a1c9198c ] + +Infinite log printing occurs during fuzz test: + + rc rc1: DViCO FusionHDTV DVB-T USB (LGZ201) as ... + ... + dvb-usb: schedule remote query interval to 100 msecs. + dvb-usb: DViCO FusionHDTV DVB-T USB (LGZ201) successfully initialized ... + dvb-usb: bulk message failed: -22 (1/0) + dvb-usb: bulk message failed: -22 (1/0) + dvb-usb: bulk message failed: -22 (1/0) + ... + dvb-usb: bulk message failed: -22 (1/0) + +Looking into the codes, there is a loop in dvb_usb_read_remote_control(), +that is in rc_core_dvb_usb_remote_init() create a work that will call +dvb_usb_read_remote_control(), and this work will reschedule itself at +'rc_interval' intervals to recursively call dvb_usb_read_remote_control(), +see following code snippet: + + rc_core_dvb_usb_remote_init() { + ... + INIT_DELAYED_WORK(&d->rc_query_work, dvb_usb_read_remote_control); + schedule_delayed_work(&d->rc_query_work, + msecs_to_jiffies(rc_interval)); + ... + } + + dvb_usb_read_remote_control() { + ... + err = d->props.rc.core.rc_query(d); + if (err) + err(...) // Did not return even if query failed + schedule_delayed_work(&d->rc_query_work, + msecs_to_jiffies(rc_interval)); + } + +When the infinite log printing occurs, the query callback +'d->props.rc.core.rc_query' is cxusb_rc_query(). And the log is due to +the failure of finding a valid 'generic_bulk_ctrl_endpoint' +in usb_bulk_msg(), see following code snippet: + + cxusb_rc_query() { + cxusb_ctrl_msg() { + dvb_usb_generic_rw() { + ret = usb_bulk_msg(d->udev, usb_sndbulkpipe(d->udev, + d->props.generic_bulk_ctrl_endpoint),...); + if (ret) + err("bulk message failed: %d (%d/%d)",ret,wlen,actlen); + ... + } + ... + } + +By analyzing the corresponding USB descriptor, it shows that the +bNumEndpoints is 0 in its interface descriptor, but +the 'generic_bulk_ctrl_endpoint' is 1, that means user don't configure +a valid endpoint for 'generic_bulk_ctrl_endpoint', therefore this +'invalid' USB device should be rejected before it calls into +dvb_usb_read_remote_control(). + +To fix it, we need to add endpoint check for 'generic_bulk_ctrl_endpoint'. +And as Sean suggested, the same check and clear halts should be done for +'generic_bulk_ctrl_endpoint_response'. So introduce +dvb_usb_check_bulk_endpoint() to do it for both of them. + +Fixes: 4d43e13f723e ("V4L/DVB (4643): Multi-input patch for DVB-USB device") +Signed-off-by: Zheng Yejian +Signed-off-by: Sean Young +Signed-off-by: Hans Verkuil +Signed-off-by: Sasha Levin +--- + drivers/media/usb/dvb-usb/dvb-usb-init.c | 35 +++++++++++++++++++++--- + 1 file changed, 31 insertions(+), 4 deletions(-) + +diff --git a/drivers/media/usb/dvb-usb/dvb-usb-init.c b/drivers/media/usb/dvb-usb/dvb-usb-init.c +index fbf58012becdf..22d83ac18eb73 100644 +--- a/drivers/media/usb/dvb-usb/dvb-usb-init.c ++++ b/drivers/media/usb/dvb-usb/dvb-usb-init.c +@@ -23,11 +23,40 @@ static int dvb_usb_force_pid_filter_usage; + module_param_named(force_pid_filter_usage, dvb_usb_force_pid_filter_usage, int, 0444); + MODULE_PARM_DESC(force_pid_filter_usage, "force all dvb-usb-devices to use a PID filter, if any (default: 0)."); + ++static int dvb_usb_check_bulk_endpoint(struct dvb_usb_device *d, u8 endpoint) ++{ ++ if (endpoint) { ++ int ret; ++ ++ ret = usb_pipe_type_check(d->udev, usb_sndbulkpipe(d->udev, endpoint)); ++ if (ret) ++ return ret; ++ ret = usb_pipe_type_check(d->udev, usb_rcvbulkpipe(d->udev, endpoint)); ++ if (ret) ++ return ret; ++ } ++ return 0; ++} ++ ++static void dvb_usb_clear_halt(struct dvb_usb_device *d, u8 endpoint) ++{ ++ if (endpoint) { ++ usb_clear_halt(d->udev, usb_sndbulkpipe(d->udev, endpoint)); ++ usb_clear_halt(d->udev, usb_rcvbulkpipe(d->udev, endpoint)); ++ } ++} ++ + static int dvb_usb_adapter_init(struct dvb_usb_device *d, short *adapter_nrs) + { + struct dvb_usb_adapter *adap; + int ret, n, o; + ++ ret = dvb_usb_check_bulk_endpoint(d, d->props.generic_bulk_ctrl_endpoint); ++ if (ret) ++ return ret; ++ ret = dvb_usb_check_bulk_endpoint(d, d->props.generic_bulk_ctrl_endpoint_response); ++ if (ret) ++ return ret; + for (n = 0; n < d->props.num_adapters; n++) { + adap = &d->adapter[n]; + adap->dev = d; +@@ -103,10 +132,8 @@ static int dvb_usb_adapter_init(struct dvb_usb_device *d, short *adapter_nrs) + * when reloading the driver w/o replugging the device + * sometimes a timeout occurs, this helps + */ +- if (d->props.generic_bulk_ctrl_endpoint != 0) { +- usb_clear_halt(d->udev, usb_sndbulkpipe(d->udev, d->props.generic_bulk_ctrl_endpoint)); +- usb_clear_halt(d->udev, usb_rcvbulkpipe(d->udev, d->props.generic_bulk_ctrl_endpoint)); +- } ++ dvb_usb_clear_halt(d, d->props.generic_bulk_ctrl_endpoint); ++ dvb_usb_clear_halt(d, d->props.generic_bulk_ctrl_endpoint_response); + + return 0; + +-- +2.43.0 + diff --git a/queue-6.6/media-i2c-fix-imx412-exposure-control.patch b/queue-6.6/media-i2c-fix-imx412-exposure-control.patch new file mode 100644 index 00000000000..a8424baf517 --- /dev/null +++ b/queue-6.6/media-i2c-fix-imx412-exposure-control.patch @@ -0,0 +1,97 @@ +From 0b45be38a913ed4f57e74889b9b0ab54239caaa9 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 9 May 2024 13:53:07 +0100 +Subject: media: i2c: Fix imx412 exposure control + +From: Bryan O'Donoghue + +[ Upstream commit a1956bf53a2774014ee1768b484af2c38c633a25 ] + +Currently we have the following algorithm to calculate what value should be +written to the exposure control of imx412. + +lpfr = imx412->vblank + imx412->cur_mode->height; +shutter = lpfr - exposure; + +The 'shutter' value is given to IMX412_REG_EXPOSURE_CIT however, the above +algorithm will result in the value given to IMX412_REG_EXPOSURE_CIT +decreasing as the requested exposure value from user-space goes up. + +e.g. +[ 2255.713989] imx412 20-001a: Received exp 1608, analog gain 0 +[ 2255.714002] imx412 20-001a: Set exp 1608, analog gain 0, shutter 1938, lpfr 3546 +[ 2256.302770] imx412 20-001a: Received exp 2586, analog gain 100 +[ 2256.302800] imx412 20-001a: Set exp 2586, analog gain 100, shutter 960, lpfr 3546 +[ 2256.753755] imx412 20-001a: Received exp 3524, analog gain 110 +[ 2256.753772] imx412 20-001a: Set exp 3524, analog gain 110, shutter 22, lpfr 3546 + +This behaviour results in the image having less exposure as the requested +exposure value from user-space increases. + +Other sensor drivers such as ov5675, imx218, hid556 and others take the +requested exposure value and use the value directly. + +Take the example of the above cited sensor drivers and directly apply the +requested exposure value from user-space. The 'lpfr' variable still +functions as before but the 'shutter' variable can be dispensed with as a +result. + +Once done a similar run of the test application requesting higher exposure +looks like this, with 'exp' written directly to the sensor. + +[ 133.207884] imx412 20-001a: Received exp 1608, analog gain 0 +[ 133.207899] imx412 20-001a: Set exp 1608, analog gain 0, lpfr 3546 +[ 133.905309] imx412 20-001a: Received exp 2844, analog gain 100 +[ 133.905344] imx412 20-001a: Set exp 2844, analog gain 100, lpfr 3546 +[ 134.241705] imx412 20-001a: Received exp 3524, analog gain 110 +[ 134.241775] imx412 20-001a: Set exp 3524, analog gain 110, lpfr 3546 + +The result is then setting the sensor exposure to lower values results in +darker, less exposure images and vice versa with higher exposure values. + +Fixes: 9214e86c0cc1 ("media: i2c: Add imx412 camera sensor driver") +Tested-by: Bryan O'Donoghue # qrb5165-rb5/imx577 +Reviewed-by: Jacopo Mondi +Reviewed-by: Gjorgji Rosikopulos +Signed-off-by: Bryan O'Donoghue +Signed-off-by: Sakari Ailus +Signed-off-by: Hans Verkuil +Signed-off-by: Sasha Levin +--- + drivers/media/i2c/imx412.c | 9 ++++----- + 1 file changed, 4 insertions(+), 5 deletions(-) + +diff --git a/drivers/media/i2c/imx412.c b/drivers/media/i2c/imx412.c +index c7e862ae4040f..8597f98a8dcf8 100644 +--- a/drivers/media/i2c/imx412.c ++++ b/drivers/media/i2c/imx412.c +@@ -544,14 +544,13 @@ static int imx412_update_controls(struct imx412 *imx412, + */ + static int imx412_update_exp_gain(struct imx412 *imx412, u32 exposure, u32 gain) + { +- u32 lpfr, shutter; ++ u32 lpfr; + int ret; + + lpfr = imx412->vblank + imx412->cur_mode->height; +- shutter = lpfr - exposure; + +- dev_dbg(imx412->dev, "Set exp %u, analog gain %u, shutter %u, lpfr %u", +- exposure, gain, shutter, lpfr); ++ dev_dbg(imx412->dev, "Set exp %u, analog gain %u, lpfr %u", ++ exposure, gain, lpfr); + + ret = imx412_write_reg(imx412, IMX412_REG_HOLD, 1, 1); + if (ret) +@@ -561,7 +560,7 @@ static int imx412_update_exp_gain(struct imx412 *imx412, u32 exposure, u32 gain) + if (ret) + goto error_release_group_hold; + +- ret = imx412_write_reg(imx412, IMX412_REG_EXPOSURE_CIT, 2, shutter); ++ ret = imx412_write_reg(imx412, IMX412_REG_EXPOSURE_CIT, 2, exposure); + if (ret) + goto error_release_group_hold; + +-- +2.43.0 + diff --git a/queue-6.6/media-i2c-imx219-fix-msr-access-command-sequence.patch b/queue-6.6/media-i2c-imx219-fix-msr-access-command-sequence.patch new file mode 100644 index 00000000000..dcd2f4fddd1 --- /dev/null +++ b/queue-6.6/media-i2c-imx219-fix-msr-access-command-sequence.patch @@ -0,0 +1,59 @@ +From 8175b79c3cd65f51f981a9d2f36fe7c1ba5b6ea5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 7 Jun 2024 16:50:23 +0100 +Subject: media: i2c: imx219: fix msr access command sequence + +From: Conor Dooley + +[ Upstream commit 3cdc776e0a5f1784c3ae5d3371b64215c228bf1f ] + +It was reported to me that the imx219 didn't work on one of our +development kits partly because the access sequence is incorrect. +The datasheet I could find [1] for this camera has the access sequence: +Seq. No. Address (Hex) data +1 30EB 05 +2 30EB 0C +3 300A FF +4 300B FF +5 30EB 05 +6 30EB 09 + +but the driver swaps the first two elements. Laurent pointed out on IRC +that the original code used the correct sequence for 1920x1080 but the +current sequence for 3280x2464 and 1640x1232. During refactoring of the +init sequence the current order was used for all formats. + +Switch to using the documented sequence. + +Link: https://www.opensourceinstruments.com/Electronics/Data/IMX219PQ.pdf [1] +Fixes: 8508455961d5 ("media: i2c: imx219: Split common registers from mode tables") +Fixes: 1283b3b8f82b ("media: i2c: Add driver for Sony IMX219 sensor") +Signed-off-by: Conor Dooley +Reviewed-by: Dave Stevenson +Tested-by: Dave Stevenson +Reviewed-by: Laurent Pinchart +Tested-by: Adam Ford #imx8mp-beacon-kit +Signed-off-by: Sakari Ailus +Signed-off-by: Hans Verkuil +Signed-off-by: Sasha Levin +--- + drivers/media/i2c/imx219.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/media/i2c/imx219.c b/drivers/media/i2c/imx219.c +index 3afa3f79c8a26..a9a8cd148f4fc 100644 +--- a/drivers/media/i2c/imx219.c ++++ b/drivers/media/i2c/imx219.c +@@ -188,8 +188,8 @@ static const struct cci_reg_sequence imx219_common_regs[] = { + { IMX219_REG_MODE_SELECT, 0x00 }, /* Mode Select */ + + /* To Access Addresses 3000-5fff, send the following commands */ +- { CCI_REG8(0x30eb), 0x0c }, + { CCI_REG8(0x30eb), 0x05 }, ++ { CCI_REG8(0x30eb), 0x0c }, + { CCI_REG8(0x300a), 0xff }, + { CCI_REG8(0x300b), 0xff }, + { CCI_REG8(0x30eb), 0x05 }, +-- +2.43.0 + diff --git a/queue-6.6/media-imon-fix-race-getting-ictx-lock.patch b/queue-6.6/media-imon-fix-race-getting-ictx-lock.patch new file mode 100644 index 00000000000..5bd3775df2a --- /dev/null +++ b/queue-6.6/media-imon-fix-race-getting-ictx-lock.patch @@ -0,0 +1,51 @@ +From 4f895186bb031911e76c3fed4a22c88bd1645c47 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 6 May 2024 21:10:27 +0000 +Subject: media: imon: Fix race getting ictx->lock + +From: Ricardo Ribalda + +[ Upstream commit 24147897507cd3a7d63745d1518a638bf4132238 ] + +Lets fix a race between mutex_is_lock() and mutex_lock(). + +<-mutex is not locked +if (!mutex_is_locked(&ictx->lock)) { + unlock = true; <- mutex is locked externaly + mutex_lock(&ictx->lock); +} + +Let's use mutex_trylock() that does mutex_is_lock() and mutex_lock() +atomically. + +Fix the following cocci warning: +drivers/media/rc/imon.c:1167:1-7: preceding lock on line 1153 + +Fixes: 23ef710e1a6c ("[media] imon: add conditional locking in change_protocol") +Signed-off-by: Ricardo Ribalda +Signed-off-by: Sean Young +Signed-off-by: Hans Verkuil +Signed-off-by: Sasha Levin +--- + drivers/media/rc/imon.c | 5 +---- + 1 file changed, 1 insertion(+), 4 deletions(-) + +diff --git a/drivers/media/rc/imon.c b/drivers/media/rc/imon.c +index 5719dda6e0f0e..e5590a708f1c5 100644 +--- a/drivers/media/rc/imon.c ++++ b/drivers/media/rc/imon.c +@@ -1148,10 +1148,7 @@ static int imon_ir_change_protocol(struct rc_dev *rc, u64 *rc_proto) + + memcpy(ictx->usb_tx_buf, &ir_proto_packet, sizeof(ir_proto_packet)); + +- if (!mutex_is_locked(&ictx->lock)) { +- unlock = true; +- mutex_lock(&ictx->lock); +- } ++ unlock = mutex_trylock(&ictx->lock); + + retval = send_packet(ictx); + if (retval) +-- +2.43.0 + diff --git a/queue-6.6/media-imx-jpeg-drop-initial-source-change-event-if-c.patch b/queue-6.6/media-imx-jpeg-drop-initial-source-change-event-if-c.patch new file mode 100644 index 00000000000..fb622a07b8c --- /dev/null +++ b/queue-6.6/media-imx-jpeg-drop-initial-source-change-event-if-c.patch @@ -0,0 +1,43 @@ +From 6517d26f9f0213b9d798456ae83a1f7d2e27698a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 19 Oct 2023 16:36:36 +0800 +Subject: media: imx-jpeg: Drop initial source change event if capture has been + setup + +From: Ming Qian + +[ Upstream commit a8fb5fce7a441d37d106c82235e1f1b57f70f5b9 ] + +In section 4.5.1.5. Initialization, the step 4 may be skipped and +continue with the Capture Setup sequence, so if the capture has been +setup, there is no need to trigger the initial source change event, just +start decoding, and follow the dynamic resolution change flow if the +configured values do not match those parsed by the decoder. + +And it won't fail the gstreamer pipeline. + +Fixes: b833b178498d ("media: imx-jpeg: notify source chagne event when the first picture parsed") +Signed-off-by: Ming Qian +Signed-off-by: Hans Verkuil +Signed-off-by: Sasha Levin +--- + drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c b/drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c +index 0c8b204535ffc..2007152cd7a40 100644 +--- a/drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c ++++ b/drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c +@@ -1632,6 +1632,9 @@ static int mxc_jpeg_start_streaming(struct vb2_queue *q, unsigned int count) + dev_dbg(ctx->mxc_jpeg->dev, "Start streaming ctx=%p", ctx); + q_data->sequence = 0; + ++ if (V4L2_TYPE_IS_CAPTURE(q->type)) ++ ctx->need_initial_source_change_evt = false; ++ + ret = pm_runtime_resume_and_get(ctx->mxc_jpeg->dev); + if (ret < 0) { + dev_err(ctx->mxc_jpeg->dev, "Failed to power up jpeg\n"); +-- +2.43.0 + diff --git a/queue-6.6/media-mediatek-vcodec-handle-invalid-decoder-vsi.patch b/queue-6.6/media-mediatek-vcodec-handle-invalid-decoder-vsi.patch new file mode 100644 index 00000000000..33619efabb2 --- /dev/null +++ b/queue-6.6/media-mediatek-vcodec-handle-invalid-decoder-vsi.patch @@ -0,0 +1,43 @@ +From 837389c5a2050e973b8c7a5b6ae347f42f082b9d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 21 Mar 2024 09:47:54 +0800 +Subject: media: mediatek: vcodec: Handle invalid decoder vsi + +From: Irui Wang + +[ Upstream commit 59d438f8e02ca641c58d77e1feffa000ff809e9f ] + +Handle an invalid decoder vsi in vpu_dec_init to ensure the decoder vsi +is valid for future use. + +Fixes: 590577a4e525 ("[media] vcodec: mediatek: Add Mediatek V4L2 Video Decoder Driver") + +Signed-off-by: Irui Wang +Reviewed-by: AngeloGioacchino Del Regno +Signed-off-by: Sebastian Fricke +Signed-off-by: Hans Verkuil +Signed-off-by: Sasha Levin +--- + .../media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c b/drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c +index da6be556727bb..145958206e38a 100644 +--- a/drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c ++++ b/drivers/media/platform/mediatek/vcodec/decoder/vdec_vpu_if.c +@@ -233,6 +233,12 @@ int vpu_dec_init(struct vdec_vpu_inst *vpu) + mtk_vdec_debug(vpu->ctx, "vdec_inst=%p", vpu); + + err = vcodec_vpu_send_msg(vpu, (void *)&msg, sizeof(msg)); ++ ++ if (IS_ERR_OR_NULL(vpu->vsi)) { ++ mtk_vdec_err(vpu->ctx, "invalid vdec vsi, status=%d", err); ++ return -EINVAL; ++ } ++ + mtk_vdec_debug(vpu->ctx, "- ret=%d", err); + return err; + } +-- +2.43.0 + diff --git a/queue-6.6/media-pci-ivtv-add-check-for-dma-map-result.patch b/queue-6.6/media-pci-ivtv-add-check-for-dma-map-result.patch new file mode 100644 index 00000000000..116f091f983 --- /dev/null +++ b/queue-6.6/media-pci-ivtv-add-check-for-dma-map-result.patch @@ -0,0 +1,91 @@ +From 0c6620b2eaea9cad79b7ea78143e632812a48200 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 28 Mar 2024 02:32:23 +0300 +Subject: media: pci: ivtv: Add check for DMA map result + +From: Mikhail Kobuk + +[ Upstream commit 629913d6d79508b166c66e07e4857e20233d85a9 ] + +In case DMA fails, 'dma->SG_length' is 0. This value is later used to +access 'dma->SGarray[dma->SG_length - 1]', which will cause out of +bounds access. + +Add check to return early on invalid value. Adjust warnings accordingly. + +Found by Linux Verification Center (linuxtesting.org) with SVACE. + +Fixes: 1932dc2f4cf6 ("media: pci/ivtv: switch from 'pci_' to 'dma_' API") +Signed-off-by: Mikhail Kobuk +Signed-off-by: Hans Verkuil +Signed-off-by: Sasha Levin +--- + drivers/media/pci/ivtv/ivtv-udma.c | 8 ++++++++ + drivers/media/pci/ivtv/ivtv-yuv.c | 6 ++++++ + drivers/media/pci/ivtv/ivtvfb.c | 6 +++--- + 3 files changed, 17 insertions(+), 3 deletions(-) + +diff --git a/drivers/media/pci/ivtv/ivtv-udma.c b/drivers/media/pci/ivtv/ivtv-udma.c +index 99b9f55ca8292..f467a00492f4b 100644 +--- a/drivers/media/pci/ivtv/ivtv-udma.c ++++ b/drivers/media/pci/ivtv/ivtv-udma.c +@@ -131,6 +131,8 @@ int ivtv_udma_setup(struct ivtv *itv, unsigned long ivtv_dest_addr, + + /* Fill SG List with new values */ + if (ivtv_udma_fill_sg_list(dma, &user_dma, 0) < 0) { ++ IVTV_DEBUG_WARN("%s: could not allocate bounce buffers for highmem userspace buffers\n", ++ __func__); + unpin_user_pages(dma->map, dma->page_count); + dma->page_count = 0; + return -ENOMEM; +@@ -139,6 +141,12 @@ int ivtv_udma_setup(struct ivtv *itv, unsigned long ivtv_dest_addr, + /* Map SG List */ + dma->SG_length = dma_map_sg(&itv->pdev->dev, dma->SGlist, + dma->page_count, DMA_TO_DEVICE); ++ if (!dma->SG_length) { ++ IVTV_DEBUG_WARN("%s: DMA map error, SG_length is 0\n", __func__); ++ unpin_user_pages(dma->map, dma->page_count); ++ dma->page_count = 0; ++ return -EINVAL; ++ } + + /* Fill SG Array with new values */ + ivtv_udma_fill_sg_array (dma, ivtv_dest_addr, 0, -1); +diff --git a/drivers/media/pci/ivtv/ivtv-yuv.c b/drivers/media/pci/ivtv/ivtv-yuv.c +index 582146f8d70d5..2d9274537725a 100644 +--- a/drivers/media/pci/ivtv/ivtv-yuv.c ++++ b/drivers/media/pci/ivtv/ivtv-yuv.c +@@ -114,6 +114,12 @@ static int ivtv_yuv_prep_user_dma(struct ivtv *itv, struct ivtv_user_dma *dma, + } + dma->SG_length = dma_map_sg(&itv->pdev->dev, dma->SGlist, + dma->page_count, DMA_TO_DEVICE); ++ if (!dma->SG_length) { ++ IVTV_DEBUG_WARN("%s: DMA map error, SG_length is 0\n", __func__); ++ unpin_user_pages(dma->map, dma->page_count); ++ dma->page_count = 0; ++ return -EINVAL; ++ } + + /* Fill SG Array with new values */ + ivtv_udma_fill_sg_array(dma, y_buffer_offset, uv_buffer_offset, y_size); +diff --git a/drivers/media/pci/ivtv/ivtvfb.c b/drivers/media/pci/ivtv/ivtvfb.c +index 23c8c094e791b..9cdd14a3033c9 100644 +--- a/drivers/media/pci/ivtv/ivtvfb.c ++++ b/drivers/media/pci/ivtv/ivtvfb.c +@@ -281,10 +281,10 @@ static int ivtvfb_prep_dec_dma_to_device(struct ivtv *itv, + /* Map User DMA */ + if (ivtv_udma_setup(itv, ivtv_dest_addr, userbuf, size_in_bytes) <= 0) { + mutex_unlock(&itv->udma.lock); +- IVTVFB_WARN("ivtvfb_prep_dec_dma_to_device, Error with pin_user_pages: %d bytes, %d pages returned\n", +- size_in_bytes, itv->udma.page_count); ++ IVTVFB_WARN("%s, Error in ivtv_udma_setup: %d bytes, %d pages returned\n", ++ __func__, size_in_bytes, itv->udma.page_count); + +- /* pin_user_pages must have failed completely */ ++ /* pin_user_pages or DMA must have failed completely */ + return -EIO; + } + +-- +2.43.0 + diff --git a/queue-6.6/media-rcar-csi2-cleanup-subdevice-in-remove.patch b/queue-6.6/media-rcar-csi2-cleanup-subdevice-in-remove.patch new file mode 100644 index 00000000000..bbf1b01cb97 --- /dev/null +++ b/queue-6.6/media-rcar-csi2-cleanup-subdevice-in-remove.patch @@ -0,0 +1,43 @@ +From f2cd73d873d3ddc780be28a41293ecaae1f4752d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Jun 2024 18:11:26 +0200 +Subject: media: rcar-csi2: Cleanup subdevice in remove() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Jacopo Mondi + +[ Upstream commit f6d64d0d2897ed4e85ac00afe43e45c8b8fc0c44 ] + +Cleanup the V4L2 subdevice in the driver's remove function to +ensure its async connection are freed, and guarantee in future that +the subdev active state is cleaned up. + +Fixes: 769afd212b16 ("media: rcar-csi2: add Renesas R-Car MIPI CSI-2 receiver driver") +Signed-off-by: Jacopo Mondi +Reviewed-by: Laurent Pinchart +Reviewed-by: Niklas Söderlund +Tested-by: Niklas Söderlund +Link: https://lore.kernel.org/r/20240617161135.130719-4-jacopo.mondi@ideasonboard.com +Signed-off-by: Laurent Pinchart +Signed-off-by: Sasha Levin +--- + drivers/media/platform/renesas/rcar-vin/rcar-csi2.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/media/platform/renesas/rcar-vin/rcar-csi2.c b/drivers/media/platform/renesas/rcar-vin/rcar-csi2.c +index 2fc15882a6976..109cca91f733a 100644 +--- a/drivers/media/platform/renesas/rcar-vin/rcar-csi2.c ++++ b/drivers/media/platform/renesas/rcar-vin/rcar-csi2.c +@@ -1938,6 +1938,7 @@ static void rcsi2_remove(struct platform_device *pdev) + v4l2_async_nf_unregister(&priv->notifier); + v4l2_async_nf_cleanup(&priv->notifier); + v4l2_async_unregister_subdev(&priv->subdev); ++ v4l2_subdev_cleanup(&priv->subdev); + + pm_runtime_disable(&pdev->dev); + +-- +2.43.0 + diff --git a/queue-6.6/media-rcar-csi2-disable-runtime_pm-in-probe-error.patch b/queue-6.6/media-rcar-csi2-disable-runtime_pm-in-probe-error.patch new file mode 100644 index 00000000000..46e0cd2e284 --- /dev/null +++ b/queue-6.6/media-rcar-csi2-disable-runtime_pm-in-probe-error.patch @@ -0,0 +1,49 @@ +From 26d43a0e87b0fbb5075c5dcfea20ea049699ddf2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Jun 2024 18:11:25 +0200 +Subject: media: rcar-csi2: Disable runtime_pm in probe error +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Jacopo Mondi + +[ Upstream commit e306183628f7c2e95f9bf853d8fcb86288f606de ] + +Disable pm_runtime in the probe() function error path. + +Fixes: 769afd212b16 ("media: rcar-csi2: add Renesas R-Car MIPI CSI-2 receiver driver") +Signed-off-by: Jacopo Mondi +Reviewed-by: Laurent Pinchart +Reviewed-by: Niklas Söderlund +Tested-by: Niklas Söderlund +Link: https://lore.kernel.org/r/20240617161135.130719-3-jacopo.mondi@ideasonboard.com +Signed-off-by: Laurent Pinchart +Signed-off-by: Sasha Levin +--- + drivers/media/platform/renesas/rcar-vin/rcar-csi2.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/media/platform/renesas/rcar-vin/rcar-csi2.c b/drivers/media/platform/renesas/rcar-vin/rcar-csi2.c +index f6326df0b09be..2fc15882a6976 100644 +--- a/drivers/media/platform/renesas/rcar-vin/rcar-csi2.c ++++ b/drivers/media/platform/renesas/rcar-vin/rcar-csi2.c +@@ -1914,12 +1914,14 @@ static int rcsi2_probe(struct platform_device *pdev) + + ret = v4l2_async_register_subdev(&priv->subdev); + if (ret < 0) +- goto error_async; ++ goto error_pm_runtime; + + dev_info(priv->dev, "%d lanes found\n", priv->lanes); + + return 0; + ++error_pm_runtime: ++ pm_runtime_disable(&pdev->dev); + error_async: + v4l2_async_nf_unregister(&priv->notifier); + v4l2_async_nf_cleanup(&priv->notifier); +-- +2.43.0 + diff --git a/queue-6.6/media-rcar-vin-fix-yuyv8_1x16-handling-for-csi-2.patch b/queue-6.6/media-rcar-vin-fix-yuyv8_1x16-handling-for-csi-2.patch new file mode 100644 index 00000000000..067b8994122 --- /dev/null +++ b/queue-6.6/media-rcar-vin-fix-yuyv8_1x16-handling-for-csi-2.patch @@ -0,0 +1,71 @@ +From 406e100202ecca5cc9fbf6b3d7ba9ce381260bc7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Jun 2024 18:11:24 +0200 +Subject: media: rcar-vin: Fix YUYV8_1X16 handling for CSI-2 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Jacopo Mondi + +[ Upstream commit 9caf253e8ad6f4c66f5591bac900f9f68b6b6620 ] + +The YUYV8_1X16 and UYVY8_1X16 formats are treated as 'ITU-R +BT.601/BT.1358 16-bit YCbCr-422 input' (YUV16 - 0x5) in the R-Car VIN +driver and are thus disallowed when capturing frames from the R-Car +CSI-2 interface according to the hardware manual. + +As the 1X16 format variants are meant to be used with serial busses they +have to be treated as 'YCbCr-422 8-bit data input' (0x1) when capturing +from CSI-2, which is a valid setting for CSI-2. + +Commit 78b3f9d75a62 ("media: rcar-vin: Add check that input interface +and format are valid") disallowed capturing YUV16 when using the CSI-2 +interface. Fix this by using YUV8_BT601 for YCbCr422 when CSI-2 is in +use. + +Fixes: 78b3f9d75a62 ("media: rcar-vin: Add check that input interface and format are valid") +Signed-off-by: Jacopo Mondi +Reviewed-by: Laurent Pinchart +Reviewed-by: Niklas Söderlund +Tested-by: Niklas Söderlund +Link: https://lore.kernel.org/r/20240617161135.130719-2-jacopo.mondi@ideasonboard.com +Signed-off-by: Laurent Pinchart +Signed-off-by: Sasha Levin +--- + .../media/platform/renesas/rcar-vin/rcar-dma.c | 16 +++++++++++++--- + 1 file changed, 13 insertions(+), 3 deletions(-) + +diff --git a/drivers/media/platform/renesas/rcar-vin/rcar-dma.c b/drivers/media/platform/renesas/rcar-vin/rcar-dma.c +index 2a77353f10b59..bb4774e2f335e 100644 +--- a/drivers/media/platform/renesas/rcar-vin/rcar-dma.c ++++ b/drivers/media/platform/renesas/rcar-vin/rcar-dma.c +@@ -742,12 +742,22 @@ static int rvin_setup(struct rvin_dev *vin) + */ + switch (vin->mbus_code) { + case MEDIA_BUS_FMT_YUYV8_1X16: +- /* BT.601/BT.1358 16bit YCbCr422 */ +- vnmc |= VNMC_INF_YUV16; ++ if (vin->is_csi) ++ /* YCbCr422 8-bit */ ++ vnmc |= VNMC_INF_YUV8_BT601; ++ else ++ /* BT.601/BT.1358 16bit YCbCr422 */ ++ vnmc |= VNMC_INF_YUV16; + input_is_yuv = true; + break; + case MEDIA_BUS_FMT_UYVY8_1X16: +- vnmc |= VNMC_INF_YUV16 | VNMC_YCAL; ++ if (vin->is_csi) ++ /* YCbCr422 8-bit */ ++ vnmc |= VNMC_INF_YUV8_BT601; ++ else ++ /* BT.601/BT.1358 16bit YCbCr422 */ ++ vnmc |= VNMC_INF_YUV16; ++ vnmc |= VNMC_YCAL; + input_is_yuv = true; + break; + case MEDIA_BUS_FMT_UYVY8_2X8: +-- +2.43.0 + diff --git a/queue-6.6/media-renesas-vsp1-fix-_irqsave-and-_irq-mix.patch b/queue-6.6/media-renesas-vsp1-fix-_irqsave-and-_irq-mix.patch new file mode 100644 index 00000000000..e5216c6b00c --- /dev/null +++ b/queue-6.6/media-renesas-vsp1-fix-_irqsave-and-_irq-mix.patch @@ -0,0 +1,117 @@ +From ac7beca1086a7d54763f01f3b1991c0596ee1bfa Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 5 May 2024 20:22:27 +0300 +Subject: media: renesas: vsp1: Fix _irqsave and _irq mix + +From: Laurent Pinchart + +[ Upstream commit 57edbbcf5258c378a9b9d0c80d33b03a010b22c8 ] + +The histogram support mixes _irqsave and _irq, causing the following +smatch warning: + + drivers/media/platform/renesas/vsp1/vsp1_histo.c:153 histo_stop_streaming() + warn: mixing irqsave and irq + +The histo_stop_streaming() calls spin_lock_irqsave() followed by +wait_event_lock_irq(). The former hints that interrupts may be disabled +by the caller, while the latter reenables interrupts unconditionally. +This doesn't cause any real bug, as the function is always called with +interrupts enabled, but the pattern is still incorrect. + +Fix the problem by using spin_lock_irq() instead of spin_lock_irqsave() +in histo_stop_streaming(). While at it, switch to spin_lock_irq() and +spin_lock() as appropriate elsewhere. + +Fixes: 99362e32332b ("[media] v4l: vsp1: Add histogram support") +Reported-by: Dan Carpenter +Closes: https://lore.kernel.org/linux-renesas-soc/164d74ff-312c-468f-be64-afa7182cd2f4@moroto.mountain/ +Reviewed-by: Kieran Bingham +Signed-off-by: Laurent Pinchart +Signed-off-by: Sasha Levin +--- + .../media/platform/renesas/vsp1/vsp1_histo.c | 20 ++++++++----------- + 1 file changed, 8 insertions(+), 12 deletions(-) + +diff --git a/drivers/media/platform/renesas/vsp1/vsp1_histo.c b/drivers/media/platform/renesas/vsp1/vsp1_histo.c +index f22449dd654cb..c0f1002f4ecf1 100644 +--- a/drivers/media/platform/renesas/vsp1/vsp1_histo.c ++++ b/drivers/media/platform/renesas/vsp1/vsp1_histo.c +@@ -36,9 +36,8 @@ struct vsp1_histogram_buffer * + vsp1_histogram_buffer_get(struct vsp1_histogram *histo) + { + struct vsp1_histogram_buffer *buf = NULL; +- unsigned long flags; + +- spin_lock_irqsave(&histo->irqlock, flags); ++ spin_lock(&histo->irqlock); + + if (list_empty(&histo->irqqueue)) + goto done; +@@ -49,7 +48,7 @@ vsp1_histogram_buffer_get(struct vsp1_histogram *histo) + histo->readout = true; + + done: +- spin_unlock_irqrestore(&histo->irqlock, flags); ++ spin_unlock(&histo->irqlock); + return buf; + } + +@@ -58,7 +57,6 @@ void vsp1_histogram_buffer_complete(struct vsp1_histogram *histo, + size_t size) + { + struct vsp1_pipeline *pipe = histo->entity.pipe; +- unsigned long flags; + + /* + * The pipeline pointer is guaranteed to be valid as this function is +@@ -70,10 +68,10 @@ void vsp1_histogram_buffer_complete(struct vsp1_histogram *histo, + vb2_set_plane_payload(&buf->buf.vb2_buf, 0, size); + vb2_buffer_done(&buf->buf.vb2_buf, VB2_BUF_STATE_DONE); + +- spin_lock_irqsave(&histo->irqlock, flags); ++ spin_lock(&histo->irqlock); + histo->readout = false; + wake_up(&histo->wait_queue); +- spin_unlock_irqrestore(&histo->irqlock, flags); ++ spin_unlock(&histo->irqlock); + } + + /* ----------------------------------------------------------------------------- +@@ -124,11 +122,10 @@ static void histo_buffer_queue(struct vb2_buffer *vb) + struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); + struct vsp1_histogram *histo = vb2_get_drv_priv(vb->vb2_queue); + struct vsp1_histogram_buffer *buf = to_vsp1_histogram_buffer(vbuf); +- unsigned long flags; + +- spin_lock_irqsave(&histo->irqlock, flags); ++ spin_lock_irq(&histo->irqlock); + list_add_tail(&buf->queue, &histo->irqqueue); +- spin_unlock_irqrestore(&histo->irqlock, flags); ++ spin_unlock_irq(&histo->irqlock); + } + + static int histo_start_streaming(struct vb2_queue *vq, unsigned int count) +@@ -140,9 +137,8 @@ static void histo_stop_streaming(struct vb2_queue *vq) + { + struct vsp1_histogram *histo = vb2_get_drv_priv(vq); + struct vsp1_histogram_buffer *buffer; +- unsigned long flags; + +- spin_lock_irqsave(&histo->irqlock, flags); ++ spin_lock_irq(&histo->irqlock); + + /* Remove all buffers from the IRQ queue. */ + list_for_each_entry(buffer, &histo->irqqueue, queue) +@@ -152,7 +148,7 @@ static void histo_stop_streaming(struct vb2_queue *vq) + /* Wait for the buffer being read out (if any) to complete. */ + wait_event_lock_irq(histo->wait_queue, !histo->readout, histo->irqlock); + +- spin_unlock_irqrestore(&histo->irqlock, flags); ++ spin_unlock_irq(&histo->irqlock); + } + + static const struct vb2_ops histo_video_queue_qops = { +-- +2.43.0 + diff --git a/queue-6.6/media-renesas-vsp1-store-rpf-partition-configuration.patch b/queue-6.6/media-renesas-vsp1-store-rpf-partition-configuration.patch new file mode 100644 index 00000000000..721fddb4fd8 --- /dev/null +++ b/queue-6.6/media-renesas-vsp1-store-rpf-partition-configuration.patch @@ -0,0 +1,66 @@ +From 43a02fa5eb3e19b2b57260084fedcd0a0dc48bf5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 19 Nov 2023 03:11:51 +0200 +Subject: media: renesas: vsp1: Store RPF partition configuration per RPF + instance + +From: Laurent Pinchart + +[ Upstream commit a213bc09b1025c771ee722ee341af1d84375db8a ] + +The vsp1_partition structure stores the RPF partition configuration in a +single field for all RPF instances, while each RPF can have its own +configuration. Fix it by storing the configuration separately for each +RPF instance. + +Signed-off-by: Laurent Pinchart +Fixes: ab45e8585182 ("media: v4l: vsp1: Allow entities to participate in the partition algorithm") +Reviewed-by: Jacopo Mondi +Signed-off-by: Sasha Levin +--- + drivers/media/platform/renesas/vsp1/vsp1_pipe.h | 2 +- + drivers/media/platform/renesas/vsp1/vsp1_rpf.c | 8 +++++--- + 2 files changed, 6 insertions(+), 4 deletions(-) + +diff --git a/drivers/media/platform/renesas/vsp1/vsp1_pipe.h b/drivers/media/platform/renesas/vsp1/vsp1_pipe.h +index 674b5748d929e..85ecd53cda495 100644 +--- a/drivers/media/platform/renesas/vsp1/vsp1_pipe.h ++++ b/drivers/media/platform/renesas/vsp1/vsp1_pipe.h +@@ -73,7 +73,7 @@ struct vsp1_partition_window { + * @wpf: The WPF partition window configuration + */ + struct vsp1_partition { +- struct vsp1_partition_window rpf; ++ struct vsp1_partition_window rpf[VSP1_MAX_RPF]; + struct vsp1_partition_window uds_sink; + struct vsp1_partition_window uds_source; + struct vsp1_partition_window sru; +diff --git a/drivers/media/platform/renesas/vsp1/vsp1_rpf.c b/drivers/media/platform/renesas/vsp1/vsp1_rpf.c +index ea12c3f12c92a..78b6cefc5a019 100644 +--- a/drivers/media/platform/renesas/vsp1/vsp1_rpf.c ++++ b/drivers/media/platform/renesas/vsp1/vsp1_rpf.c +@@ -315,8 +315,8 @@ static void rpf_configure_partition(struct vsp1_entity *entity, + * 'width' need to be adjusted. + */ + if (pipe->partitions > 1) { +- crop.width = pipe->partition->rpf.width; +- crop.left += pipe->partition->rpf.left; ++ crop.width = pipe->partition->rpf[rpf->entity.index].width; ++ crop.left += pipe->partition->rpf[rpf->entity.index].left; + } + + if (pipe->interlaced) { +@@ -371,7 +371,9 @@ static void rpf_partition(struct vsp1_entity *entity, + unsigned int partition_idx, + struct vsp1_partition_window *window) + { +- partition->rpf = *window; ++ struct vsp1_rwpf *rpf = to_rwpf(&entity->subdev); ++ ++ partition->rpf[rpf->entity.index] = *window; + } + + static const struct vsp1_entity_operations rpf_entity_ops = { +-- +2.43.0 + diff --git a/queue-6.6/media-uvcvideo-add-quirk-for-invalid-dev_sof-in-logi.patch b/queue-6.6/media-uvcvideo-add-quirk-for-invalid-dev_sof-in-logi.patch new file mode 100644 index 00000000000..82b80d18a53 --- /dev/null +++ b/queue-6.6/media-uvcvideo-add-quirk-for-invalid-dev_sof-in-logi.patch @@ -0,0 +1,70 @@ +From 55ce3f7a2cb5921c2e6cb6b95a081d70fff119f2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 25 Mar 2024 15:26:11 +0100 +Subject: media: uvcvideo: Add quirk for invalid dev_sof in Logitech C920 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Oleksandr Natalenko + +[ Upstream commit 85fbe91a7c9210bb30638846b551fa5d3cb7bc4c ] + +Similarly to Logitech C922, C920 seems to also suffer from a firmware +bug that breaks hardware timestamping. + +Add a quirk for this camera model too. + +Before applying the quirk: + +``` +100 (4) [-] none 100 200717 B 212.919114 213.079004 33.727 fps ts mono/SoE +101 (5) [-] none 101 200889 B 213.003703 213.114996 11.822 fps ts mono/SoE +102 (6) [-] none 102 200926 B 213.035571 213.146999 31.379 fps ts mono/SoE +103 (7) [-] none 103 200839 B 213.067424 213.179003 31.394 fps ts mono/SoE +104 (0) [-] none 104 200692 B 213.293180 213.214991 4.430 fps ts mono/SoE +105 (1) [-] none 105 200937 B 213.322374 213.247001 34.254 fps ts mono/SoE +106 (2) [-] none 106 201013 B 213.352228 213.279005 33.496 fps ts mono/SoE +… +``` + +After applying the quirk: + +``` +154 (2) [-] none 154 192417 B 42.199823 42.207788 27.779 fps ts mono/SoE +155 (3) [-] none 155 192040 B 42.231834 42.239791 31.239 fps ts mono/SoE +156 (4) [-] none 156 192213 B 42.263823 42.271822 31.261 fps ts mono/SoE +157 (5) [-] none 157 191981 B 42.299824 42.303827 27.777 fps ts mono/SoE +158 (6) [-] none 158 191953 B 42.331835 42.339811 31.239 fps ts mono/SoE +159 (7) [-] none 159 191904 B 42.363824 42.371813 31.261 fps ts mono/SoE +160 (0) [-] none 160 192210 B 42.399834 42.407801 27.770 fps ts mono/SoE +``` + +Fixes: 5d0fd3c806b9 ("[media] uvcvideo: Disable hardware timestamps by default") +Signed-off-by: Oleksandr Natalenko +Reviewed-by: Ricardo Ribalda +Reviewed-by: Laurent Pinchart +Link: https://lore.kernel.org/r/20240325142611.15550-1-oleksandr@natalenko.name +Signed-off-by: Laurent Pinchart +Signed-off-by: Sasha Levin +--- + drivers/media/usb/uvc/uvc_driver.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/media/usb/uvc/uvc_driver.c b/drivers/media/usb/uvc/uvc_driver.c +index 664a1b7314197..68bf41147a619 100644 +--- a/drivers/media/usb/uvc/uvc_driver.c ++++ b/drivers/media/usb/uvc/uvc_driver.c +@@ -2580,7 +2580,8 @@ static const struct usb_device_id uvc_ids[] = { + .bInterfaceClass = USB_CLASS_VIDEO, + .bInterfaceSubClass = 1, + .bInterfaceProtocol = 0, +- .driver_info = UVC_INFO_QUIRK(UVC_QUIRK_RESTORE_CTRLS_ON_INIT) }, ++ .driver_info = UVC_INFO_QUIRK(UVC_QUIRK_RESTORE_CTRLS_ON_INIT ++ | UVC_QUIRK_INVALID_DEVICE_SOF) }, + /* Logitech HD Pro Webcam C922 */ + { .match_flags = USB_DEVICE_ID_MATCH_DEVICE + | USB_DEVICE_ID_MATCH_INT_INFO, +-- +2.43.0 + diff --git a/queue-6.6/media-uvcvideo-disable-autosuspend-for-insta360-link.patch b/queue-6.6/media-uvcvideo-disable-autosuspend-for-insta360-link.patch new file mode 100644 index 00000000000..6cab74736ae --- /dev/null +++ b/queue-6.6/media-uvcvideo-disable-autosuspend-for-insta360-link.patch @@ -0,0 +1,111 @@ +From ce4f2bcb068af14bb6be6d8bf7923f7597c19f89 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 2 Dec 2022 17:48:52 +0100 +Subject: media: uvcvideo: Disable autosuspend for Insta360 Link + +From: Ricardo Ribalda + +[ Upstream commit 3de6df64f92d8633eb51a5e957ffc43ebdb2156e ] + +When the device suspends, it keeps power-cycling. + +The user notices it because the LED constanct oscillate between +blue (ready) and no LED (off). + +<6>[95202.128542] usb 3-3-port4: attempt power cycle +<6>[95206.070120] usb 3-3.4: new high-speed USB device number 49 using xhci_hcd +<6>[95206.212027] usb 3-3.4: New USB device found, idVendor=2e1a, idProduct=4c01, bcdDevice= 2.00 +<6>[95206.212044] usb 3-3.4: New USB device strings: Mfr=1, Product=2, SerialNumber= +<6>[95206.212050] usb 3-3.4: Product: Insta360 Link +<6>[95206.212075] usb 3-3.4: Manufacturer: Amba +<7>[95206.214862] usb 3-3.4: GPIO lookup for consumer privacy +<7>[95206.214866] usb 3-3.4: using lookup tables for GPIO lookup +<7>[95206.214869] usb 3-3.4: No GPIO consumer privacy found +<6>[95206.214871] usb 3-3.4: Found UVC 1.10 device Insta360 Link (2e1a:4c01) +<3>[95206.217113] usb 3-3.4: Failed to query (GET_INFO) UVC control 14 on unit 1: -32 (exp. 1). +<3>[95206.217733] usb 3-3.4: Failed to query (GET_INFO) UVC control 16 on unit 1: -32 (exp. 1). +<4>[95206.223544] usb 3-3.4: Warning! Unlikely big volume range (=32767), cval->res is probably wrong. +<4>[95206.223554] usb 3-3.4: [9] FU [Mic Capture Volume] ch = 1, val = -32768/-1/1 +<6>[95210.698990] usb 3-3.4: USB disconnect, device number 49 +<6>[95211.963090] usb 3-3.4: new high-speed USB device number 50 using xhci_hcd +<6>[95212.657061] usb 3-3.4: new full-speed USB device number 51 using xhci_hcd +<3>[95212.783119] usb 3-3.4: device descriptor read/64, error -32 +<3>[95213.015076] usb 3-3.4: device descriptor read/64, error -32 +<6>[95213.120358] usb 3-3-port4: attempt power cycle + +Bus 001 Device 009: ID 2e1a:4c01 Amba Insta360 Link +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 2.00 + bDeviceClass 239 Miscellaneous Device + bDeviceSubClass 2 + bDeviceProtocol 1 Interface Association + bMaxPacketSize0 64 + idVendor 0x2e1a + idProduct 0x4c01 + bcdDevice 2.00 + iManufacturer 1 Amba + iProduct 2 Insta360 Link + iSerial 0 + bNumConfigurations 1 + +Signed-off-by: Ricardo Ribalda +Reviewed-by: Laurent Pinchart +Link: https://lore.kernel.org/r/20221101-instal-v1-0-d13d1331c4b5@chromium.org +Signed-off-by: Laurent Pinchart +Stable-dep-of: 85fbe91a7c92 ("media: uvcvideo: Add quirk for invalid dev_sof in Logitech C920") +Signed-off-by: Sasha Levin +--- + drivers/media/usb/uvc/uvc_driver.c | 14 +++++++++++++- + drivers/media/usb/uvc/uvcvideo.h | 1 + + 2 files changed, 14 insertions(+), 1 deletion(-) + +diff --git a/drivers/media/usb/uvc/uvc_driver.c b/drivers/media/usb/uvc/uvc_driver.c +index 91a41aa3ced24..69602f2ed51d8 100644 +--- a/drivers/media/usb/uvc/uvc_driver.c ++++ b/drivers/media/usb/uvc/uvc_driver.c +@@ -2236,8 +2236,11 @@ static int uvc_probe(struct usb_interface *intf, + if (dev->quirks & UVC_QUIRK_NO_RESET_RESUME) + udev->quirks &= ~USB_QUIRK_RESET_RESUME; + ++ if (!(dev->quirks & UVC_QUIRK_DISABLE_AUTOSUSPEND)) ++ usb_enable_autosuspend(udev); ++ + uvc_dbg(dev, PROBE, "UVC device initialized\n"); +- usb_enable_autosuspend(udev); ++ + return 0; + + error: +@@ -3043,6 +3046,15 @@ static const struct usb_device_id uvc_ids[] = { + .bInterfaceSubClass = 1, + .bInterfaceProtocol = UVC_PC_PROTOCOL_15, + .driver_info = (kernel_ulong_t)&uvc_ctrl_power_line_uvc11 }, ++ /* Insta360 Link */ ++ { .match_flags = USB_DEVICE_ID_MATCH_DEVICE ++ | USB_DEVICE_ID_MATCH_INT_INFO, ++ .idVendor = 0x2e1a, ++ .idProduct = 0x4c01, ++ .bInterfaceClass = USB_CLASS_VIDEO, ++ .bInterfaceSubClass = 1, ++ .bInterfaceProtocol = 0, ++ .driver_info = UVC_INFO_QUIRK(UVC_QUIRK_DISABLE_AUTOSUSPEND) }, + /* Lenovo Integrated Camera */ + { .match_flags = USB_DEVICE_ID_MATCH_DEVICE + | USB_DEVICE_ID_MATCH_INT_INFO, +diff --git a/drivers/media/usb/uvc/uvcvideo.h b/drivers/media/usb/uvc/uvcvideo.h +index 88218693f6f0b..3653b2c8a86cb 100644 +--- a/drivers/media/usb/uvc/uvcvideo.h ++++ b/drivers/media/usb/uvc/uvcvideo.h +@@ -74,6 +74,7 @@ + #define UVC_QUIRK_FORCE_BPP 0x00001000 + #define UVC_QUIRK_WAKE_AUTOSUSPEND 0x00002000 + #define UVC_QUIRK_NO_RESET_RESUME 0x00004000 ++#define UVC_QUIRK_DISABLE_AUTOSUSPEND 0x00008000 + + /* Format flags */ + #define UVC_FMT_FLAG_COMPRESSED 0x00000001 +-- +2.43.0 + diff --git a/queue-6.6/media-uvcvideo-override-default-flags.patch b/queue-6.6/media-uvcvideo-override-default-flags.patch new file mode 100644 index 00000000000..ebbae298601 --- /dev/null +++ b/queue-6.6/media-uvcvideo-override-default-flags.patch @@ -0,0 +1,68 @@ +From b4a34553e431dbe36b67383818a1e810fe777707 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 2 Jun 2024 14:50:53 +0800 +Subject: media: uvcvideo: Override default flags + +From: Daniel Schaefer + +[ Upstream commit 86419686e66da5b90a07fb8a40ab138fe97189b5 ] + +When the UVC device has a control that is readonly it doesn't set the +SET_CUR flag. For example the privacy control has SET_CUR flag set in +the defaults in the `uvc_ctrls` variable. Even if the device does not +have it set, it's not cleared by uvc_ctrl_get_flags(). + +Originally written with assignment in commit 859086ae3636 ("media: +uvcvideo: Apply flags from device to actual properties"). But changed to +|= in commit 0dc68cabdb62 ("media: uvcvideo: Prevent setting unavailable +flags"). It would not clear the default flags. + +With this patch applied the correct flags are reported to user space. +Tested with: + +``` +> v4l2-ctl --list-ctrls | grep privacy +privacy 0x009a0910 (bool) : default=0 value=0 flags=read-only +``` + +Signed-off-by: Daniel Schaefer +Fixes: 0dc68cabdb62 ("media: uvcvideo: Prevent setting unavailable flags") +Reviewed-by: Ricardo Ribalda +Reviewed-by: Laurent Pinchart +Link: https://lore.kernel.org/r/20240602065053.36850-1-dhs@frame.work +Signed-off-by: Laurent Pinchart +Signed-off-by: Sasha Levin +--- + drivers/media/usb/uvc/uvc_ctrl.c | 9 ++++++++- + 1 file changed, 8 insertions(+), 1 deletion(-) + +diff --git a/drivers/media/usb/uvc/uvc_ctrl.c b/drivers/media/usb/uvc/uvc_ctrl.c +index e59a463c27618..07158e9451fed 100644 +--- a/drivers/media/usb/uvc/uvc_ctrl.c ++++ b/drivers/media/usb/uvc/uvc_ctrl.c +@@ -2029,7 +2029,13 @@ static int uvc_ctrl_get_flags(struct uvc_device *dev, + else + ret = uvc_query_ctrl(dev, UVC_GET_INFO, ctrl->entity->id, + dev->intfnum, info->selector, data, 1); +- if (!ret) ++ ++ if (!ret) { ++ info->flags &= ~(UVC_CTRL_FLAG_GET_CUR | ++ UVC_CTRL_FLAG_SET_CUR | ++ UVC_CTRL_FLAG_AUTO_UPDATE | ++ UVC_CTRL_FLAG_ASYNCHRONOUS); ++ + info->flags |= (data[0] & UVC_CONTROL_CAP_GET ? + UVC_CTRL_FLAG_GET_CUR : 0) + | (data[0] & UVC_CONTROL_CAP_SET ? +@@ -2038,6 +2044,7 @@ static int uvc_ctrl_get_flags(struct uvc_device *dev, + UVC_CTRL_FLAG_AUTO_UPDATE : 0) + | (data[0] & UVC_CONTROL_CAP_ASYNCHRONOUS ? + UVC_CTRL_FLAG_ASYNCHRONOUS : 0); ++ } + + kfree(data); + return ret; +-- +2.43.0 + diff --git a/queue-6.6/media-uvcvideo-quirk-for-invalid-dev_sof-in-logitech.patch b/queue-6.6/media-uvcvideo-quirk-for-invalid-dev_sof-in-logitech.patch new file mode 100644 index 00000000000..61d98c58163 --- /dev/null +++ b/queue-6.6/media-uvcvideo-quirk-for-invalid-dev_sof-in-logitech.patch @@ -0,0 +1,141 @@ +From 102f6910ed009c39a0a09e2d1145692955bde4e4 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 23 Mar 2024 10:48:04 +0000 +Subject: media: uvcvideo: Quirk for invalid dev_sof in Logitech C922 + +From: Ricardo Ribalda + +[ Upstream commit 9183c6f1a21e0da4415762c504e2d7f784304d12 ] + +Logitech C922 internal SOF does not increases at a stable rate of 1kHz. +This causes that the device_sof and the host_sof run at different rates, +breaking the clock domain conversion algorithm. Eg: + +30 (6) [-] none 30 614400 B 21.245557 21.395214 34.133 fps ts mono/SoE +31 (7) [-] none 31 614400 B 21.275327 21.427246 33.591 fps ts mono/SoE +32 (0) [-] none 32 614400 B 21.304739 21.459256 34.000 fps ts mono/SoE +33 (1) [-] none 33 614400 B 21.334324 21.495274 33.801 fps ts mono/SoE +* 34 (2) [-] none 34 614400 B 21.529237 21.527297 5.130 fps ts mono/SoE +* 35 (3) [-] none 35 614400 B 21.649416 21.559306 8.321 fps ts mono/SoE +36 (4) [-] none 36 614400 B 21.678789 21.595320 34.045 fps ts mono/SoE +... +99 (3) [-] none 99 614400 B 23.542226 23.696352 33.541 fps ts mono/SoE +100 (4) [-] none 100 614400 B 23.571578 23.728404 34.069 fps ts mono/SoE +101 (5) [-] none 101 614400 B 23.601425 23.760420 33.504 fps ts mono/SoE +* 102 (6) [-] none 102 614400 B 23.798324 23.796428 5.079 fps ts mono/SoE +* 103 (7) [-] none 103 614400 B 23.916271 23.828450 8.478 fps ts mono/SoE +104 (0) [-] none 104 614400 B 23.945720 23.860479 33.957 fps ts mono/SoE + +Instead of disabling completely the hardware timestamping for such +hardware we take the assumption that the packet handling jitter is +under 2ms and use the host_sof as dev_sof. + +We can think of the UVC hardware clock as a system with a coarse clock +(the SOF) and a fine clock (the PTS). The coarse clock can be replaced +with a clock on the same frequency, if the jitter of such clock is +smaller than its sampling rate. That way we can save some of the +precision of the fine clock. + +To probe this point we have run three experiments on the Logitech C922. +On that experiment we run the camera at 33fps and we analyse the +difference in msec between a frame and its predecessor. If we display +the histogram of that value, a thinner histogram will mean a better +meassurement. The results for: +- original hw timestamp: https://ibb.co/D1HJJ4x +- pure software timestamp: https://ibb.co/QC9MgVK +- modified hw timestamp: https://ibb.co/8s9dBdk + +This bug in the camera firmware has been confirmed by the vendor. + +lsusb -v + +Bus 001 Device 044: ID 046d:085c Logitech, Inc. C922 Pro Stream Webcam +Device Descriptor: + bLength 18 + bDescriptorType 1 + bcdUSB 2.00 + bDeviceClass 239 Miscellaneous Device + bDeviceSubClass 2 + bDeviceProtocol 1 Interface Association + bMaxPacketSize0 64 + idVendor 0x046d Logitech, Inc. + idProduct 0x085c C922 Pro Stream Webcam + bcdDevice 0.16 + iManufacturer 0 + iProduct 2 C922 Pro Stream Webcam + iSerial 1 80B912DF + bNumConfigurations 1 + +Reviewed-by: Sergey Senozhatsky +Reviewed-by: Laurent Pinchart +Signed-off-by: Ricardo Ribalda +Reviewed-by: Ricardo Ribalda +Signed-off-by: Oleksandr Natalenko +Reviewed-by: Tomasz Figa +Link: https://lore.kernel.org/r/20240323-resend-hwtimestamp-v10-3-b08e590d97c7@chromium.org +Signed-off-by: Laurent Pinchart +Stable-dep-of: 85fbe91a7c92 ("media: uvcvideo: Add quirk for invalid dev_sof in Logitech C920") +Signed-off-by: Sasha Levin +--- + drivers/media/usb/uvc/uvc_driver.c | 9 +++++++++ + drivers/media/usb/uvc/uvc_video.c | 11 +++++++++++ + drivers/media/usb/uvc/uvcvideo.h | 1 + + 3 files changed, 21 insertions(+) + +diff --git a/drivers/media/usb/uvc/uvc_driver.c b/drivers/media/usb/uvc/uvc_driver.c +index 69602f2ed51d8..664a1b7314197 100644 +--- a/drivers/media/usb/uvc/uvc_driver.c ++++ b/drivers/media/usb/uvc/uvc_driver.c +@@ -2581,6 +2581,15 @@ static const struct usb_device_id uvc_ids[] = { + .bInterfaceSubClass = 1, + .bInterfaceProtocol = 0, + .driver_info = UVC_INFO_QUIRK(UVC_QUIRK_RESTORE_CTRLS_ON_INIT) }, ++ /* Logitech HD Pro Webcam C922 */ ++ { .match_flags = USB_DEVICE_ID_MATCH_DEVICE ++ | USB_DEVICE_ID_MATCH_INT_INFO, ++ .idVendor = 0x046d, ++ .idProduct = 0x085c, ++ .bInterfaceClass = USB_CLASS_VIDEO, ++ .bInterfaceSubClass = 1, ++ .bInterfaceProtocol = 0, ++ .driver_info = UVC_INFO_QUIRK(UVC_QUIRK_INVALID_DEVICE_SOF) }, + /* Logitech Rally Bar Huddle */ + { .match_flags = USB_DEVICE_ID_MATCH_DEVICE + | USB_DEVICE_ID_MATCH_INT_INFO, +diff --git a/drivers/media/usb/uvc/uvc_video.c b/drivers/media/usb/uvc/uvc_video.c +index 28dde08ec6c5d..860a21446529a 100644 +--- a/drivers/media/usb/uvc/uvc_video.c ++++ b/drivers/media/usb/uvc/uvc_video.c +@@ -529,6 +529,17 @@ uvc_video_clock_decode(struct uvc_streaming *stream, struct uvc_buffer *buf, + stream->clock.last_sof = dev_sof; + + host_sof = usb_get_current_frame_number(stream->dev->udev); ++ ++ /* ++ * On some devices, like the Logitech C922, the device SOF does not run ++ * at a stable rate of 1kHz. For those devices use the host SOF instead. ++ * In the tests performed so far, this improves the timestamp precision. ++ * This is probably explained by a small packet handling jitter from the ++ * host, but the exact reason hasn't been fully determined. ++ */ ++ if (stream->dev->quirks & UVC_QUIRK_INVALID_DEVICE_SOF) ++ dev_sof = host_sof; ++ + time = uvc_video_get_time(); + + /* +diff --git a/drivers/media/usb/uvc/uvcvideo.h b/drivers/media/usb/uvc/uvcvideo.h +index 3653b2c8a86cb..e5b12717016fa 100644 +--- a/drivers/media/usb/uvc/uvcvideo.h ++++ b/drivers/media/usb/uvc/uvcvideo.h +@@ -75,6 +75,7 @@ + #define UVC_QUIRK_WAKE_AUTOSUSPEND 0x00002000 + #define UVC_QUIRK_NO_RESET_RESUME 0x00004000 + #define UVC_QUIRK_DISABLE_AUTOSUSPEND 0x00008000 ++#define UVC_QUIRK_INVALID_DEVICE_SOF 0x00010000 + + /* Format flags */ + #define UVC_FMT_FLAG_COMPRESSED 0x00000001 +-- +2.43.0 + diff --git a/queue-6.6/media-v4l-async-fix-null-pointer-dereference-in-addi.patch b/queue-6.6/media-v4l-async-fix-null-pointer-dereference-in-addi.patch new file mode 100644 index 00000000000..946d8e15754 --- /dev/null +++ b/queue-6.6/media-v4l-async-fix-null-pointer-dereference-in-addi.patch @@ -0,0 +1,44 @@ +From 7008de34734f441278c4edc2e8f8be9c9dec5300 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 8 May 2024 10:51:49 +0800 +Subject: media: v4l: async: Fix NULL pointer dereference in adding ancillary + links + +From: ChiYuan Huang + +[ Upstream commit 9b4667ea67854f0b116fe22ad11ef5628c5b5b5f ] + +In v4l2_async_create_ancillary_links(), ancillary links are created for +lens and flash sub-devices. These are sub-device to sub-device links and +if the async notifier is related to a V4L2 device, the source sub-device +of the ancillary link is NULL, leading to a NULL pointer dereference. +Check the notifier's sd field is non-NULL in +v4l2_async_create_ancillary_links(). + +Fixes: aa4faf6eb271 ("media: v4l2-async: Create links during v4l2_async_match_notify()") +Signed-off-by: ChiYuan Huang +[Sakari Ailus: Reword the subject and commit messages slightly.] +Signed-off-by: Sakari Ailus +Signed-off-by: Hans Verkuil +Signed-off-by: Sasha Levin +--- + drivers/media/v4l2-core/v4l2-async.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/media/v4l2-core/v4l2-async.c b/drivers/media/v4l2-core/v4l2-async.c +index eaa15b8df76df..ac4d987bba255 100644 +--- a/drivers/media/v4l2-core/v4l2-async.c ++++ b/drivers/media/v4l2-core/v4l2-async.c +@@ -324,6 +324,9 @@ static int v4l2_async_create_ancillary_links(struct v4l2_async_notifier *n, + sd->entity.function != MEDIA_ENT_F_FLASH) + return 0; + ++ if (!n->sd) ++ return 0; ++ + link = media_create_ancillary_link(&n->sd->entity, &sd->entity); + + #endif +-- +2.43.0 + diff --git a/queue-6.6/media-venus-flush-all-buffers-in-output-plane-stream.patch b/queue-6.6/media-venus-flush-all-buffers-in-output-plane-stream.patch new file mode 100644 index 00000000000..5a5dd96b320 --- /dev/null +++ b/queue-6.6/media-venus-flush-all-buffers-in-output-plane-stream.patch @@ -0,0 +1,43 @@ +From c37ff20f23f224eef78dd0e25b3a6cc7e087ecdf Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 10 Jan 2024 11:42:14 +0530 +Subject: media: venus: flush all buffers in output plane streamoff + +From: Dikshita Agarwal + +[ Upstream commit e750a4b1224142bd8dd057b0d5adf8a5608b7e77 ] + +For scenarios, when source change is followed by VIDIOC_STREAMOFF +on output plane, driver should discard any queued OUTPUT +buffers, which are not decoded or dequeued. +Flush with HFI_FLUSH_INPUT does not have any actual impact. +So, fix it, by invoking HFI_FLUSH_ALL, which will flush all +queued buffers. + +Fixes: 85872f861d4c ("media: venus: Mark last capture buffer") +Signed-off-by: Dikshita Agarwal +Tested-by: Nathan Hebert +Reviewed-by: Bryan O'Donoghue +Signed-off-by: Stanimir Varbanov +Signed-off-by: Hans Verkuil +Signed-off-by: Sasha Levin +--- + drivers/media/platform/qcom/venus/vdec.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/media/platform/qcom/venus/vdec.c b/drivers/media/platform/qcom/venus/vdec.c +index dbf305cec1202..c57187283b012 100644 +--- a/drivers/media/platform/qcom/venus/vdec.c ++++ b/drivers/media/platform/qcom/venus/vdec.c +@@ -1255,7 +1255,7 @@ static int vdec_stop_output(struct venus_inst *inst) + break; + case VENUS_DEC_STATE_INIT: + case VENUS_DEC_STATE_CAPTURE_SETUP: +- ret = hfi_session_flush(inst, HFI_FLUSH_INPUT, true); ++ ret = hfi_session_flush(inst, HFI_FLUSH_ALL, true); + break; + default: + break; +-- +2.43.0 + diff --git a/queue-6.6/memory-fsl_ifc-make-fsl_ifc-config-visible-and-selec.patch b/queue-6.6/memory-fsl_ifc-make-fsl_ifc-config-visible-and-selec.patch new file mode 100644 index 00000000000..1bb43e0054f --- /dev/null +++ b/queue-6.6/memory-fsl_ifc-make-fsl_ifc-config-visible-and-selec.patch @@ -0,0 +1,54 @@ +From ac5e605b93356e542d2af1d3e0c1070c84d5c609 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 30 May 2024 16:46:36 +0200 +Subject: memory: fsl_ifc: Make FSL_IFC config visible and selectable + +From: Esben Haabendal + +[ Upstream commit 9ba0cae3cac07c21c583f9ff194f74043f90d29c ] + +While use of fsl_ifc driver with NAND flash is fine, as the fsl_ifc_nand +driver selects FSL_IFC automatically, we need the CONFIG_FSL_IFC option to +be selectable for platforms using fsl_ifc with NOR flash. + +Fixes: ea0c0ad6b6eb ("memory: Enable compile testing for most of the drivers") +Reviewed-by: Miquel Raynal +Signed-off-by: Esben Haabendal +Link: https://lore.kernel.org/r/20240530-fsl-ifc-config-v3-1-1fd2c3d233dd@geanix.com +Signed-off-by: Krzysztof Kozlowski +Signed-off-by: Sasha Levin +--- + drivers/memory/Kconfig | 2 +- + drivers/mtd/nand/raw/Kconfig | 3 +-- + 2 files changed, 2 insertions(+), 3 deletions(-) + +diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig +index 8efdd1f971395..c82d8d8a16eaf 100644 +--- a/drivers/memory/Kconfig ++++ b/drivers/memory/Kconfig +@@ -167,7 +167,7 @@ config FSL_CORENET_CF + represents a coherency violation. + + config FSL_IFC +- bool "Freescale IFC driver" if COMPILE_TEST ++ bool "Freescale IFC driver" + depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST + depends on HAS_IOMEM + +diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig +index cbf8ae85e1ae0..6142573085169 100644 +--- a/drivers/mtd/nand/raw/Kconfig ++++ b/drivers/mtd/nand/raw/Kconfig +@@ -234,8 +234,7 @@ config MTD_NAND_FSL_IFC + tristate "Freescale IFC NAND controller" + depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST + depends on HAS_IOMEM +- select FSL_IFC +- select MEMORY ++ depends on FSL_IFC + help + Various Freescale chips e.g P1010, include a NAND Flash machine + with built-in hardware ECC capabilities. +-- +2.43.0 + diff --git a/queue-6.6/mfd-omap-usb-tll-use-struct_size-to-allocate-tll.patch b/queue-6.6/mfd-omap-usb-tll-use-struct_size-to-allocate-tll.patch new file mode 100644 index 00000000000..aab9e6625b6 --- /dev/null +++ b/queue-6.6/mfd-omap-usb-tll-use-struct_size-to-allocate-tll.patch @@ -0,0 +1,69 @@ +From d54f04aa9949f277d9e1767612696b1eb56931da Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 26 Jun 2024 21:37:03 +0200 +Subject: mfd: omap-usb-tll: Use struct_size to allocate tll + +From: Javier Carrasco + +[ Upstream commit 40176714c818b0b6a2ca8213cdb7654fbd49b742 ] + +Commit 16c2004d9e4d ("mfd: omap-usb-tll: Allocate driver data at once") +changed the memory allocation of 'tll' to consolidate it into a single +allocation, introducing an incorrect size calculation. + +In particular, the allocation for the array of pointers was converted +into a single-pointer allocation. + +The memory allocation used to occur in two steps: + +tll = devm_kzalloc(dev, sizeof(struct usbtll_omap), GFP_KERNEL); +tll->ch_clk = devm_kzalloc(dev, sizeof(struct clk *) * tll->nch, + GFP_KERNEL); + +And it turned that into the following allocation: + +tll = devm_kzalloc(dev, sizeof(*tll) + sizeof(tll->ch_clk[nch]), + GFP_KERNEL); + +sizeof(tll->ch_clk[nch]) returns the size of a single pointer instead of +the expected nch pointers. + +This bug went unnoticed because the allocation size was small enough to +fit within the minimum size of a memory allocation for this particular +case [1]. + +The complete allocation can still be done at once with the struct_size +macro, which comes in handy for structures with a trailing flexible +array. + +Fix the memory allocation to obtain the original size again. + +Link: https://lore.kernel.org/all/202406261121.2FFD65647@keescook/ [1] +Fixes: 16c2004d9e4d ("mfd: omap-usb-tll: Allocate driver data at once") +Reviewed-by: Kees Cook +Signed-off-by: Javier Carrasco +Fixes: commit 16c2004d9e4d ("mfd: omap-usb-tll: Allocate driver data at once") +Link: https://lore.kernel.org/r/20240626-omap-usb-tll-counted_by-v2-1-4bedf20d1b51@gmail.com +Signed-off-by: Lee Jones +Signed-off-by: Sasha Levin +--- + drivers/mfd/omap-usb-tll.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/drivers/mfd/omap-usb-tll.c b/drivers/mfd/omap-usb-tll.c +index 906353735c782..5ba2b2352749d 100644 +--- a/drivers/mfd/omap-usb-tll.c ++++ b/drivers/mfd/omap-usb-tll.c +@@ -230,8 +230,7 @@ static int usbtll_omap_probe(struct platform_device *pdev) + break; + } + +- tll = devm_kzalloc(dev, sizeof(*tll) + sizeof(tll->ch_clk[nch]), +- GFP_KERNEL); ++ tll = devm_kzalloc(dev, struct_size(tll, ch_clk, nch), GFP_KERNEL); + if (!tll) { + pm_runtime_put_sync(dev); + pm_runtime_disable(dev); +-- +2.43.0 + diff --git a/queue-6.6/mfd-rsmu-split-core-code-into-separate-module.patch b/queue-6.6/mfd-rsmu-split-core-code-into-separate-module.patch new file mode 100644 index 00000000000..6ff9e0008cf --- /dev/null +++ b/queue-6.6/mfd-rsmu-split-core-code-into-separate-module.patch @@ -0,0 +1,61 @@ +From de899ad3389778258920f048ce972cdfbae71e88 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 29 May 2024 11:48:47 +0200 +Subject: mfd: rsmu: Split core code into separate module + +From: Arnd Bergmann + +[ Upstream commit c879a8c39dd55e7fabdd8d13341f7bc5200db377 ] + +Linking a file into two modules can have unintended side-effects +and produces a W=1 warning: + +scripts/Makefile.build:236: drivers/mfd/Makefile: rsmu_core.o is added to multiple modules: rsmu-i2c rsmu-spi + +Make this one a separate module instead. + +Fixes: a1867f85e06e ("mfd: Add Renesas Synchronization Management Unit (SMU) support") +Signed-off-by: Arnd Bergmann +Link: https://lore.kernel.org/r/20240529094856.1869543-1-arnd@kernel.org +Signed-off-by: Lee Jones +Signed-off-by: Sasha Levin +--- + drivers/mfd/Makefile | 6 ++---- + drivers/mfd/rsmu_core.c | 2 ++ + 2 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile +index c66f07edcd0e6..db1ba39de3b59 100644 +--- a/drivers/mfd/Makefile ++++ b/drivers/mfd/Makefile +@@ -280,7 +280,5 @@ obj-$(CONFIG_MFD_INTEL_M10_BMC_PMCI) += intel-m10-bmc-pmci.o + obj-$(CONFIG_MFD_ATC260X) += atc260x-core.o + obj-$(CONFIG_MFD_ATC260X_I2C) += atc260x-i2c.o + +-rsmu-i2c-objs := rsmu_core.o rsmu_i2c.o +-rsmu-spi-objs := rsmu_core.o rsmu_spi.o +-obj-$(CONFIG_MFD_RSMU_I2C) += rsmu-i2c.o +-obj-$(CONFIG_MFD_RSMU_SPI) += rsmu-spi.o ++obj-$(CONFIG_MFD_RSMU_I2C) += rsmu_i2c.o rsmu_core.o ++obj-$(CONFIG_MFD_RSMU_SPI) += rsmu_spi.o rsmu_core.o +diff --git a/drivers/mfd/rsmu_core.c b/drivers/mfd/rsmu_core.c +index 29437fd0bd5bf..fd04a6e5dfa31 100644 +--- a/drivers/mfd/rsmu_core.c ++++ b/drivers/mfd/rsmu_core.c +@@ -78,11 +78,13 @@ int rsmu_core_init(struct rsmu_ddata *rsmu) + + return ret; + } ++EXPORT_SYMBOL_GPL(rsmu_core_init); + + void rsmu_core_exit(struct rsmu_ddata *rsmu) + { + mutex_destroy(&rsmu->lock); + } ++EXPORT_SYMBOL_GPL(rsmu_core_exit); + + MODULE_DESCRIPTION("Renesas SMU core driver"); + MODULE_LICENSE("GPL"); +-- +2.43.0 + diff --git a/queue-6.6/mips-octeron-remove-source-file-executable-bit.patch b/queue-6.6/mips-octeron-remove-source-file-executable-bit.patch new file mode 100644 index 00000000000..4b193cec871 --- /dev/null +++ b/queue-6.6/mips-octeron-remove-source-file-executable-bit.patch @@ -0,0 +1,27 @@ +From 66eac247e2320b851ffa631d3e05468750dd483a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 5 Jul 2024 16:48:30 +0900 +Subject: MIPS: Octeron: remove source file executable bit + +From: Dominique Martinet + +[ Upstream commit 89c7f5078935872cf47a713a645affb5037be694 ] + +This does not matter the least, but there is no other .[ch] file in the +repo that is executable, so clean this up. + +Fixes: 29b83a64df3b ("MIPS: Octeon: Add PCIe link status check") +Signed-off-by: Dominique Martinet +Signed-off-by: Thomas Bogendoerfer +Signed-off-by: Sasha Levin +--- + arch/mips/pci/pcie-octeon.c | 0 + 1 file changed, 0 insertions(+), 0 deletions(-) + mode change 100755 => 100644 arch/mips/pci/pcie-octeon.c + +diff --git a/arch/mips/pci/pcie-octeon.c b/arch/mips/pci/pcie-octeon.c +old mode 100755 +new mode 100644 +-- +2.43.0 + diff --git a/queue-6.6/mlxsw-spectrum_acl-fix-acl-scale-regression-and-firm.patch b/queue-6.6/mlxsw-spectrum_acl-fix-acl-scale-regression-and-firm.patch new file mode 100644 index 00000000000..ff8541578ff --- /dev/null +++ b/queue-6.6/mlxsw-spectrum_acl-fix-acl-scale-regression-and-firm.patch @@ -0,0 +1,252 @@ +From 55c571b095d5898145195bde444eef2bc93aa3eb Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 Jun 2024 16:49:43 +0200 +Subject: mlxsw: spectrum_acl: Fix ACL scale regression and firmware errors + +From: Ido Schimmel + +[ Upstream commit 75d8d7a63065b18df9555dbaab0b42d4c6f20943 ] + +ACLs that reside in the algorithmic TCAM (A-TCAM) in Spectrum-2 and +newer ASICs can share the same mask if their masks only differ in up to +8 consecutive bits. For example, consider the following filters: + + # tc filter add dev swp1 ingress pref 1 proto ip flower dst_ip 192.0.2.0/24 action drop + # tc filter add dev swp1 ingress pref 1 proto ip flower dst_ip 198.51.100.128/25 action drop + +The second filter can use the same mask as the first (dst_ip/24) with a +delta of 1 bit. + +However, the above only works because the two filters have different +values in the common unmasked part (dst_ip/24). When entries have the +same value in the common unmasked part they create undesired collisions +in the device since many entries now have the same key. This leads to +firmware errors such as [1] and to a reduced scale. + +Fix by adjusting the hash table key to only include the value in the +common unmasked part. That is, without including the delta bits. That +way the driver will detect the collision during filter insertion and +spill the filter into the circuit TCAM (C-TCAM). + +Add a test case that fails without the fix and adjust existing cases +that check C-TCAM spillage according to the above limitation. + +[1] +mlxsw_spectrum2 0000:06:00.0: EMAD reg access failed (tid=3379b18a00003394,reg_id=3027(ptce3),type=write,status=8(resource not available)) + +Fixes: c22291f7cf45 ("mlxsw: spectrum: acl: Implement delta for ERP") +Reported-by: Alexander Zubkov +Signed-off-by: Ido Schimmel +Reviewed-by: Amit Cohen +Tested-by: Alexander Zubkov +Signed-off-by: Petr Machata +Reviewed-by: Simon Horman +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + .../mellanox/mlxsw/spectrum_acl_atcam.c | 18 +++--- + .../mlxsw/spectrum_acl_bloom_filter.c | 2 +- + .../mellanox/mlxsw/spectrum_acl_tcam.h | 9 +-- + .../drivers/net/mlxsw/spectrum-2/tc_flower.sh | 55 +++++++++++++++++-- + 4 files changed, 63 insertions(+), 21 deletions(-) + +diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_atcam.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_atcam.c +index 4b713832fdd55..f5c0a4214c4e5 100644 +--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_atcam.c ++++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_atcam.c +@@ -391,7 +391,8 @@ mlxsw_sp_acl_atcam_region_entry_insert(struct mlxsw_sp *mlxsw_sp, + if (err) + return err; + +- lkey_id = aregion->ops->lkey_id_get(aregion, aentry->enc_key, erp_id); ++ lkey_id = aregion->ops->lkey_id_get(aregion, aentry->ht_key.enc_key, ++ erp_id); + if (IS_ERR(lkey_id)) + return PTR_ERR(lkey_id); + aentry->lkey_id = lkey_id; +@@ -399,7 +400,7 @@ mlxsw_sp_acl_atcam_region_entry_insert(struct mlxsw_sp *mlxsw_sp, + kvdl_index = mlxsw_afa_block_first_kvdl_index(rulei->act_block); + mlxsw_reg_ptce3_pack(ptce3_pl, true, MLXSW_REG_PTCE3_OP_WRITE_WRITE, + priority, region->tcam_region_info, +- aentry->enc_key, erp_id, ++ aentry->ht_key.enc_key, erp_id, + aentry->delta_info.start, + aentry->delta_info.mask, + aentry->delta_info.value, +@@ -428,7 +429,7 @@ mlxsw_sp_acl_atcam_region_entry_remove(struct mlxsw_sp *mlxsw_sp, + + mlxsw_reg_ptce3_pack(ptce3_pl, false, MLXSW_REG_PTCE3_OP_WRITE_WRITE, 0, + region->tcam_region_info, +- aentry->enc_key, erp_id, ++ aentry->ht_key.enc_key, erp_id, + aentry->delta_info.start, + aentry->delta_info.mask, + aentry->delta_info.value, +@@ -457,7 +458,7 @@ mlxsw_sp_acl_atcam_region_entry_action_replace(struct mlxsw_sp *mlxsw_sp, + kvdl_index = mlxsw_afa_block_first_kvdl_index(rulei->act_block); + mlxsw_reg_ptce3_pack(ptce3_pl, true, MLXSW_REG_PTCE3_OP_WRITE_UPDATE, + priority, region->tcam_region_info, +- aentry->enc_key, erp_id, ++ aentry->ht_key.enc_key, erp_id, + aentry->delta_info.start, + aentry->delta_info.mask, + aentry->delta_info.value, +@@ -480,15 +481,13 @@ __mlxsw_sp_acl_atcam_entry_add(struct mlxsw_sp *mlxsw_sp, + int err; + + mlxsw_afk_encode(afk, region->key_info, &rulei->values, +- aentry->ht_key.full_enc_key, mask); ++ aentry->ht_key.enc_key, mask); + + erp_mask = mlxsw_sp_acl_erp_mask_get(aregion, mask, false); + if (IS_ERR(erp_mask)) + return PTR_ERR(erp_mask); + aentry->erp_mask = erp_mask; + aentry->ht_key.erp_id = mlxsw_sp_acl_erp_mask_erp_id(erp_mask); +- memcpy(aentry->enc_key, aentry->ht_key.full_enc_key, +- sizeof(aentry->enc_key)); + + /* Compute all needed delta information and clear the delta bits + * from the encrypted key. +@@ -497,9 +496,8 @@ __mlxsw_sp_acl_atcam_entry_add(struct mlxsw_sp *mlxsw_sp, + aentry->delta_info.start = mlxsw_sp_acl_erp_delta_start(delta); + aentry->delta_info.mask = mlxsw_sp_acl_erp_delta_mask(delta); + aentry->delta_info.value = +- mlxsw_sp_acl_erp_delta_value(delta, +- aentry->ht_key.full_enc_key); +- mlxsw_sp_acl_erp_delta_clear(delta, aentry->enc_key); ++ mlxsw_sp_acl_erp_delta_value(delta, aentry->ht_key.enc_key); ++ mlxsw_sp_acl_erp_delta_clear(delta, aentry->ht_key.enc_key); + + /* Add rule to the list of A-TCAM rules, assuming this + * rule is intended to A-TCAM. In case this rule does +diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_bloom_filter.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_bloom_filter.c +index 95f63fcf4ba1f..a54eedb69a3f5 100644 +--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_bloom_filter.c ++++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_bloom_filter.c +@@ -249,7 +249,7 @@ __mlxsw_sp_acl_bf_key_encode(struct mlxsw_sp_acl_atcam_region *aregion, + memcpy(chunk + pad_bytes, &erp_region_id, + sizeof(erp_region_id)); + memcpy(chunk + key_offset, +- &aentry->enc_key[chunk_key_offsets[chunk_index]], ++ &aentry->ht_key.enc_key[chunk_key_offsets[chunk_index]], + chunk_key_len); + chunk += chunk_len; + } +diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.h b/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.h +index 79a1d86065125..010204f73ea46 100644 +--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.h ++++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_tcam.h +@@ -167,9 +167,9 @@ struct mlxsw_sp_acl_atcam_region { + }; + + struct mlxsw_sp_acl_atcam_entry_ht_key { +- char full_enc_key[MLXSW_REG_PTCEX_FLEX_KEY_BLOCKS_LEN]; /* Encoded +- * key. +- */ ++ char enc_key[MLXSW_REG_PTCEX_FLEX_KEY_BLOCKS_LEN]; /* Encoded key, minus ++ * delta bits. ++ */ + u8 erp_id; + }; + +@@ -181,9 +181,6 @@ struct mlxsw_sp_acl_atcam_entry { + struct rhash_head ht_node; + struct list_head list; /* Member in entries_list */ + struct mlxsw_sp_acl_atcam_entry_ht_key ht_key; +- char enc_key[MLXSW_REG_PTCEX_FLEX_KEY_BLOCKS_LEN]; /* Encoded key, +- * minus delta bits. +- */ + struct { + u16 start; + u8 mask; +diff --git a/tools/testing/selftests/drivers/net/mlxsw/spectrum-2/tc_flower.sh b/tools/testing/selftests/drivers/net/mlxsw/spectrum-2/tc_flower.sh +index 616d3581419ca..21d0f419cc6d7 100755 +--- a/tools/testing/selftests/drivers/net/mlxsw/spectrum-2/tc_flower.sh ++++ b/tools/testing/selftests/drivers/net/mlxsw/spectrum-2/tc_flower.sh +@@ -11,7 +11,7 @@ ALL_TESTS="single_mask_test identical_filters_test two_masks_test \ + multiple_masks_test ctcam_edge_cases_test delta_simple_test \ + delta_two_masks_one_key_test delta_simple_rehash_test \ + bloom_simple_test bloom_complex_test bloom_delta_test \ +- max_erp_entries_test max_group_size_test" ++ max_erp_entries_test max_group_size_test collision_test" + NUM_NETIFS=2 + source $lib_dir/lib.sh + source $lib_dir/tc_common.sh +@@ -457,7 +457,7 @@ delta_two_masks_one_key_test() + { + # If 2 keys are the same and only differ in mask in a way that + # they belong under the same ERP (second is delta of the first), +- # there should be no C-TCAM spill. ++ # there should be C-TCAM spill. + + RET=0 + +@@ -474,8 +474,8 @@ delta_two_masks_one_key_test() + tp_record "mlxsw:*" "tc filter add dev $h2 ingress protocol ip \ + pref 2 handle 102 flower $tcflags dst_ip 192.0.2.2 \ + action drop" +- tp_check_hits "mlxsw:mlxsw_sp_acl_atcam_entry_add_ctcam_spill" 0 +- check_err $? "incorrect C-TCAM spill while inserting the second rule" ++ tp_check_hits "mlxsw:mlxsw_sp_acl_atcam_entry_add_ctcam_spill" 1 ++ check_err $? "C-TCAM spill did not happen while inserting the second rule" + + $MZ $h1 -c 1 -p 64 -a $h1mac -b $h2mac -A 192.0.2.1 -B 192.0.2.2 \ + -t ip -q +@@ -1087,6 +1087,53 @@ max_group_size_test() + log_test "max ACL group size test ($tcflags). max size $max_size" + } + ++collision_test() ++{ ++ # Filters cannot share an eRP if in the common unmasked part (i.e., ++ # without the delta bits) they have the same values. If the driver does ++ # not prevent such configuration (by spilling into the C-TCAM), then ++ # multiple entries will be present in the device with the same key, ++ # leading to collisions and a reduced scale. ++ # ++ # Create such a scenario and make sure all the filters are successfully ++ # added. ++ ++ RET=0 ++ ++ local ret ++ ++ if [[ "$tcflags" != "skip_sw" ]]; then ++ return 0; ++ fi ++ ++ # Add a single dst_ip/24 filter and multiple dst_ip/32 filters that all ++ # have the same values in the common unmasked part (dst_ip/24). ++ ++ tc filter add dev $h2 ingress pref 1 proto ipv4 handle 101 \ ++ flower $tcflags dst_ip 198.51.100.0/24 \ ++ action drop ++ ++ for i in {0..255}; do ++ tc filter add dev $h2 ingress pref 2 proto ipv4 \ ++ handle $((102 + i)) \ ++ flower $tcflags dst_ip 198.51.100.${i}/32 \ ++ action drop ++ ret=$? ++ [[ $ret -ne 0 ]] && break ++ done ++ ++ check_err $ret "failed to add all the filters" ++ ++ for i in {255..0}; do ++ tc filter del dev $h2 ingress pref 2 proto ipv4 \ ++ handle $((102 + i)) flower ++ done ++ ++ tc filter del dev $h2 ingress pref 1 proto ipv4 handle 101 flower ++ ++ log_test "collision test ($tcflags)" ++} ++ + setup_prepare() + { + h1=${NETIFS[p1]} +-- +2.43.0 + diff --git a/queue-6.6/mlxsw-spectrum_acl_erp-fix-object-nesting-warning.patch b/queue-6.6/mlxsw-spectrum_acl_erp-fix-object-nesting-warning.patch new file mode 100644 index 00000000000..8f312da18bf --- /dev/null +++ b/queue-6.6/mlxsw-spectrum_acl_erp-fix-object-nesting-warning.patch @@ -0,0 +1,184 @@ +From e65904a9265ab535b08912e4a366eda423a8d766 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 Jun 2024 16:49:42 +0200 +Subject: mlxsw: spectrum_acl_erp: Fix object nesting warning + +From: Ido Schimmel + +[ Upstream commit 97d833ceb27dc19f8777d63f90be4a27b5daeedf ] + +ACLs in Spectrum-2 and newer ASICs can reside in the algorithmic TCAM +(A-TCAM) or in the ordinary circuit TCAM (C-TCAM). The former can +contain more ACLs (i.e., tc filters), but the number of masks in each +region (i.e., tc chain) is limited. + +In order to mitigate the effects of the above limitation, the device +allows filters to share a single mask if their masks only differ in up +to 8 consecutive bits. For example, dst_ip/25 can be represented using +dst_ip/24 with a delta of 1 bit. The C-TCAM does not have a limit on the +number of masks being used (and therefore does not support mask +aggregation), but can contain a limited number of filters. + +The driver uses the "objagg" library to perform the mask aggregation by +passing it objects that consist of the filter's mask and whether the +filter is to be inserted into the A-TCAM or the C-TCAM since filters in +different TCAMs cannot share a mask. + +The set of created objects is dependent on the insertion order of the +filters and is not necessarily optimal. Therefore, the driver will +periodically ask the library to compute a more optimal set ("hints") by +looking at all the existing objects. + +When the library asks the driver whether two objects can be aggregated +the driver only compares the provided masks and ignores the A-TCAM / +C-TCAM indication. This is the right thing to do since the goal is to +move as many filters as possible to the A-TCAM. The driver also forbids +two identical masks from being aggregated since this can only happen if +one was intentionally put in the C-TCAM to avoid a conflict in the +A-TCAM. + +The above can result in the following set of hints: + +H1: {mask X, A-TCAM} -> H2: {mask Y, A-TCAM} // X is Y + delta +H3: {mask Y, C-TCAM} -> H4: {mask Z, A-TCAM} // Y is Z + delta + +After getting the hints from the library the driver will start migrating +filters from one region to another while consulting the computed hints +and instructing the device to perform a lookup in both regions during +the transition. + +Assuming a filter with mask X is being migrated into the A-TCAM in the +new region, the hints lookup will return H1. Since H2 is the parent of +H1, the library will try to find the object associated with it and +create it if necessary in which case another hints lookup (recursive) +will be performed. This hints lookup for {mask Y, A-TCAM} will either +return H2 or H3 since the driver passes the library an object comparison +function that ignores the A-TCAM / C-TCAM indication. + +This can eventually lead to nested objects which are not supported by +the library [1]. + +Fix by removing the object comparison function from both the driver and +the library as the driver was the only user. That way the lookup will +only return exact matches. + +I do not have a reliable reproducer that can reproduce the issue in a +timely manner, but before the fix the issue would reproduce in several +minutes and with the fix it does not reproduce in over an hour. + +Note that the current usefulness of the hints is limited because they +include the C-TCAM indication and represent aggregation that cannot +actually happen. This will be addressed in net-next. + +[1] +WARNING: CPU: 0 PID: 153 at lib/objagg.c:170 objagg_obj_parent_assign+0xb5/0xd0 +Modules linked in: +CPU: 0 PID: 153 Comm: kworker/0:18 Not tainted 6.9.0-rc6-custom-g70fbc2c1c38b #42 +Hardware name: Mellanox Technologies Ltd. MSN3700C/VMOD0008, BIOS 5.11 10/10/2018 +Workqueue: mlxsw_core mlxsw_sp_acl_tcam_vregion_rehash_work +RIP: 0010:objagg_obj_parent_assign+0xb5/0xd0 +[...] +Call Trace: + + __objagg_obj_get+0x2bb/0x580 + objagg_obj_get+0xe/0x80 + mlxsw_sp_acl_erp_mask_get+0xb5/0xf0 + mlxsw_sp_acl_atcam_entry_add+0xe8/0x3c0 + mlxsw_sp_acl_tcam_entry_create+0x5e/0xa0 + mlxsw_sp_acl_tcam_vchunk_migrate_one+0x16b/0x270 + mlxsw_sp_acl_tcam_vregion_rehash_work+0xbe/0x510 + process_one_work+0x151/0x370 + +Fixes: 9069a3817d82 ("lib: objagg: implement optimization hints assembly and use hints for object creation") +Signed-off-by: Ido Schimmel +Reviewed-by: Amit Cohen +Tested-by: Alexander Zubkov +Signed-off-by: Petr Machata +Reviewed-by: Simon Horman +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + .../ethernet/mellanox/mlxsw/spectrum_acl_erp.c | 13 ------------- + include/linux/objagg.h | 1 - + lib/objagg.c | 15 --------------- + 3 files changed, 29 deletions(-) + +diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_erp.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_erp.c +index d231f4d2888be..9eee229303cce 100644 +--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_erp.c ++++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_acl_erp.c +@@ -1217,18 +1217,6 @@ static bool mlxsw_sp_acl_erp_delta_check(void *priv, const void *parent_obj, + return err ? false : true; + } + +-static int mlxsw_sp_acl_erp_hints_obj_cmp(const void *obj1, const void *obj2) +-{ +- const struct mlxsw_sp_acl_erp_key *key1 = obj1; +- const struct mlxsw_sp_acl_erp_key *key2 = obj2; +- +- /* For hints purposes, two objects are considered equal +- * in case the masks are the same. Does not matter what +- * the "ctcam" value is. +- */ +- return memcmp(key1->mask, key2->mask, sizeof(key1->mask)); +-} +- + static void *mlxsw_sp_acl_erp_delta_create(void *priv, void *parent_obj, + void *obj) + { +@@ -1308,7 +1296,6 @@ static void mlxsw_sp_acl_erp_root_destroy(void *priv, void *root_priv) + static const struct objagg_ops mlxsw_sp_acl_erp_objagg_ops = { + .obj_size = sizeof(struct mlxsw_sp_acl_erp_key), + .delta_check = mlxsw_sp_acl_erp_delta_check, +- .hints_obj_cmp = mlxsw_sp_acl_erp_hints_obj_cmp, + .delta_create = mlxsw_sp_acl_erp_delta_create, + .delta_destroy = mlxsw_sp_acl_erp_delta_destroy, + .root_create = mlxsw_sp_acl_erp_root_create, +diff --git a/include/linux/objagg.h b/include/linux/objagg.h +index 78021777df462..6df5b887dc547 100644 +--- a/include/linux/objagg.h ++++ b/include/linux/objagg.h +@@ -8,7 +8,6 @@ struct objagg_ops { + size_t obj_size; + bool (*delta_check)(void *priv, const void *parent_obj, + const void *obj); +- int (*hints_obj_cmp)(const void *obj1, const void *obj2); + void * (*delta_create)(void *priv, void *parent_obj, void *obj); + void (*delta_destroy)(void *priv, void *delta_priv); + void * (*root_create)(void *priv, void *obj, unsigned int root_id); +diff --git a/lib/objagg.c b/lib/objagg.c +index 90f3aa68c30a0..1608895b009c8 100644 +--- a/lib/objagg.c ++++ b/lib/objagg.c +@@ -906,20 +906,6 @@ static const struct objagg_opt_algo *objagg_opt_algos[] = { + [OBJAGG_OPT_ALGO_SIMPLE_GREEDY] = &objagg_opt_simple_greedy, + }; + +-static int objagg_hints_obj_cmp(struct rhashtable_compare_arg *arg, +- const void *obj) +-{ +- struct rhashtable *ht = arg->ht; +- struct objagg_hints *objagg_hints = +- container_of(ht, struct objagg_hints, node_ht); +- const struct objagg_ops *ops = objagg_hints->ops; +- const char *ptr = obj; +- +- ptr += ht->p.key_offset; +- return ops->hints_obj_cmp ? ops->hints_obj_cmp(ptr, arg->key) : +- memcmp(ptr, arg->key, ht->p.key_len); +-} +- + /** + * objagg_hints_get - obtains hints instance + * @objagg: objagg instance +@@ -958,7 +944,6 @@ struct objagg_hints *objagg_hints_get(struct objagg *objagg, + offsetof(struct objagg_hints_node, obj); + objagg_hints->ht_params.head_offset = + offsetof(struct objagg_hints_node, ht_node); +- objagg_hints->ht_params.obj_cmpfn = objagg_hints_obj_cmp; + + err = rhashtable_init(&objagg_hints->node_ht, &objagg_hints->ht_params); + if (err) +-- +2.43.0 + diff --git a/queue-6.6/mtd-make-mtd_test.c-a-separate-module.patch b/queue-6.6/mtd-make-mtd_test.c-a-separate-module.patch new file mode 100644 index 00000000000..686d325c9e1 --- /dev/null +++ b/queue-6.6/mtd-make-mtd_test.c-a-separate-module.patch @@ -0,0 +1,114 @@ +From 4553e0ad08e8e59856494eb6f7861e6cfac9417f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 29 May 2024 11:50:39 +0200 +Subject: mtd: make mtd_test.c a separate module + +From: Arnd Bergmann + +[ Upstream commit a5cf054d325e6f362e82fe6d124a1871a4af8174 ] + +This file gets linked into nine different modules, which causes a warning: + +scripts/Makefile.build:236: drivers/mtd/tests/Makefile: mtd_test.o is added to multiple modules: mtd_nandbiterrs mtd_oobtest mtd_pagetest mtd_readtest mtd_speedtest mtd_stresstest mtd_subpagetest mtd_torturetest + +Make it a separate module instead. + +Fixes: a995c792280d ("mtd: tests: rename sources in order to link a helper object") +Signed-off-by: Arnd Bergmann +Signed-off-by: Miquel Raynal +Link: https://lore.kernel.org/linux-mtd/20240529095049.1915393-1-arnd@kernel.org +Signed-off-by: Sasha Levin +--- + drivers/mtd/tests/Makefile | 34 +++++++++++++++++----------------- + drivers/mtd/tests/mtd_test.c | 9 +++++++++ + 2 files changed, 26 insertions(+), 17 deletions(-) + +diff --git a/drivers/mtd/tests/Makefile b/drivers/mtd/tests/Makefile +index 5de0378f90dbd..7dae831ee8b6b 100644 +--- a/drivers/mtd/tests/Makefile ++++ b/drivers/mtd/tests/Makefile +@@ -1,19 +1,19 @@ + # SPDX-License-Identifier: GPL-2.0 +-obj-$(CONFIG_MTD_TESTS) += mtd_oobtest.o +-obj-$(CONFIG_MTD_TESTS) += mtd_pagetest.o +-obj-$(CONFIG_MTD_TESTS) += mtd_readtest.o +-obj-$(CONFIG_MTD_TESTS) += mtd_speedtest.o +-obj-$(CONFIG_MTD_TESTS) += mtd_stresstest.o +-obj-$(CONFIG_MTD_TESTS) += mtd_subpagetest.o +-obj-$(CONFIG_MTD_TESTS) += mtd_torturetest.o +-obj-$(CONFIG_MTD_TESTS) += mtd_nandecctest.o +-obj-$(CONFIG_MTD_TESTS) += mtd_nandbiterrs.o ++obj-$(CONFIG_MTD_TESTS) += mtd_oobtest.o mtd_test.o ++obj-$(CONFIG_MTD_TESTS) += mtd_pagetest.o mtd_test.o ++obj-$(CONFIG_MTD_TESTS) += mtd_readtest.o mtd_test.o ++obj-$(CONFIG_MTD_TESTS) += mtd_speedtest.o mtd_test.o ++obj-$(CONFIG_MTD_TESTS) += mtd_stresstest.o mtd_test.o ++obj-$(CONFIG_MTD_TESTS) += mtd_subpagetest.o mtd_test.o ++obj-$(CONFIG_MTD_TESTS) += mtd_torturetest.o mtd_test.o ++obj-$(CONFIG_MTD_TESTS) += mtd_nandecctest.o mtd_test.o ++obj-$(CONFIG_MTD_TESTS) += mtd_nandbiterrs.o mtd_test.o + +-mtd_oobtest-objs := oobtest.o mtd_test.o +-mtd_pagetest-objs := pagetest.o mtd_test.o +-mtd_readtest-objs := readtest.o mtd_test.o +-mtd_speedtest-objs := speedtest.o mtd_test.o +-mtd_stresstest-objs := stresstest.o mtd_test.o +-mtd_subpagetest-objs := subpagetest.o mtd_test.o +-mtd_torturetest-objs := torturetest.o mtd_test.o +-mtd_nandbiterrs-objs := nandbiterrs.o mtd_test.o ++mtd_oobtest-objs := oobtest.o ++mtd_pagetest-objs := pagetest.o ++mtd_readtest-objs := readtest.o ++mtd_speedtest-objs := speedtest.o ++mtd_stresstest-objs := stresstest.o ++mtd_subpagetest-objs := subpagetest.o ++mtd_torturetest-objs := torturetest.o ++mtd_nandbiterrs-objs := nandbiterrs.o +diff --git a/drivers/mtd/tests/mtd_test.c b/drivers/mtd/tests/mtd_test.c +index c84250beffdc9..f391e0300cdc9 100644 +--- a/drivers/mtd/tests/mtd_test.c ++++ b/drivers/mtd/tests/mtd_test.c +@@ -25,6 +25,7 @@ int mtdtest_erase_eraseblock(struct mtd_info *mtd, unsigned int ebnum) + + return 0; + } ++EXPORT_SYMBOL_GPL(mtdtest_erase_eraseblock); + + static int is_block_bad(struct mtd_info *mtd, unsigned int ebnum) + { +@@ -57,6 +58,7 @@ int mtdtest_scan_for_bad_eraseblocks(struct mtd_info *mtd, unsigned char *bbt, + + return 0; + } ++EXPORT_SYMBOL_GPL(mtdtest_scan_for_bad_eraseblocks); + + int mtdtest_erase_good_eraseblocks(struct mtd_info *mtd, unsigned char *bbt, + unsigned int eb, int ebcnt) +@@ -75,6 +77,7 @@ int mtdtest_erase_good_eraseblocks(struct mtd_info *mtd, unsigned char *bbt, + + return 0; + } ++EXPORT_SYMBOL_GPL(mtdtest_erase_good_eraseblocks); + + int mtdtest_read(struct mtd_info *mtd, loff_t addr, size_t size, void *buf) + { +@@ -92,6 +95,7 @@ int mtdtest_read(struct mtd_info *mtd, loff_t addr, size_t size, void *buf) + + return err; + } ++EXPORT_SYMBOL_GPL(mtdtest_read); + + int mtdtest_write(struct mtd_info *mtd, loff_t addr, size_t size, + const void *buf) +@@ -107,3 +111,8 @@ int mtdtest_write(struct mtd_info *mtd, loff_t addr, size_t size, + + return err; + } ++EXPORT_SYMBOL_GPL(mtdtest_write); ++ ++MODULE_LICENSE("GPL"); ++MODULE_DESCRIPTION("MTD function test helpers"); ++MODULE_AUTHOR("Akinobu Mita"); +-- +2.43.0 + diff --git a/queue-6.6/net-bridge-mst-check-vlan-state-for-egress-decision.patch b/queue-6.6/net-bridge-mst-check-vlan-state-for-egress-decision.patch new file mode 100644 index 00000000000..a82b67d40a6 --- /dev/null +++ b/queue-6.6/net-bridge-mst-check-vlan-state-for-egress-decision.patch @@ -0,0 +1,45 @@ +From 7cf8072a377b76d3c95207202952772eb8e975c5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 12 Jul 2024 13:31:33 +1200 +Subject: net: bridge: mst: Check vlan state for egress decision + +From: Elliot Ayrey + +[ Upstream commit 0a1868b93fad5938dbcca77286b25bf211c49f7a ] + +If a port is blocking in the common instance but forwarding in an MST +instance, traffic egressing the bridge will be dropped because the +state of the common instance is overriding that of the MST instance. + +Fix this by skipping the port state check in MST mode to allow +checking the vlan state via br_allowed_egress(). This is similar to +what happens in br_handle_frame_finish() when checking ingress +traffic, which was introduced in the change below. + +Fixes: ec7328b59176 ("net: bridge: mst: Multiple Spanning Tree (MST) mode") +Signed-off-by: Elliot Ayrey +Acked-by: Nikolay Aleksandrov +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + net/bridge/br_forward.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/net/bridge/br_forward.c b/net/bridge/br_forward.c +index d97064d460dc7..e19b583ff2c6d 100644 +--- a/net/bridge/br_forward.c ++++ b/net/bridge/br_forward.c +@@ -25,8 +25,8 @@ static inline int should_deliver(const struct net_bridge_port *p, + + vg = nbp_vlan_group_rcu(p); + return ((p->flags & BR_HAIRPIN_MODE) || skb->dev != p->dev) && +- p->state == BR_STATE_FORWARDING && br_allowed_egress(vg, skb) && +- nbp_switchdev_allowed_egress(p, skb) && ++ (br_mst_is_enabled(p->br) || p->state == BR_STATE_FORWARDING) && ++ br_allowed_egress(vg, skb) && nbp_switchdev_allowed_egress(p, skb) && + !br_skb_isolated(p, skb); + } + +-- +2.43.0 + diff --git a/queue-6.6/net-dsa-b53-limit-chip-wide-jumbo-frame-config-to-cp.patch b/queue-6.6/net-dsa-b53-limit-chip-wide-jumbo-frame-config-to-cp.patch new file mode 100644 index 00000000000..9f6ca8469c4 --- /dev/null +++ b/queue-6.6/net-dsa-b53-limit-chip-wide-jumbo-frame-config-to-cp.patch @@ -0,0 +1,49 @@ +From f00e47cc96bc9b4a1f1c0e5942281249fb878e0a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 17 Jul 2024 11:08:20 +0200 +Subject: net: dsa: b53: Limit chip-wide jumbo frame config to CPU ports + +From: Martin Willi + +[ Upstream commit c5118072e228e7e4385fc5ac46b2e31cf6c4f2d3 ] + +Broadcom switches supported by the b53 driver use a chip-wide jumbo frame +configuration. In the commit referenced with the Fixes tag, the setting +is applied just for the last port changing its MTU. + +While configuring CPU ports accounts for tagger overhead, user ports do +not. When setting the MTU for a user port, the chip-wide setting is +reduced to not include the tagger overhead, resulting in an potentially +insufficient chip-wide maximum frame size for the CPU port. + +As, by design, the CPU port MTU is adjusted for any user port change, +apply the chip-wide setting only for CPU ports. This aligns the driver +to the behavior of other switch drivers. + +Fixes: 6ae5834b983a ("net: dsa: b53: add MTU configuration support") +Suggested-by: Vladimir Oltean +Signed-off-by: Martin Willi +Reviewed-by: Vladimir Oltean +Signed-off-by: Paolo Abeni +Signed-off-by: Sasha Levin +--- + drivers/net/dsa/b53/b53_common.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/net/dsa/b53/b53_common.c b/drivers/net/dsa/b53/b53_common.c +index 4e27dc913cf71..ae1c4dc35fe33 100644 +--- a/drivers/net/dsa/b53/b53_common.c ++++ b/drivers/net/dsa/b53/b53_common.c +@@ -2265,6 +2265,9 @@ static int b53_change_mtu(struct dsa_switch *ds, int port, int mtu) + if (is5325(dev) || is5365(dev)) + return -EOPNOTSUPP; + ++ if (!dsa_is_cpu_port(ds, port)) ++ return 0; ++ + enable_jumbo = (mtu >= JMS_MIN_SIZE); + allow_10_100 = (dev->chip_id == BCM583XX_DEVICE_ID); + +-- +2.43.0 + diff --git a/queue-6.6/net-dsa-mv88e6xxx-limit-chip-wide-frame-size-config-.patch b/queue-6.6/net-dsa-mv88e6xxx-limit-chip-wide-frame-size-config-.patch new file mode 100644 index 00000000000..c9a552d7dad --- /dev/null +++ b/queue-6.6/net-dsa-mv88e6xxx-limit-chip-wide-frame-size-config-.patch @@ -0,0 +1,50 @@ +From 554ab15f37c18cb238f01c798026e0f158a9f39c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 17 Jul 2024 11:08:19 +0200 +Subject: net: dsa: mv88e6xxx: Limit chip-wide frame size config to CPU ports + +From: Martin Willi + +[ Upstream commit 66b6095c264e1b4e0a441c6329861806504e06c6 ] + +Marvell chips not supporting per-port jumbo frame size configurations use +a chip-wide frame size configuration. In the commit referenced with the +Fixes tag, the setting is applied just for the last port changing its MTU. + +While configuring CPU ports accounts for tagger overhead, user ports do +not. When setting the MTU for a user port, the chip-wide setting is +reduced to not include the tagger overhead, resulting in an potentially +insufficient maximum frame size for the CPU port. Specifically, sending +full-size frames from the CPU port on a MV88E6097 having a user port MTU +of 1500 bytes results in dropped frames. + +As, by design, the CPU port MTU is adjusted for any user port change, +apply the chip-wide setting only for CPU ports. + +Fixes: 1baf0fac10fb ("net: dsa: mv88e6xxx: Use chip-wide max frame size for MTU") +Suggested-by: Vladimir Oltean +Signed-off-by: Martin Willi +Reviewed-by: Vladimir Oltean +Signed-off-by: Paolo Abeni +Signed-off-by: Sasha Levin +--- + drivers/net/dsa/mv88e6xxx/chip.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c +index 354d4af134562..3877744193e2a 100644 +--- a/drivers/net/dsa/mv88e6xxx/chip.c ++++ b/drivers/net/dsa/mv88e6xxx/chip.c +@@ -3490,7 +3490,8 @@ static int mv88e6xxx_change_mtu(struct dsa_switch *ds, int port, int new_mtu) + mv88e6xxx_reg_lock(chip); + if (chip->info->ops->port_set_jumbo_size) + ret = chip->info->ops->port_set_jumbo_size(chip, port, new_mtu); +- else if (chip->info->ops->set_max_frame_size) ++ else if (chip->info->ops->set_max_frame_size && ++ dsa_is_cpu_port(ds, port)) + ret = chip->info->ops->set_max_frame_size(chip, new_mtu); + mv88e6xxx_reg_unlock(chip); + +-- +2.43.0 + diff --git a/queue-6.6/net-esp-cleanup-esp_output_tail_tcp-in-case-of-unsup.patch b/queue-6.6/net-esp-cleanup-esp_output_tail_tcp-in-case-of-unsup.patch new file mode 100644 index 00000000000..8ca09866fcb --- /dev/null +++ b/queue-6.6/net-esp-cleanup-esp_output_tail_tcp-in-case-of-unsup.patch @@ -0,0 +1,63 @@ +From 5813a8ab6449c9f21cb8257a90f4cf028f1e51e6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 18 May 2024 13:04:39 +0000 +Subject: net: esp: cleanup esp_output_tail_tcp() in case of unsupported + ESPINTCP + +From: Hagar Hemdan + +[ Upstream commit 96f887a612e4cda89efc3f54bc10c1997e3ab0e9 ] + +xmit() functions should consume skb or return error codes in error +paths. +When the configuration "CONFIG_INET_ESPINTCP" is not set, the +implementation of the function "esp_output_tail_tcp" violates this rule. +The function frees the skb and returns the error code. +This change removes the kfree_skb from both functions, for both +esp4 and esp6. +WARN_ON is added because esp_output_tail_tcp() should never be called if +CONFIG_INET_ESPINTCP is not set. + +This bug was discovered and resolved using Coverity Static Analysis +Security Testing (SAST) by Synopsys, Inc. + +Fixes: e27cca96cd68 ("xfrm: add espintcp (RFC 8229)") +Signed-off-by: Hagar Hemdan +Signed-off-by: Steffen Klassert +Signed-off-by: Sasha Levin +--- + net/ipv4/esp4.c | 3 +-- + net/ipv6/esp6.c | 3 +-- + 2 files changed, 2 insertions(+), 4 deletions(-) + +diff --git a/net/ipv4/esp4.c b/net/ipv4/esp4.c +index fe501d2186bcf..eeace9b509cec 100644 +--- a/net/ipv4/esp4.c ++++ b/net/ipv4/esp4.c +@@ -238,8 +238,7 @@ static int esp_output_tail_tcp(struct xfrm_state *x, struct sk_buff *skb) + #else + static int esp_output_tail_tcp(struct xfrm_state *x, struct sk_buff *skb) + { +- kfree_skb(skb); +- ++ WARN_ON(1); + return -EOPNOTSUPP; + } + #endif +diff --git a/net/ipv6/esp6.c b/net/ipv6/esp6.c +index a3fa3eda388a4..62bb9651133c4 100644 +--- a/net/ipv6/esp6.c ++++ b/net/ipv6/esp6.c +@@ -255,8 +255,7 @@ static int esp_output_tail_tcp(struct xfrm_state *x, struct sk_buff *skb) + #else + static int esp_output_tail_tcp(struct xfrm_state *x, struct sk_buff *skb) + { +- kfree_skb(skb); +- ++ WARN_ON(1); + return -EOPNOTSUPP; + } + #endif +-- +2.43.0 + diff --git a/queue-6.6/net-fec-fix-fec_ecr_en1588-being-cleared-on-link-dow.patch b/queue-6.6/net-fec-fix-fec_ecr_en1588-being-cleared-on-link-dow.patch new file mode 100644 index 00000000000..ed9b67dcca7 --- /dev/null +++ b/queue-6.6/net-fec-fix-fec_ecr_en1588-being-cleared-on-link-dow.patch @@ -0,0 +1,50 @@ +From a99f64830c525922b49139215fc270d3cb52af1b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 19 Jun 2024 14:31:11 +0200 +Subject: net: fec: Fix FEC_ECR_EN1588 being cleared on link-down +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Csókás, Bence + +[ Upstream commit c32fe1986f27cac329767d3497986e306cad1d5e ] + +FEC_ECR_EN1588 bit gets cleared after MAC reset in `fec_stop()`, which +makes all 1588 functionality shut down, and all the extended registers +disappear, on link-down, making the adapter fall back to compatibility +"dumb mode". However, some functionality needs to be retained (e.g. PPS) +even without link. + +Fixes: 6605b730c061 ("FEC: Add time stamping code and a PTP hardware clock") +Cc: Richard Cochran +Reviewed-by: Andrew Lunn +Link: https://lore.kernel.org/netdev/5fa9fadc-a89d-467a-aae9-c65469ff5fe1@lunn.ch/ +Signed-off-by: Csókás, Bence +Reviewed-by: Wei Fang +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/freescale/fec_main.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +diff --git a/drivers/net/ethernet/freescale/fec_main.c b/drivers/net/ethernet/freescale/fec_main.c +index 08d6d7a6ac42e..5604a47b35b2a 100644 +--- a/drivers/net/ethernet/freescale/fec_main.c ++++ b/drivers/net/ethernet/freescale/fec_main.c +@@ -1342,6 +1342,12 @@ fec_stop(struct net_device *ndev) + writel(FEC_ECR_ETHEREN, fep->hwp + FEC_ECNTRL); + writel(rmii_mode, fep->hwp + FEC_R_CNTRL); + } ++ ++ if (fep->bufdesc_ex) { ++ val = readl(fep->hwp + FEC_ECNTRL); ++ val |= FEC_ECR_EN1588; ++ writel(val, fep->hwp + FEC_ECNTRL); ++ } + } + + static void +-- +2.43.0 + diff --git a/queue-6.6/net-fec-refactor-define-magic-constants.patch b/queue-6.6/net-fec-refactor-define-magic-constants.patch new file mode 100644 index 00000000000..81dc5d53710 --- /dev/null +++ b/queue-6.6/net-fec-refactor-define-magic-constants.patch @@ -0,0 +1,149 @@ +From 1e25d891288e496e9fb975b33c1acf96f6ab6a4b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 12 Feb 2024 16:37:17 +0100 +Subject: net: fec: Refactor: #define magic constants +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Csókás Bence + +[ Upstream commit ff049886671ccd4e624a30ec464cb20e4c39a313 ] + +Add defines for bits of ECR, RCR control registers, TX watermark etc. + +Signed-off-by: Csókás Bence +Reviewed-by: Andrew Lunn +Link: https://lore.kernel.org/r/20240212153717.10023-1-csokas.bence@prolan.hu +Signed-off-by: Jakub Kicinski +Stable-dep-of: c32fe1986f27 ("net: fec: Fix FEC_ECR_EN1588 being cleared on link-down") +Signed-off-by: Sasha Levin +--- + drivers/net/ethernet/freescale/fec_main.c | 46 +++++++++++++++-------- + 1 file changed, 30 insertions(+), 16 deletions(-) + +diff --git a/drivers/net/ethernet/freescale/fec_main.c b/drivers/net/ethernet/freescale/fec_main.c +index d675f9d5f3612..08d6d7a6ac42e 100644 +--- a/drivers/net/ethernet/freescale/fec_main.c ++++ b/drivers/net/ethernet/freescale/fec_main.c +@@ -283,8 +283,8 @@ MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address"); + #define PKT_MINBUF_SIZE 64 + + /* FEC receive acceleration */ +-#define FEC_RACC_IPDIS (1 << 1) +-#define FEC_RACC_PRODIS (1 << 2) ++#define FEC_RACC_IPDIS BIT(1) ++#define FEC_RACC_PRODIS BIT(2) + #define FEC_RACC_SHIFT16 BIT(7) + #define FEC_RACC_OPTIONS (FEC_RACC_IPDIS | FEC_RACC_PRODIS) + +@@ -316,8 +316,23 @@ MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address"); + #define FEC_MMFR_TA (2 << 16) + #define FEC_MMFR_DATA(v) (v & 0xffff) + /* FEC ECR bits definition */ +-#define FEC_ECR_MAGICEN (1 << 2) +-#define FEC_ECR_SLEEP (1 << 3) ++#define FEC_ECR_RESET BIT(0) ++#define FEC_ECR_ETHEREN BIT(1) ++#define FEC_ECR_MAGICEN BIT(2) ++#define FEC_ECR_SLEEP BIT(3) ++#define FEC_ECR_EN1588 BIT(4) ++#define FEC_ECR_BYTESWP BIT(8) ++/* FEC RCR bits definition */ ++#define FEC_RCR_LOOP BIT(0) ++#define FEC_RCR_HALFDPX BIT(1) ++#define FEC_RCR_MII BIT(2) ++#define FEC_RCR_PROMISC BIT(3) ++#define FEC_RCR_BC_REJ BIT(4) ++#define FEC_RCR_FLOWCTL BIT(5) ++#define FEC_RCR_RMII BIT(8) ++#define FEC_RCR_10BASET BIT(9) ++/* TX WMARK bits */ ++#define FEC_TXWMRK_STRFWD BIT(8) + + #define FEC_MII_TIMEOUT 30000 /* us */ + +@@ -1041,7 +1056,7 @@ fec_restart(struct net_device *ndev) + struct fec_enet_private *fep = netdev_priv(ndev); + u32 temp_mac[2]; + u32 rcntl = OPT_FRAME_SIZE | 0x04; +- u32 ecntl = 0x2; /* ETHEREN */ ++ u32 ecntl = FEC_ECR_ETHEREN; + + /* Whack a reset. We should wait for this. + * For i.MX6SX SOC, enet use AXI bus, we use disable MAC +@@ -1116,18 +1131,18 @@ fec_restart(struct net_device *ndev) + fep->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID) + rcntl |= (1 << 6); + else if (fep->phy_interface == PHY_INTERFACE_MODE_RMII) +- rcntl |= (1 << 8); ++ rcntl |= FEC_RCR_RMII; + else +- rcntl &= ~(1 << 8); ++ rcntl &= ~FEC_RCR_RMII; + + /* 1G, 100M or 10M */ + if (ndev->phydev) { + if (ndev->phydev->speed == SPEED_1000) + ecntl |= (1 << 5); + else if (ndev->phydev->speed == SPEED_100) +- rcntl &= ~(1 << 9); ++ rcntl &= ~FEC_RCR_10BASET; + else +- rcntl |= (1 << 9); ++ rcntl |= FEC_RCR_10BASET; + } + } else { + #ifdef FEC_MIIGSK_ENR +@@ -1186,13 +1201,13 @@ fec_restart(struct net_device *ndev) + + if (fep->quirks & FEC_QUIRK_ENET_MAC) { + /* enable ENET endian swap */ +- ecntl |= (1 << 8); ++ ecntl |= FEC_ECR_BYTESWP; + /* enable ENET store and forward mode */ +- writel(1 << 8, fep->hwp + FEC_X_WMRK); ++ writel(FEC_TXWMRK_STRFWD, fep->hwp + FEC_X_WMRK); + } + + if (fep->bufdesc_ex) +- ecntl |= (1 << 4); ++ ecntl |= FEC_ECR_EN1588; + + if (fep->quirks & FEC_QUIRK_DELAYED_CLKS_SUPPORT && + fep->rgmii_txc_dly) +@@ -1291,7 +1306,7 @@ static void + fec_stop(struct net_device *ndev) + { + struct fec_enet_private *fep = netdev_priv(ndev); +- u32 rmii_mode = readl(fep->hwp + FEC_R_CNTRL) & (1 << 8); ++ u32 rmii_mode = readl(fep->hwp + FEC_R_CNTRL) & FEC_RCR_RMII; + u32 val; + + /* We cannot expect a graceful transmit stop without link !!! */ +@@ -1310,7 +1325,7 @@ fec_stop(struct net_device *ndev) + if (fep->quirks & FEC_QUIRK_HAS_MULTI_QUEUES) { + writel(0, fep->hwp + FEC_ECNTRL); + } else { +- writel(1, fep->hwp + FEC_ECNTRL); ++ writel(FEC_ECR_RESET, fep->hwp + FEC_ECNTRL); + udelay(10); + } + } else { +@@ -1324,12 +1339,11 @@ fec_stop(struct net_device *ndev) + /* We have to keep ENET enabled to have MII interrupt stay working */ + if (fep->quirks & FEC_QUIRK_ENET_MAC && + !(fep->wol_flag & FEC_WOL_FLAG_SLEEP_ON)) { +- writel(2, fep->hwp + FEC_ECNTRL); ++ writel(FEC_ECR_ETHEREN, fep->hwp + FEC_ECNTRL); + writel(rmii_mode, fep->hwp + FEC_R_CNTRL); + } + } + +- + static void + fec_timeout(struct net_device *ndev, unsigned int txqueue) + { +-- +2.43.0 + diff --git a/queue-6.6/net-flow_dissector-use-debug_net_warn_on_once.patch b/queue-6.6/net-flow_dissector-use-debug_net_warn_on_once.patch new file mode 100644 index 00000000000..c79648a300a --- /dev/null +++ b/queue-6.6/net-flow_dissector-use-debug_net_warn_on_once.patch @@ -0,0 +1,81 @@ +From d38c6c02ba1ff89e9135c0e9b96724bab79debab Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 15 Jul 2024 16:14:42 +0200 +Subject: net: flow_dissector: use DEBUG_NET_WARN_ON_ONCE + +From: Pablo Neira Ayuso + +[ Upstream commit 120f1c857a73e52132e473dee89b340440cb692b ] + +The following splat is easy to reproduce upstream as well as in -stable +kernels. Florian Westphal provided the following commit: + + d1dab4f71d37 ("net: add and use __skb_get_hash_symmetric_net") + +but this complementary fix has been also suggested by Willem de Bruijn +and it can be easily backported to -stable kernel which consists in +using DEBUG_NET_WARN_ON_ONCE instead to silence the following splat +given __skb_get_hash() is used by the nftables tracing infrastructure to +to identify packets in traces. + +[69133.561393] ------------[ cut here ]------------ +[69133.561404] WARNING: CPU: 0 PID: 43576 at net/core/flow_dissector.c:1104 __skb_flow_dissect+0x134f/ +[...] +[69133.561944] CPU: 0 PID: 43576 Comm: socat Not tainted 6.10.0-rc7+ #379 +[69133.561959] RIP: 0010:__skb_flow_dissect+0x134f/0x2ad0 +[69133.561970] Code: 83 f9 04 0f 84 b3 00 00 00 45 85 c9 0f 84 aa 00 00 00 41 83 f9 02 0f 84 81 fc ff +ff 44 0f b7 b4 24 80 00 00 00 e9 8b f9 ff ff <0f> 0b e9 20 f3 ff ff 41 f6 c6 20 0f 84 e4 ef ff ff 48 8d 7b 12 e8 +[69133.561979] RSP: 0018:ffffc90000006fc0 EFLAGS: 00010246 +[69133.561988] RAX: 0000000000000000 RBX: ffffffff82f33e20 RCX: ffffffff81ab7e19 +[69133.561994] RDX: dffffc0000000000 RSI: ffffc90000007388 RDI: ffff888103a1b418 +[69133.562001] RBP: ffffc90000007310 R08: 0000000000000000 R09: 0000000000000000 +[69133.562007] R10: ffffc90000007388 R11: ffffffff810cface R12: ffff888103a1b400 +[69133.562013] R13: 0000000000000000 R14: ffffffff82f33e2a R15: ffffffff82f33e28 +[69133.562020] FS: 00007f40f7131740(0000) GS:ffff888390800000(0000) knlGS:0000000000000000 +[69133.562027] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 +[69133.562033] CR2: 00007f40f7346ee0 CR3: 000000015d200001 CR4: 00000000001706f0 +[69133.562040] Call Trace: +[69133.562044] +[69133.562049] ? __warn+0x9f/0x1a0 +[ 1211.841384] ? __skb_flow_dissect+0x107e/0x2860 +[...] +[ 1211.841496] ? bpf_flow_dissect+0x160/0x160 +[ 1211.841753] __skb_get_hash+0x97/0x280 +[ 1211.841765] ? __skb_get_hash_symmetric+0x230/0x230 +[ 1211.841776] ? mod_find+0xbf/0xe0 +[ 1211.841786] ? get_stack_info_noinstr+0x12/0xe0 +[ 1211.841798] ? bpf_ksym_find+0x56/0xe0 +[ 1211.841807] ? __rcu_read_unlock+0x2a/0x70 +[ 1211.841819] nft_trace_init+0x1b9/0x1c0 [nf_tables] +[ 1211.841895] ? nft_trace_notify+0x830/0x830 [nf_tables] +[ 1211.841964] ? get_stack_info+0x2b/0x80 +[ 1211.841975] ? nft_do_chain_arp+0x80/0x80 [nf_tables] +[ 1211.842044] nft_do_chain+0x79c/0x850 [nf_tables] + +Fixes: 9b52e3f267a6 ("flow_dissector: handle no-skb use case") +Suggested-by: Willem de Bruijn +Signed-off-by: Pablo Neira Ayuso +Reviewed-by: Willem de Bruijn +Link: https://patch.msgid.link/20240715141442.43775-1-pablo@netfilter.org +Signed-off-by: Paolo Abeni +Signed-off-by: Sasha Levin +--- + net/core/flow_dissector.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/net/core/flow_dissector.c b/net/core/flow_dissector.c +index 272f09251343d..b22d20cc417b2 100644 +--- a/net/core/flow_dissector.c ++++ b/net/core/flow_dissector.c +@@ -1093,7 +1093,7 @@ bool __skb_flow_dissect(const struct net *net, + } + } + +- WARN_ON_ONCE(!net); ++ DEBUG_NET_WARN_ON_ONCE(!net); + if (net) { + enum netns_bpf_attach_type type = NETNS_BPF_FLOW_DISSECTOR; + struct bpf_prog_array *run_array; +-- +2.43.0 + diff --git a/queue-6.6/net-missing-check-virtio.patch b/queue-6.6/net-missing-check-virtio.patch new file mode 100644 index 00000000000..a3f9c3219ce --- /dev/null +++ b/queue-6.6/net-missing-check-virtio.patch @@ -0,0 +1,119 @@ +From b420fd7d8cce8522a28e43917e54652478196fef Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 13 Jun 2024 12:54:48 +0300 +Subject: net: missing check virtio + +From: Denis Arefev + +[ Upstream commit e269d79c7d35aa3808b1f3c1737d63dab504ddc8 ] + +Two missing check in virtio_net_hdr_to_skb() allowed syzbot +to crash kernels again + +1. After the skb_segment function the buffer may become non-linear +(nr_frags != 0), but since the SKBTX_SHARED_FRAG flag is not set anywhere +the __skb_linearize function will not be executed, then the buffer will +remain non-linear. Then the condition (offset >= skb_headlen(skb)) +becomes true, which causes WARN_ON_ONCE in skb_checksum_help. + +2. The struct sk_buff and struct virtio_net_hdr members must be +mathematically related. +(gso_size) must be greater than (needed) otherwise WARN_ON_ONCE. +(remainder) must be greater than (needed) otherwise WARN_ON_ONCE. +(remainder) may be 0 if division is without remainder. + +offset+2 (4191) > skb_headlen() (1116) +WARNING: CPU: 1 PID: 5084 at net/core/dev.c:3303 skb_checksum_help+0x5e2/0x740 net/core/dev.c:3303 +Modules linked in: +CPU: 1 PID: 5084 Comm: syz-executor336 Not tainted 6.7.0-rc3-syzkaller-00014-gdf60cee26a2e #0 +Hardware name: Google Compute Engine/Google Compute Engine, BIOS Google 11/10/2023 +RIP: 0010:skb_checksum_help+0x5e2/0x740 net/core/dev.c:3303 +Code: 89 e8 83 e0 07 83 c0 03 38 d0 7c 08 84 d2 0f 85 52 01 00 00 44 89 e2 2b 53 74 4c 89 ee 48 c7 c7 40 57 e9 8b e8 af 8f dd f8 90 <0f> 0b 90 90 e9 87 fe ff ff e8 40 0f 6e f9 e9 4b fa ff ff 48 89 ef +RSP: 0018:ffffc90003a9f338 EFLAGS: 00010286 +RAX: 0000000000000000 RBX: ffff888025125780 RCX: ffffffff814db209 +RDX: ffff888015393b80 RSI: ffffffff814db216 RDI: 0000000000000001 +RBP: ffff8880251257f4 R08: 0000000000000001 R09: 0000000000000000 +R10: 0000000000000000 R11: 0000000000000001 R12: 000000000000045c +R13: 000000000000105f R14: ffff8880251257f0 R15: 000000000000105d +FS: 0000555555c24380(0000) GS:ffff8880b9900000(0000) knlGS:0000000000000000 +CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 +CR2: 000000002000f000 CR3: 0000000023151000 CR4: 00000000003506f0 +DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 +DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 +Call Trace: + + ip_do_fragment+0xa1b/0x18b0 net/ipv4/ip_output.c:777 + ip_fragment.constprop.0+0x161/0x230 net/ipv4/ip_output.c:584 + ip_finish_output_gso net/ipv4/ip_output.c:286 [inline] + __ip_finish_output net/ipv4/ip_output.c:308 [inline] + __ip_finish_output+0x49c/0x650 net/ipv4/ip_output.c:295 + ip_finish_output+0x31/0x310 net/ipv4/ip_output.c:323 + NF_HOOK_COND include/linux/netfilter.h:303 [inline] + ip_output+0x13b/0x2a0 net/ipv4/ip_output.c:433 + dst_output include/net/dst.h:451 [inline] + ip_local_out+0xaf/0x1a0 net/ipv4/ip_output.c:129 + iptunnel_xmit+0x5b4/0x9b0 net/ipv4/ip_tunnel_core.c:82 + ipip6_tunnel_xmit net/ipv6/sit.c:1034 [inline] + sit_tunnel_xmit+0xed2/0x28f0 net/ipv6/sit.c:1076 + __netdev_start_xmit include/linux/netdevice.h:4940 [inline] + netdev_start_xmit include/linux/netdevice.h:4954 [inline] + xmit_one net/core/dev.c:3545 [inline] + dev_hard_start_xmit+0x13d/0x6d0 net/core/dev.c:3561 + __dev_queue_xmit+0x7c1/0x3d60 net/core/dev.c:4346 + dev_queue_xmit include/linux/netdevice.h:3134 [inline] + packet_xmit+0x257/0x380 net/packet/af_packet.c:276 + packet_snd net/packet/af_packet.c:3087 [inline] + packet_sendmsg+0x24ca/0x5240 net/packet/af_packet.c:3119 + sock_sendmsg_nosec net/socket.c:730 [inline] + __sock_sendmsg+0xd5/0x180 net/socket.c:745 + __sys_sendto+0x255/0x340 net/socket.c:2190 + __do_sys_sendto net/socket.c:2202 [inline] + __se_sys_sendto net/socket.c:2198 [inline] + __x64_sys_sendto+0xe0/0x1b0 net/socket.c:2198 + do_syscall_x64 arch/x86/entry/common.c:51 [inline] + do_syscall_64+0x40/0x110 arch/x86/entry/common.c:82 + entry_SYSCALL_64_after_hwframe+0x63/0x6b + +Found by Linux Verification Center (linuxtesting.org) with Syzkaller + +Fixes: 0f6925b3e8da ("virtio_net: Do not pull payload in skb->head") +Signed-off-by: Denis Arefev +Message-Id: <20240613095448.27118-1-arefev@swemel.ru> +Signed-off-by: Michael S. Tsirkin +Signed-off-by: Sasha Levin +--- + include/linux/virtio_net.h | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +diff --git a/include/linux/virtio_net.h b/include/linux/virtio_net.h +index 4dfa9b69ca8d9..d1d7825318c32 100644 +--- a/include/linux/virtio_net.h ++++ b/include/linux/virtio_net.h +@@ -56,6 +56,7 @@ static inline int virtio_net_hdr_to_skb(struct sk_buff *skb, + unsigned int thlen = 0; + unsigned int p_off = 0; + unsigned int ip_proto; ++ u64 ret, remainder, gso_size; + + if (hdr->gso_type != VIRTIO_NET_HDR_GSO_NONE) { + switch (hdr->gso_type & ~VIRTIO_NET_HDR_GSO_ECN) { +@@ -98,6 +99,16 @@ static inline int virtio_net_hdr_to_skb(struct sk_buff *skb, + u32 off = __virtio16_to_cpu(little_endian, hdr->csum_offset); + u32 needed = start + max_t(u32, thlen, off + sizeof(__sum16)); + ++ if (hdr->gso_size) { ++ gso_size = __virtio16_to_cpu(little_endian, hdr->gso_size); ++ ret = div64_u64_rem(skb->len, gso_size, &remainder); ++ if (!(ret && (hdr->gso_size > needed) && ++ ((remainder > needed) || (remainder == 0)))) { ++ return -EINVAL; ++ } ++ skb_shinfo(skb)->tx_flags |= SKBFL_SHARED_FRAG; ++ } ++ + if (!pskb_may_pull(skb, needed)) + return -EINVAL; + +-- +2.43.0 + diff --git a/queue-6.6/net-smc-set-rmb-s-sg_max_single_alloc-limitation-onl.patch b/queue-6.6/net-smc-set-rmb-s-sg_max_single_alloc-limitation-onl.patch new file mode 100644 index 00000000000..f0794b0dcaa --- /dev/null +++ b/queue-6.6/net-smc-set-rmb-s-sg_max_single_alloc-limitation-onl.patch @@ -0,0 +1,57 @@ +From a16ae765490e70f5514abd6c8c6ad664bdd3145a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 3 Jun 2024 11:00:18 +0800 +Subject: net/smc: set rmb's SG_MAX_SINGLE_ALLOC limitation only when + CONFIG_ARCH_NO_SG_CHAIN is defined + +From: Guangguan Wang + +[ Upstream commit 3ac14b9dfbd345e891d48d89f6c2fa519848f0f4 ] + +SG_MAX_SINGLE_ALLOC is used to limit maximum number of entries that +will be allocated in one piece of scatterlist. When the entries of +scatterlist exceeds SG_MAX_SINGLE_ALLOC, sg chain will be used. From +commit 7c703e54cc71 ("arch: switch the default on ARCH_HAS_SG_CHAIN"), +we can know that the macro CONFIG_ARCH_NO_SG_CHAIN is used to identify +whether sg chain is supported. So, SMC-R's rmb buffer should be limited +by SG_MAX_SINGLE_ALLOC only when the macro CONFIG_ARCH_NO_SG_CHAIN is +defined. + +Fixes: a3fe3d01bd0d ("net/smc: introduce sg-logic for RMBs") +Signed-off-by: Guangguan Wang +Co-developed-by: Wen Gu +Signed-off-by: Wen Gu +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +--- + net/smc/smc_core.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/net/smc/smc_core.c b/net/smc/smc_core.c +index d520ee62c8ecd..f99bb9d0adcc6 100644 +--- a/net/smc/smc_core.c ++++ b/net/smc/smc_core.c +@@ -1974,7 +1974,6 @@ int smc_conn_create(struct smc_sock *smc, struct smc_init_info *ini) + */ + static u8 smc_compress_bufsize(int size, bool is_smcd, bool is_rmb) + { +- const unsigned int max_scat = SG_MAX_SINGLE_ALLOC * PAGE_SIZE; + u8 compressed; + + if (size <= SMC_BUF_MIN_SIZE) +@@ -1984,9 +1983,11 @@ static u8 smc_compress_bufsize(int size, bool is_smcd, bool is_rmb) + compressed = min_t(u8, ilog2(size) + 1, + is_smcd ? SMCD_DMBE_SIZES : SMCR_RMBE_SIZES); + ++#ifdef CONFIG_ARCH_NO_SG_CHAIN + if (!is_smcd && is_rmb) + /* RMBs are backed by & limited to max size of scatterlists */ +- compressed = min_t(u8, compressed, ilog2(max_scat >> 14)); ++ compressed = min_t(u8, compressed, ilog2((SG_MAX_SINGLE_ALLOC * PAGE_SIZE) >> 14)); ++#endif + + return compressed; + } +-- +2.43.0 + diff --git a/queue-6.6/netfilter-ctnetlink-use-helper-function-to-calculate.patch b/queue-6.6/netfilter-ctnetlink-use-helper-function-to-calculate.patch new file mode 100644 index 00000000000..aaae4f3a917 --- /dev/null +++ b/queue-6.6/netfilter-ctnetlink-use-helper-function-to-calculate.patch @@ -0,0 +1,38 @@ +From 5c507c13517df55456a9f227dc42636cd0bc556d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 13 Jul 2024 16:47:38 +0200 +Subject: netfilter: ctnetlink: use helper function to calculate expect ID + +From: Pablo Neira Ayuso + +[ Upstream commit 782161895eb4ac45cf7cfa8db375bd4766cb8299 ] + +Delete expectation path is missing a call to the nf_expect_get_id() +helper function to calculate the expectation ID, otherwise LSB of the +expectation object address is leaked to userspace. + +Fixes: 3c79107631db ("netfilter: ctnetlink: don't use conntrack/expect object addresses as id") +Reported-by: zdi-disclosures@trendmicro.com +Signed-off-by: Pablo Neira Ayuso +Signed-off-by: Sasha Levin +--- + net/netfilter/nf_conntrack_netlink.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/net/netfilter/nf_conntrack_netlink.c b/net/netfilter/nf_conntrack_netlink.c +index 334db22199c1d..4dab45039f349 100644 +--- a/net/netfilter/nf_conntrack_netlink.c ++++ b/net/netfilter/nf_conntrack_netlink.c +@@ -3411,7 +3411,8 @@ static int ctnetlink_del_expect(struct sk_buff *skb, + + if (cda[CTA_EXPECT_ID]) { + __be32 id = nla_get_be32(cda[CTA_EXPECT_ID]); +- if (ntohl(id) != (u32)(unsigned long)exp) { ++ ++ if (id != nf_expect_get_id(exp)) { + nf_ct_expect_put(exp); + return -ENOENT; + } +-- +2.43.0 + diff --git a/queue-6.6/netfilter-nf_set_pipapo-fix-initial-map-fill.patch b/queue-6.6/netfilter-nf_set_pipapo-fix-initial-map-fill.patch new file mode 100644 index 00000000000..4691a213f3e --- /dev/null +++ b/queue-6.6/netfilter-nf_set_pipapo-fix-initial-map-fill.patch @@ -0,0 +1,142 @@ +From f1ce3db5bfc70916d2a884f759c65a1d4f45718a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 15 Jul 2024 13:54:03 +0200 +Subject: netfilter: nf_set_pipapo: fix initial map fill + +From: Florian Westphal + +[ Upstream commit 791a615b7ad2258c560f91852be54b0480837c93 ] + +The initial buffer has to be inited to all-ones, but it must restrict +it to the size of the first field, not the total field size. + +After each round in the map search step, the result and the fill map +are swapped, so if we have a set where f->bsize of the first element +is smaller than m->bsize_max, those one-bits are leaked into future +rounds result map. + +This makes pipapo find an incorrect matching results for sets where +first field size is not the largest. + +Followup patch adds a test case to nft_concat_range.sh selftest script. + +Thanks to Stefano Brivio for pointing out that we need to zero out +the remainder explicitly, only correcting memset() argument isn't enough. + +Fixes: 3c4287f62044 ("nf_tables: Add set type for arbitrary concatenation of ranges") +Reported-by: Yi Chen +Cc: Stefano Brivio +Signed-off-by: Florian Westphal +Reviewed-by: Stefano Brivio +Signed-off-by: Pablo Neira Ayuso +Signed-off-by: Sasha Levin +--- + net/netfilter/nft_set_pipapo.c | 4 ++-- + net/netfilter/nft_set_pipapo.h | 21 +++++++++++++++++++++ + net/netfilter/nft_set_pipapo_avx2.c | 10 ++++++---- + 3 files changed, 29 insertions(+), 6 deletions(-) + +diff --git a/net/netfilter/nft_set_pipapo.c b/net/netfilter/nft_set_pipapo.c +index 0262eb7b153c0..e4dd730930484 100644 +--- a/net/netfilter/nft_set_pipapo.c ++++ b/net/netfilter/nft_set_pipapo.c +@@ -432,7 +432,7 @@ bool nft_pipapo_lookup(const struct net *net, const struct nft_set *set, + res_map = scratch->map + (map_index ? m->bsize_max : 0); + fill_map = scratch->map + (map_index ? 0 : m->bsize_max); + +- memset(res_map, 0xff, m->bsize_max * sizeof(*res_map)); ++ pipapo_resmap_init(m, res_map); + + nft_pipapo_for_each_field(f, i, m) { + bool last = i == m->field_count - 1; +@@ -536,7 +536,7 @@ static struct nft_pipapo_elem *pipapo_get(const struct net *net, + goto out; + } + +- memset(res_map, 0xff, m->bsize_max * sizeof(*res_map)); ++ pipapo_resmap_init(m, res_map); + + nft_pipapo_for_each_field(f, i, m) { + bool last = i == m->field_count - 1; +diff --git a/net/netfilter/nft_set_pipapo.h b/net/netfilter/nft_set_pipapo.h +index e49ca6d1e217d..aad9130cc7635 100644 +--- a/net/netfilter/nft_set_pipapo.h ++++ b/net/netfilter/nft_set_pipapo.h +@@ -285,4 +285,25 @@ static u64 pipapo_estimate_size(const struct nft_set_desc *desc) + return size; + } + ++/** ++ * pipapo_resmap_init() - Initialise result map before first use ++ * @m: Matching data, including mapping table ++ * @res_map: Result map ++ * ++ * Initialize all bits covered by the first field to one, so that after ++ * the first step, only the matching bits of the first bit group remain. ++ * ++ * If other fields have a large bitmap, set remainder of res_map to 0. ++ */ ++static inline void pipapo_resmap_init(const struct nft_pipapo_match *m, unsigned long *res_map) ++{ ++ const struct nft_pipapo_field *f = m->f; ++ int i; ++ ++ for (i = 0; i < f->bsize; i++) ++ res_map[i] = ULONG_MAX; ++ ++ for (i = f->bsize; i < m->bsize_max; i++) ++ res_map[i] = 0ul; ++} + #endif /* _NFT_SET_PIPAPO_H */ +diff --git a/net/netfilter/nft_set_pipapo_avx2.c b/net/netfilter/nft_set_pipapo_avx2.c +index d08407d589eac..8910a5ac7ed12 100644 +--- a/net/netfilter/nft_set_pipapo_avx2.c ++++ b/net/netfilter/nft_set_pipapo_avx2.c +@@ -1036,6 +1036,7 @@ static int nft_pipapo_avx2_lookup_8b_16(unsigned long *map, unsigned long *fill, + + /** + * nft_pipapo_avx2_lookup_slow() - Fallback function for uncommon field sizes ++ * @mdata: Matching data, including mapping table + * @map: Previous match result, used as initial bitmap + * @fill: Destination bitmap to be filled with current match result + * @f: Field, containing lookup and mapping tables +@@ -1051,7 +1052,8 @@ static int nft_pipapo_avx2_lookup_8b_16(unsigned long *map, unsigned long *fill, + * Return: -1 on no match, rule index of match if @last, otherwise first long + * word index to be checked next (i.e. first filled word). + */ +-static int nft_pipapo_avx2_lookup_slow(unsigned long *map, unsigned long *fill, ++static int nft_pipapo_avx2_lookup_slow(const struct nft_pipapo_match *mdata, ++ unsigned long *map, unsigned long *fill, + const struct nft_pipapo_field *f, + int offset, const u8 *pkt, + bool first, bool last) +@@ -1060,7 +1062,7 @@ static int nft_pipapo_avx2_lookup_slow(unsigned long *map, unsigned long *fill, + int i, ret = -1, b; + + if (first) +- memset(map, 0xff, bsize * sizeof(*map)); ++ pipapo_resmap_init(mdata, map); + + for (i = offset; i < bsize; i++) { + if (f->bb == 8) +@@ -1186,7 +1188,7 @@ bool nft_pipapo_avx2_lookup(const struct net *net, const struct nft_set *set, + } else if (f->groups == 16) { + NFT_SET_PIPAPO_AVX2_LOOKUP(8, 16); + } else { +- ret = nft_pipapo_avx2_lookup_slow(res, fill, f, ++ ret = nft_pipapo_avx2_lookup_slow(m, res, fill, f, + ret, rp, + first, last); + } +@@ -1202,7 +1204,7 @@ bool nft_pipapo_avx2_lookup(const struct net *net, const struct nft_set *set, + } else if (f->groups == 32) { + NFT_SET_PIPAPO_AVX2_LOOKUP(4, 32); + } else { +- ret = nft_pipapo_avx2_lookup_slow(res, fill, f, ++ ret = nft_pipapo_avx2_lookup_slow(m, res, fill, f, + ret, rp, + first, last); + } +-- +2.43.0 + diff --git a/queue-6.6/netfilter-nf_tables-rise-cap-on-selinux-secmark-cont.patch b/queue-6.6/netfilter-nf_tables-rise-cap-on-selinux-secmark-cont.patch new file mode 100644 index 00000000000..92541732430 --- /dev/null +++ b/queue-6.6/netfilter-nf_tables-rise-cap-on-selinux-secmark-cont.patch @@ -0,0 +1,34 @@ +From 4b6d3406959c7dcb72b8cfc24fab6b6d5bdc8993 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 3 Jun 2024 20:16:59 +0200 +Subject: netfilter: nf_tables: rise cap on SELinux secmark context + +From: Pablo Neira Ayuso + +[ Upstream commit e29630247be24c3987e2b048f8e152771b32d38b ] + +secmark context is artificially limited 256 bytes, rise it to 4Kbytes. + +Fixes: fb961945457f ("netfilter: nf_tables: add SECMARK support") +Signed-off-by: Pablo Neira Ayuso +Signed-off-by: Sasha Levin +--- + include/uapi/linux/netfilter/nf_tables.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/include/uapi/linux/netfilter/nf_tables.h b/include/uapi/linux/netfilter/nf_tables.h +index 117c6a9b845b1..621e3035145eb 100644 +--- a/include/uapi/linux/netfilter/nf_tables.h ++++ b/include/uapi/linux/netfilter/nf_tables.h +@@ -1372,7 +1372,7 @@ enum nft_secmark_attributes { + #define NFTA_SECMARK_MAX (__NFTA_SECMARK_MAX - 1) + + /* Max security context length */ +-#define NFT_SECMARK_CTX_MAXLEN 256 ++#define NFT_SECMARK_CTX_MAXLEN 4096 + + /** + * enum nft_reject_types - nf_tables reject expression reject types +-- +2.43.0 + diff --git a/queue-6.6/netfilter-nft_set_pipapo-constify-lookup-fn-args-whe.patch b/queue-6.6/netfilter-nft_set_pipapo-constify-lookup-fn-args-whe.patch new file mode 100644 index 00000000000..24586c9c6cd --- /dev/null +++ b/queue-6.6/netfilter-nft_set_pipapo-constify-lookup-fn-args-whe.patch @@ -0,0 +1,265 @@ +From 7d50892ecdec9a94dea3cf3b5b615e8b55a54d7e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 13 Feb 2024 16:23:37 +0100 +Subject: netfilter: nft_set_pipapo: constify lookup fn args where possible + +From: Florian Westphal + +[ Upstream commit f04df573faf90bb828a2241b650598c02c074323 ] + +Those get called from packet path, content must not be modified. +No functional changes intended. + +Reviewed-by: Stefano Brivio +Signed-off-by: Florian Westphal +Stable-dep-of: 791a615b7ad2 ("netfilter: nf_set_pipapo: fix initial map fill") +Signed-off-by: Sasha Levin +--- + net/netfilter/nft_set_pipapo.c | 18 +++++---- + net/netfilter/nft_set_pipapo.h | 6 +-- + net/netfilter/nft_set_pipapo_avx2.c | 59 +++++++++++++++++------------ + 3 files changed, 48 insertions(+), 35 deletions(-) + +diff --git a/net/netfilter/nft_set_pipapo.c b/net/netfilter/nft_set_pipapo.c +index 69b02a3f1ff05..0262eb7b153c0 100644 +--- a/net/netfilter/nft_set_pipapo.c ++++ b/net/netfilter/nft_set_pipapo.c +@@ -360,7 +360,7 @@ + * Return: -1 on no match, bit position on 'match_only', 0 otherwise. + */ + int pipapo_refill(unsigned long *map, int len, int rules, unsigned long *dst, +- union nft_pipapo_map_bucket *mt, bool match_only) ++ const union nft_pipapo_map_bucket *mt, bool match_only) + { + unsigned long bitset; + int k, ret = -1; +@@ -412,9 +412,9 @@ bool nft_pipapo_lookup(const struct net *net, const struct nft_set *set, + struct nft_pipapo_scratch *scratch; + unsigned long *res_map, *fill_map; + u8 genmask = nft_genmask_cur(net); ++ const struct nft_pipapo_match *m; ++ const struct nft_pipapo_field *f; + const u8 *rp = (const u8 *)key; +- struct nft_pipapo_match *m; +- struct nft_pipapo_field *f; + bool map_index; + int i; + +@@ -517,11 +517,13 @@ static struct nft_pipapo_elem *pipapo_get(const struct net *net, + { + struct nft_pipapo_elem *ret = ERR_PTR(-ENOENT); + struct nft_pipapo *priv = nft_set_priv(set); +- struct nft_pipapo_match *m = priv->clone; + unsigned long *res_map, *fill_map = NULL; +- struct nft_pipapo_field *f; ++ const struct nft_pipapo_match *m; ++ const struct nft_pipapo_field *f; + int i; + ++ m = priv->clone; ++ + res_map = kmalloc_array(m->bsize_max, sizeof(*res_map), GFP_ATOMIC); + if (!res_map) { + ret = ERR_PTR(-ENOMEM); +@@ -1590,7 +1592,7 @@ static void pipapo_gc(const struct nft_set *_set, struct nft_pipapo_match *m) + + while ((rules_f0 = pipapo_rules_same_key(m->f, first_rule))) { + union nft_pipapo_map_bucket rulemap[NFT_PIPAPO_MAX_FIELDS]; +- struct nft_pipapo_field *f; ++ const struct nft_pipapo_field *f; + int i, start, rules_fx; + + start = first_rule; +@@ -2036,8 +2038,8 @@ static void nft_pipapo_walk(const struct nft_ctx *ctx, struct nft_set *set, + { + struct nft_pipapo *priv = nft_set_priv(set); + struct net *net = read_pnet(&set->net); +- struct nft_pipapo_match *m; +- struct nft_pipapo_field *f; ++ const struct nft_pipapo_match *m; ++ const struct nft_pipapo_field *f; + int i, r; + + rcu_read_lock(); +diff --git a/net/netfilter/nft_set_pipapo.h b/net/netfilter/nft_set_pipapo.h +index a4a58812c1088..e49ca6d1e217d 100644 +--- a/net/netfilter/nft_set_pipapo.h ++++ b/net/netfilter/nft_set_pipapo.h +@@ -185,7 +185,7 @@ struct nft_pipapo_elem { + }; + + int pipapo_refill(unsigned long *map, int len, int rules, unsigned long *dst, +- union nft_pipapo_map_bucket *mt, bool match_only); ++ const union nft_pipapo_map_bucket *mt, bool match_only); + + /** + * pipapo_and_field_buckets_4bit() - Intersect 4-bit buckets +@@ -193,7 +193,7 @@ int pipapo_refill(unsigned long *map, int len, int rules, unsigned long *dst, + * @dst: Area to store result + * @data: Input data selecting table buckets + */ +-static inline void pipapo_and_field_buckets_4bit(struct nft_pipapo_field *f, ++static inline void pipapo_and_field_buckets_4bit(const struct nft_pipapo_field *f, + unsigned long *dst, + const u8 *data) + { +@@ -221,7 +221,7 @@ static inline void pipapo_and_field_buckets_4bit(struct nft_pipapo_field *f, + * @dst: Area to store result + * @data: Input data selecting table buckets + */ +-static inline void pipapo_and_field_buckets_8bit(struct nft_pipapo_field *f, ++static inline void pipapo_and_field_buckets_8bit(const struct nft_pipapo_field *f, + unsigned long *dst, + const u8 *data) + { +diff --git a/net/netfilter/nft_set_pipapo_avx2.c b/net/netfilter/nft_set_pipapo_avx2.c +index a3a8ddca99189..d08407d589eac 100644 +--- a/net/netfilter/nft_set_pipapo_avx2.c ++++ b/net/netfilter/nft_set_pipapo_avx2.c +@@ -212,8 +212,9 @@ static int nft_pipapo_avx2_refill(int offset, unsigned long *map, + * word index to be checked next (i.e. first filled word). + */ + static int nft_pipapo_avx2_lookup_4b_2(unsigned long *map, unsigned long *fill, +- struct nft_pipapo_field *f, int offset, +- const u8 *pkt, bool first, bool last) ++ const struct nft_pipapo_field *f, ++ int offset, const u8 *pkt, ++ bool first, bool last) + { + int i, ret = -1, m256_size = f->bsize / NFT_PIPAPO_LONGS_PER_M256, b; + u8 pg[2] = { pkt[0] >> 4, pkt[0] & 0xf }; +@@ -274,8 +275,9 @@ static int nft_pipapo_avx2_lookup_4b_2(unsigned long *map, unsigned long *fill, + * word index to be checked next (i.e. first filled word). + */ + static int nft_pipapo_avx2_lookup_4b_4(unsigned long *map, unsigned long *fill, +- struct nft_pipapo_field *f, int offset, +- const u8 *pkt, bool first, bool last) ++ const struct nft_pipapo_field *f, ++ int offset, const u8 *pkt, ++ bool first, bool last) + { + int i, ret = -1, m256_size = f->bsize / NFT_PIPAPO_LONGS_PER_M256, b; + u8 pg[4] = { pkt[0] >> 4, pkt[0] & 0xf, pkt[1] >> 4, pkt[1] & 0xf }; +@@ -350,8 +352,9 @@ static int nft_pipapo_avx2_lookup_4b_4(unsigned long *map, unsigned long *fill, + * word index to be checked next (i.e. first filled word). + */ + static int nft_pipapo_avx2_lookup_4b_8(unsigned long *map, unsigned long *fill, +- struct nft_pipapo_field *f, int offset, +- const u8 *pkt, bool first, bool last) ++ const struct nft_pipapo_field *f, ++ int offset, const u8 *pkt, ++ bool first, bool last) + { + u8 pg[8] = { pkt[0] >> 4, pkt[0] & 0xf, pkt[1] >> 4, pkt[1] & 0xf, + pkt[2] >> 4, pkt[2] & 0xf, pkt[3] >> 4, pkt[3] & 0xf, +@@ -445,8 +448,9 @@ static int nft_pipapo_avx2_lookup_4b_8(unsigned long *map, unsigned long *fill, + * word index to be checked next (i.e. first filled word). + */ + static int nft_pipapo_avx2_lookup_4b_12(unsigned long *map, unsigned long *fill, +- struct nft_pipapo_field *f, int offset, +- const u8 *pkt, bool first, bool last) ++ const struct nft_pipapo_field *f, ++ int offset, const u8 *pkt, ++ bool first, bool last) + { + u8 pg[12] = { pkt[0] >> 4, pkt[0] & 0xf, pkt[1] >> 4, pkt[1] & 0xf, + pkt[2] >> 4, pkt[2] & 0xf, pkt[3] >> 4, pkt[3] & 0xf, +@@ -534,8 +538,9 @@ static int nft_pipapo_avx2_lookup_4b_12(unsigned long *map, unsigned long *fill, + * word index to be checked next (i.e. first filled word). + */ + static int nft_pipapo_avx2_lookup_4b_32(unsigned long *map, unsigned long *fill, +- struct nft_pipapo_field *f, int offset, +- const u8 *pkt, bool first, bool last) ++ const struct nft_pipapo_field *f, ++ int offset, const u8 *pkt, ++ bool first, bool last) + { + u8 pg[32] = { pkt[0] >> 4, pkt[0] & 0xf, pkt[1] >> 4, pkt[1] & 0xf, + pkt[2] >> 4, pkt[2] & 0xf, pkt[3] >> 4, pkt[3] & 0xf, +@@ -669,8 +674,9 @@ static int nft_pipapo_avx2_lookup_4b_32(unsigned long *map, unsigned long *fill, + * word index to be checked next (i.e. first filled word). + */ + static int nft_pipapo_avx2_lookup_8b_1(unsigned long *map, unsigned long *fill, +- struct nft_pipapo_field *f, int offset, +- const u8 *pkt, bool first, bool last) ++ const struct nft_pipapo_field *f, ++ int offset, const u8 *pkt, ++ bool first, bool last) + { + int i, ret = -1, m256_size = f->bsize / NFT_PIPAPO_LONGS_PER_M256, b; + unsigned long *lt = f->lt, bsize = f->bsize; +@@ -726,8 +732,9 @@ static int nft_pipapo_avx2_lookup_8b_1(unsigned long *map, unsigned long *fill, + * word index to be checked next (i.e. first filled word). + */ + static int nft_pipapo_avx2_lookup_8b_2(unsigned long *map, unsigned long *fill, +- struct nft_pipapo_field *f, int offset, +- const u8 *pkt, bool first, bool last) ++ const struct nft_pipapo_field *f, ++ int offset, const u8 *pkt, ++ bool first, bool last) + { + int i, ret = -1, m256_size = f->bsize / NFT_PIPAPO_LONGS_PER_M256, b; + unsigned long *lt = f->lt, bsize = f->bsize; +@@ -790,8 +797,9 @@ static int nft_pipapo_avx2_lookup_8b_2(unsigned long *map, unsigned long *fill, + * word index to be checked next (i.e. first filled word). + */ + static int nft_pipapo_avx2_lookup_8b_4(unsigned long *map, unsigned long *fill, +- struct nft_pipapo_field *f, int offset, +- const u8 *pkt, bool first, bool last) ++ const struct nft_pipapo_field *f, ++ int offset, const u8 *pkt, ++ bool first, bool last) + { + int i, ret = -1, m256_size = f->bsize / NFT_PIPAPO_LONGS_PER_M256, b; + unsigned long *lt = f->lt, bsize = f->bsize; +@@ -865,8 +873,9 @@ static int nft_pipapo_avx2_lookup_8b_4(unsigned long *map, unsigned long *fill, + * word index to be checked next (i.e. first filled word). + */ + static int nft_pipapo_avx2_lookup_8b_6(unsigned long *map, unsigned long *fill, +- struct nft_pipapo_field *f, int offset, +- const u8 *pkt, bool first, bool last) ++ const struct nft_pipapo_field *f, ++ int offset, const u8 *pkt, ++ bool first, bool last) + { + int i, ret = -1, m256_size = f->bsize / NFT_PIPAPO_LONGS_PER_M256, b; + unsigned long *lt = f->lt, bsize = f->bsize; +@@ -950,8 +959,9 @@ static int nft_pipapo_avx2_lookup_8b_6(unsigned long *map, unsigned long *fill, + * word index to be checked next (i.e. first filled word). + */ + static int nft_pipapo_avx2_lookup_8b_16(unsigned long *map, unsigned long *fill, +- struct nft_pipapo_field *f, int offset, +- const u8 *pkt, bool first, bool last) ++ const struct nft_pipapo_field *f, ++ int offset, const u8 *pkt, ++ bool first, bool last) + { + int i, ret = -1, m256_size = f->bsize / NFT_PIPAPO_LONGS_PER_M256, b; + unsigned long *lt = f->lt, bsize = f->bsize; +@@ -1042,8 +1052,9 @@ static int nft_pipapo_avx2_lookup_8b_16(unsigned long *map, unsigned long *fill, + * word index to be checked next (i.e. first filled word). + */ + static int nft_pipapo_avx2_lookup_slow(unsigned long *map, unsigned long *fill, +- struct nft_pipapo_field *f, int offset, +- const u8 *pkt, bool first, bool last) ++ const struct nft_pipapo_field *f, ++ int offset, const u8 *pkt, ++ bool first, bool last) + { + unsigned long bsize = f->bsize; + int i, ret = -1, b; +@@ -1119,9 +1130,9 @@ bool nft_pipapo_avx2_lookup(const struct net *net, const struct nft_set *set, + struct nft_pipapo *priv = nft_set_priv(set); + struct nft_pipapo_scratch *scratch; + u8 genmask = nft_genmask_cur(net); ++ const struct nft_pipapo_match *m; ++ const struct nft_pipapo_field *f; + const u8 *rp = (const u8 *)key; +- struct nft_pipapo_match *m; +- struct nft_pipapo_field *f; + unsigned long *res, *fill; + bool map_index; + int i, ret = 0; +-- +2.43.0 + diff --git a/queue-6.6/nfsv4.1-another-fix-for-exchgid4_flag_use_pnfs_ds-fo.patch b/queue-6.6/nfsv4.1-another-fix-for-exchgid4_flag_use_pnfs_ds-fo.patch new file mode 100644 index 00000000000..299c65a153a --- /dev/null +++ b/queue-6.6/nfsv4.1-another-fix-for-exchgid4_flag_use_pnfs_ds-fo.patch @@ -0,0 +1,66 @@ +From 185a1c690ebc9a995ea509fb4d9beb661b7fdefc Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 24 Jun 2024 09:28:27 -0400 +Subject: NFSv4.1 another fix for EXCHGID4_FLAG_USE_PNFS_DS for DS server + +From: Olga Kornievskaia + +[ Upstream commit 4840c00003a2275668a13b82c9f5b1aed80183aa ] + +Previously in order to mark the communication with the DS server, +we tried to use NFS_CS_DS in cl_flags. However, this flag would +only be saved for the DS server and in case where DS equals MDS, +the client would not find a matching nfs_client in nfs_match_client +that represents the MDS (but is also a DS). + +Instead, don't rely on the NFS_CS_DS but instead use NFS_CS_PNFS. + +Fixes: 379e4adfddd6 ("NFSv4.1: fixup use EXCHGID4_FLAG_USE_PNFS_DS for DS server") +Signed-off-by: Olga Kornievskaia +Signed-off-by: Anna Schumaker +Signed-off-by: Sasha Levin +--- + fs/nfs/nfs4client.c | 6 ++---- + fs/nfs/nfs4proc.c | 2 +- + 2 files changed, 3 insertions(+), 5 deletions(-) + +diff --git a/fs/nfs/nfs4client.c b/fs/nfs/nfs4client.c +index 11e3a285594c2..ac80f87cb9d99 100644 +--- a/fs/nfs/nfs4client.c ++++ b/fs/nfs/nfs4client.c +@@ -231,9 +231,8 @@ struct nfs_client *nfs4_alloc_client(const struct nfs_client_initdata *cl_init) + __set_bit(NFS_CS_INFINITE_SLOTS, &clp->cl_flags); + __set_bit(NFS_CS_DISCRTRY, &clp->cl_flags); + __set_bit(NFS_CS_NO_RETRANS_TIMEOUT, &clp->cl_flags); +- +- if (test_bit(NFS_CS_DS, &cl_init->init_flags)) +- __set_bit(NFS_CS_DS, &clp->cl_flags); ++ if (test_bit(NFS_CS_PNFS, &cl_init->init_flags)) ++ __set_bit(NFS_CS_PNFS, &clp->cl_flags); + /* + * Set up the connection to the server before we add add to the + * global list. +@@ -1011,7 +1010,6 @@ struct nfs_client *nfs4_set_ds_client(struct nfs_server *mds_srv, + if (mds_srv->flags & NFS_MOUNT_NORESVPORT) + __set_bit(NFS_CS_NORESVPORT, &cl_init.init_flags); + +- __set_bit(NFS_CS_DS, &cl_init.init_flags); + __set_bit(NFS_CS_PNFS, &cl_init.init_flags); + cl_init.max_connect = NFS_MAX_TRANSPORTS; + /* +diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c +index 05490d4784f1a..e7ac249df1ad6 100644 +--- a/fs/nfs/nfs4proc.c ++++ b/fs/nfs/nfs4proc.c +@@ -8816,7 +8816,7 @@ nfs4_run_exchange_id(struct nfs_client *clp, const struct cred *cred, + #ifdef CONFIG_NFS_V4_1_MIGRATION + calldata->args.flags |= EXCHGID4_FLAG_SUPP_MOVED_MIGR; + #endif +- if (test_bit(NFS_CS_DS, &clp->cl_flags)) ++ if (test_bit(NFS_CS_PNFS, &clp->cl_flags)) + calldata->args.flags |= EXCHGID4_FLAG_USE_PNFS_DS; + msg.rpc_argp = &calldata->args; + msg.rpc_resp = &calldata->res; +-- +2.43.0 + diff --git a/queue-6.6/nilfs2-avoid-undefined-behavior-in-nilfs_cnt32_ge-ma.patch b/queue-6.6/nilfs2-avoid-undefined-behavior-in-nilfs_cnt32_ge-ma.patch new file mode 100644 index 00000000000..8d4e88e502c --- /dev/null +++ b/queue-6.6/nilfs2-avoid-undefined-behavior-in-nilfs_cnt32_ge-ma.patch @@ -0,0 +1,47 @@ +From 1ef39b125a6522e5b1014d44d9d5fdb23d789cda Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 3 Jul 2024 03:35:12 +0900 +Subject: nilfs2: avoid undefined behavior in nilfs_cnt32_ge macro + +From: Ryusuke Konishi + +[ Upstream commit 0f3819e8c483771a59cf9d3190cd68a7a990083c ] + +According to the C standard 3.4.3p3, the result of signed integer overflow +is undefined. The macro nilfs_cnt32_ge(), which compares two sequence +numbers, uses signed integer subtraction that can overflow, and therefore +the result of the calculation may differ from what is expected due to +undefined behavior in different environments. + +Similar to an earlier change to the jiffies-related comparison macros in +commit 5a581b367b5d ("jiffies: Avoid undefined behavior from signed +overflow"), avoid this potential issue by changing the definition of the +macro to perform the subtraction as unsigned integers, then cast the +result to a signed integer for comparison. + +Link: https://lkml.kernel.org/r/20130727225828.GA11864@linux.vnet.ibm.com +Link: https://lkml.kernel.org/r/20240702183512.6390-1-konishi.ryusuke@gmail.com +Fixes: 9ff05123e3bf ("nilfs2: segment constructor") +Signed-off-by: Ryusuke Konishi +Signed-off-by: Andrew Morton +Signed-off-by: Sasha Levin +--- + fs/nilfs2/segment.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/fs/nilfs2/segment.c b/fs/nilfs2/segment.c +index 5783efafbabda..e10f8a777ab06 100644 +--- a/fs/nilfs2/segment.c ++++ b/fs/nilfs2/segment.c +@@ -136,7 +136,7 @@ static void nilfs_dispose_list(struct the_nilfs *, struct list_head *, int); + + #define nilfs_cnt32_ge(a, b) \ + (typecheck(__u32, a) && typecheck(__u32, b) && \ +- ((__s32)(a) - (__s32)(b) >= 0)) ++ ((__s32)((a) - (b)) >= 0)) + + static int nilfs_prepare_segment_lock(struct super_block *sb, + struct nilfs_transaction_info *ti) +-- +2.43.0 + diff --git a/queue-6.6/nvmem-rockchip-otp-set-add_legacy_fixed_of_cells-con.patch b/queue-6.6/nvmem-rockchip-otp-set-add_legacy_fixed_of_cells-con.patch new file mode 100644 index 00000000000..cf7f87033b9 --- /dev/null +++ b/queue-6.6/nvmem-rockchip-otp-set-add_legacy_fixed_of_cells-con.patch @@ -0,0 +1,37 @@ +From acc8ee78aed57980d52a46825968bdad981b4c2a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 5 Jul 2024 08:48:41 +0100 +Subject: nvmem: rockchip-otp: set add_legacy_fixed_of_cells config option + +From: Heiko Stuebner + +[ Upstream commit 2933e79db3c00a8cdc56f6bb050a857fec1875ad ] + +The Rockchip OTP describes its layout via devicetree subnodes, +so set the appropriate property. + +Fixes: 2cc3b37f5b6d ("nvmem: add explicit config option to read old syntax fixed OF cells") +Signed-off-by: Heiko Stuebner +Signed-off-by: Srinivas Kandagatla +Link: https://lore.kernel.org/r/20240705074852.423202-5-srinivas.kandagatla@linaro.org +Signed-off-by: Greg Kroah-Hartman +Signed-off-by: Sasha Levin +--- + drivers/nvmem/rockchip-otp.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/nvmem/rockchip-otp.c b/drivers/nvmem/rockchip-otp.c +index cb9aa5428350a..7107d68a2f8c7 100644 +--- a/drivers/nvmem/rockchip-otp.c ++++ b/drivers/nvmem/rockchip-otp.c +@@ -255,6 +255,7 @@ static int rockchip_otp_read(void *context, unsigned int offset, + static struct nvmem_config otp_config = { + .name = "rockchip-otp", + .owner = THIS_MODULE, ++ .add_legacy_fixed_of_cells = true, + .read_only = true, + .stride = 1, + .word_size = 1, +-- +2.43.0 + diff --git a/queue-6.6/nvmet-auth-fix-nvmet_auth-hash-error-handling.patch b/queue-6.6/nvmet-auth-fix-nvmet_auth-hash-error-handling.patch new file mode 100644 index 00000000000..f6129b1a50f --- /dev/null +++ b/queue-6.6/nvmet-auth-fix-nvmet_auth-hash-error-handling.patch @@ -0,0 +1,89 @@ +From e7d0268b3234d34f81ad1427b9ff100c9f52f12f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 6 Jul 2024 14:46:25 +0800 +Subject: nvmet-auth: fix nvmet_auth hash error handling + +From: Gaosheng Cui + +[ Upstream commit 89f58f96d1e2357601c092d85b40a2109cf25ef3 ] + +If we fail to call nvme_auth_augmented_challenge, or fail to kmalloc +for shash, we should free the memory allocation for challenge, so add +err path out_free_challenge to fix the memory leak. + +Fixes: 7a277c37d352 ("nvmet-auth: Diffie-Hellman key exchange support") +Signed-off-by: Gaosheng Cui +Reviewed-by: Hannes Reinecke +Reviewed-by: Christoph Hellwig +Signed-off-by: Keith Busch +Signed-off-by: Sasha Levin +--- + drivers/nvme/target/auth.c | 14 ++++++++------ + 1 file changed, 8 insertions(+), 6 deletions(-) + +diff --git a/drivers/nvme/target/auth.c b/drivers/nvme/target/auth.c +index e900525b78665..aacc05ec00c2b 100644 +--- a/drivers/nvme/target/auth.c ++++ b/drivers/nvme/target/auth.c +@@ -314,7 +314,7 @@ int nvmet_auth_host_hash(struct nvmet_req *req, u8 *response, + req->sq->dhchap_c1, + challenge, shash_len); + if (ret) +- goto out_free_response; ++ goto out_free_challenge; + } + + pr_debug("ctrl %d qid %d host response seq %u transaction %d\n", +@@ -325,7 +325,7 @@ int nvmet_auth_host_hash(struct nvmet_req *req, u8 *response, + GFP_KERNEL); + if (!shash) { + ret = -ENOMEM; +- goto out_free_response; ++ goto out_free_challenge; + } + shash->tfm = shash_tfm; + ret = crypto_shash_init(shash); +@@ -361,9 +361,10 @@ int nvmet_auth_host_hash(struct nvmet_req *req, u8 *response, + goto out; + ret = crypto_shash_final(shash, response); + out: ++ kfree(shash); ++out_free_challenge: + if (challenge != req->sq->dhchap_c1) + kfree(challenge); +- kfree(shash); + out_free_response: + kfree_sensitive(host_response); + out_free_tfm: +@@ -426,14 +427,14 @@ int nvmet_auth_ctrl_hash(struct nvmet_req *req, u8 *response, + req->sq->dhchap_c2, + challenge, shash_len); + if (ret) +- goto out_free_response; ++ goto out_free_challenge; + } + + shash = kzalloc(sizeof(*shash) + crypto_shash_descsize(shash_tfm), + GFP_KERNEL); + if (!shash) { + ret = -ENOMEM; +- goto out_free_response; ++ goto out_free_challenge; + } + shash->tfm = shash_tfm; + +@@ -470,9 +471,10 @@ int nvmet_auth_ctrl_hash(struct nvmet_req *req, u8 *response, + goto out; + ret = crypto_shash_final(shash, response); + out: ++ kfree(shash); ++out_free_challenge: + if (challenge != req->sq->dhchap_c2) + kfree(challenge); +- kfree(shash); + out_free_response: + kfree_sensitive(ctrl_response); + out_free_tfm: +-- +2.43.0 + diff --git a/queue-6.6/opp-ti-fix-ti_opp_supply_probe-wrong-return-values.patch b/queue-6.6/opp-ti-fix-ti_opp_supply_probe-wrong-return-values.patch new file mode 100644 index 00000000000..8c797364459 --- /dev/null +++ b/queue-6.6/opp-ti-fix-ti_opp_supply_probe-wrong-return-values.patch @@ -0,0 +1,43 @@ +From d8eab22e3430039221858c99ef97ac12790ab32c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 Jun 2024 09:01:27 +0200 +Subject: OPP: ti: Fix ti_opp_supply_probe wrong return values + +From: Primoz Fiser + +[ Upstream commit 3a1ac6b8f603a9310274990a0ad563a5fb709f59 ] + +Function ti_opp_supply_probe() since commit 6baee034cb55 ("OPP: ti: +Migrate to dev_pm_opp_set_config_regulators()") returns wrong values +when all goes well and hence driver probing eventually fails. + +Fixes: 6baee034cb55 ("OPP: ti: Migrate to dev_pm_opp_set_config_regulators()") +Signed-off-by: Primoz Fiser +Signed-off-by: Viresh Kumar +Signed-off-by: Sasha Levin +--- + drivers/opp/ti-opp-supply.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/drivers/opp/ti-opp-supply.c b/drivers/opp/ti-opp-supply.c +index 8f3f13fbbb25a..a8a696d2e03ab 100644 +--- a/drivers/opp/ti-opp-supply.c ++++ b/drivers/opp/ti-opp-supply.c +@@ -400,10 +400,12 @@ static int ti_opp_supply_probe(struct platform_device *pdev) + } + + ret = dev_pm_opp_set_config_regulators(cpu_dev, ti_opp_config_regulators); +- if (ret < 0) ++ if (ret < 0) { + _free_optimized_voltages(dev, &opp_data); ++ return ret; ++ } + +- return ret; ++ return 0; + } + + static struct platform_driver ti_opp_supply_driver = { +-- +2.43.0 + diff --git a/queue-6.6/pci-dwc-fix-index-0-incorrectly-being-interpreted-as.patch b/queue-6.6/pci-dwc-fix-index-0-incorrectly-being-interpreted-as.patch new file mode 100644 index 00000000000..7ef0ed8823e --- /dev/null +++ b/queue-6.6/pci-dwc-fix-index-0-incorrectly-being-interpreted-as.patch @@ -0,0 +1,100 @@ +From 4b7bdac6d6e4e350f3f30b3086261c68421e49a7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 12 Apr 2024 12:08:41 -0400 +Subject: PCI: dwc: Fix index 0 incorrectly being interpreted as a free ATU + slot +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Frank Li + +[ Upstream commit c2a57ee0f2f1ad8c970ff58b78a43e85abbdeb7f ] + +When PERST# assert and deassert happens on the PERST# supported platforms, +both iATU0 and iATU6 will map inbound window to BAR0. DMA will access the +area that was previously allocated (iATU0) for BAR0, instead of the new +area (iATU6) for BAR0. + +Right now, this isn't an issue because both iATU0 and iATU6 should +translate inbound accesses to BAR0 to the same allocated memory area. +However, having two separate inbound mappings for the same BAR is a +disaster waiting to happen. + +The mappings between PCI BAR and iATU inbound window are maintained in the +dw_pcie_ep::bar_to_atu[] array. While allocating a new inbound iATU map for +a BAR, dw_pcie_ep_inbound_atu() API checks for the availability of the +existing mapping in the array and if it is not found (i.e., value in the +array indexed by the BAR is found to be 0), it allocates a new map value +using find_first_zero_bit(). + +The issue is the existing logic failed to consider the fact that the map +value '0' is a valid value for BAR0, so find_first_zero_bit() will return +'0' as the map value for BAR0 (note that it returns the first zero bit +position). + +Due to this, when PERST# assert + deassert happens on the PERST# supported +platforms, the inbound window allocation restarts from BAR0 and the +existing logic to find the BAR mapping will return '6' for BAR0 instead of +'0' due to the fact that it considers '0' as an invalid map value. + +Fix this issue by always incrementing the map value before assigning to +bar_to_atu[] array and then decrementing it while fetching. This will make +sure that the map value '0' always represents the invalid mapping." + +Fixes: 4284c88fff0e ("PCI: designware-ep: Allow pci_epc_set_bar() update inbound map address") +Closes: https://lore.kernel.org/linux-pci/ZXsRp+Lzg3x%2Fnhk3@x1-carbon/ +Link: https://lore.kernel.org/linux-pci/20240412160841.925927-1-Frank.Li@nxp.com +Reported-by: Niklas Cassel +Tested-by: Niklas Cassel +Signed-off-by: Frank Li +Signed-off-by: Krzysztof Wilczyński +Signed-off-by: Bjorn Helgaas +Reviewed-by: Manivannan Sadhasivam +Reviewed-by: Niklas Cassel +Signed-off-by: Sasha Levin +--- + drivers/pci/controller/dwc/pcie-designware-ep.c | 13 ++++++++++--- + 1 file changed, 10 insertions(+), 3 deletions(-) + +diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c +index ad6516a3ae6ea..f2e5feba55267 100644 +--- a/drivers/pci/controller/dwc/pcie-designware-ep.c ++++ b/drivers/pci/controller/dwc/pcie-designware-ep.c +@@ -163,7 +163,7 @@ static int dw_pcie_ep_inbound_atu(struct dw_pcie_ep *ep, u8 func_no, int type, + if (!ep->bar_to_atu[bar]) + free_win = find_first_zero_bit(ep->ib_window_map, pci->num_ib_windows); + else +- free_win = ep->bar_to_atu[bar]; ++ free_win = ep->bar_to_atu[bar] - 1; + + if (free_win >= pci->num_ib_windows) { + dev_err(pci->dev, "No free inbound window\n"); +@@ -177,7 +177,11 @@ static int dw_pcie_ep_inbound_atu(struct dw_pcie_ep *ep, u8 func_no, int type, + return ret; + } + +- ep->bar_to_atu[bar] = free_win; ++ /* ++ * Always increment free_win before assignment, since value 0 is used to identify ++ * unallocated mapping. ++ */ ++ ep->bar_to_atu[bar] = free_win + 1; + set_bit(free_win, ep->ib_window_map); + + return 0; +@@ -214,7 +218,10 @@ static void dw_pcie_ep_clear_bar(struct pci_epc *epc, u8 func_no, u8 vfunc_no, + struct dw_pcie_ep *ep = epc_get_drvdata(epc); + struct dw_pcie *pci = to_dw_pcie_from_ep(ep); + enum pci_barno bar = epf_bar->barno; +- u32 atu_index = ep->bar_to_atu[bar]; ++ u32 atu_index = ep->bar_to_atu[bar] - 1; ++ ++ if (!ep->bar_to_atu[bar]) ++ return; + + __dw_pcie_ep_reset_bar(pci, func_no, bar, epf_bar->flags); + +-- +2.43.0 + diff --git a/queue-6.6/pci-endpoint-clean-up-error-handling-in-vpci_scan_bu.patch b/queue-6.6/pci-endpoint-clean-up-error-handling-in-vpci_scan_bu.patch new file mode 100644 index 00000000000..3034afa4fc5 --- /dev/null +++ b/queue-6.6/pci-endpoint-clean-up-error-handling-in-vpci_scan_bu.patch @@ -0,0 +1,68 @@ +From c514e31d92d16b7a8cf70c8ac86140f3adfba786 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 10 Jun 2024 12:33:39 +0300 +Subject: PCI: endpoint: Clean up error handling in vpci_scan_bus() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Dan Carpenter + +[ Upstream commit 8e0f5a96c534f781e8c57ca30459448b3bfe5429 ] + +Smatch complains about inconsistent NULL checking in vpci_scan_bus(): + + drivers/pci/endpoint/functions/pci-epf-vntb.c:1024 vpci_scan_bus() error: we previously assumed 'vpci_bus' could be null (see line 1021) + +Instead of printing an error message and then crashing we should return +an error code and clean up. + +Also the NULL check is reversed so it prints an error for success +instead of failure. + +Fixes: e35f56bb0330 ("PCI: endpoint: Support NTB transfer between RC and EP") +Link: https://lore.kernel.org/linux-pci/68e0f6a4-fd57-45d0-945b-0876f2c8cb86@moroto.mountain +Signed-off-by: Dan Carpenter +Signed-off-by: Krzysztof Wilczyński +Reviewed-by: Ilpo Järvinen +Signed-off-by: Sasha Levin +--- + drivers/pci/endpoint/functions/pci-epf-vntb.c | 12 +++++++++--- + 1 file changed, 9 insertions(+), 3 deletions(-) + +diff --git a/drivers/pci/endpoint/functions/pci-epf-vntb.c b/drivers/pci/endpoint/functions/pci-epf-vntb.c +index 2b7bc5a731dd6..1a4cdf98df703 100644 +--- a/drivers/pci/endpoint/functions/pci-epf-vntb.c ++++ b/drivers/pci/endpoint/functions/pci-epf-vntb.c +@@ -1029,8 +1029,10 @@ static int vpci_scan_bus(void *sysdata) + struct epf_ntb *ndev = sysdata; + + vpci_bus = pci_scan_bus(ndev->vbus_number, &vpci_ops, sysdata); +- if (vpci_bus) +- pr_err("create pci bus\n"); ++ if (!vpci_bus) { ++ pr_err("create pci bus failed\n"); ++ return -EINVAL; ++ } + + pci_bus_add_devices(vpci_bus); + +@@ -1352,10 +1354,14 @@ static int epf_ntb_bind(struct pci_epf *epf) + goto err_bar_alloc; + } + +- vpci_scan_bus(ntb); ++ ret = vpci_scan_bus(ntb); ++ if (ret) ++ goto err_unregister; + + return 0; + ++err_unregister: ++ pci_unregister_driver(&vntb_pci_driver); + err_bar_alloc: + epf_ntb_config_spad_bar_free(ntb); + +-- +2.43.0 + diff --git a/queue-6.6/pci-endpoint-fix-error-handling-in-epf_ntb_epc_clean.patch b/queue-6.6/pci-endpoint-fix-error-handling-in-epf_ntb_epc_clean.patch new file mode 100644 index 00000000000..dd6f40a2af3 --- /dev/null +++ b/queue-6.6/pci-endpoint-fix-error-handling-in-epf_ntb_epc_clean.patch @@ -0,0 +1,67 @@ +From 8ffd1fb5597faf2c8acfc9259720aeed34ebe800 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 10 Jun 2024 12:33:49 +0300 +Subject: PCI: endpoint: Fix error handling in epf_ntb_epc_cleanup() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Dan Carpenter + +[ Upstream commit 6bba3c0ac5dc54737998a0982b2e272242c87e0f ] + +There are two issues related to epf_ntb_epc_cleanup(): + + 1) It should call epf_ntb_config_sspad_bar_clear() + 2) The epf_ntb_bind() function should call epf_ntb_epc_cleanup() + to cleanup. + +I also changed the ordering a bit. Unwinding should be done in the +mirror order from how they are allocated. + +Fixes: e35f56bb0330 ("PCI: endpoint: Support NTB transfer between RC and EP") +Link: https://lore.kernel.org/linux-pci/aaffbe8d-7094-4083-8146-185f4a84e8a1@moroto.mountain +Signed-off-by: Dan Carpenter +Signed-off-by: Krzysztof Wilczyński +Reviewed-by: Ilpo Järvinen +Signed-off-by: Sasha Levin +--- + drivers/pci/endpoint/functions/pci-epf-vntb.c | 7 +++++-- + 1 file changed, 5 insertions(+), 2 deletions(-) + +diff --git a/drivers/pci/endpoint/functions/pci-epf-vntb.c b/drivers/pci/endpoint/functions/pci-epf-vntb.c +index 1a4cdf98df703..3368f483f818d 100644 +--- a/drivers/pci/endpoint/functions/pci-epf-vntb.c ++++ b/drivers/pci/endpoint/functions/pci-epf-vntb.c +@@ -810,8 +810,9 @@ static int epf_ntb_epc_init(struct epf_ntb *ntb) + */ + static void epf_ntb_epc_cleanup(struct epf_ntb *ntb) + { +- epf_ntb_db_bar_clear(ntb); + epf_ntb_mw_bar_clear(ntb, ntb->num_mws); ++ epf_ntb_db_bar_clear(ntb); ++ epf_ntb_config_sspad_bar_clear(ntb); + } + + #define EPF_NTB_R(_name) \ +@@ -1351,7 +1352,7 @@ static int epf_ntb_bind(struct pci_epf *epf) + ret = pci_register_driver(&vntb_pci_driver); + if (ret) { + dev_err(dev, "failure register vntb pci driver\n"); +- goto err_bar_alloc; ++ goto err_epc_cleanup; + } + + ret = vpci_scan_bus(ntb); +@@ -1362,6 +1363,8 @@ static int epf_ntb_bind(struct pci_epf *epf) + + err_unregister: + pci_unregister_driver(&vntb_pci_driver); ++err_epc_cleanup: ++ epf_ntb_epc_cleanup(ntb); + err_bar_alloc: + epf_ntb_config_spad_bar_free(ntb); + +-- +2.43.0 + diff --git a/queue-6.6/pci-fix-resource-double-counting-on-remove-rescan.patch b/queue-6.6/pci-fix-resource-double-counting-on-remove-rescan.patch new file mode 100644 index 00000000000..43d8272f422 --- /dev/null +++ b/queue-6.6/pci-fix-resource-double-counting-on-remove-rescan.patch @@ -0,0 +1,73 @@ +From 2516b320c39e225a23cc04672a3866066368a0ed Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 7 May 2024 13:25:16 +0300 +Subject: PCI: Fix resource double counting on remove & rescan +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Ilpo Järvinen + +[ Upstream commit 903534fa7d30214d8ba840ab1cd9e917e0c88e41 ] + +pbus_size_mem() keeps the size of the optional resources in +children_add_size. When calculating the PCI bridge window size, +calculate_memsize() lower bounds size by old_size before adding +children_add_size and performing the window size alignment. This +results in double counting for the resources in children_add_size +because old_size may be based on the previous size of the bridge +window after it has already included children_add_size (that is, +size1 in pbus_size_mem() from an earlier invocation of that +function). + +As a result, on repeated remove of the bus & rescan cycles the resource +size keeps increasing when children_add_size is non-zero as can be seen +from this extract: + + iomem0: 23fffd00000-23fffdfffff : PCI Bus 0000:03 # 1MiB + iomem1: 20000000000-200001fffff : PCI Bus 0000:03 # 2MiB + iomem2: 20000000000-200002fffff : PCI Bus 0000:03 # 3MiB + iomem3: 20000000000-200003fffff : PCI Bus 0000:03 # 4MiB + iomem4: 20000000000-200004fffff : PCI Bus 0000:03 # 5MiB + +Solve the double counting by moving old_size check later in +calculate_memsize() so that children_add_size is already accounted for. + +After the patch, the bridge window retains its size as expected: + + iomem0: 23fffd00000-23fffdfffff : PCI Bus 0000:03 # 1MiB + iomem1: 20000000000-200000fffff : PCI Bus 0000:03 # 1MiB + iomem2: 20000000000-200000fffff : PCI Bus 0000:03 # 1MiB + +Fixes: a4ac9fea016f ("PCI : Calculate right add_size") +Link: https://lore.kernel.org/r/20240507102523.57320-2-ilpo.jarvinen@linux.intel.com +Tested-by: Lidong Wang +Signed-off-by: Ilpo Järvinen +Signed-off-by: Bjorn Helgaas +Reviewed-by: Mika Westerberg +Signed-off-by: Sasha Levin +--- + drivers/pci/setup-bus.c | 6 ++---- + 1 file changed, 2 insertions(+), 4 deletions(-) + +diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c +index dae490f256417..5a143ad5fca24 100644 +--- a/drivers/pci/setup-bus.c ++++ b/drivers/pci/setup-bus.c +@@ -820,11 +820,9 @@ static resource_size_t calculate_memsize(resource_size_t size, + size = min_size; + if (old_size == 1) + old_size = 0; +- if (size < old_size) +- size = old_size; + +- size = ALIGN(max(size, add_size) + children_add_size, align); +- return size; ++ size = max(size, add_size) + children_add_size; ++ return ALIGN(max(size, old_size), align); + } + + resource_size_t __weak pcibios_window_alignment(struct pci_bus *bus, +-- +2.43.0 + diff --git a/queue-6.6/pci-keystone-don-t-enable-bar-0-for-am654x.patch b/queue-6.6/pci-keystone-don-t-enable-bar-0-for-am654x.patch new file mode 100644 index 00000000000..537257822eb --- /dev/null +++ b/queue-6.6/pci-keystone-don-t-enable-bar-0-for-am654x.patch @@ -0,0 +1,113 @@ +From 23835e9478fa990ea3aaf64fb1dfaa90cf47fa9a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 28 Mar 2024 14:20:41 +0530 +Subject: PCI: keystone: Don't enable BAR 0 for AM654x +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Siddharth Vadapalli + +[ Upstream commit 9ffa0e70b2daf9b0271e4960b7c8a2350e2cda08 ] + +After 6ab15b5e7057 ("PCI: dwc: keystone: Convert .scan_bus() callback to +use add_bus"), ks_pcie_v3_65_add_bus() enabled BAR 0 for both v3.65a and +v4.90a devices. On the AM654x SoC, which uses v4.90a, enabling BAR 0 +causes Completion Timeouts when setting up MSI-X. These timeouts delay +boot of the AM654x by about 45 seconds. + +Move the BAR 0 initialization to ks_pcie_msi_host_init(), which is only +used for v3.65a devices, and remove ks_pcie_v3_65_add_bus(). + +[bhelgaas: commit log] +Fixes: 6ab15b5e7057 ("PCI: dwc: keystone: Convert .scan_bus() callback to use add_bus") +Link: https://lore.kernel.org/linux-pci/20240328085041.2916899-3-s-vadapalli@ti.com +Suggested-by: Bjorn Helgaas +Suggested-by: Niklas Cassel +Suggested-by: Serge Semin +Signed-off-by: Siddharth Vadapalli +Signed-off-by: Krzysztof Wilczyński +Signed-off-by: Bjorn Helgaas +Reviewed-by: Niklas Cassel +Signed-off-by: Sasha Levin +--- + drivers/pci/controller/dwc/pci-keystone.c | 52 ++++++++--------------- + 1 file changed, 18 insertions(+), 34 deletions(-) + +diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c +index bf907c8ca25bb..9886fdd415039 100644 +--- a/drivers/pci/controller/dwc/pci-keystone.c ++++ b/drivers/pci/controller/dwc/pci-keystone.c +@@ -290,6 +290,24 @@ static void ks_pcie_clear_dbi_mode(struct keystone_pcie *ks_pcie) + + static int ks_pcie_msi_host_init(struct dw_pcie_rp *pp) + { ++ struct dw_pcie *pci = to_dw_pcie_from_pp(pp); ++ struct keystone_pcie *ks_pcie = to_keystone_pcie(pci); ++ ++ /* Configure and set up BAR0 */ ++ ks_pcie_set_dbi_mode(ks_pcie); ++ ++ /* Enable BAR0 */ ++ dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_0, 1); ++ dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_0, SZ_4K - 1); ++ ++ ks_pcie_clear_dbi_mode(ks_pcie); ++ ++ /* ++ * For BAR0, just setting bus address for inbound writes (MSI) should ++ * be sufficient. Use physical address to avoid any conflicts. ++ */ ++ dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_0, ks_pcie->app.start); ++ + pp->msi_irq_chip = &ks_pcie_msi_irq_chip; + return dw_pcie_allocate_domains(pp); + } +@@ -447,44 +465,10 @@ static struct pci_ops ks_child_pcie_ops = { + .write = pci_generic_config_write, + }; + +-/** +- * ks_pcie_v3_65_add_bus() - keystone add_bus post initialization +- * @bus: A pointer to the PCI bus structure. +- * +- * This sets BAR0 to enable inbound access for MSI_IRQ register +- */ +-static int ks_pcie_v3_65_add_bus(struct pci_bus *bus) +-{ +- struct dw_pcie_rp *pp = bus->sysdata; +- struct dw_pcie *pci = to_dw_pcie_from_pp(pp); +- struct keystone_pcie *ks_pcie = to_keystone_pcie(pci); +- +- if (!pci_is_root_bus(bus)) +- return 0; +- +- /* Configure and set up BAR0 */ +- ks_pcie_set_dbi_mode(ks_pcie); +- +- /* Enable BAR0 */ +- dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_0, 1); +- dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_0, SZ_4K - 1); +- +- ks_pcie_clear_dbi_mode(ks_pcie); +- +- /* +- * For BAR0, just setting bus address for inbound writes (MSI) should +- * be sufficient. Use physical address to avoid any conflicts. +- */ +- dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_0, ks_pcie->app.start); +- +- return 0; +-} +- + static struct pci_ops ks_pcie_ops = { + .map_bus = dw_pcie_own_conf_map_bus, + .read = pci_generic_config_read, + .write = pci_generic_config_write, +- .add_bus = ks_pcie_v3_65_add_bus, + }; + + /** +-- +2.43.0 + diff --git a/queue-6.6/pci-keystone-fix-null-pointer-dereference-in-case-of.patch b/queue-6.6/pci-keystone-fix-null-pointer-dereference-in-case-of.patch new file mode 100644 index 00000000000..88253e1bfef --- /dev/null +++ b/queue-6.6/pci-keystone-fix-null-pointer-dereference-in-case-of.patch @@ -0,0 +1,98 @@ +From 8354db157ff59c6fa599c85294b320d1a8bbd39c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 5 May 2024 09:15:17 +0300 +Subject: PCI: keystone: Fix NULL pointer dereference in case of DT error in + ks_pcie_setup_rc_app_regs() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Aleksandr Mishin + +[ Upstream commit a231707a91f323af1e5d9f1722055ec2fc1c7775 ] + +If IORESOURCE_MEM is not provided in Device Tree due to +any error, resource_list_first_type() will return NULL and +pci_parse_request_of_pci_ranges() will just emit a warning. + +This will cause a NULL pointer dereference. Fix this bug by adding NULL +return check. + +Found by Linux Verification Center (linuxtesting.org) with SVACE. + +Fixes: 0f71c60ffd26 ("PCI: dwc: Remove storing of PCI resources") +Link: https://lore.kernel.org/linux-pci/20240505061517.11527-1-amishin@t-argos.ru +Suggested-by: Bjorn Helgaas +Suggested-by: Manivannan Sadhasivam +Signed-off-by: Aleksandr Mishin +Signed-off-by: Krzysztof Wilczyński +Signed-off-by: Bjorn Helgaas +Reviewed-by: Manivannan Sadhasivam +Signed-off-by: Sasha Levin +--- + drivers/pci/controller/dwc/pci-keystone.c | 20 +++++++++++++++----- + 1 file changed, 15 insertions(+), 5 deletions(-) + +diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c +index 9886fdd415039..54a3c7f29f78a 100644 +--- a/drivers/pci/controller/dwc/pci-keystone.c ++++ b/drivers/pci/controller/dwc/pci-keystone.c +@@ -402,17 +402,22 @@ static const struct irq_domain_ops ks_pcie_legacy_irq_domain_ops = { + .xlate = irq_domain_xlate_onetwocell, + }; + +-static void ks_pcie_setup_rc_app_regs(struct keystone_pcie *ks_pcie) ++static int ks_pcie_setup_rc_app_regs(struct keystone_pcie *ks_pcie) + { + u32 val; + u32 num_viewport = ks_pcie->num_viewport; + struct dw_pcie *pci = ks_pcie->pci; + struct dw_pcie_rp *pp = &pci->pp; +- u64 start, end; ++ struct resource_entry *entry; + struct resource *mem; ++ u64 start, end; + int i; + +- mem = resource_list_first_type(&pp->bridge->windows, IORESOURCE_MEM)->res; ++ entry = resource_list_first_type(&pp->bridge->windows, IORESOURCE_MEM); ++ if (!entry) ++ return -ENODEV; ++ ++ mem = entry->res; + start = mem->start; + end = mem->end; + +@@ -423,7 +428,7 @@ static void ks_pcie_setup_rc_app_regs(struct keystone_pcie *ks_pcie) + ks_pcie_clear_dbi_mode(ks_pcie); + + if (ks_pcie->is_am6) +- return; ++ return 0; + + val = ilog2(OB_WIN_SIZE); + ks_pcie_app_writel(ks_pcie, OB_SIZE, val); +@@ -440,6 +445,8 @@ static void ks_pcie_setup_rc_app_regs(struct keystone_pcie *ks_pcie) + val = ks_pcie_app_readl(ks_pcie, CMD_STATUS); + val |= OB_XLAT_EN_VAL; + ks_pcie_app_writel(ks_pcie, CMD_STATUS, val); ++ ++ return 0; + } + + static void __iomem *ks_pcie_other_map_bus(struct pci_bus *bus, +@@ -801,7 +808,10 @@ static int __init ks_pcie_host_init(struct dw_pcie_rp *pp) + return ret; + + ks_pcie_stop_link(pci); +- ks_pcie_setup_rc_app_regs(ks_pcie); ++ ret = ks_pcie_setup_rc_app_regs(ks_pcie); ++ if (ret) ++ return ret; ++ + writew(PCI_IO_RANGE_TYPE_32 | (PCI_IO_RANGE_TYPE_32 << 8), + pci->dbi_base + PCI_IO_BASE); + +-- +2.43.0 + diff --git a/queue-6.6/pci-keystone-relocate-ks_pcie_set-clear_dbi_mode.patch b/queue-6.6/pci-keystone-relocate-ks_pcie_set-clear_dbi_mode.patch new file mode 100644 index 00000000000..a0ad50d5159 --- /dev/null +++ b/queue-6.6/pci-keystone-relocate-ks_pcie_set-clear_dbi_mode.patch @@ -0,0 +1,130 @@ +From 98a2444a5d44b3618f0b03c5954053a68fce0237 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 28 Mar 2024 14:20:40 +0530 +Subject: PCI: keystone: Relocate ks_pcie_set/clear_dbi_mode() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Siddharth Vadapalli + +[ Upstream commit 5125fdc3292eea20870d4e6cefa62dc1245ce7ec ] + +Relocate ks_pcie_set_dbi_mode() and ks_pcie_clear_dbi_mode() to avoid +forward declaration in a subsequent patch. No functional change intended. + +Link: https://lore.kernel.org/linux-pci/20240328085041.2916899-2-s-vadapalli@ti.com +Signed-off-by: Siddharth Vadapalli +Signed-off-by: Krzysztof Wilczyński +Signed-off-by: Bjorn Helgaas +Stable-dep-of: 9ffa0e70b2da ("PCI: keystone: Don't enable BAR 0 for AM654x") +Signed-off-by: Sasha Levin +--- + drivers/pci/controller/dwc/pci-keystone.c | 84 +++++++++++------------ + 1 file changed, 42 insertions(+), 42 deletions(-) + +diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c +index cf3836561316d..bf907c8ca25bb 100644 +--- a/drivers/pci/controller/dwc/pci-keystone.c ++++ b/drivers/pci/controller/dwc/pci-keystone.c +@@ -246,6 +246,48 @@ static struct irq_chip ks_pcie_msi_irq_chip = { + .irq_unmask = ks_pcie_msi_unmask, + }; + ++/** ++ * ks_pcie_set_dbi_mode() - Set DBI mode to access overlaid BAR mask registers ++ * @ks_pcie: A pointer to the keystone_pcie structure which holds the KeyStone ++ * PCIe host controller driver information. ++ * ++ * Since modification of dbi_cs2 involves different clock domain, read the ++ * status back to ensure the transition is complete. ++ */ ++static void ks_pcie_set_dbi_mode(struct keystone_pcie *ks_pcie) ++{ ++ u32 val; ++ ++ val = ks_pcie_app_readl(ks_pcie, CMD_STATUS); ++ val |= DBI_CS2; ++ ks_pcie_app_writel(ks_pcie, CMD_STATUS, val); ++ ++ do { ++ val = ks_pcie_app_readl(ks_pcie, CMD_STATUS); ++ } while (!(val & DBI_CS2)); ++} ++ ++/** ++ * ks_pcie_clear_dbi_mode() - Disable DBI mode ++ * @ks_pcie: A pointer to the keystone_pcie structure which holds the KeyStone ++ * PCIe host controller driver information. ++ * ++ * Since modification of dbi_cs2 involves different clock domain, read the ++ * status back to ensure the transition is complete. ++ */ ++static void ks_pcie_clear_dbi_mode(struct keystone_pcie *ks_pcie) ++{ ++ u32 val; ++ ++ val = ks_pcie_app_readl(ks_pcie, CMD_STATUS); ++ val &= ~DBI_CS2; ++ ks_pcie_app_writel(ks_pcie, CMD_STATUS, val); ++ ++ do { ++ val = ks_pcie_app_readl(ks_pcie, CMD_STATUS); ++ } while (val & DBI_CS2); ++} ++ + static int ks_pcie_msi_host_init(struct dw_pcie_rp *pp) + { + pp->msi_irq_chip = &ks_pcie_msi_irq_chip; +@@ -342,48 +384,6 @@ static const struct irq_domain_ops ks_pcie_legacy_irq_domain_ops = { + .xlate = irq_domain_xlate_onetwocell, + }; + +-/** +- * ks_pcie_set_dbi_mode() - Set DBI mode to access overlaid BAR mask registers +- * @ks_pcie: A pointer to the keystone_pcie structure which holds the KeyStone +- * PCIe host controller driver information. +- * +- * Since modification of dbi_cs2 involves different clock domain, read the +- * status back to ensure the transition is complete. +- */ +-static void ks_pcie_set_dbi_mode(struct keystone_pcie *ks_pcie) +-{ +- u32 val; +- +- val = ks_pcie_app_readl(ks_pcie, CMD_STATUS); +- val |= DBI_CS2; +- ks_pcie_app_writel(ks_pcie, CMD_STATUS, val); +- +- do { +- val = ks_pcie_app_readl(ks_pcie, CMD_STATUS); +- } while (!(val & DBI_CS2)); +-} +- +-/** +- * ks_pcie_clear_dbi_mode() - Disable DBI mode +- * @ks_pcie: A pointer to the keystone_pcie structure which holds the KeyStone +- * PCIe host controller driver information. +- * +- * Since modification of dbi_cs2 involves different clock domain, read the +- * status back to ensure the transition is complete. +- */ +-static void ks_pcie_clear_dbi_mode(struct keystone_pcie *ks_pcie) +-{ +- u32 val; +- +- val = ks_pcie_app_readl(ks_pcie, CMD_STATUS); +- val &= ~DBI_CS2; +- ks_pcie_app_writel(ks_pcie, CMD_STATUS, val); +- +- do { +- val = ks_pcie_app_readl(ks_pcie, CMD_STATUS); +- } while (val & DBI_CS2); +-} +- + static void ks_pcie_setup_rc_app_regs(struct keystone_pcie *ks_pcie) + { + u32 val; +-- +2.43.0 + diff --git a/queue-6.6/pci-qcom-ep-disable-resources-unconditionally-during.patch b/queue-6.6/pci-qcom-ep-disable-resources-unconditionally-during.patch new file mode 100644 index 00000000000..75824f018bf --- /dev/null +++ b/queue-6.6/pci-qcom-ep-disable-resources-unconditionally-during.patch @@ -0,0 +1,52 @@ +From 24dfdbe0ab71e93c96150817aa22c9917b209896 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 30 Apr 2024 11:43:42 +0530 +Subject: PCI: qcom-ep: Disable resources unconditionally during PERST# assert +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Manivannan Sadhasivam + +[ Upstream commit 912315715d7b74f7abdb6f063ebace44ee288af9 ] + +All EP specific resources are enabled during PERST# deassert. As a counter +operation, all resources should be disabled during PERST# assert. There is +no point in skipping that if the link was not enabled. + +This will also result in enablement of the resources twice if PERST# got +deasserted again. So remove the check from qcom_pcie_perst_assert() and +disable all the resources unconditionally. + +Fixes: f55fee56a631 ("PCI: qcom-ep: Add Qualcomm PCIe Endpoint controller driver") +Link: https://lore.kernel.org/linux-pci/20240430-pci-epf-rework-v4-1-22832d0d456f@linaro.org +Tested-by: Niklas Cassel +Signed-off-by: Manivannan Sadhasivam +Signed-off-by: Krzysztof Wilczyński +Signed-off-by: Bjorn Helgaas +Reviewed-by: Niklas Cassel +Signed-off-by: Sasha Levin +--- + drivers/pci/controller/dwc/pcie-qcom-ep.c | 6 ------ + 1 file changed, 6 deletions(-) + +diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c +index 9b62ee6992f0e..66e080c99d5df 100644 +--- a/drivers/pci/controller/dwc/pcie-qcom-ep.c ++++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c +@@ -519,12 +519,6 @@ static int qcom_pcie_perst_deassert(struct dw_pcie *pci) + static void qcom_pcie_perst_assert(struct dw_pcie *pci) + { + struct qcom_pcie_ep *pcie_ep = to_pcie_ep(pci); +- struct device *dev = pci->dev; +- +- if (pcie_ep->link_status == QCOM_PCIE_EP_LINK_DISABLED) { +- dev_dbg(dev, "Link is already disabled\n"); +- return; +- } + + qcom_pcie_disable_resources(pcie_ep); + pcie_ep->link_status = QCOM_PCIE_EP_LINK_DISABLED; +-- +2.43.0 + diff --git a/queue-6.6/pci-rcar-demote-warn-to-dev_warn_ratelimited-in-rcar.patch b/queue-6.6/pci-rcar-demote-warn-to-dev_warn_ratelimited-in-rcar.patch new file mode 100644 index 00000000000..0c89b917929 --- /dev/null +++ b/queue-6.6/pci-rcar-demote-warn-to-dev_warn_ratelimited-in-rcar.patch @@ -0,0 +1,77 @@ +From 0360ca1db1ffbeb53fae86d976fc832dd65f1941 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 12 May 2024 01:54:50 +0200 +Subject: PCI: rcar: Demote WARN() to dev_warn_ratelimited() in + rcar_pcie_wakeup() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Marek Vasut + +[ Upstream commit c93637e6a4c4e1d0e85ef7efac78d066bbb24d96 ] + +Avoid large backtrace, it is sufficient to warn the user that there has +been a link problem. Either the link has failed and the system is in need +of maintenance, or the link continues to work and user has been informed. +The message from the warning can be looked up in the sources. + +This makes an actual link issue less verbose. + +First of all, this controller has a limitation in that the controller +driver has to assist the hardware with transition to L1 link state by +writing L1IATN to PMCTRL register, the L1 and L0 link state switching +is not fully automatic on this controller. + +In case of an ASMedia ASM1062 PCIe SATA controller which does not support +ASPM, on entry to suspend or during platform pm_test, the SATA controller +enters D3hot state and the link enters L1 state. If the SATA controller +wakes up before rcar_pcie_wakeup() was called and returns to D0, the link +returns to L0 before the controller driver even started its transition to +L1 link state. At this point, the SATA controller did send an PM_ENTER_L1 +DLLP to the PCIe controller and the PCIe controller received it, and the +PCIe controller did set PMSR PMEL1RX bit. + +Once rcar_pcie_wakeup() is called, if the link is already back in L0 state +and PMEL1RX bit is set, the controller driver has no way to determine if +it should perform the link transition to L1 state, or treat the link as if +it is in L0 state. Currently the driver attempts to perform the transition +to L1 link state unconditionally, which in this specific case fails with a +PMSR L1FAEG poll timeout, however the link still works as it is already +back in L0 state. + +Reduce this warning verbosity. In case the link is really broken, the +rcar_pcie_config_access() would fail, otherwise it will succeed and any +system with this controller and ASM1062 can suspend without generating +a backtrace. + +Fixes: 84b576146294 ("PCI: rcar: Finish transition to L1 state in rcar_pcie_config_access()") +Link: https://lore.kernel.org/linux-pci/20240511235513.77301-1-marek.vasut+renesas@mailbox.org +Signed-off-by: Marek Vasut +Signed-off-by: Krzysztof Wilczyński +Signed-off-by: Bjorn Helgaas +Signed-off-by: Sasha Levin +--- + drivers/pci/controller/pcie-rcar-host.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +diff --git a/drivers/pci/controller/pcie-rcar-host.c b/drivers/pci/controller/pcie-rcar-host.c +index 88975e40ee2fb..704ab5d723a95 100644 +--- a/drivers/pci/controller/pcie-rcar-host.c ++++ b/drivers/pci/controller/pcie-rcar-host.c +@@ -77,7 +77,11 @@ static int rcar_pcie_wakeup(struct device *pcie_dev, void __iomem *pcie_base) + writel(L1IATN, pcie_base + PMCTLR); + ret = readl_poll_timeout_atomic(pcie_base + PMSR, val, + val & L1FAEG, 10, 1000); +- WARN(ret, "Timeout waiting for L1 link state, ret=%d\n", ret); ++ if (ret) { ++ dev_warn_ratelimited(pcie_dev, ++ "Timeout waiting for L1 link state, ret=%d\n", ++ ret); ++ } + writel(L1FAEG | PMEL1RX, pcie_base + PMSR); + } + +-- +2.43.0 + diff --git a/queue-6.6/perf-fix-default-aux_watermark-calculation.patch b/queue-6.6/perf-fix-default-aux_watermark-calculation.patch new file mode 100644 index 00000000000..a58df564d49 --- /dev/null +++ b/queue-6.6/perf-fix-default-aux_watermark-calculation.patch @@ -0,0 +1,47 @@ +From 231d627bbedb67a93042c6cf22ef04ced6922baa Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 24 Jun 2024 23:11:00 +0300 +Subject: perf: Fix default aux_watermark calculation + +From: Adrian Hunter + +[ Upstream commit 43deb76b19663a96ec2189d8f4eb9a9dc2d7623f ] + +The default aux_watermark is half the AUX area buffer size. In general, +on a 64-bit architecture, the AUX area buffer size could be a bigger than +fits in a 32-bit type, but the calculation does not allow for that +possibility. + +However the aux_watermark value is recorded in a u32, so should not be +more than U32_MAX either. + +Fix by doing the calculation in a correctly sized type, and limiting the +result to U32_MAX. + +Fixes: d68e6799a5c8 ("perf: Cap allocation order at aux_watermark") +Signed-off-by: Adrian Hunter +Signed-off-by: Peter Zijlstra (Intel) +Link: https://lore.kernel.org/r/20240624201101.60186-7-adrian.hunter@intel.com +Signed-off-by: Sasha Levin +--- + kernel/events/ring_buffer.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/kernel/events/ring_buffer.c b/kernel/events/ring_buffer.c +index e8d82c2f07d0e..f1f4a627f93db 100644 +--- a/kernel/events/ring_buffer.c ++++ b/kernel/events/ring_buffer.c +@@ -684,7 +684,9 @@ int rb_alloc_aux(struct perf_buffer *rb, struct perf_event *event, + * max_order, to aid PMU drivers in double buffering. + */ + if (!watermark) +- watermark = nr_pages << (PAGE_SHIFT - 1); ++ watermark = min_t(unsigned long, ++ U32_MAX, ++ (unsigned long)nr_pages << (PAGE_SHIFT - 1)); + + /* + * Use aux_watermark as the basis for chunking to +-- +2.43.0 + diff --git a/queue-6.6/perf-fix-perf_aux_size-for-greater-than-32-bit-size.patch b/queue-6.6/perf-fix-perf_aux_size-for-greater-than-32-bit-size.patch new file mode 100644 index 00000000000..a75ec2d9dd9 --- /dev/null +++ b/queue-6.6/perf-fix-perf_aux_size-for-greater-than-32-bit-size.patch @@ -0,0 +1,37 @@ +From e40d66cbae80952a393619e46861855b125b6abb Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 24 Jun 2024 23:10:58 +0300 +Subject: perf: Fix perf_aux_size() for greater-than 32-bit size + +From: Adrian Hunter + +[ Upstream commit 3df94a5b1078dfe2b0c03f027d018800faf44c82 ] + +perf_buffer->aux_nr_pages uses a 32-bit type, so a cast is needed to +calculate a 64-bit size. + +Fixes: 45bfb2e50471 ("perf: Add AUX area to ring buffer for raw data streams") +Signed-off-by: Adrian Hunter +Signed-off-by: Peter Zijlstra (Intel) +Link: https://lore.kernel.org/r/20240624201101.60186-5-adrian.hunter@intel.com +Signed-off-by: Sasha Levin +--- + kernel/events/internal.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/kernel/events/internal.h b/kernel/events/internal.h +index 5150d5f84c033..386d21c7edfa0 100644 +--- a/kernel/events/internal.h ++++ b/kernel/events/internal.h +@@ -128,7 +128,7 @@ static inline unsigned long perf_data_size(struct perf_buffer *rb) + + static inline unsigned long perf_aux_size(struct perf_buffer *rb) + { +- return rb->aux_nr_pages << PAGE_SHIFT; ++ return (unsigned long)rb->aux_nr_pages << PAGE_SHIFT; + } + + #define __DEFINE_OUTPUT_COPY_BODY(advance_buf, memcpy_func, ...) \ +-- +2.43.0 + diff --git a/queue-6.6/perf-intel-pt-fix-aux_watermark-calculation-for-64-b.patch b/queue-6.6/perf-intel-pt-fix-aux_watermark-calculation-for-64-b.patch new file mode 100644 index 00000000000..4636ee920d9 --- /dev/null +++ b/queue-6.6/perf-intel-pt-fix-aux_watermark-calculation-for-64-b.patch @@ -0,0 +1,38 @@ +From d7afbb9bc58664c1523f4db02cac3e761ece28f8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 Jun 2024 13:45:31 +0300 +Subject: perf intel-pt: Fix aux_watermark calculation for 64-bit size + +From: Adrian Hunter + +[ Upstream commit 36b4cd990a8fd3f5b748883050e9d8c69fe6398d ] + +aux_watermark is a u32. For a 64-bit size, cap the aux_watermark +calculation at UINT_MAX instead of truncating it to 32-bits. + +Fixes: 874fc35cdd55 ("perf intel-pt: Use aux_watermark") +Signed-off-by: Adrian Hunter +Link: https://lore.kernel.org/r/20240625104532.11990-2-adrian.hunter@intel.com +Signed-off-by: Namhyung Kim +Signed-off-by: Sasha Levin +--- + tools/perf/arch/x86/util/intel-pt.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/tools/perf/arch/x86/util/intel-pt.c b/tools/perf/arch/x86/util/intel-pt.c +index 31807791589ee..5161a9a6b853a 100644 +--- a/tools/perf/arch/x86/util/intel-pt.c ++++ b/tools/perf/arch/x86/util/intel-pt.c +@@ -766,7 +766,8 @@ static int intel_pt_recording_options(struct auxtrace_record *itr, + } + + if (!opts->auxtrace_snapshot_mode && !opts->auxtrace_sample_mode) { +- u32 aux_watermark = opts->auxtrace_mmap_pages * page_size / 4; ++ size_t aw = opts->auxtrace_mmap_pages * (size_t)page_size / 4; ++ u32 aux_watermark = aw > UINT_MAX ? UINT_MAX : aw; + + intel_pt_evsel->core.attr.aux_watermark = aux_watermark; + } +-- +2.43.0 + diff --git a/queue-6.6/perf-intel-pt-fix-exclude_guest-setting.patch b/queue-6.6/perf-intel-pt-fix-exclude_guest-setting.patch new file mode 100644 index 00000000000..6e4645612ed --- /dev/null +++ b/queue-6.6/perf-intel-pt-fix-exclude_guest-setting.patch @@ -0,0 +1,69 @@ +From eb7e5552c1ad0e2f7ad616d5eadf00684a68376c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 Jun 2024 13:45:32 +0300 +Subject: perf intel-pt: Fix exclude_guest setting + +From: Adrian Hunter + +[ Upstream commit b40934ae32232140e85dc7dc1c3ea0e296986723 ] + +In the past, the exclude_guest setting has had no effect on Intel PT +tracing, but that may not be the case in the future. + +Set the flag correctly based upon whether KVM is using Intel PT +"Host/Guest" mode, which is determined by the kvm_intel module +parameter pt_mode: + + pt_mode=0 System-wide mode : host and guest output to host buffer + pt_mode=1 Host/Guest mode : host/guest output to host/guest + buffers respectively + +Fixes: 6e86bfdc4a60 ("perf intel-pt: Support decoding of guest kernel") +Signed-off-by: Adrian Hunter +Link: https://lore.kernel.org/r/20240625104532.11990-3-adrian.hunter@intel.com +Signed-off-by: Namhyung Kim +Signed-off-by: Sasha Levin +--- + tools/perf/arch/x86/util/intel-pt.c | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +diff --git a/tools/perf/arch/x86/util/intel-pt.c b/tools/perf/arch/x86/util/intel-pt.c +index 5161a9a6b853a..aaa2c641e7871 100644 +--- a/tools/perf/arch/x86/util/intel-pt.c ++++ b/tools/perf/arch/x86/util/intel-pt.c +@@ -32,6 +32,7 @@ + #include "../../../util/tsc.h" + #include // page_size + #include "../../../util/intel-pt.h" ++#include + + #define KiB(x) ((x) * 1024) + #define MiB(x) ((x) * 1024 * 1024) +@@ -436,6 +437,16 @@ static int intel_pt_track_switches(struct evlist *evlist) + } + #endif + ++static bool intel_pt_exclude_guest(void) ++{ ++ int pt_mode; ++ ++ if (sysfs__read_int("module/kvm_intel/parameters/pt_mode", &pt_mode)) ++ pt_mode = 0; ++ ++ return pt_mode == 1; ++} ++ + static void intel_pt_valid_str(char *str, size_t len, u64 valid) + { + unsigned int val, last = 0, state = 1; +@@ -628,6 +639,7 @@ static int intel_pt_recording_options(struct auxtrace_record *itr, + } + evsel->core.attr.freq = 0; + evsel->core.attr.sample_period = 1; ++ evsel->core.attr.exclude_guest = intel_pt_exclude_guest(); + evsel->no_aux_samples = true; + evsel->needs_auxtrace_mmap = true; + intel_pt_evsel = evsel; +-- +2.43.0 + diff --git a/queue-6.6/perf-pmus-fixes-always-false-when-compare-duplicates.patch b/queue-6.6/perf-pmus-fixes-always-false-when-compare-duplicates.patch new file mode 100644 index 00000000000..76bb4bb1505 --- /dev/null +++ b/queue-6.6/perf-pmus-fixes-always-false-when-compare-duplicates.patch @@ -0,0 +1,80 @@ +From e3daa4e8acf6b2fc38db93b7b31280a2b50c72c1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 14 Jun 2024 17:43:18 +0800 +Subject: perf pmus: Fixes always false when compare duplicates aliases + +From: Junhao He + +[ Upstream commit dd9a426eade634bf794c7e0f1b0c6659f556942f ] + +In the previous loop, all the members in the aliases[j-1] have been freed +and set to NULL. But in this loop, the function pmu_alias_is_duplicate() +compares the aliases[j] with the aliases[j-1] that has already been +disposed, so the function will always return false and duplicate aliases +will never be discarded. + +If we find duplicate aliases, it skips the zfree aliases[j], which is +accompanied by a memory leak. + +We can use the next aliases[j+1] to theck for duplicate aliases to +fixes the aliases NULL pointer dereference, then goto zfree code snippet +to release it. + +After patch testing: + $ perf list --unit=hisi_sicl,cpa pmu + + uncore cpa: + cpa_p0_rd_dat_32b + [Number of read ops transmitted by the P0 port which size is 32 bytes. + Unit: hisi_sicl,cpa] + cpa_p0_rd_dat_64b + [Number of read ops transmitted by the P0 port which size is 64 bytes. + Unit: hisi_sicl,cpa] + +Fixes: c3245d2093c1 ("perf pmu: Abstract alias/event struct") +Signed-off-by: Junhao He +Cc: ravi.bangoria@amd.com +Cc: james.clark@arm.com +Cc: prime.zeng@hisilicon.com +Cc: cuigaosheng1@huawei.com +Cc: jonathan.cameron@huawei.com +Cc: linuxarm@huawei.com +Cc: yangyicong@huawei.com +Cc: robh@kernel.org +Cc: renyu.zj@linux.alibaba.com +Cc: kjain@linux.ibm.com +Cc: john.g.garry@oracle.com +Cc: linux-arm-kernel@lists.infradead.org +Signed-off-by: Namhyung Kim +Link: https://lore.kernel.org/r/20240614094318.11607-1-hejunhao3@huawei.com +Signed-off-by: Sasha Levin +--- + tools/perf/util/pmus.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/tools/perf/util/pmus.c b/tools/perf/util/pmus.c +index cec869cbe163a..54a237b2b8538 100644 +--- a/tools/perf/util/pmus.c ++++ b/tools/perf/util/pmus.c +@@ -470,8 +470,8 @@ void perf_pmus__print_pmu_events(const struct print_callbacks *print_cb, void *p + qsort(aliases, len, sizeof(struct sevent), cmp_sevent); + for (int j = 0; j < len; j++) { + /* Skip duplicates */ +- if (j > 0 && pmu_alias_is_duplicate(&aliases[j], &aliases[j - 1])) +- continue; ++ if (j < len - 1 && pmu_alias_is_duplicate(&aliases[j], &aliases[j + 1])) ++ goto free; + + print_cb->print_event(print_state, + aliases[j].pmu_name, +@@ -484,6 +484,7 @@ void perf_pmus__print_pmu_events(const struct print_callbacks *print_cb, void *p + aliases[j].desc, + aliases[j].long_desc, + aliases[j].encoding_desc); ++free: + zfree(&aliases[j].name); + zfree(&aliases[j].alias); + zfree(&aliases[j].scale_unit); +-- +2.43.0 + diff --git a/queue-6.6/perf-prevent-passing-zero-nr_pages-to-rb_alloc_aux.patch b/queue-6.6/perf-prevent-passing-zero-nr_pages-to-rb_alloc_aux.patch new file mode 100644 index 00000000000..697ff3910e9 --- /dev/null +++ b/queue-6.6/perf-prevent-passing-zero-nr_pages-to-rb_alloc_aux.patch @@ -0,0 +1,51 @@ +From f68de594130f862fef4c10d8adda691a35142aa9 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 24 Jun 2024 23:10:59 +0300 +Subject: perf: Prevent passing zero nr_pages to rb_alloc_aux() + +From: Adrian Hunter + +[ Upstream commit dbc48c8f41c208082cfa95e973560134489e3309 ] + +nr_pages is unsigned long but gets passed to rb_alloc_aux() as an int, +and is stored as an int. + +Only power-of-2 values are accepted, so if nr_pages is a 64_bit value, it +will be passed to rb_alloc_aux() as zero. + +That is not ideal because: + 1. the value is incorrect + 2. rb_alloc_aux() is at risk of misbehaving, although it manages to + return -ENOMEM in that case, it is a result of passing zero to get_order() + even though the get_order() result is documented to be undefined in that + case. + +Fix by simply validating the maximum supported value in the first place. +Use -ENOMEM error code for consistency with the current error code that +is returned in that case. + +Fixes: 45bfb2e50471 ("perf: Add AUX area to ring buffer for raw data streams") +Signed-off-by: Adrian Hunter +Signed-off-by: Peter Zijlstra (Intel) +Link: https://lore.kernel.org/r/20240624201101.60186-6-adrian.hunter@intel.com +Signed-off-by: Sasha Levin +--- + kernel/events/core.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/kernel/events/core.c b/kernel/events/core.c +index 3e0db5b5a1835..32723d53b970b 100644 +--- a/kernel/events/core.c ++++ b/kernel/events/core.c +@@ -6478,6 +6478,8 @@ static int perf_mmap(struct file *file, struct vm_area_struct *vma) + return -EINVAL; + + nr_pages = vma_size / PAGE_SIZE; ++ if (nr_pages > INT_MAX) ++ return -ENOMEM; + + mutex_lock(&event->mmap_mutex); + ret = -EINVAL; +-- +2.43.0 + diff --git a/queue-6.6/perf-report-fix-condition-in-sort__sym_cmp.patch b/queue-6.6/perf-report-fix-condition-in-sort__sym_cmp.patch new file mode 100644 index 00000000000..a9cbba315d4 --- /dev/null +++ b/queue-6.6/perf-report-fix-condition-in-sort__sym_cmp.patch @@ -0,0 +1,42 @@ +From a613166b4668a450aef2e101a7406fc97dfef1bc Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 21 Jun 2024 10:05:25 -0700 +Subject: perf report: Fix condition in sort__sym_cmp() + +From: Namhyung Kim + +[ Upstream commit cb39d05e67dc24985ff9f5150e71040fa4d60ab8 ] + +It's expected that both hist entries are in the same hists when +comparing two. But the current code in the function checks one without +dso sort key and other with the key. This would make the condition true +in any case. + +I guess the intention of the original commit was to add '!' for the +right side too. But as it should be the same, let's just remove it. + +Fixes: 69849fc5d2119 ("perf hists: Move sort__has_dso into struct perf_hpp_list") +Reviewed-by: Kan Liang +Signed-off-by: Namhyung Kim +Link: https://lore.kernel.org/r/20240621170528.608772-2-namhyung@kernel.org +Signed-off-by: Sasha Levin +--- + tools/perf/util/sort.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/tools/perf/util/sort.c b/tools/perf/util/sort.c +index 6aa1c7f2b4448..6ab8147a3f870 100644 +--- a/tools/perf/util/sort.c ++++ b/tools/perf/util/sort.c +@@ -332,7 +332,7 @@ sort__sym_cmp(struct hist_entry *left, struct hist_entry *right) + * comparing symbol address alone is not enough since it's a + * relative address within a dso. + */ +- if (!hists__has(left->hists, dso) || hists__has(right->hists, dso)) { ++ if (!hists__has(left->hists, dso)) { + ret = sort__dso_cmp(left, right); + if (ret != 0) + return ret; +-- +2.43.0 + diff --git a/queue-6.6/perf-test-make-test_arm_callgraph_fp.sh-more-robust.patch b/queue-6.6/perf-test-make-test_arm_callgraph_fp.sh-more-robust.patch new file mode 100644 index 00000000000..a68a44bf376 --- /dev/null +++ b/queue-6.6/perf-test-make-test_arm_callgraph_fp.sh-more-robust.patch @@ -0,0 +1,131 @@ +From 110d696b192915f7b11f7177d9cdd735f39a63b8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 12 Jun 2024 15:03:14 +0100 +Subject: perf test: Make test_arm_callgraph_fp.sh more robust + +From: James Clark + +[ Upstream commit ff16aeb9b83441b8458d4235496cf320189a0c60 ] + +The 2 second sleep can cause the test to fail on very slow network file +systems because Perf ends up being killed before it finishes starting +up. + +Fix it by making the leafloop workload end after a fixed time like the +other workloads so there is no need to kill it after 2 seconds. + +Also remove the 1 second start sampling delay because it is similarly +fragile. Instead, search through all samples for a matching one, rather +than just checking the first sample and hoping it's in the right place. + +Fixes: cd6382d82752 ("perf test arm64: Test unwinding using fame-pointer (fp) mode") +Signed-off-by: James Clark +Acked-by: Namhyung Kim +Cc: German Gomez +Cc: Spoorthy S +Cc: Kajol Jain +Signed-off-by: Namhyung Kim +Link: https://lore.kernel.org/r/20240612140316.3006660-1-james.clark@arm.com +Signed-off-by: Sasha Levin +--- + .../perf/tests/shell/test_arm_callgraph_fp.sh | 27 +++++++------------ + tools/perf/tests/workloads/leafloop.c | 20 +++++++++++--- + 2 files changed, 26 insertions(+), 21 deletions(-) + +diff --git a/tools/perf/tests/shell/test_arm_callgraph_fp.sh b/tools/perf/tests/shell/test_arm_callgraph_fp.sh +index 66dfdfdad553f..60cd35c73e47d 100755 +--- a/tools/perf/tests/shell/test_arm_callgraph_fp.sh ++++ b/tools/perf/tests/shell/test_arm_callgraph_fp.sh +@@ -14,28 +14,21 @@ cleanup_files() + + trap cleanup_files EXIT TERM INT + +-# Add a 1 second delay to skip samples that are not in the leaf() function + # shellcheck disable=SC2086 +-perf record -o "$PERF_DATA" --call-graph fp -e cycles//u -D 1000 --user-callchains -- $TEST_PROGRAM 2> /dev/null & +-PID=$! ++perf record -o "$PERF_DATA" --call-graph fp -e cycles//u --user-callchains -- $TEST_PROGRAM + +-echo " + Recording (PID=$PID)..." +-sleep 2 +-echo " + Stopping perf-record..." +- +-kill $PID +-wait $PID ++# Try opening the file so any immediate errors are visible in the log ++perf script -i "$PERF_DATA" -F comm,ip,sym | head -n4 + +-# expected perf-script output: ++# expected perf-script output if 'leaf' has been inserted correctly: + # +-# program ++# perf + # 728 leaf + # 753 parent + # 76c leafloop +-# ... ++# ... remaining stack to main() ... + +-perf script -i "$PERF_DATA" -F comm,ip,sym | head -n4 +-perf script -i "$PERF_DATA" -F comm,ip,sym | head -n4 | \ +- awk '{ if ($2 != "") sym[i++] = $2 } END { if (sym[0] != "leaf" || +- sym[1] != "parent" || +- sym[2] != "leafloop") exit 1 }' ++# Each frame is separated by a tab, some spaces and an address ++SEP="[[:space:]]+ [[:xdigit:]]+" ++perf script -i "$PERF_DATA" -F comm,ip,sym | tr '\n' ' ' | \ ++ grep -E -q "perf $SEP leaf $SEP parent $SEP leafloop" +diff --git a/tools/perf/tests/workloads/leafloop.c b/tools/perf/tests/workloads/leafloop.c +index 1bf5cc97649b0..f7561767e32cd 100644 +--- a/tools/perf/tests/workloads/leafloop.c ++++ b/tools/perf/tests/workloads/leafloop.c +@@ -1,6 +1,8 @@ + /* SPDX-License-Identifier: GPL-2.0 */ ++#include + #include + #include ++#include + #include "../tests.h" + + /* We want to check these symbols in perf script */ +@@ -8,10 +10,16 @@ noinline void leaf(volatile int b); + noinline void parent(volatile int b); + + static volatile int a; ++static volatile sig_atomic_t done; ++ ++static void sighandler(int sig __maybe_unused) ++{ ++ done = 1; ++} + + noinline void leaf(volatile int b) + { +- for (;;) ++ while (!done) + a += b; + } + +@@ -22,12 +30,16 @@ noinline void parent(volatile int b) + + static int leafloop(int argc, const char **argv) + { +- int c = 1; ++ int sec = 1; + + if (argc > 0) +- c = atoi(argv[0]); ++ sec = atoi(argv[0]); ++ ++ signal(SIGINT, sighandler); ++ signal(SIGALRM, sighandler); ++ alarm(sec); + +- parent(c); ++ parent(sec); + return 0; + } + +-- +2.43.0 + diff --git a/queue-6.6/perf-x86-intel-cstate-fix-alderlake-raptorlake-meteo.patch b/queue-6.6/perf-x86-intel-cstate-fix-alderlake-raptorlake-meteo.patch new file mode 100644 index 00000000000..f9e327981ac --- /dev/null +++ b/queue-6.6/perf-x86-intel-cstate-fix-alderlake-raptorlake-meteo.patch @@ -0,0 +1,63 @@ +From a7361bdf7fd3de7c011e901934a98f2826e68ba7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 28 Jun 2024 11:17:56 +0800 +Subject: perf/x86/intel/cstate: Fix Alderlake/Raptorlake/Meteorlake + +From: Zhang Rui + +[ Upstream commit 2c3aedd9db6295619d21e50ad29efda614023bf1 ] + +For Alderlake, the spec changes after the patch submitted and PC7/PC9 +are removed. + +Raptorlake and Meteorlake, which copy the Alderlake cstate PMU, also +don't have PC7/PC9. + +Remove PC7/PC9 support for Alderlake/Raptorlake/Meteorlake. + +Fixes: d0ca946bcf84 ("perf/x86/cstate: Add Alder Lake CPU support") +Signed-off-by: Zhang Rui +Signed-off-by: Peter Zijlstra (Intel) +Reviewed-by: Kan Liang +Link: https://lore.kernel.org/r/20240628031758.43103-2-rui.zhang@intel.com +Signed-off-by: Sasha Levin +--- + arch/x86/events/intel/cstate.c | 7 ++----- + 1 file changed, 2 insertions(+), 5 deletions(-) + +diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c +index 96fffb2d521d2..cc6609cbfc8da 100644 +--- a/arch/x86/events/intel/cstate.c ++++ b/arch/x86/events/intel/cstate.c +@@ -80,7 +80,7 @@ + * MSR_PKG_C7_RESIDENCY: Package C7 Residency Counter. + * perf code: 0x03 + * Available model: NHM,WSM,SNB,IVB,HSW,BDW,SKL,CNL, +- * KBL,CML,ICL,TGL,RKL,ADL,RPL,MTL ++ * KBL,CML,ICL,TGL,RKL + * Scope: Package (physical package) + * MSR_PKG_C8_RESIDENCY: Package C8 Residency Counter. + * perf code: 0x04 +@@ -89,8 +89,7 @@ + * Scope: Package (physical package) + * MSR_PKG_C9_RESIDENCY: Package C9 Residency Counter. + * perf code: 0x05 +- * Available model: HSW ULT,KBL,CNL,CML,ICL,TGL,RKL, +- * ADL,RPL,MTL ++ * Available model: HSW ULT,KBL,CNL,CML,ICL,TGL,RKL + * Scope: Package (physical package) + * MSR_PKG_C10_RESIDENCY: Package C10 Residency Counter. + * perf code: 0x06 +@@ -582,9 +581,7 @@ static const struct cstate_model adl_cstates __initconst = { + .pkg_events = BIT(PERF_CSTATE_PKG_C2_RES) | + BIT(PERF_CSTATE_PKG_C3_RES) | + BIT(PERF_CSTATE_PKG_C6_RES) | +- BIT(PERF_CSTATE_PKG_C7_RES) | + BIT(PERF_CSTATE_PKG_C8_RES) | +- BIT(PERF_CSTATE_PKG_C9_RES) | + BIT(PERF_CSTATE_PKG_C10_RES), + }; + +-- +2.43.0 + diff --git a/queue-6.6/perf-x86-intel-pt-fix-pt_topa_entry_for_page-address.patch b/queue-6.6/perf-x86-intel-pt-fix-pt_topa_entry_for_page-address.patch new file mode 100644 index 00000000000..843ecd7404c --- /dev/null +++ b/queue-6.6/perf-x86-intel-pt-fix-pt_topa_entry_for_page-address.patch @@ -0,0 +1,42 @@ +From e6af214c0bf394e9f3a12b6e6871e3f957bdaaec Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 24 Jun 2024 23:10:57 +0300 +Subject: perf/x86/intel/pt: Fix pt_topa_entry_for_page() address calculation + +From: Adrian Hunter + +[ Upstream commit 3520b251dcae2b4a27b95cd6f745c54fd658bda5 ] + +Currently, perf allocates an array of page pointers which is limited in +size by MAX_PAGE_ORDER. That in turn limits the maximum Intel PT buffer +size to 2GiB. Should that limitation be lifted, the Intel PT driver can +support larger sizes, except for one calculation in +pt_topa_entry_for_page(), which is limited to 32-bits. + +Fix pt_topa_entry_for_page() address calculation by adding a cast. + +Fixes: 39152ee51b77 ("perf/x86/intel/pt: Get rid of reverse lookup table for ToPA") +Signed-off-by: Adrian Hunter +Signed-off-by: Peter Zijlstra (Intel) +Link: https://lore.kernel.org/r/20240624201101.60186-4-adrian.hunter@intel.com +Signed-off-by: Sasha Levin +--- + arch/x86/events/intel/pt.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/x86/events/intel/pt.c b/arch/x86/events/intel/pt.c +index 42a55794004a7..e347e56030fd9 100644 +--- a/arch/x86/events/intel/pt.c ++++ b/arch/x86/events/intel/pt.c +@@ -989,7 +989,7 @@ pt_topa_entry_for_page(struct pt_buffer *buf, unsigned int pg) + * order allocations, there shouldn't be many of these. + */ + list_for_each_entry(topa, &buf->tables, list) { +- if (topa->offset + topa->size > pg << PAGE_SHIFT) ++ if (topa->offset + topa->size > (unsigned long)pg << PAGE_SHIFT) + goto found; + } + +-- +2.43.0 + diff --git a/queue-6.6/perf-x86-serialize-set_attr_rdpmc.patch b/queue-6.6/perf-x86-serialize-set_attr_rdpmc.patch new file mode 100644 index 00000000000..5bbc678cdaa --- /dev/null +++ b/queue-6.6/perf-x86-serialize-set_attr_rdpmc.patch @@ -0,0 +1,70 @@ +From 1ac1a1cd2ff328d6a053be04a6e3ff0a4854f37e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 10 Jun 2024 14:46:35 +0200 +Subject: perf/x86: Serialize set_attr_rdpmc() + +From: Thomas Gleixner + +[ Upstream commit bb9bb45f746b0f9457de9c3fc4da143a6351bdc9 ] + +Yue and Xingwei reported a jump label failure. It's caused by the lack of +serialization in set_attr_rdpmc(): + +CPU0 CPU1 + +Assume: x86_pmu.attr_rdpmc == 0 + +if (val != x86_pmu.attr_rdpmc) { + if (val == 0) + ... + else if (x86_pmu.attr_rdpmc == 0) + static_branch_dec(&rdpmc_never_available_key); + + if (val != x86_pmu.attr_rdpmc) { + if (val == 0) + ... + else if (x86_pmu.attr_rdpmc == 0) + FAIL, due to imbalance ---> static_branch_dec(&rdpmc_never_available_key); + +The reported BUG() is a consequence of the above and of another bug in the +jump label core code. The core code needs a separate fix, but that cannot +prevent the imbalance problem caused by set_attr_rdpmc(). + +Prevent this by serializing set_attr_rdpmc() locally. + +Fixes: a66734297f78 ("perf/x86: Add /sys/devices/cpu/rdpmc=2 to allow rdpmc for all tasks") +Closes: https://lore.kernel.org/r/CAEkJfYNzfW1vG=ZTMdz_Weoo=RXY1NDunbxnDaLyj8R4kEoE_w@mail.gmail.com +Reported-by: Yue Sun +Reported-by: Xingwei Lee +Signed-off-by: Thomas Gleixner +Signed-off-by: Peter Zijlstra (Intel) +Link: https://lkml.kernel.org/r/20240610124406.359476013@linutronix.de +Signed-off-by: Sasha Levin +--- + arch/x86/events/core.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c +index c688cb22dcd6d..8811fedc9776a 100644 +--- a/arch/x86/events/core.c ++++ b/arch/x86/events/core.c +@@ -2547,6 +2547,7 @@ static ssize_t set_attr_rdpmc(struct device *cdev, + struct device_attribute *attr, + const char *buf, size_t count) + { ++ static DEFINE_MUTEX(rdpmc_mutex); + unsigned long val; + ssize_t ret; + +@@ -2560,6 +2561,8 @@ static ssize_t set_attr_rdpmc(struct device *cdev, + if (x86_pmu.attr_rdpmc_broken) + return -ENOTSUPP; + ++ guard(mutex)(&rdpmc_mutex); ++ + if (val != x86_pmu.attr_rdpmc) { + /* + * Changing into or out of never available or always available, +-- +2.43.0 + diff --git a/queue-6.6/pinctrl-core-fix-possible-memory-leak-when-pinctrl_e.patch b/queue-6.6/pinctrl-core-fix-possible-memory-leak-when-pinctrl_e.patch new file mode 100644 index 00000000000..85b66bb3a17 --- /dev/null +++ b/queue-6.6/pinctrl-core-fix-possible-memory-leak-when-pinctrl_e.patch @@ -0,0 +1,59 @@ +From acd0df6bb6fe8f75ff695a5d67ff71c24d71f339 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 Jun 2024 10:37:02 +0800 +Subject: pinctrl: core: fix possible memory leak when pinctrl_enable() fails + +From: Yang Yingliang + +[ Upstream commit ae1cf4759972c5fe665ee4c5e0c29de66fe3cf4a ] + +In devm_pinctrl_register(), if pinctrl_enable() fails in pinctrl_register(), +the "pctldev" has not been added to dev resources, so devm_pinctrl_dev_release() +can not be called, it leads memory leak. + +Introduce pinctrl_uninit_controller(), call it in the error path to free memory. + +Fixes: 5038a66dad01 ("pinctrl: core: delete incorrect free in pinctrl_enable()") +Signed-off-by: Yang Yingliang +Reviewed-by: Dan Carpenter +Link: https://lore.kernel.org/r/20240606023704.3931561-2-yangyingliang@huawei.com +Signed-off-by: Linus Walleij +Signed-off-by: Sasha Levin +--- + drivers/pinctrl/core.c | 12 +++++++++++- + 1 file changed, 11 insertions(+), 1 deletion(-) + +diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c +index e19ee66e027bb..88ee086e13763 100644 +--- a/drivers/pinctrl/core.c ++++ b/drivers/pinctrl/core.c +@@ -2072,6 +2072,14 @@ pinctrl_init_controller(struct pinctrl_desc *pctldesc, struct device *dev, + return ERR_PTR(ret); + } + ++static void pinctrl_uninit_controller(struct pinctrl_dev *pctldev, struct pinctrl_desc *pctldesc) ++{ ++ pinctrl_free_pindescs(pctldev, pctldesc->pins, ++ pctldesc->npins); ++ mutex_destroy(&pctldev->mutex); ++ kfree(pctldev); ++} ++ + static int pinctrl_claim_hogs(struct pinctrl_dev *pctldev) + { + pctldev->p = create_pinctrl(pctldev->dev, pctldev); +@@ -2152,8 +2160,10 @@ struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc, + return pctldev; + + error = pinctrl_enable(pctldev); +- if (error) ++ if (error) { ++ pinctrl_uninit_controller(pctldev, pctldesc); + return ERR_PTR(error); ++ } + + return pctldev; + } +-- +2.43.0 + diff --git a/queue-6.6/pinctrl-freescale-mxs-fix-refcount-of-child.patch b/queue-6.6/pinctrl-freescale-mxs-fix-refcount-of-child.patch new file mode 100644 index 00000000000..73fd6284d4e --- /dev/null +++ b/queue-6.6/pinctrl-freescale-mxs-fix-refcount-of-child.patch @@ -0,0 +1,43 @@ +From 785f065700693d6ead4afecc871dd327f963e3f3 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 4 May 2024 21:20:16 +0800 +Subject: pinctrl: freescale: mxs: Fix refcount of child + +From: Peng Fan + +[ Upstream commit 7f500f2011c0bbb6e1cacab74b4c99222e60248e ] + +of_get_next_child() will increase refcount of the returned node, need +use of_node_put() on it when done. + +Per current implementation, 'child' will be override by +for_each_child_of_node(np, child), so use of_get_child_count to avoid +refcount leakage. + +Fixes: 17723111e64f ("pinctrl: add pinctrl-mxs support") +Signed-off-by: Peng Fan +Link: https://lore.kernel.org/20240504-pinctrl-cleanup-v2-18-26c5f2dc1181@nxp.com +Signed-off-by: Linus Walleij +Signed-off-by: Sasha Levin +--- + drivers/pinctrl/freescale/pinctrl-mxs.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/pinctrl/freescale/pinctrl-mxs.c b/drivers/pinctrl/freescale/pinctrl-mxs.c +index cf3f4d2e0c168..a53287aaa653d 100644 +--- a/drivers/pinctrl/freescale/pinctrl-mxs.c ++++ b/drivers/pinctrl/freescale/pinctrl-mxs.c +@@ -408,8 +408,8 @@ static int mxs_pinctrl_probe_dt(struct platform_device *pdev, + int ret; + u32 val; + +- child = of_get_next_child(np, NULL); +- if (!child) { ++ val = of_get_child_count(np); ++ if (val == 0) { + dev_err(&pdev->dev, "no group is defined\n"); + return -ENOENT; + } +-- +2.43.0 + diff --git a/queue-6.6/pinctrl-renesas-r8a779g0-fix-canfd5-suffix.patch b/queue-6.6/pinctrl-renesas-r8a779g0-fix-canfd5-suffix.patch new file mode 100644 index 00000000000..230ca7a1cb9 --- /dev/null +++ b/queue-6.6/pinctrl-renesas-r8a779g0-fix-canfd5-suffix.patch @@ -0,0 +1,97 @@ +From e79effecd810c54f10ad60b641929e32116cbdf6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 7 Jun 2024 12:13:48 +0200 +Subject: pinctrl: renesas: r8a779g0: Fix CANFD5 suffix + +From: Geert Uytterhoeven + +[ Upstream commit 77fa9007ac31e80674beadc452d3f3614f283e18 ] + +CAN-FD instance 5 has two alternate pin groups: "canfd5" and "canfd5_b". +Rename the former to "canfd5_a" to increase uniformity. + +While at it, remove the unneeded separator. + +Fixes: ad9bb2fec66262b0 ("pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC support") +Fixes: 050442ae4c74f830 ("pinctrl: renesas: r8a779g0: Add pins, groups and functions") +Fixes: c2b4b2cd632d17e7 ("pinctrl: renesas: r8a779g0: Add missing CANFD5_B") +Signed-off-by: Geert Uytterhoeven +Link: https://lore.kernel.org/10b22d54086ed11cdfeb0004583029ccf249bdb9.1717754960.git.geert+renesas@glider.be +Signed-off-by: Sasha Levin +--- + drivers/pinctrl/renesas/pfc-r8a779g0.c | 24 +++++++++++------------- + 1 file changed, 11 insertions(+), 13 deletions(-) + +diff --git a/drivers/pinctrl/renesas/pfc-r8a779g0.c b/drivers/pinctrl/renesas/pfc-r8a779g0.c +index d2de526a3b588..d90ba8b6b4b42 100644 +--- a/drivers/pinctrl/renesas/pfc-r8a779g0.c ++++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c +@@ -341,8 +341,8 @@ + /* IP0SR2 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */ + #define IP0SR2_3_0 FM(FXR_TXDA) FM(CANFD1_TX) FM(TPU0TO2_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR2_7_4 FM(FXR_TXENA_N) FM(CANFD1_RX) FM(TPU0TO3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP0SR2_11_8 FM(RXDA_EXTFXR) FM(CANFD5_TX) FM(IRQ5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP0SR2_15_12 FM(CLK_EXTFXR) FM(CANFD5_RX) FM(IRQ4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP0SR2_11_8 FM(RXDA_EXTFXR) FM(CANFD5_TX_A) FM(IRQ5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP0SR2_15_12 FM(CLK_EXTFXR) FM(CANFD5_RX_A) FM(IRQ4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR2_19_16 FM(RXDB_EXTFXR) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR2_23_20 FM(FXR_TXENB_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR2_27_24 FM(FXR_TXDB) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +@@ -896,11 +896,11 @@ static const u16 pinmux_data[] = { + PINMUX_IPSR_GPSR(IP0SR2_7_4, TPU0TO3_A), + + PINMUX_IPSR_GPSR(IP0SR2_11_8, RXDA_EXTFXR), +- PINMUX_IPSR_GPSR(IP0SR2_11_8, CANFD5_TX), ++ PINMUX_IPSR_GPSR(IP0SR2_11_8, CANFD5_TX_A), + PINMUX_IPSR_GPSR(IP0SR2_11_8, IRQ5), + + PINMUX_IPSR_GPSR(IP0SR2_15_12, CLK_EXTFXR), +- PINMUX_IPSR_GPSR(IP0SR2_15_12, CANFD5_RX), ++ PINMUX_IPSR_GPSR(IP0SR2_15_12, CANFD5_RX_A), + PINMUX_IPSR_GPSR(IP0SR2_15_12, IRQ4_B), + + PINMUX_IPSR_GPSR(IP0SR2_19_16, RXDB_EXTFXR), +@@ -1531,15 +1531,14 @@ static const unsigned int canfd4_data_mux[] = { + }; + + /* - CANFD5 ----------------------------------------------------------------- */ +-static const unsigned int canfd5_data_pins[] = { +- /* CANFD5_TX, CANFD5_RX */ ++static const unsigned int canfd5_data_a_pins[] = { ++ /* CANFD5_TX_A, CANFD5_RX_A */ + RCAR_GP_PIN(2, 2), RCAR_GP_PIN(2, 3), + }; +-static const unsigned int canfd5_data_mux[] = { +- CANFD5_TX_MARK, CANFD5_RX_MARK, ++static const unsigned int canfd5_data_a_mux[] = { ++ CANFD5_TX_A_MARK, CANFD5_RX_A_MARK, + }; + +-/* - CANFD5_B ----------------------------------------------------------------- */ + static const unsigned int canfd5_data_b_pins[] = { + /* CANFD5_TX_B, CANFD5_RX_B */ + RCAR_GP_PIN(1, 8), RCAR_GP_PIN(1, 9), +@@ -2578,8 +2577,8 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(canfd2_data), + SH_PFC_PIN_GROUP(canfd3_data), + SH_PFC_PIN_GROUP(canfd4_data), +- SH_PFC_PIN_GROUP(canfd5_data), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(canfd5_data_b), /* suffix might be updated */ ++ SH_PFC_PIN_GROUP(canfd5_data_a), ++ SH_PFC_PIN_GROUP(canfd5_data_b), + SH_PFC_PIN_GROUP(canfd6_data), + SH_PFC_PIN_GROUP(canfd7_data), + SH_PFC_PIN_GROUP(can_clk), +@@ -2788,8 +2787,7 @@ static const char * const canfd4_groups[] = { + }; + + static const char * const canfd5_groups[] = { +- /* suffix might be updated */ +- "canfd5_data", ++ "canfd5_data_a", + "canfd5_data_b", + }; + +-- +2.43.0 + diff --git a/queue-6.6/pinctrl-renesas-r8a779g0-fix-fxr_txen-ab-suffixes.patch b/queue-6.6/pinctrl-renesas-r8a779g0-fix-fxr_txen-ab-suffixes.patch new file mode 100644 index 00000000000..3ca8ea15977 --- /dev/null +++ b/queue-6.6/pinctrl-renesas-r8a779g0-fix-fxr_txen-ab-suffixes.patch @@ -0,0 +1,103 @@ +From 51181d866c2321d0c2cd493795c4f6e0e5728c4d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 7 Jun 2024 12:13:49 +0200 +Subject: pinctrl: renesas: r8a779g0: Fix FXR_TXEN[AB] suffixes + +From: Geert Uytterhoeven + +[ Upstream commit 4976d61ca39ce51f422e094de53b46e2e3ac5c0d ] + +The Pin Multiplex attachment in Rev.1.10 of the R-Car V4H Series +Hardware User's Manual still has two alternate pins named both +"FXR_TXEN[AB]". To differentiate, the pin control driver uses +"FXR_TXEN[AB]" and "FXR_TXEN[AB]_X", which were considered temporary +names until the conflict was sorted out. + +Fix this by adopting R-Car V4M naming: + - Rename "FXR_TXEN[AB]" to "FXR_TXEN[AB]_A", + - Rename "FXR_TXEN[AB]_X" to "FXR_TXEN[AB]_B". + +Fixes: ad9bb2fec66262b0 ("pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC support") +Fixes: 1c2646b5cebfff07 ("pinctrl: renesas: r8a779g0: Add missing FlexRay") +Signed-off-by: Geert Uytterhoeven +Link: https://lore.kernel.org/5e1e9abb46c311d4c54450d991072d6d0e66f14c.1717754960.git.geert+renesas@glider.be +Signed-off-by: Sasha Levin +--- + drivers/pinctrl/renesas/pfc-r8a779g0.c | 20 ++++++++++---------- + 1 file changed, 10 insertions(+), 10 deletions(-) + +diff --git a/drivers/pinctrl/renesas/pfc-r8a779g0.c b/drivers/pinctrl/renesas/pfc-r8a779g0.c +index d90ba8b6b4b42..ba2ec8e042119 100644 +--- a/drivers/pinctrl/renesas/pfc-r8a779g0.c ++++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c +@@ -122,11 +122,11 @@ + #define GPSR2_8 F_(TPU0TO0, IP1SR2_3_0) + #define GPSR2_7 F_(TPU0TO1, IP0SR2_31_28) + #define GPSR2_6 F_(FXR_TXDB, IP0SR2_27_24) +-#define GPSR2_5 F_(FXR_TXENB_N, IP0SR2_23_20) ++#define GPSR2_5 F_(FXR_TXENB_N_A, IP0SR2_23_20) + #define GPSR2_4 F_(RXDB_EXTFXR, IP0SR2_19_16) + #define GPSR2_3 F_(CLK_EXTFXR, IP0SR2_15_12) + #define GPSR2_2 F_(RXDA_EXTFXR, IP0SR2_11_8) +-#define GPSR2_1 F_(FXR_TXENA_N, IP0SR2_7_4) ++#define GPSR2_1 F_(FXR_TXENA_N_A, IP0SR2_7_4) + #define GPSR2_0 F_(FXR_TXDA, IP0SR2_3_0) + + /* GPSR3 */ +@@ -340,18 +340,18 @@ + /* SR2 */ + /* IP0SR2 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */ + #define IP0SR2_3_0 FM(FXR_TXDA) FM(CANFD1_TX) FM(TPU0TO2_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP0SR2_7_4 FM(FXR_TXENA_N) FM(CANFD1_RX) FM(TPU0TO3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP0SR2_7_4 FM(FXR_TXENA_N_A) FM(CANFD1_RX) FM(TPU0TO3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR2_11_8 FM(RXDA_EXTFXR) FM(CANFD5_TX_A) FM(IRQ5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR2_15_12 FM(CLK_EXTFXR) FM(CANFD5_RX_A) FM(IRQ4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR2_19_16 FM(RXDB_EXTFXR) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP0SR2_23_20 FM(FXR_TXENB_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP0SR2_23_20 FM(FXR_TXENB_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR2_27_24 FM(FXR_TXDB) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR2_31_28 FM(TPU0TO1) FM(CANFD6_TX) F_(0, 0) FM(TCLK2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + + /* IP1SR2 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */ + #define IP1SR2_3_0 FM(TPU0TO0) FM(CANFD6_RX) F_(0, 0) FM(TCLK1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP1SR2_7_4 FM(CAN_CLK) FM(FXR_TXENA_N_X) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP1SR2_11_8 FM(CANFD0_TX) FM(FXR_TXENB_N_X) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP1SR2_7_4 FM(CAN_CLK) FM(FXR_TXENA_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP1SR2_11_8 FM(CANFD0_TX) FM(FXR_TXENB_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR2_15_12 FM(CANFD0_RX) FM(STPWT_EXTFXR) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR2_19_16 FM(CANFD2_TX) FM(TPU0TO2) F_(0, 0) FM(TCLK3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR2_23_20 FM(CANFD2_RX) FM(TPU0TO3) FM(PWM1_B) FM(TCLK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +@@ -891,7 +891,7 @@ static const u16 pinmux_data[] = { + PINMUX_IPSR_GPSR(IP0SR2_3_0, CANFD1_TX), + PINMUX_IPSR_GPSR(IP0SR2_3_0, TPU0TO2_A), + +- PINMUX_IPSR_GPSR(IP0SR2_7_4, FXR_TXENA_N), ++ PINMUX_IPSR_GPSR(IP0SR2_7_4, FXR_TXENA_N_A), + PINMUX_IPSR_GPSR(IP0SR2_7_4, CANFD1_RX), + PINMUX_IPSR_GPSR(IP0SR2_7_4, TPU0TO3_A), + +@@ -905,7 +905,7 @@ static const u16 pinmux_data[] = { + + PINMUX_IPSR_GPSR(IP0SR2_19_16, RXDB_EXTFXR), + +- PINMUX_IPSR_GPSR(IP0SR2_23_20, FXR_TXENB_N), ++ PINMUX_IPSR_GPSR(IP0SR2_23_20, FXR_TXENB_N_A), + + PINMUX_IPSR_GPSR(IP0SR2_27_24, FXR_TXDB), + +@@ -919,10 +919,10 @@ static const u16 pinmux_data[] = { + PINMUX_IPSR_GPSR(IP1SR2_3_0, TCLK1_A), + + PINMUX_IPSR_GPSR(IP1SR2_7_4, CAN_CLK), +- PINMUX_IPSR_GPSR(IP1SR2_7_4, FXR_TXENA_N_X), ++ PINMUX_IPSR_GPSR(IP1SR2_7_4, FXR_TXENA_N_B), + + PINMUX_IPSR_GPSR(IP1SR2_11_8, CANFD0_TX), +- PINMUX_IPSR_GPSR(IP1SR2_11_8, FXR_TXENB_N_X), ++ PINMUX_IPSR_GPSR(IP1SR2_11_8, FXR_TXENB_N_B), + + PINMUX_IPSR_GPSR(IP1SR2_15_12, CANFD0_RX), + PINMUX_IPSR_GPSR(IP1SR2_15_12, STPWT_EXTFXR), +-- +2.43.0 + diff --git a/queue-6.6/pinctrl-renesas-r8a779g0-fix-h-scif1-suffixes.patch b/queue-6.6/pinctrl-renesas-r8a779g0-fix-h-scif1-suffixes.patch new file mode 100644 index 00000000000..20570c86061 --- /dev/null +++ b/queue-6.6/pinctrl-renesas-r8a779g0-fix-h-scif1-suffixes.patch @@ -0,0 +1,380 @@ +From 5e87390fea91a487e1b6352ca90973df07dcd31e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 7 Jun 2024 12:13:50 +0200 +Subject: pinctrl: renesas: r8a779g0: Fix (H)SCIF1 suffixes + +From: Geert Uytterhoeven + +[ Upstream commit 3cf834a1669ea433aeee4c82c642776899c87451 ] + +The Pin Multiplex attachment in Rev.1.10 of the R-Car V4H Series +Hardware User's Manual still has two alternate pin groups (GP0_14-18 +and GP1_6-10) each named both HSCIF1 and SCIF1. To differentiate, the +pin control driver uses "(h)scif1" and "(h)scif1_x", which were +considered temporary names until the conflict was sorted out. + +Fix this by adopting R-Car V4M naming: + - Rename "(h)scif1" to "(h)scif1_a", + - Rename "(h)scif1_x" to "(h)scif1_b". + +Adopt the R-Car V4M naming "(h)scif1_a" and "(h)scif1_b" to increase +uniformity. + +While at it, remove unneeded separators. + +Fixes: ad9bb2fec66262b0 ("pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC support") +Fixes: 050442ae4c74f830 ("pinctrl: renesas: r8a779g0: Add pins, groups and functions") +Fixes: cf4f7891847bc558 ("pinctrl: renesas: r8a779g0: Add missing HSCIF1_X") +Fixes: 9c151c2be92becf2 ("pinctrl: renesas: r8a779g0: Add missing SCIF1_X") +Signed-off-by: Geert Uytterhoeven +Link: https://lore.kernel.org/5009130d1867e12abf9b231c8838fd05e2b28bee.1717754960.git.geert+renesas@glider.be +Signed-off-by: Sasha Levin +--- + drivers/pinctrl/renesas/pfc-r8a779g0.c | 208 ++++++++++++------------- + 1 file changed, 102 insertions(+), 106 deletions(-) + +diff --git a/drivers/pinctrl/renesas/pfc-r8a779g0.c b/drivers/pinctrl/renesas/pfc-r8a779g0.c +index ba2ec8e042119..7b64429c35ad3 100644 +--- a/drivers/pinctrl/renesas/pfc-r8a779g0.c ++++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c +@@ -291,13 +291,13 @@ + #define IP1SR0_15_12 FM(MSIOF5_SCK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR0_19_16 FM(MSIOF5_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR0_23_20 FM(MSIOF2_SS2) FM(TCLK1) FM(IRQ2_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP1SR0_27_24 FM(MSIOF2_SS1) FM(HTX1) FM(TX1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP1SR0_31_28 FM(MSIOF2_SYNC) FM(HRX1) FM(RX1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP1SR0_27_24 FM(MSIOF2_SS1) FM(HTX1_A) FM(TX1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP1SR0_31_28 FM(MSIOF2_SYNC) FM(HRX1_A) FM(RX1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + + /* IP2SR0 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */ +-#define IP2SR0_3_0 FM(MSIOF2_TXD) FM(HCTS1_N) FM(CTS1_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP2SR0_7_4 FM(MSIOF2_SCK) FM(HRTS1_N) FM(RTS1_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP2SR0_11_8 FM(MSIOF2_RXD) FM(HSCK1) FM(SCK1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP2SR0_3_0 FM(MSIOF2_TXD) FM(HCTS1_N_A) FM(CTS1_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP2SR0_7_4 FM(MSIOF2_SCK) FM(HRTS1_N_A) FM(RTS1_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP2SR0_11_8 FM(MSIOF2_RXD) FM(HSCK1_A) FM(SCK1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + + /* SR1 */ + /* IP0SR1 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */ +@@ -307,13 +307,13 @@ + #define IP0SR1_15_12 FM(MSIOF1_SCK) FM(HSCK3_A) FM(CTS3_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR1_19_16 FM(MSIOF1_TXD) FM(HRX3_A) FM(SCK3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR1_23_20 FM(MSIOF1_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP0SR1_27_24 FM(MSIOF0_SS2) FM(HTX1_X) FM(TX1_X) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP0SR1_31_28 FM(MSIOF0_SS1) FM(HRX1_X) FM(RX1_X) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP0SR1_27_24 FM(MSIOF0_SS2) FM(HTX1_B) FM(TX1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP0SR1_31_28 FM(MSIOF0_SS1) FM(HRX1_B) FM(RX1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + + /* IP1SR1 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */ +-#define IP1SR1_3_0 FM(MSIOF0_SYNC) FM(HCTS1_N_X) FM(CTS1_N_X) FM(CANFD5_TX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP1SR1_7_4 FM(MSIOF0_TXD) FM(HRTS1_N_X) FM(RTS1_N_X) FM(CANFD5_RX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP1SR1_11_8 FM(MSIOF0_SCK) FM(HSCK1_X) FM(SCK1_X) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP1SR1_3_0 FM(MSIOF0_SYNC) FM(HCTS1_N_B) FM(CTS1_N_B) FM(CANFD5_TX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP1SR1_7_4 FM(MSIOF0_TXD) FM(HRTS1_N_B) FM(RTS1_N_B) FM(CANFD5_RX_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP1SR1_11_8 FM(MSIOF0_SCK) FM(HSCK1_B) FM(SCK1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR1_15_12 FM(MSIOF0_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR1_19_16 FM(HTX0) FM(TX0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR1_23_20 FM(HCTS0_N) FM(CTS0_N) FM(PWM8_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +@@ -754,25 +754,25 @@ static const u16 pinmux_data[] = { + PINMUX_IPSR_GPSR(IP1SR0_23_20, IRQ2_A), + + PINMUX_IPSR_GPSR(IP1SR0_27_24, MSIOF2_SS1), +- PINMUX_IPSR_GPSR(IP1SR0_27_24, HTX1), +- PINMUX_IPSR_GPSR(IP1SR0_27_24, TX1), ++ PINMUX_IPSR_GPSR(IP1SR0_27_24, HTX1_A), ++ PINMUX_IPSR_GPSR(IP1SR0_27_24, TX1_A), + + PINMUX_IPSR_GPSR(IP1SR0_31_28, MSIOF2_SYNC), +- PINMUX_IPSR_GPSR(IP1SR0_31_28, HRX1), +- PINMUX_IPSR_GPSR(IP1SR0_31_28, RX1), ++ PINMUX_IPSR_GPSR(IP1SR0_31_28, HRX1_A), ++ PINMUX_IPSR_GPSR(IP1SR0_31_28, RX1_A), + + /* IP2SR0 */ + PINMUX_IPSR_GPSR(IP2SR0_3_0, MSIOF2_TXD), +- PINMUX_IPSR_GPSR(IP2SR0_3_0, HCTS1_N), +- PINMUX_IPSR_GPSR(IP2SR0_3_0, CTS1_N), ++ PINMUX_IPSR_GPSR(IP2SR0_3_0, HCTS1_N_A), ++ PINMUX_IPSR_GPSR(IP2SR0_3_0, CTS1_N_A), + + PINMUX_IPSR_GPSR(IP2SR0_7_4, MSIOF2_SCK), +- PINMUX_IPSR_GPSR(IP2SR0_7_4, HRTS1_N), +- PINMUX_IPSR_GPSR(IP2SR0_7_4, RTS1_N), ++ PINMUX_IPSR_GPSR(IP2SR0_7_4, HRTS1_N_A), ++ PINMUX_IPSR_GPSR(IP2SR0_7_4, RTS1_N_A), + + PINMUX_IPSR_GPSR(IP2SR0_11_8, MSIOF2_RXD), +- PINMUX_IPSR_GPSR(IP2SR0_11_8, HSCK1), +- PINMUX_IPSR_GPSR(IP2SR0_11_8, SCK1), ++ PINMUX_IPSR_GPSR(IP2SR0_11_8, HSCK1_A), ++ PINMUX_IPSR_GPSR(IP2SR0_11_8, SCK1_A), + + /* IP0SR1 */ + PINMUX_IPSR_GPSR(IP0SR1_3_0, MSIOF1_SS2), +@@ -798,27 +798,27 @@ static const u16 pinmux_data[] = { + PINMUX_IPSR_GPSR(IP0SR1_23_20, MSIOF1_RXD), + + PINMUX_IPSR_GPSR(IP0SR1_27_24, MSIOF0_SS2), +- PINMUX_IPSR_GPSR(IP0SR1_27_24, HTX1_X), +- PINMUX_IPSR_GPSR(IP0SR1_27_24, TX1_X), ++ PINMUX_IPSR_GPSR(IP0SR1_27_24, HTX1_B), ++ PINMUX_IPSR_GPSR(IP0SR1_27_24, TX1_B), + + PINMUX_IPSR_GPSR(IP0SR1_31_28, MSIOF0_SS1), +- PINMUX_IPSR_GPSR(IP0SR1_31_28, HRX1_X), +- PINMUX_IPSR_GPSR(IP0SR1_31_28, RX1_X), ++ PINMUX_IPSR_GPSR(IP0SR1_31_28, HRX1_B), ++ PINMUX_IPSR_GPSR(IP0SR1_31_28, RX1_B), + + /* IP1SR1 */ + PINMUX_IPSR_GPSR(IP1SR1_3_0, MSIOF0_SYNC), +- PINMUX_IPSR_GPSR(IP1SR1_3_0, HCTS1_N_X), +- PINMUX_IPSR_GPSR(IP1SR1_3_0, CTS1_N_X), ++ PINMUX_IPSR_GPSR(IP1SR1_3_0, HCTS1_N_B), ++ PINMUX_IPSR_GPSR(IP1SR1_3_0, CTS1_N_B), + PINMUX_IPSR_GPSR(IP1SR1_3_0, CANFD5_TX_B), + + PINMUX_IPSR_GPSR(IP1SR1_7_4, MSIOF0_TXD), +- PINMUX_IPSR_GPSR(IP1SR1_7_4, HRTS1_N_X), +- PINMUX_IPSR_GPSR(IP1SR1_7_4, RTS1_N_X), ++ PINMUX_IPSR_GPSR(IP1SR1_7_4, HRTS1_N_B), ++ PINMUX_IPSR_GPSR(IP1SR1_7_4, RTS1_N_B), + PINMUX_IPSR_GPSR(IP1SR1_7_4, CANFD5_RX_B), + + PINMUX_IPSR_GPSR(IP1SR1_11_8, MSIOF0_SCK), +- PINMUX_IPSR_GPSR(IP1SR1_11_8, HSCK1_X), +- PINMUX_IPSR_GPSR(IP1SR1_11_8, SCK1_X), ++ PINMUX_IPSR_GPSR(IP1SR1_11_8, HSCK1_B), ++ PINMUX_IPSR_GPSR(IP1SR1_11_8, SCK1_B), + + PINMUX_IPSR_GPSR(IP1SR1_15_12, MSIOF0_RXD), + +@@ -1598,49 +1598,48 @@ static const unsigned int hscif0_ctrl_mux[] = { + }; + + /* - HSCIF1 ----------------------------------------------------------------- */ +-static const unsigned int hscif1_data_pins[] = { +- /* HRX1, HTX1 */ ++static const unsigned int hscif1_data_a_pins[] = { ++ /* HRX1_A, HTX1_A */ + RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), + }; +-static const unsigned int hscif1_data_mux[] = { +- HRX1_MARK, HTX1_MARK, ++static const unsigned int hscif1_data_a_mux[] = { ++ HRX1_A_MARK, HTX1_A_MARK, + }; +-static const unsigned int hscif1_clk_pins[] = { +- /* HSCK1 */ ++static const unsigned int hscif1_clk_a_pins[] = { ++ /* HSCK1_A */ + RCAR_GP_PIN(0, 18), + }; +-static const unsigned int hscif1_clk_mux[] = { +- HSCK1_MARK, ++static const unsigned int hscif1_clk_a_mux[] = { ++ HSCK1_A_MARK, + }; +-static const unsigned int hscif1_ctrl_pins[] = { +- /* HRTS1_N, HCTS1_N */ ++static const unsigned int hscif1_ctrl_a_pins[] = { ++ /* HRTS1_N_A, HCTS1_N_A */ + RCAR_GP_PIN(0, 17), RCAR_GP_PIN(0, 16), + }; +-static const unsigned int hscif1_ctrl_mux[] = { +- HRTS1_N_MARK, HCTS1_N_MARK, ++static const unsigned int hscif1_ctrl_a_mux[] = { ++ HRTS1_N_A_MARK, HCTS1_N_A_MARK, + }; + +-/* - HSCIF1_X---------------------------------------------------------------- */ +-static const unsigned int hscif1_data_x_pins[] = { +- /* HRX1_X, HTX1_X */ ++static const unsigned int hscif1_data_b_pins[] = { ++ /* HRX1_B, HTX1_B */ + RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 6), + }; +-static const unsigned int hscif1_data_x_mux[] = { +- HRX1_X_MARK, HTX1_X_MARK, ++static const unsigned int hscif1_data_b_mux[] = { ++ HRX1_B_MARK, HTX1_B_MARK, + }; +-static const unsigned int hscif1_clk_x_pins[] = { +- /* HSCK1_X */ ++static const unsigned int hscif1_clk_b_pins[] = { ++ /* HSCK1_B */ + RCAR_GP_PIN(1, 10), + }; +-static const unsigned int hscif1_clk_x_mux[] = { +- HSCK1_X_MARK, ++static const unsigned int hscif1_clk_b_mux[] = { ++ HSCK1_B_MARK, + }; +-static const unsigned int hscif1_ctrl_x_pins[] = { +- /* HRTS1_N_X, HCTS1_N_X */ ++static const unsigned int hscif1_ctrl_b_pins[] = { ++ /* HRTS1_N_B, HCTS1_N_B */ + RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 8), + }; +-static const unsigned int hscif1_ctrl_x_mux[] = { +- HRTS1_N_X_MARK, HCTS1_N_X_MARK, ++static const unsigned int hscif1_ctrl_b_mux[] = { ++ HRTS1_N_B_MARK, HCTS1_N_B_MARK, + }; + + /* - HSCIF2 ----------------------------------------------------------------- */ +@@ -2260,49 +2259,48 @@ static const unsigned int scif0_ctrl_mux[] = { + }; + + /* - SCIF1 ------------------------------------------------------------------ */ +-static const unsigned int scif1_data_pins[] = { +- /* RX1, TX1 */ ++static const unsigned int scif1_data_a_pins[] = { ++ /* RX1_A, TX1_A */ + RCAR_GP_PIN(0, 15), RCAR_GP_PIN(0, 14), + }; +-static const unsigned int scif1_data_mux[] = { +- RX1_MARK, TX1_MARK, ++static const unsigned int scif1_data_a_mux[] = { ++ RX1_A_MARK, TX1_A_MARK, + }; +-static const unsigned int scif1_clk_pins[] = { +- /* SCK1 */ ++static const unsigned int scif1_clk_a_pins[] = { ++ /* SCK1_A */ + RCAR_GP_PIN(0, 18), + }; +-static const unsigned int scif1_clk_mux[] = { +- SCK1_MARK, ++static const unsigned int scif1_clk_a_mux[] = { ++ SCK1_A_MARK, + }; +-static const unsigned int scif1_ctrl_pins[] = { +- /* RTS1_N, CTS1_N */ ++static const unsigned int scif1_ctrl_a_pins[] = { ++ /* RTS1_N_A, CTS1_N_A */ + RCAR_GP_PIN(0, 17), RCAR_GP_PIN(0, 16), + }; +-static const unsigned int scif1_ctrl_mux[] = { +- RTS1_N_MARK, CTS1_N_MARK, ++static const unsigned int scif1_ctrl_a_mux[] = { ++ RTS1_N_A_MARK, CTS1_N_A_MARK, + }; + +-/* - SCIF1_X ------------------------------------------------------------------ */ +-static const unsigned int scif1_data_x_pins[] = { +- /* RX1_X, TX1_X */ ++static const unsigned int scif1_data_b_pins[] = { ++ /* RX1_B, TX1_B */ + RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 6), + }; +-static const unsigned int scif1_data_x_mux[] = { +- RX1_X_MARK, TX1_X_MARK, ++static const unsigned int scif1_data_b_mux[] = { ++ RX1_B_MARK, TX1_B_MARK, + }; +-static const unsigned int scif1_clk_x_pins[] = { +- /* SCK1_X */ ++static const unsigned int scif1_clk_b_pins[] = { ++ /* SCK1_B */ + RCAR_GP_PIN(1, 10), + }; +-static const unsigned int scif1_clk_x_mux[] = { +- SCK1_X_MARK, ++static const unsigned int scif1_clk_b_mux[] = { ++ SCK1_B_MARK, + }; +-static const unsigned int scif1_ctrl_x_pins[] = { +- /* RTS1_N_X, CTS1_N_X */ ++static const unsigned int scif1_ctrl_b_pins[] = { ++ /* RTS1_N_B, CTS1_N_B */ + RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 8), + }; +-static const unsigned int scif1_ctrl_x_mux[] = { +- RTS1_N_X_MARK, CTS1_N_X_MARK, ++static const unsigned int scif1_ctrl_b_mux[] = { ++ RTS1_N_B_MARK, CTS1_N_B_MARK, + }; + + /* - SCIF3 ------------------------------------------------------------------ */ +@@ -2586,12 +2584,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(hscif0_data), + SH_PFC_PIN_GROUP(hscif0_clk), + SH_PFC_PIN_GROUP(hscif0_ctrl), +- SH_PFC_PIN_GROUP(hscif1_data), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(hscif1_clk), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(hscif1_ctrl), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(hscif1_data_x), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(hscif1_clk_x), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(hscif1_ctrl_x), /* suffix might be updated */ ++ SH_PFC_PIN_GROUP(hscif1_data_a), ++ SH_PFC_PIN_GROUP(hscif1_clk_a), ++ SH_PFC_PIN_GROUP(hscif1_ctrl_a), ++ SH_PFC_PIN_GROUP(hscif1_data_b), ++ SH_PFC_PIN_GROUP(hscif1_clk_b), ++ SH_PFC_PIN_GROUP(hscif1_ctrl_b), + SH_PFC_PIN_GROUP(hscif2_data), + SH_PFC_PIN_GROUP(hscif2_clk), + SH_PFC_PIN_GROUP(hscif2_ctrl), +@@ -2685,12 +2683,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(scif0_data), + SH_PFC_PIN_GROUP(scif0_clk), + SH_PFC_PIN_GROUP(scif0_ctrl), +- SH_PFC_PIN_GROUP(scif1_data), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(scif1_clk), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(scif1_ctrl), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(scif1_data_x), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(scif1_clk_x), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(scif1_ctrl_x), /* suffix might be updated */ ++ SH_PFC_PIN_GROUP(scif1_data_a), ++ SH_PFC_PIN_GROUP(scif1_clk_a), ++ SH_PFC_PIN_GROUP(scif1_ctrl_a), ++ SH_PFC_PIN_GROUP(scif1_data_b), ++ SH_PFC_PIN_GROUP(scif1_clk_b), ++ SH_PFC_PIN_GROUP(scif1_ctrl_b), + SH_PFC_PIN_GROUP(scif3_data), /* suffix might be updated */ + SH_PFC_PIN_GROUP(scif3_clk), /* suffix might be updated */ + SH_PFC_PIN_GROUP(scif3_ctrl), /* suffix might be updated */ +@@ -2810,13 +2808,12 @@ static const char * const hscif0_groups[] = { + }; + + static const char * const hscif1_groups[] = { +- /* suffix might be updated */ +- "hscif1_data", +- "hscif1_clk", +- "hscif1_ctrl", +- "hscif1_data_x", +- "hscif1_clk_x", +- "hscif1_ctrl_x", ++ "hscif1_data_a", ++ "hscif1_clk_a", ++ "hscif1_ctrl_a", ++ "hscif1_data_b", ++ "hscif1_clk_b", ++ "hscif1_ctrl_b", + }; + + static const char * const hscif2_groups[] = { +@@ -2993,13 +2990,12 @@ static const char * const scif0_groups[] = { + }; + + static const char * const scif1_groups[] = { +- /* suffix might be updated */ +- "scif1_data", +- "scif1_clk", +- "scif1_ctrl", +- "scif1_data_x", +- "scif1_clk_x", +- "scif1_ctrl_x", ++ "scif1_data_a", ++ "scif1_clk_a", ++ "scif1_ctrl_a", ++ "scif1_data_b", ++ "scif1_clk_b", ++ "scif1_ctrl_b", + }; + + static const char * const scif3_groups[] = { +-- +2.43.0 + diff --git a/queue-6.6/pinctrl-renesas-r8a779g0-fix-h-scif3-suffixes.patch b/queue-6.6/pinctrl-renesas-r8a779g0-fix-h-scif3-suffixes.patch new file mode 100644 index 00000000000..7009a869525 --- /dev/null +++ b/queue-6.6/pinctrl-renesas-r8a779g0-fix-h-scif3-suffixes.patch @@ -0,0 +1,360 @@ +From 05cf09b378ca7ace9cb24ebaa107488dda509aa4 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 7 Jun 2024 12:13:51 +0200 +Subject: pinctrl: renesas: r8a779g0: Fix (H)SCIF3 suffixes + +From: Geert Uytterhoeven + +[ Upstream commit 5350f38150a171322b50c0a48efa671885f87050 ] + +(H)SCIF instance 3 has two alternate pin groups: "hscif3" and +"hscif3_a", resp. "scif3" and "scif3_a", but the actual meanings of the +pins within the groups do not match. + +Increase uniformity by adopting R-Car V4M naming: + - Rename "hscif3_a" to "hscif3_b", + - Rename "hscif3" to "hscif3_a", + - Rename "scif3" to "scif3_b". + +While at it, remove unneeded separators. + +Fixes: ad9bb2fec66262b0 ("pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC support") +Fixes: 050442ae4c74f830 ("pinctrl: renesas: r8a779g0: Add pins, groups and functions") +Fixes: 213b713255defaa6 ("pinctrl: renesas: r8a779g0: Add missing HSCIF3_A") +Fixes: 49e4697656bdd1cd ("pinctrl: renesas: r8a779g0: Add missing SCIF3") +Signed-off-by: Geert Uytterhoeven +Link: https://lore.kernel.org/61fdde58e369e8070ffd3c5811c089e6219c7ecc.1717754960.git.geert+renesas@glider.be +Signed-off-by: Sasha Levin +--- + drivers/pinctrl/renesas/pfc-r8a779g0.c | 192 ++++++++++++------------- + 1 file changed, 94 insertions(+), 98 deletions(-) + +diff --git a/drivers/pinctrl/renesas/pfc-r8a779g0.c b/drivers/pinctrl/renesas/pfc-r8a779g0.c +index 7b64429c35ad3..e3c720ea76e32 100644 +--- a/drivers/pinctrl/renesas/pfc-r8a779g0.c ++++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c +@@ -77,11 +77,11 @@ + #define GPSR0_0 F_(GP0_00, IP0SR0_3_0) + + /* GPSR1 */ +-#define GPSR1_28 F_(HTX3, IP3SR1_19_16) +-#define GPSR1_27 F_(HCTS3_N, IP3SR1_15_12) +-#define GPSR1_26 F_(HRTS3_N, IP3SR1_11_8) +-#define GPSR1_25 F_(HSCK3, IP3SR1_7_4) +-#define GPSR1_24 F_(HRX3, IP3SR1_3_0) ++#define GPSR1_28 F_(HTX3_A, IP3SR1_19_16) ++#define GPSR1_27 F_(HCTS3_N_A, IP3SR1_15_12) ++#define GPSR1_26 F_(HRTS3_N_A, IP3SR1_11_8) ++#define GPSR1_25 F_(HSCK3_A, IP3SR1_7_4) ++#define GPSR1_24 F_(HRX3_A, IP3SR1_3_0) + #define GPSR1_23 F_(GP1_23, IP2SR1_31_28) + #define GPSR1_22 F_(AUDIO_CLKIN, IP2SR1_27_24) + #define GPSR1_21 F_(AUDIO_CLKOUT, IP2SR1_23_20) +@@ -301,11 +301,11 @@ + + /* SR1 */ + /* IP0SR1 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */ +-#define IP0SR1_3_0 FM(MSIOF1_SS2) FM(HTX3_A) FM(TX3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP0SR1_7_4 FM(MSIOF1_SS1) FM(HCTS3_N_A) FM(RX3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP0SR1_11_8 FM(MSIOF1_SYNC) FM(HRTS3_N_A) FM(RTS3_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP0SR1_15_12 FM(MSIOF1_SCK) FM(HSCK3_A) FM(CTS3_N) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP0SR1_19_16 FM(MSIOF1_TXD) FM(HRX3_A) FM(SCK3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP0SR1_3_0 FM(MSIOF1_SS2) FM(HTX3_B) FM(TX3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP0SR1_7_4 FM(MSIOF1_SS1) FM(HCTS3_N_B) FM(RX3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP0SR1_11_8 FM(MSIOF1_SYNC) FM(HRTS3_N_B) FM(RTS3_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP0SR1_15_12 FM(MSIOF1_SCK) FM(HSCK3_B) FM(CTS3_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP0SR1_19_16 FM(MSIOF1_TXD) FM(HRX3_B) FM(SCK3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR1_23_20 FM(MSIOF1_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR1_27_24 FM(MSIOF0_SS2) FM(HTX1_B) FM(TX1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR1_31_28 FM(MSIOF0_SS1) FM(HRX1_B) FM(RX1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +@@ -331,11 +331,11 @@ + #define IP2SR1_31_28 F_(0, 0) FM(TCLK2) FM(MSIOF4_SS1) FM(IRQ3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + + /* IP3SR1 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */ +-#define IP3SR1_3_0 FM(HRX3) FM(SCK3_A) FM(MSIOF4_SS2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP3SR1_7_4 FM(HSCK3) FM(CTS3_N_A) FM(MSIOF4_SCK) FM(TPU0TO0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP3SR1_11_8 FM(HRTS3_N) FM(RTS3_N_A) FM(MSIOF4_TXD) FM(TPU0TO1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP3SR1_15_12 FM(HCTS3_N) FM(RX3_A) FM(MSIOF4_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP3SR1_19_16 FM(HTX3) FM(TX3_A) FM(MSIOF4_SYNC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP3SR1_3_0 FM(HRX3_A) FM(SCK3_A) FM(MSIOF4_SS2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP3SR1_7_4 FM(HSCK3_A) FM(CTS3_N_A) FM(MSIOF4_SCK) FM(TPU0TO0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP3SR1_11_8 FM(HRTS3_N_A) FM(RTS3_N_A) FM(MSIOF4_TXD) FM(TPU0TO1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP3SR1_15_12 FM(HCTS3_N_A) FM(RX3_A) FM(MSIOF4_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP3SR1_19_16 FM(HTX3_A) FM(TX3_A) FM(MSIOF4_SYNC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + + /* SR2 */ + /* IP0SR2 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */ +@@ -776,24 +776,24 @@ static const u16 pinmux_data[] = { + + /* IP0SR1 */ + PINMUX_IPSR_GPSR(IP0SR1_3_0, MSIOF1_SS2), +- PINMUX_IPSR_GPSR(IP0SR1_3_0, HTX3_A), +- PINMUX_IPSR_GPSR(IP0SR1_3_0, TX3), ++ PINMUX_IPSR_GPSR(IP0SR1_3_0, HTX3_B), ++ PINMUX_IPSR_GPSR(IP0SR1_3_0, TX3_B), + + PINMUX_IPSR_GPSR(IP0SR1_7_4, MSIOF1_SS1), +- PINMUX_IPSR_GPSR(IP0SR1_7_4, HCTS3_N_A), +- PINMUX_IPSR_GPSR(IP0SR1_7_4, RX3), ++ PINMUX_IPSR_GPSR(IP0SR1_7_4, HCTS3_N_B), ++ PINMUX_IPSR_GPSR(IP0SR1_7_4, RX3_B), + + PINMUX_IPSR_GPSR(IP0SR1_11_8, MSIOF1_SYNC), +- PINMUX_IPSR_GPSR(IP0SR1_11_8, HRTS3_N_A), +- PINMUX_IPSR_GPSR(IP0SR1_11_8, RTS3_N), ++ PINMUX_IPSR_GPSR(IP0SR1_11_8, HRTS3_N_B), ++ PINMUX_IPSR_GPSR(IP0SR1_11_8, RTS3_N_B), + + PINMUX_IPSR_GPSR(IP0SR1_15_12, MSIOF1_SCK), +- PINMUX_IPSR_GPSR(IP0SR1_15_12, HSCK3_A), +- PINMUX_IPSR_GPSR(IP0SR1_15_12, CTS3_N), ++ PINMUX_IPSR_GPSR(IP0SR1_15_12, HSCK3_B), ++ PINMUX_IPSR_GPSR(IP0SR1_15_12, CTS3_N_B), + + PINMUX_IPSR_GPSR(IP0SR1_19_16, MSIOF1_TXD), +- PINMUX_IPSR_GPSR(IP0SR1_19_16, HRX3_A), +- PINMUX_IPSR_GPSR(IP0SR1_19_16, SCK3), ++ PINMUX_IPSR_GPSR(IP0SR1_19_16, HRX3_B), ++ PINMUX_IPSR_GPSR(IP0SR1_19_16, SCK3_B), + + PINMUX_IPSR_GPSR(IP0SR1_23_20, MSIOF1_RXD), + +@@ -864,25 +864,25 @@ static const u16 pinmux_data[] = { + PINMUX_IPSR_GPSR(IP2SR1_31_28, IRQ3_B), + + /* IP3SR1 */ +- PINMUX_IPSR_GPSR(IP3SR1_3_0, HRX3), ++ PINMUX_IPSR_GPSR(IP3SR1_3_0, HRX3_A), + PINMUX_IPSR_GPSR(IP3SR1_3_0, SCK3_A), + PINMUX_IPSR_GPSR(IP3SR1_3_0, MSIOF4_SS2), + +- PINMUX_IPSR_GPSR(IP3SR1_7_4, HSCK3), ++ PINMUX_IPSR_GPSR(IP3SR1_7_4, HSCK3_A), + PINMUX_IPSR_GPSR(IP3SR1_7_4, CTS3_N_A), + PINMUX_IPSR_GPSR(IP3SR1_7_4, MSIOF4_SCK), + PINMUX_IPSR_GPSR(IP3SR1_7_4, TPU0TO0_A), + +- PINMUX_IPSR_GPSR(IP3SR1_11_8, HRTS3_N), ++ PINMUX_IPSR_GPSR(IP3SR1_11_8, HRTS3_N_A), + PINMUX_IPSR_GPSR(IP3SR1_11_8, RTS3_N_A), + PINMUX_IPSR_GPSR(IP3SR1_11_8, MSIOF4_TXD), + PINMUX_IPSR_GPSR(IP3SR1_11_8, TPU0TO1_A), + +- PINMUX_IPSR_GPSR(IP3SR1_15_12, HCTS3_N), ++ PINMUX_IPSR_GPSR(IP3SR1_15_12, HCTS3_N_A), + PINMUX_IPSR_GPSR(IP3SR1_15_12, RX3_A), + PINMUX_IPSR_GPSR(IP3SR1_15_12, MSIOF4_RXD), + +- PINMUX_IPSR_GPSR(IP3SR1_19_16, HTX3), ++ PINMUX_IPSR_GPSR(IP3SR1_19_16, HTX3_A), + PINMUX_IPSR_GPSR(IP3SR1_19_16, TX3_A), + PINMUX_IPSR_GPSR(IP3SR1_19_16, MSIOF4_SYNC), + +@@ -1666,49 +1666,48 @@ static const unsigned int hscif2_ctrl_mux[] = { + }; + + /* - HSCIF3 ----------------------------------------------------------------- */ +-static const unsigned int hscif3_data_pins[] = { +- /* HRX3, HTX3 */ ++static const unsigned int hscif3_data_a_pins[] = { ++ /* HRX3_A, HTX3_A */ + RCAR_GP_PIN(1, 24), RCAR_GP_PIN(1, 28), + }; +-static const unsigned int hscif3_data_mux[] = { +- HRX3_MARK, HTX3_MARK, ++static const unsigned int hscif3_data_a_mux[] = { ++ HRX3_A_MARK, HTX3_A_MARK, + }; +-static const unsigned int hscif3_clk_pins[] = { +- /* HSCK3 */ ++static const unsigned int hscif3_clk_a_pins[] = { ++ /* HSCK3_A */ + RCAR_GP_PIN(1, 25), + }; +-static const unsigned int hscif3_clk_mux[] = { +- HSCK3_MARK, ++static const unsigned int hscif3_clk_a_mux[] = { ++ HSCK3_A_MARK, + }; +-static const unsigned int hscif3_ctrl_pins[] = { +- /* HRTS3_N, HCTS3_N */ ++static const unsigned int hscif3_ctrl_a_pins[] = { ++ /* HRTS3_N_A, HCTS3_N_A */ + RCAR_GP_PIN(1, 26), RCAR_GP_PIN(1, 27), + }; +-static const unsigned int hscif3_ctrl_mux[] = { +- HRTS3_N_MARK, HCTS3_N_MARK, ++static const unsigned int hscif3_ctrl_a_mux[] = { ++ HRTS3_N_A_MARK, HCTS3_N_A_MARK, + }; + +-/* - HSCIF3_A ----------------------------------------------------------------- */ +-static const unsigned int hscif3_data_a_pins[] = { +- /* HRX3_A, HTX3_A */ ++static const unsigned int hscif3_data_b_pins[] = { ++ /* HRX3_B, HTX3_B */ + RCAR_GP_PIN(1, 4), RCAR_GP_PIN(1, 0), + }; +-static const unsigned int hscif3_data_a_mux[] = { +- HRX3_A_MARK, HTX3_A_MARK, ++static const unsigned int hscif3_data_b_mux[] = { ++ HRX3_B_MARK, HTX3_B_MARK, + }; +-static const unsigned int hscif3_clk_a_pins[] = { +- /* HSCK3_A */ ++static const unsigned int hscif3_clk_b_pins[] = { ++ /* HSCK3_B */ + RCAR_GP_PIN(1, 3), + }; +-static const unsigned int hscif3_clk_a_mux[] = { +- HSCK3_A_MARK, ++static const unsigned int hscif3_clk_b_mux[] = { ++ HSCK3_B_MARK, + }; +-static const unsigned int hscif3_ctrl_a_pins[] = { +- /* HRTS3_N_A, HCTS3_N_A */ ++static const unsigned int hscif3_ctrl_b_pins[] = { ++ /* HRTS3_N_B, HCTS3_N_B */ + RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 1), + }; +-static const unsigned int hscif3_ctrl_a_mux[] = { +- HRTS3_N_A_MARK, HCTS3_N_A_MARK, ++static const unsigned int hscif3_ctrl_b_mux[] = { ++ HRTS3_N_B_MARK, HCTS3_N_B_MARK, + }; + + /* - I2C0 ------------------------------------------------------------------- */ +@@ -2304,29 +2303,6 @@ static const unsigned int scif1_ctrl_b_mux[] = { + }; + + /* - SCIF3 ------------------------------------------------------------------ */ +-static const unsigned int scif3_data_pins[] = { +- /* RX3, TX3 */ +- RCAR_GP_PIN(1, 1), RCAR_GP_PIN(1, 0), +-}; +-static const unsigned int scif3_data_mux[] = { +- RX3_MARK, TX3_MARK, +-}; +-static const unsigned int scif3_clk_pins[] = { +- /* SCK3 */ +- RCAR_GP_PIN(1, 4), +-}; +-static const unsigned int scif3_clk_mux[] = { +- SCK3_MARK, +-}; +-static const unsigned int scif3_ctrl_pins[] = { +- /* RTS3_N, CTS3_N */ +- RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3), +-}; +-static const unsigned int scif3_ctrl_mux[] = { +- RTS3_N_MARK, CTS3_N_MARK, +-}; +- +-/* - SCIF3_A ------------------------------------------------------------------ */ + static const unsigned int scif3_data_a_pins[] = { + /* RX3_A, TX3_A */ + RCAR_GP_PIN(1, 27), RCAR_GP_PIN(1, 28), +@@ -2349,6 +2325,28 @@ static const unsigned int scif3_ctrl_a_mux[] = { + RTS3_N_A_MARK, CTS3_N_A_MARK, + }; + ++static const unsigned int scif3_data_b_pins[] = { ++ /* RX3_B, TX3_B */ ++ RCAR_GP_PIN(1, 1), RCAR_GP_PIN(1, 0), ++}; ++static const unsigned int scif3_data_b_mux[] = { ++ RX3_B_MARK, TX3_B_MARK, ++}; ++static const unsigned int scif3_clk_b_pins[] = { ++ /* SCK3_B */ ++ RCAR_GP_PIN(1, 4), ++}; ++static const unsigned int scif3_clk_b_mux[] = { ++ SCK3_B_MARK, ++}; ++static const unsigned int scif3_ctrl_b_pins[] = { ++ /* RTS3_N_B, CTS3_N_B */ ++ RCAR_GP_PIN(1, 2), RCAR_GP_PIN(1, 3), ++}; ++static const unsigned int scif3_ctrl_b_mux[] = { ++ RTS3_N_B_MARK, CTS3_N_B_MARK, ++}; ++ + /* - SCIF4 ------------------------------------------------------------------ */ + static const unsigned int scif4_data_pins[] = { + /* RX4, TX4 */ +@@ -2593,12 +2591,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(hscif2_data), + SH_PFC_PIN_GROUP(hscif2_clk), + SH_PFC_PIN_GROUP(hscif2_ctrl), +- SH_PFC_PIN_GROUP(hscif3_data), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(hscif3_clk), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(hscif3_ctrl), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(hscif3_data_a), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(hscif3_clk_a), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(hscif3_ctrl_a), /* suffix might be updated */ ++ SH_PFC_PIN_GROUP(hscif3_data_a), ++ SH_PFC_PIN_GROUP(hscif3_clk_a), ++ SH_PFC_PIN_GROUP(hscif3_ctrl_a), ++ SH_PFC_PIN_GROUP(hscif3_data_b), ++ SH_PFC_PIN_GROUP(hscif3_clk_b), ++ SH_PFC_PIN_GROUP(hscif3_ctrl_b), + + SH_PFC_PIN_GROUP(i2c0), + SH_PFC_PIN_GROUP(i2c1), +@@ -2689,12 +2687,12 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(scif1_data_b), + SH_PFC_PIN_GROUP(scif1_clk_b), + SH_PFC_PIN_GROUP(scif1_ctrl_b), +- SH_PFC_PIN_GROUP(scif3_data), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(scif3_clk), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(scif3_ctrl), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(scif3_data_a), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(scif3_clk_a), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(scif3_ctrl_a), /* suffix might be updated */ ++ SH_PFC_PIN_GROUP(scif3_data_a), ++ SH_PFC_PIN_GROUP(scif3_clk_a), ++ SH_PFC_PIN_GROUP(scif3_ctrl_a), ++ SH_PFC_PIN_GROUP(scif3_data_b), ++ SH_PFC_PIN_GROUP(scif3_clk_b), ++ SH_PFC_PIN_GROUP(scif3_ctrl_b), + SH_PFC_PIN_GROUP(scif4_data), + SH_PFC_PIN_GROUP(scif4_clk), + SH_PFC_PIN_GROUP(scif4_ctrl), +@@ -2823,13 +2821,12 @@ static const char * const hscif2_groups[] = { + }; + + static const char * const hscif3_groups[] = { +- /* suffix might be updated */ +- "hscif3_data", +- "hscif3_clk", +- "hscif3_ctrl", + "hscif3_data_a", + "hscif3_clk_a", + "hscif3_ctrl_a", ++ "hscif3_data_b", ++ "hscif3_clk_b", ++ "hscif3_ctrl_b", + }; + + static const char * const i2c0_groups[] = { +@@ -2999,13 +2996,12 @@ static const char * const scif1_groups[] = { + }; + + static const char * const scif3_groups[] = { +- /* suffix might be updated */ +- "scif3_data", +- "scif3_clk", +- "scif3_ctrl", + "scif3_data_a", + "scif3_clk_a", + "scif3_ctrl_a", ++ "scif3_data_b", ++ "scif3_clk_b", ++ "scif3_ctrl_b", + }; + + static const char * const scif4_groups[] = { +-- +2.43.0 + diff --git a/queue-6.6/pinctrl-renesas-r8a779g0-fix-irq-suffixes.patch b/queue-6.6/pinctrl-renesas-r8a779g0-fix-irq-suffixes.patch new file mode 100644 index 00000000000..5056608fc94 --- /dev/null +++ b/queue-6.6/pinctrl-renesas-r8a779g0-fix-irq-suffixes.patch @@ -0,0 +1,133 @@ +From 61f81509d860a9c75b5b4019fb1eaff982a759f4 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 7 Jun 2024 12:13:52 +0200 +Subject: pinctrl: renesas: r8a779g0: Fix IRQ suffixes + +From: Geert Uytterhoeven + +[ Upstream commit c391dcde3884dbbea37f57dd2625225d8661da97 ] + +The suffixes of the IRQ identifiers for external interrupts 0-3 +are inconsistent: + - "IRQ0" and "IRQ0_A", + - "IRQ1" and "IRQ1_A", + - "IRQ2" and "IRQ2_A", + - "IRQ3" and "IRQ3_B". +The suffixes for external interrupts 4 and 5 do follow conventional +naming: + - "IRQ4A" and IRQ4_B", + - "IRQ5". + +Fix this by adopting R-Car V4M naming: + - Rename "IRQ[0-2]_A" to "IRQ[0-2]_B", + - Rename "IRQ[0-3]" to "IRQ[0-3]_A". + +Fixes: ad9bb2fec66262b0 ("pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC support") +Fixes: 1b23d8a478bea9d1 ("pinctrl: renesas: r8a779g0: Add missing IRQx_A/IRQx_B") +Signed-off-by: Geert Uytterhoeven +Link: https://lore.kernel.org/8ce9baf0a0f9346544a3ac801fd962c7c12fd247.1717754960.git.geert+renesas@glider.be +Signed-off-by: Sasha Levin +--- + drivers/pinctrl/renesas/pfc-r8a779g0.c | 36 +++++++++++++------------- + 1 file changed, 18 insertions(+), 18 deletions(-) + +diff --git a/drivers/pinctrl/renesas/pfc-r8a779g0.c b/drivers/pinctrl/renesas/pfc-r8a779g0.c +index e3c720ea76e32..f9f650f232e6e 100644 +--- a/drivers/pinctrl/renesas/pfc-r8a779g0.c ++++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c +@@ -68,10 +68,10 @@ + #define GPSR0_9 F_(MSIOF5_SYNC, IP1SR0_7_4) + #define GPSR0_8 F_(MSIOF5_SS1, IP1SR0_3_0) + #define GPSR0_7 F_(MSIOF5_SS2, IP0SR0_31_28) +-#define GPSR0_6 F_(IRQ0, IP0SR0_27_24) +-#define GPSR0_5 F_(IRQ1, IP0SR0_23_20) +-#define GPSR0_4 F_(IRQ2, IP0SR0_19_16) +-#define GPSR0_3 F_(IRQ3, IP0SR0_15_12) ++#define GPSR0_6 F_(IRQ0_A, IP0SR0_27_24) ++#define GPSR0_5 F_(IRQ1_A, IP0SR0_23_20) ++#define GPSR0_4 F_(IRQ2_A, IP0SR0_19_16) ++#define GPSR0_3 F_(IRQ3_A, IP0SR0_15_12) + #define GPSR0_2 F_(GP0_02, IP0SR0_11_8) + #define GPSR0_1 F_(GP0_01, IP0SR0_7_4) + #define GPSR0_0 F_(GP0_00, IP0SR0_3_0) +@@ -278,10 +278,10 @@ + #define IP0SR0_3_0 F_(0, 0) FM(ERROROUTC_N_B) FM(TCLK2_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR0_7_4 F_(0, 0) FM(MSIOF3_SS1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR0_11_8 F_(0, 0) FM(MSIOF3_SS2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP0SR0_15_12 FM(IRQ3) FM(MSIOF3_SCK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP0SR0_19_16 FM(IRQ2) FM(MSIOF3_TXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP0SR0_23_20 FM(IRQ1) FM(MSIOF3_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP0SR0_27_24 FM(IRQ0) FM(MSIOF3_SYNC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP0SR0_15_12 FM(IRQ3_A) FM(MSIOF3_SCK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP0SR0_19_16 FM(IRQ2_A) FM(MSIOF3_TXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP0SR0_23_20 FM(IRQ1_A) FM(MSIOF3_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP0SR0_27_24 FM(IRQ0_A) FM(MSIOF3_SYNC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR0_31_28 FM(MSIOF5_SS2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + + /* IP1SR0 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */ +@@ -290,7 +290,7 @@ + #define IP1SR0_11_8 FM(MSIOF5_TXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR0_15_12 FM(MSIOF5_SCK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR0_19_16 FM(MSIOF5_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP1SR0_23_20 FM(MSIOF2_SS2) FM(TCLK1) FM(IRQ2_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP1SR0_23_20 FM(MSIOF2_SS2) FM(TCLK1) FM(IRQ2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR0_27_24 FM(MSIOF2_SS1) FM(HTX1_A) FM(TX1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR0_31_28 FM(MSIOF2_SYNC) FM(HRX1_A) FM(RX1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + +@@ -325,8 +325,8 @@ + #define IP2SR1_7_4 FM(SCIF_CLK) FM(IRQ4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP2SR1_11_8 FM(SSI_SCK) FM(TCLK3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP2SR1_15_12 FM(SSI_WS) FM(TCLK4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP2SR1_19_16 FM(SSI_SD) FM(IRQ0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP2SR1_23_20 FM(AUDIO_CLKOUT) FM(IRQ1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP2SR1_19_16 FM(SSI_SD) FM(IRQ0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP2SR1_23_20 FM(AUDIO_CLKOUT) FM(IRQ1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP2SR1_27_24 FM(AUDIO_CLKIN) FM(PWM3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP2SR1_31_28 F_(0, 0) FM(TCLK2) FM(MSIOF4_SS1) FM(IRQ3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + +@@ -724,16 +724,16 @@ static const u16 pinmux_data[] = { + + PINMUX_IPSR_GPSR(IP0SR0_11_8, MSIOF3_SS2), + +- PINMUX_IPSR_GPSR(IP0SR0_15_12, IRQ3), ++ PINMUX_IPSR_GPSR(IP0SR0_15_12, IRQ3_A), + PINMUX_IPSR_GPSR(IP0SR0_15_12, MSIOF3_SCK), + +- PINMUX_IPSR_GPSR(IP0SR0_19_16, IRQ2), ++ PINMUX_IPSR_GPSR(IP0SR0_19_16, IRQ2_A), + PINMUX_IPSR_GPSR(IP0SR0_19_16, MSIOF3_TXD), + +- PINMUX_IPSR_GPSR(IP0SR0_23_20, IRQ1), ++ PINMUX_IPSR_GPSR(IP0SR0_23_20, IRQ1_A), + PINMUX_IPSR_GPSR(IP0SR0_23_20, MSIOF3_RXD), + +- PINMUX_IPSR_GPSR(IP0SR0_27_24, IRQ0), ++ PINMUX_IPSR_GPSR(IP0SR0_27_24, IRQ0_A), + PINMUX_IPSR_GPSR(IP0SR0_27_24, MSIOF3_SYNC), + + PINMUX_IPSR_GPSR(IP0SR0_31_28, MSIOF5_SS2), +@@ -751,7 +751,7 @@ static const u16 pinmux_data[] = { + + PINMUX_IPSR_GPSR(IP1SR0_23_20, MSIOF2_SS2), + PINMUX_IPSR_GPSR(IP1SR0_23_20, TCLK1), +- PINMUX_IPSR_GPSR(IP1SR0_23_20, IRQ2_A), ++ PINMUX_IPSR_GPSR(IP1SR0_23_20, IRQ2_B), + + PINMUX_IPSR_GPSR(IP1SR0_27_24, MSIOF2_SS1), + PINMUX_IPSR_GPSR(IP1SR0_27_24, HTX1_A), +@@ -851,10 +851,10 @@ static const u16 pinmux_data[] = { + PINMUX_IPSR_GPSR(IP2SR1_15_12, TCLK4), + + PINMUX_IPSR_GPSR(IP2SR1_19_16, SSI_SD), +- PINMUX_IPSR_GPSR(IP2SR1_19_16, IRQ0_A), ++ PINMUX_IPSR_GPSR(IP2SR1_19_16, IRQ0_B), + + PINMUX_IPSR_GPSR(IP2SR1_23_20, AUDIO_CLKOUT), +- PINMUX_IPSR_GPSR(IP2SR1_23_20, IRQ1_A), ++ PINMUX_IPSR_GPSR(IP2SR1_23_20, IRQ1_B), + + PINMUX_IPSR_GPSR(IP2SR1_27_24, AUDIO_CLKIN), + PINMUX_IPSR_GPSR(IP2SR1_27_24, PWM3_A), +-- +2.43.0 + diff --git a/queue-6.6/pinctrl-renesas-r8a779g0-fix-pwm-suffixes.patch b/queue-6.6/pinctrl-renesas-r8a779g0-fix-pwm-suffixes.patch new file mode 100644 index 00000000000..9770f939810 --- /dev/null +++ b/queue-6.6/pinctrl-renesas-r8a779g0-fix-pwm-suffixes.patch @@ -0,0 +1,207 @@ +From 7814634fdc61b09d9cebc2bd49b593efb235f0e8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 7 Jun 2024 12:13:53 +0200 +Subject: pinctrl: renesas: r8a779g0: FIX PWM suffixes + +From: Geert Uytterhoeven + +[ Upstream commit 0aabdc9a4d3644fd57d804b283b2ab0f9c28dc6c ] + +PWM channels 0, 2, 8, and 9 do not have alternate pins. +Remove their "_a" or "_b" suffixes to increase uniformity. + +Fixes: c606c2fde2330547 ("pinctrl: renesas: r8a779g0: Add missing PWM") +Signed-off-by: Geert Uytterhoeven +Link: https://lore.kernel.org/abb748e6e1e4e7d78beac7d96e7a0a3481b32e75.1717754960.git.geert+renesas@glider.be +Signed-off-by: Sasha Levin +--- + drivers/pinctrl/renesas/pfc-r8a779g0.c | 76 ++++++++++++-------------- + 1 file changed, 36 insertions(+), 40 deletions(-) + +diff --git a/drivers/pinctrl/renesas/pfc-r8a779g0.c b/drivers/pinctrl/renesas/pfc-r8a779g0.c +index f9f650f232e6e..3228a61ea4098 100644 +--- a/drivers/pinctrl/renesas/pfc-r8a779g0.c ++++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c +@@ -316,9 +316,9 @@ + #define IP1SR1_11_8 FM(MSIOF0_SCK) FM(HSCK1_B) FM(SCK1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR1_15_12 FM(MSIOF0_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR1_19_16 FM(HTX0) FM(TX0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP1SR1_23_20 FM(HCTS0_N) FM(CTS0_N) FM(PWM8_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP1SR1_27_24 FM(HRTS0_N) FM(RTS0_N) FM(PWM9_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP1SR1_31_28 FM(HSCK0) FM(SCK0) FM(PWM0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP1SR1_23_20 FM(HCTS0_N) FM(CTS0_N) FM(PWM8) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP1SR1_27_24 FM(HRTS0_N) FM(RTS0_N) FM(PWM9) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP1SR1_31_28 FM(HSCK0) FM(SCK0) FM(PWM0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + + /* IP2SR1 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */ + #define IP2SR1_3_0 FM(HRX0) FM(RX0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +@@ -355,7 +355,7 @@ + #define IP1SR2_15_12 FM(CANFD0_RX) FM(STPWT_EXTFXR) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR2_19_16 FM(CANFD2_TX) FM(TPU0TO2) F_(0, 0) FM(TCLK3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR2_23_20 FM(CANFD2_RX) FM(TPU0TO3) FM(PWM1_B) FM(TCLK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP1SR2_27_24 FM(CANFD3_TX) F_(0, 0) FM(PWM2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP1SR2_27_24 FM(CANFD3_TX) F_(0, 0) FM(PWM2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR2_31_28 FM(CANFD3_RX) F_(0, 0) FM(PWM3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + + /* IP2SR2 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */ +@@ -827,15 +827,15 @@ static const u16 pinmux_data[] = { + + PINMUX_IPSR_GPSR(IP1SR1_23_20, HCTS0_N), + PINMUX_IPSR_GPSR(IP1SR1_23_20, CTS0_N), +- PINMUX_IPSR_GPSR(IP1SR1_23_20, PWM8_A), ++ PINMUX_IPSR_GPSR(IP1SR1_23_20, PWM8), + + PINMUX_IPSR_GPSR(IP1SR1_27_24, HRTS0_N), + PINMUX_IPSR_GPSR(IP1SR1_27_24, RTS0_N), +- PINMUX_IPSR_GPSR(IP1SR1_27_24, PWM9_A), ++ PINMUX_IPSR_GPSR(IP1SR1_27_24, PWM9), + + PINMUX_IPSR_GPSR(IP1SR1_31_28, HSCK0), + PINMUX_IPSR_GPSR(IP1SR1_31_28, SCK0), +- PINMUX_IPSR_GPSR(IP1SR1_31_28, PWM0_A), ++ PINMUX_IPSR_GPSR(IP1SR1_31_28, PWM0), + + /* IP2SR1 */ + PINMUX_IPSR_GPSR(IP2SR1_3_0, HRX0), +@@ -937,7 +937,7 @@ static const u16 pinmux_data[] = { + PINMUX_IPSR_GPSR(IP1SR2_23_20, TCLK4_A), + + PINMUX_IPSR_GPSR(IP1SR2_27_24, CANFD3_TX), +- PINMUX_IPSR_GPSR(IP1SR2_27_24, PWM2_B), ++ PINMUX_IPSR_GPSR(IP1SR2_27_24, PWM2), + + PINMUX_IPSR_GPSR(IP1SR2_31_28, CANFD3_RX), + PINMUX_IPSR_GPSR(IP1SR2_31_28, PWM3_B), +@@ -2090,13 +2090,13 @@ static const unsigned int pcie1_clkreq_n_mux[] = { + PCIE1_CLKREQ_N_MARK, + }; + +-/* - PWM0_A ------------------------------------------------------------------- */ +-static const unsigned int pwm0_a_pins[] = { +- /* PWM0_A */ ++/* - PWM0 ------------------------------------------------------------------- */ ++static const unsigned int pwm0_pins[] = { ++ /* PWM0 */ + RCAR_GP_PIN(1, 15), + }; +-static const unsigned int pwm0_a_mux[] = { +- PWM0_A_MARK, ++static const unsigned int pwm0_mux[] = { ++ PWM0_MARK, + }; + + /* - PWM1_A ------------------------------------------------------------------- */ +@@ -2117,13 +2117,13 @@ static const unsigned int pwm1_b_mux[] = { + PWM1_B_MARK, + }; + +-/* - PWM2_B ------------------------------------------------------------------- */ +-static const unsigned int pwm2_b_pins[] = { +- /* PWM2_B */ ++/* - PWM2 ------------------------------------------------------------------- */ ++static const unsigned int pwm2_pins[] = { ++ /* PWM2 */ + RCAR_GP_PIN(2, 14), + }; +-static const unsigned int pwm2_b_mux[] = { +- PWM2_B_MARK, ++static const unsigned int pwm2_mux[] = { ++ PWM2_MARK, + }; + + /* - PWM3_A ------------------------------------------------------------------- */ +@@ -2180,22 +2180,22 @@ static const unsigned int pwm7_mux[] = { + PWM7_MARK, + }; + +-/* - PWM8_A ------------------------------------------------------------------- */ +-static const unsigned int pwm8_a_pins[] = { +- /* PWM8_A */ ++/* - PWM8 ------------------------------------------------------------------- */ ++static const unsigned int pwm8_pins[] = { ++ /* PWM8 */ + RCAR_GP_PIN(1, 13), + }; +-static const unsigned int pwm8_a_mux[] = { +- PWM8_A_MARK, ++static const unsigned int pwm8_mux[] = { ++ PWM8_MARK, + }; + +-/* - PWM9_A ------------------------------------------------------------------- */ +-static const unsigned int pwm9_a_pins[] = { +- /* PWM9_A */ ++/* - PWM9 ------------------------------------------------------------------- */ ++static const unsigned int pwm9_pins[] = { ++ /* PWM9 */ + RCAR_GP_PIN(1, 14), + }; +-static const unsigned int pwm9_a_mux[] = { +- PWM9_A_MARK, ++static const unsigned int pwm9_mux[] = { ++ PWM9_MARK, + }; + + /* - QSPI0 ------------------------------------------------------------------ */ +@@ -2658,18 +2658,18 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(pcie0_clkreq_n), + SH_PFC_PIN_GROUP(pcie1_clkreq_n), + +- SH_PFC_PIN_GROUP(pwm0_a), /* suffix might be updated */ ++ SH_PFC_PIN_GROUP(pwm0), + SH_PFC_PIN_GROUP(pwm1_a), + SH_PFC_PIN_GROUP(pwm1_b), +- SH_PFC_PIN_GROUP(pwm2_b), /* suffix might be updated */ ++ SH_PFC_PIN_GROUP(pwm2), + SH_PFC_PIN_GROUP(pwm3_a), + SH_PFC_PIN_GROUP(pwm3_b), + SH_PFC_PIN_GROUP(pwm4), + SH_PFC_PIN_GROUP(pwm5), + SH_PFC_PIN_GROUP(pwm6), + SH_PFC_PIN_GROUP(pwm7), +- SH_PFC_PIN_GROUP(pwm8_a), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(pwm9_a), /* suffix might be updated */ ++ SH_PFC_PIN_GROUP(pwm8), ++ SH_PFC_PIN_GROUP(pwm9), + + SH_PFC_PIN_GROUP(qspi0_ctrl), + BUS_DATA_PIN_GROUP(qspi0_data, 2), +@@ -2923,8 +2923,7 @@ static const char * const pcie_groups[] = { + }; + + static const char * const pwm0_groups[] = { +- /* suffix might be updated */ +- "pwm0_a", ++ "pwm0", + }; + + static const char * const pwm1_groups[] = { +@@ -2933,8 +2932,7 @@ static const char * const pwm1_groups[] = { + }; + + static const char * const pwm2_groups[] = { +- /* suffix might be updated */ +- "pwm2_b", ++ "pwm2", + }; + + static const char * const pwm3_groups[] = { +@@ -2959,13 +2957,11 @@ static const char * const pwm7_groups[] = { + }; + + static const char * const pwm8_groups[] = { +- /* suffix might be updated */ +- "pwm8_a", ++ "pwm8", + }; + + static const char * const pwm9_groups[] = { +- /* suffix might be updated */ +- "pwm9_a", ++ "pwm9", + }; + + static const char * const qspi0_groups[] = { +-- +2.43.0 + diff --git a/queue-6.6/pinctrl-renesas-r8a779g0-fix-tclk-suffixes.patch b/queue-6.6/pinctrl-renesas-r8a779g0-fix-tclk-suffixes.patch new file mode 100644 index 00000000000..196ed58a781 --- /dev/null +++ b/queue-6.6/pinctrl-renesas-r8a779g0-fix-tclk-suffixes.patch @@ -0,0 +1,189 @@ +From 4a446cc004d8f39e3ae0e153102838ce5946974e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 7 Jun 2024 12:13:54 +0200 +Subject: pinctrl: renesas: r8a779g0: Fix TCLK suffixes + +From: Geert Uytterhoeven + +[ Upstream commit bfd2428f3a80647af681df4793e473258aa755da ] + +The Pin Multiplex attachment in Rev.1.10 of the R-Car V4H Series +Hardware User's Manual still has two alternate pins named both TCLK3 +and TCLK4. To differentiate, the pin control driver uses "TCLK[34]" and +"TCLK[34]_X". In addition, there are alternate pins without suffix, and +with an "_A" or "_B" suffix. + +Increase uniformity by adopting R-Car V4M naming: + - Rename "TCLK2_B" to "TCLK2_C", + - Rename "TCLK[12]_A" to "TCLK[12]_B", + - Rename "TCLK[12]" to "TCLK[12]_A", + - Rename "TCLK[34]_A" to "TCLK[34]_C", + - Rename "TCLK[34]_X" to "TCLK[34]_A", + - Rename "TCLK[34]" to "TCLK[34]_B". + +Fixes: ad9bb2fec66262b0 ("pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC support") +Fixes: 0df46188a58895e1 ("pinctrl: renesas: r8a779g0: Add missing TCLKx_A/TCLKx_B/TCLKx_X") +Signed-off-by: Geert Uytterhoeven +Link: https://lore.kernel.org/2845ff1f8fe1fd8d23d2f307ad5e8eb8243da608.1717754960.git.geert+renesas@glider.be +Signed-off-by: Sasha Levin +--- + drivers/pinctrl/renesas/pfc-r8a779g0.c | 44 +++++++++++++------------- + 1 file changed, 22 insertions(+), 22 deletions(-) + +diff --git a/drivers/pinctrl/renesas/pfc-r8a779g0.c b/drivers/pinctrl/renesas/pfc-r8a779g0.c +index 3228a61ea4098..8c19b892441a3 100644 +--- a/drivers/pinctrl/renesas/pfc-r8a779g0.c ++++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c +@@ -275,7 +275,7 @@ + + /* SR0 */ + /* IP0SR0 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */ +-#define IP0SR0_3_0 F_(0, 0) FM(ERROROUTC_N_B) FM(TCLK2_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP0SR0_3_0 F_(0, 0) FM(ERROROUTC_N_B) FM(TCLK2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR0_7_4 F_(0, 0) FM(MSIOF3_SS1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR0_11_8 F_(0, 0) FM(MSIOF3_SS2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR0_15_12 FM(IRQ3_A) FM(MSIOF3_SCK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +@@ -290,7 +290,7 @@ + #define IP1SR0_11_8 FM(MSIOF5_TXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR0_15_12 FM(MSIOF5_SCK) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR0_19_16 FM(MSIOF5_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP1SR0_23_20 FM(MSIOF2_SS2) FM(TCLK1) FM(IRQ2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP1SR0_23_20 FM(MSIOF2_SS2) FM(TCLK1_A) FM(IRQ2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR0_27_24 FM(MSIOF2_SS1) FM(HTX1_A) FM(TX1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR0_31_28 FM(MSIOF2_SYNC) FM(HRX1_A) FM(RX1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + +@@ -323,12 +323,12 @@ + /* IP2SR1 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */ + #define IP2SR1_3_0 FM(HRX0) FM(RX0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP2SR1_7_4 FM(SCIF_CLK) FM(IRQ4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP2SR1_11_8 FM(SSI_SCK) FM(TCLK3) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP2SR1_15_12 FM(SSI_WS) FM(TCLK4) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP2SR1_11_8 FM(SSI_SCK) FM(TCLK3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP2SR1_15_12 FM(SSI_WS) FM(TCLK4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP2SR1_19_16 FM(SSI_SD) FM(IRQ0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP2SR1_23_20 FM(AUDIO_CLKOUT) FM(IRQ1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP2SR1_27_24 FM(AUDIO_CLKIN) FM(PWM3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP2SR1_31_28 F_(0, 0) FM(TCLK2) FM(MSIOF4_SS1) FM(IRQ3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP2SR1_31_28 F_(0, 0) FM(TCLK2_A) FM(MSIOF4_SS1) FM(IRQ3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + + /* IP3SR1 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */ + #define IP3SR1_3_0 FM(HRX3_A) FM(SCK3_A) FM(MSIOF4_SS2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +@@ -346,15 +346,15 @@ + #define IP0SR2_19_16 FM(RXDB_EXTFXR) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR2_23_20 FM(FXR_TXENB_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR2_27_24 FM(FXR_TXDB) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP0SR2_31_28 FM(TPU0TO1) FM(CANFD6_TX) F_(0, 0) FM(TCLK2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP0SR2_31_28 FM(TPU0TO1) FM(CANFD6_TX) F_(0, 0) FM(TCLK2_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + + /* IP1SR2 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */ +-#define IP1SR2_3_0 FM(TPU0TO0) FM(CANFD6_RX) F_(0, 0) FM(TCLK1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP1SR2_3_0 FM(TPU0TO0) FM(CANFD6_RX) F_(0, 0) FM(TCLK1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR2_7_4 FM(CAN_CLK) FM(FXR_TXENA_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR2_11_8 FM(CANFD0_TX) FM(FXR_TXENB_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR2_15_12 FM(CANFD0_RX) FM(STPWT_EXTFXR) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP1SR2_19_16 FM(CANFD2_TX) FM(TPU0TO2) F_(0, 0) FM(TCLK3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP1SR2_23_20 FM(CANFD2_RX) FM(TPU0TO3) FM(PWM1_B) FM(TCLK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP1SR2_19_16 FM(CANFD2_TX) FM(TPU0TO2) F_(0, 0) FM(TCLK3_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP1SR2_23_20 FM(CANFD2_RX) FM(TPU0TO3) FM(PWM1_B) FM(TCLK4_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR2_27_24 FM(CANFD3_TX) F_(0, 0) FM(PWM2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR2_31_28 FM(CANFD3_RX) F_(0, 0) FM(PWM3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + +@@ -381,8 +381,8 @@ + #define IP1SR3_11_8 FM(MMC_SD_CMD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR3_15_12 FM(SD_CD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR3_19_16 FM(SD_WP) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP1SR3_23_20 FM(IPC_CLKIN) FM(IPC_CLKEN_IN) FM(PWM1_A) FM(TCLK3_X) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP1SR3_27_24 FM(IPC_CLKOUT) FM(IPC_CLKEN_OUT) FM(ERROROUTC_N_A) FM(TCLK4_X) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP1SR3_23_20 FM(IPC_CLKIN) FM(IPC_CLKEN_IN) FM(PWM1_A) FM(TCLK3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP1SR3_27_24 FM(IPC_CLKOUT) FM(IPC_CLKEN_OUT) FM(ERROROUTC_N_A) FM(TCLK4_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR3_31_28 FM(QSPI0_SSL) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + + /* IP2SR3 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */ +@@ -718,7 +718,7 @@ static const u16 pinmux_data[] = { + + /* IP0SR0 */ + PINMUX_IPSR_GPSR(IP0SR0_3_0, ERROROUTC_N_B), +- PINMUX_IPSR_GPSR(IP0SR0_3_0, TCLK2_A), ++ PINMUX_IPSR_GPSR(IP0SR0_3_0, TCLK2_B), + + PINMUX_IPSR_GPSR(IP0SR0_7_4, MSIOF3_SS1), + +@@ -750,7 +750,7 @@ static const u16 pinmux_data[] = { + PINMUX_IPSR_GPSR(IP1SR0_19_16, MSIOF5_RXD), + + PINMUX_IPSR_GPSR(IP1SR0_23_20, MSIOF2_SS2), +- PINMUX_IPSR_GPSR(IP1SR0_23_20, TCLK1), ++ PINMUX_IPSR_GPSR(IP1SR0_23_20, TCLK1_A), + PINMUX_IPSR_GPSR(IP1SR0_23_20, IRQ2_B), + + PINMUX_IPSR_GPSR(IP1SR0_27_24, MSIOF2_SS1), +@@ -845,10 +845,10 @@ static const u16 pinmux_data[] = { + PINMUX_IPSR_GPSR(IP2SR1_7_4, IRQ4_A), + + PINMUX_IPSR_GPSR(IP2SR1_11_8, SSI_SCK), +- PINMUX_IPSR_GPSR(IP2SR1_11_8, TCLK3), ++ PINMUX_IPSR_GPSR(IP2SR1_11_8, TCLK3_B), + + PINMUX_IPSR_GPSR(IP2SR1_15_12, SSI_WS), +- PINMUX_IPSR_GPSR(IP2SR1_15_12, TCLK4), ++ PINMUX_IPSR_GPSR(IP2SR1_15_12, TCLK4_B), + + PINMUX_IPSR_GPSR(IP2SR1_19_16, SSI_SD), + PINMUX_IPSR_GPSR(IP2SR1_19_16, IRQ0_B), +@@ -859,7 +859,7 @@ static const u16 pinmux_data[] = { + PINMUX_IPSR_GPSR(IP2SR1_27_24, AUDIO_CLKIN), + PINMUX_IPSR_GPSR(IP2SR1_27_24, PWM3_A), + +- PINMUX_IPSR_GPSR(IP2SR1_31_28, TCLK2), ++ PINMUX_IPSR_GPSR(IP2SR1_31_28, TCLK2_A), + PINMUX_IPSR_GPSR(IP2SR1_31_28, MSIOF4_SS1), + PINMUX_IPSR_GPSR(IP2SR1_31_28, IRQ3_B), + +@@ -911,12 +911,12 @@ static const u16 pinmux_data[] = { + + PINMUX_IPSR_GPSR(IP0SR2_31_28, TPU0TO1), + PINMUX_IPSR_GPSR(IP0SR2_31_28, CANFD6_TX), +- PINMUX_IPSR_GPSR(IP0SR2_31_28, TCLK2_B), ++ PINMUX_IPSR_GPSR(IP0SR2_31_28, TCLK2_C), + + /* IP1SR2 */ + PINMUX_IPSR_GPSR(IP1SR2_3_0, TPU0TO0), + PINMUX_IPSR_GPSR(IP1SR2_3_0, CANFD6_RX), +- PINMUX_IPSR_GPSR(IP1SR2_3_0, TCLK1_A), ++ PINMUX_IPSR_GPSR(IP1SR2_3_0, TCLK1_B), + + PINMUX_IPSR_GPSR(IP1SR2_7_4, CAN_CLK), + PINMUX_IPSR_GPSR(IP1SR2_7_4, FXR_TXENA_N_B), +@@ -929,12 +929,12 @@ static const u16 pinmux_data[] = { + + PINMUX_IPSR_GPSR(IP1SR2_19_16, CANFD2_TX), + PINMUX_IPSR_GPSR(IP1SR2_19_16, TPU0TO2), +- PINMUX_IPSR_GPSR(IP1SR2_19_16, TCLK3_A), ++ PINMUX_IPSR_GPSR(IP1SR2_19_16, TCLK3_C), + + PINMUX_IPSR_GPSR(IP1SR2_23_20, CANFD2_RX), + PINMUX_IPSR_GPSR(IP1SR2_23_20, TPU0TO3), + PINMUX_IPSR_GPSR(IP1SR2_23_20, PWM1_B), +- PINMUX_IPSR_GPSR(IP1SR2_23_20, TCLK4_A), ++ PINMUX_IPSR_GPSR(IP1SR2_23_20, TCLK4_C), + + PINMUX_IPSR_GPSR(IP1SR2_27_24, CANFD3_TX), + PINMUX_IPSR_GPSR(IP1SR2_27_24, PWM2), +@@ -979,12 +979,12 @@ static const u16 pinmux_data[] = { + PINMUX_IPSR_GPSR(IP1SR3_23_20, IPC_CLKIN), + PINMUX_IPSR_GPSR(IP1SR3_23_20, IPC_CLKEN_IN), + PINMUX_IPSR_GPSR(IP1SR3_23_20, PWM1_A), +- PINMUX_IPSR_GPSR(IP1SR3_23_20, TCLK3_X), ++ PINMUX_IPSR_GPSR(IP1SR3_23_20, TCLK3_A), + + PINMUX_IPSR_GPSR(IP1SR3_27_24, IPC_CLKOUT), + PINMUX_IPSR_GPSR(IP1SR3_27_24, IPC_CLKEN_OUT), + PINMUX_IPSR_GPSR(IP1SR3_27_24, ERROROUTC_N_A), +- PINMUX_IPSR_GPSR(IP1SR3_27_24, TCLK4_X), ++ PINMUX_IPSR_GPSR(IP1SR3_27_24, TCLK4_A), + + PINMUX_IPSR_GPSR(IP1SR3_31_28, QSPI0_SSL), + +-- +2.43.0 + diff --git a/queue-6.6/pinctrl-renesas-r8a779g0-fix-tpu-suffixes.patch b/queue-6.6/pinctrl-renesas-r8a779g0-fix-tpu-suffixes.patch new file mode 100644 index 00000000000..179de3d1b20 --- /dev/null +++ b/queue-6.6/pinctrl-renesas-r8a779g0-fix-tpu-suffixes.patch @@ -0,0 +1,281 @@ +From 0493878a49275632193f9b4ad3e9750698d79fa0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 7 Jun 2024 12:13:55 +0200 +Subject: pinctrl: renesas: r8a779g0: Fix TPU suffixes + +From: Geert Uytterhoeven + +[ Upstream commit 3d144ef10a448f89065dcff39c40d90ac18e035e ] + +The Timer Pulse Unit channels have two alternate pin groups: +"tpu_to[0-3]" and "tpu_to[0-3]_a". + +Increase uniformity by adopting R-Car V4M naming: + - Rename "tpu_to[0-3]_a" to "tpu_to[0-3]_b", + - Rename "tpu_to[0-3]" to "tpu_to[0-3]_a", + +Fixes: ad9bb2fec66262b0 ("pinctrl: renesas: Initial R8A779G0 (R-Car V4H) PFC support") +Fixes: 050442ae4c74f830 ("pinctrl: renesas: r8a779g0: Add pins, groups and functions") +Fixes: 85a9cbe4c57bb958 ("pinctrl: renesas: r8a779g0: Add missing TPU0TOx_A") +Signed-off-by: Geert Uytterhoeven +Link: https://lore.kernel.org/0dd9428bc24e97e1001ed3976b1cb98966f5e7e3.1717754960.git.geert+renesas@glider.be +Signed-off-by: Sasha Levin +--- + drivers/pinctrl/renesas/pfc-r8a779g0.c | 128 ++++++++++++------------- + 1 file changed, 63 insertions(+), 65 deletions(-) + +diff --git a/drivers/pinctrl/renesas/pfc-r8a779g0.c b/drivers/pinctrl/renesas/pfc-r8a779g0.c +index 8c19b892441a3..bb843e333c880 100644 +--- a/drivers/pinctrl/renesas/pfc-r8a779g0.c ++++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c +@@ -119,8 +119,8 @@ + #define GPSR2_11 F_(CANFD0_RX, IP1SR2_15_12) + #define GPSR2_10 F_(CANFD0_TX, IP1SR2_11_8) + #define GPSR2_9 F_(CAN_CLK, IP1SR2_7_4) +-#define GPSR2_8 F_(TPU0TO0, IP1SR2_3_0) +-#define GPSR2_7 F_(TPU0TO1, IP0SR2_31_28) ++#define GPSR2_8 F_(TPU0TO0_A, IP1SR2_3_0) ++#define GPSR2_7 F_(TPU0TO1_A, IP0SR2_31_28) + #define GPSR2_6 F_(FXR_TXDB, IP0SR2_27_24) + #define GPSR2_5 F_(FXR_TXENB_N_A, IP0SR2_23_20) + #define GPSR2_4 F_(RXDB_EXTFXR, IP0SR2_19_16) +@@ -332,29 +332,29 @@ + + /* IP3SR1 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */ + #define IP3SR1_3_0 FM(HRX3_A) FM(SCK3_A) FM(MSIOF4_SS2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP3SR1_7_4 FM(HSCK3_A) FM(CTS3_N_A) FM(MSIOF4_SCK) FM(TPU0TO0_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP3SR1_11_8 FM(HRTS3_N_A) FM(RTS3_N_A) FM(MSIOF4_TXD) FM(TPU0TO1_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP3SR1_7_4 FM(HSCK3_A) FM(CTS3_N_A) FM(MSIOF4_SCK) FM(TPU0TO0_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP3SR1_11_8 FM(HRTS3_N_A) FM(RTS3_N_A) FM(MSIOF4_TXD) FM(TPU0TO1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP3SR1_15_12 FM(HCTS3_N_A) FM(RX3_A) FM(MSIOF4_RXD) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP3SR1_19_16 FM(HTX3_A) FM(TX3_A) FM(MSIOF4_SYNC) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + + /* SR2 */ + /* IP0SR2 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */ +-#define IP0SR2_3_0 FM(FXR_TXDA) FM(CANFD1_TX) FM(TPU0TO2_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP0SR2_7_4 FM(FXR_TXENA_N_A) FM(CANFD1_RX) FM(TPU0TO3_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP0SR2_3_0 FM(FXR_TXDA) FM(CANFD1_TX) FM(TPU0TO2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP0SR2_7_4 FM(FXR_TXENA_N_A) FM(CANFD1_RX) FM(TPU0TO3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR2_11_8 FM(RXDA_EXTFXR) FM(CANFD5_TX_A) FM(IRQ5) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR2_15_12 FM(CLK_EXTFXR) FM(CANFD5_RX_A) FM(IRQ4_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR2_19_16 FM(RXDB_EXTFXR) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR2_23_20 FM(FXR_TXENB_N_A) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP0SR2_27_24 FM(FXR_TXDB) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP0SR2_31_28 FM(TPU0TO1) FM(CANFD6_TX) F_(0, 0) FM(TCLK2_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP0SR2_31_28 FM(TPU0TO1_A) FM(CANFD6_TX) F_(0, 0) FM(TCLK2_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + + /* IP1SR2 */ /* 0 */ /* 1 */ /* 2 */ /* 3 4 5 6 7 8 9 A B C D E F */ +-#define IP1SR2_3_0 FM(TPU0TO0) FM(CANFD6_RX) F_(0, 0) FM(TCLK1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP1SR2_3_0 FM(TPU0TO0_A) FM(CANFD6_RX) F_(0, 0) FM(TCLK1_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR2_7_4 FM(CAN_CLK) FM(FXR_TXENA_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR2_11_8 FM(CANFD0_TX) FM(FXR_TXENB_N_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR2_15_12 FM(CANFD0_RX) FM(STPWT_EXTFXR) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP1SR2_19_16 FM(CANFD2_TX) FM(TPU0TO2) F_(0, 0) FM(TCLK3_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) +-#define IP1SR2_23_20 FM(CANFD2_RX) FM(TPU0TO3) FM(PWM1_B) FM(TCLK4_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP1SR2_19_16 FM(CANFD2_TX) FM(TPU0TO2_A) F_(0, 0) FM(TCLK3_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) ++#define IP1SR2_23_20 FM(CANFD2_RX) FM(TPU0TO3_A) FM(PWM1_B) FM(TCLK4_C) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR2_27_24 FM(CANFD3_TX) F_(0, 0) FM(PWM2) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + #define IP1SR2_31_28 FM(CANFD3_RX) F_(0, 0) FM(PWM3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) + +@@ -871,12 +871,12 @@ static const u16 pinmux_data[] = { + PINMUX_IPSR_GPSR(IP3SR1_7_4, HSCK3_A), + PINMUX_IPSR_GPSR(IP3SR1_7_4, CTS3_N_A), + PINMUX_IPSR_GPSR(IP3SR1_7_4, MSIOF4_SCK), +- PINMUX_IPSR_GPSR(IP3SR1_7_4, TPU0TO0_A), ++ PINMUX_IPSR_GPSR(IP3SR1_7_4, TPU0TO0_B), + + PINMUX_IPSR_GPSR(IP3SR1_11_8, HRTS3_N_A), + PINMUX_IPSR_GPSR(IP3SR1_11_8, RTS3_N_A), + PINMUX_IPSR_GPSR(IP3SR1_11_8, MSIOF4_TXD), +- PINMUX_IPSR_GPSR(IP3SR1_11_8, TPU0TO1_A), ++ PINMUX_IPSR_GPSR(IP3SR1_11_8, TPU0TO1_B), + + PINMUX_IPSR_GPSR(IP3SR1_15_12, HCTS3_N_A), + PINMUX_IPSR_GPSR(IP3SR1_15_12, RX3_A), +@@ -889,11 +889,11 @@ static const u16 pinmux_data[] = { + /* IP0SR2 */ + PINMUX_IPSR_GPSR(IP0SR2_3_0, FXR_TXDA), + PINMUX_IPSR_GPSR(IP0SR2_3_0, CANFD1_TX), +- PINMUX_IPSR_GPSR(IP0SR2_3_0, TPU0TO2_A), ++ PINMUX_IPSR_GPSR(IP0SR2_3_0, TPU0TO2_B), + + PINMUX_IPSR_GPSR(IP0SR2_7_4, FXR_TXENA_N_A), + PINMUX_IPSR_GPSR(IP0SR2_7_4, CANFD1_RX), +- PINMUX_IPSR_GPSR(IP0SR2_7_4, TPU0TO3_A), ++ PINMUX_IPSR_GPSR(IP0SR2_7_4, TPU0TO3_B), + + PINMUX_IPSR_GPSR(IP0SR2_11_8, RXDA_EXTFXR), + PINMUX_IPSR_GPSR(IP0SR2_11_8, CANFD5_TX_A), +@@ -909,12 +909,12 @@ static const u16 pinmux_data[] = { + + PINMUX_IPSR_GPSR(IP0SR2_27_24, FXR_TXDB), + +- PINMUX_IPSR_GPSR(IP0SR2_31_28, TPU0TO1), ++ PINMUX_IPSR_GPSR(IP0SR2_31_28, TPU0TO1_A), + PINMUX_IPSR_GPSR(IP0SR2_31_28, CANFD6_TX), + PINMUX_IPSR_GPSR(IP0SR2_31_28, TCLK2_C), + + /* IP1SR2 */ +- PINMUX_IPSR_GPSR(IP1SR2_3_0, TPU0TO0), ++ PINMUX_IPSR_GPSR(IP1SR2_3_0, TPU0TO0_A), + PINMUX_IPSR_GPSR(IP1SR2_3_0, CANFD6_RX), + PINMUX_IPSR_GPSR(IP1SR2_3_0, TCLK1_B), + +@@ -928,11 +928,11 @@ static const u16 pinmux_data[] = { + PINMUX_IPSR_GPSR(IP1SR2_15_12, STPWT_EXTFXR), + + PINMUX_IPSR_GPSR(IP1SR2_19_16, CANFD2_TX), +- PINMUX_IPSR_GPSR(IP1SR2_19_16, TPU0TO2), ++ PINMUX_IPSR_GPSR(IP1SR2_19_16, TPU0TO2_A), + PINMUX_IPSR_GPSR(IP1SR2_19_16, TCLK3_C), + + PINMUX_IPSR_GPSR(IP1SR2_23_20, CANFD2_RX), +- PINMUX_IPSR_GPSR(IP1SR2_23_20, TPU0TO3), ++ PINMUX_IPSR_GPSR(IP1SR2_23_20, TPU0TO3_A), + PINMUX_IPSR_GPSR(IP1SR2_23_20, PWM1_B), + PINMUX_IPSR_GPSR(IP1SR2_23_20, TCLK4_C), + +@@ -2403,64 +2403,63 @@ static const unsigned int ssi_ctrl_mux[] = { + SSI_SCK_MARK, SSI_WS_MARK, + }; + +-/* - TPU ------------------------------------------------------------------- */ +-static const unsigned int tpu_to0_pins[] = { +- /* TPU0TO0 */ ++/* - TPU -------------------------------------------------------------------- */ ++static const unsigned int tpu_to0_a_pins[] = { ++ /* TPU0TO0_A */ + RCAR_GP_PIN(2, 8), + }; +-static const unsigned int tpu_to0_mux[] = { +- TPU0TO0_MARK, ++static const unsigned int tpu_to0_a_mux[] = { ++ TPU0TO0_A_MARK, + }; +-static const unsigned int tpu_to1_pins[] = { +- /* TPU0TO1 */ ++static const unsigned int tpu_to1_a_pins[] = { ++ /* TPU0TO1_A */ + RCAR_GP_PIN(2, 7), + }; +-static const unsigned int tpu_to1_mux[] = { +- TPU0TO1_MARK, ++static const unsigned int tpu_to1_a_mux[] = { ++ TPU0TO1_A_MARK, + }; +-static const unsigned int tpu_to2_pins[] = { +- /* TPU0TO2 */ ++static const unsigned int tpu_to2_a_pins[] = { ++ /* TPU0TO2_A */ + RCAR_GP_PIN(2, 12), + }; +-static const unsigned int tpu_to2_mux[] = { +- TPU0TO2_MARK, ++static const unsigned int tpu_to2_a_mux[] = { ++ TPU0TO2_A_MARK, + }; +-static const unsigned int tpu_to3_pins[] = { +- /* TPU0TO3 */ ++static const unsigned int tpu_to3_a_pins[] = { ++ /* TPU0TO3_A */ + RCAR_GP_PIN(2, 13), + }; +-static const unsigned int tpu_to3_mux[] = { +- TPU0TO3_MARK, ++static const unsigned int tpu_to3_a_mux[] = { ++ TPU0TO3_A_MARK, + }; + +-/* - TPU_A ------------------------------------------------------------------- */ +-static const unsigned int tpu_to0_a_pins[] = { +- /* TPU0TO0_A */ ++static const unsigned int tpu_to0_b_pins[] = { ++ /* TPU0TO0_B */ + RCAR_GP_PIN(1, 25), + }; +-static const unsigned int tpu_to0_a_mux[] = { +- TPU0TO0_A_MARK, ++static const unsigned int tpu_to0_b_mux[] = { ++ TPU0TO0_B_MARK, + }; +-static const unsigned int tpu_to1_a_pins[] = { +- /* TPU0TO1_A */ ++static const unsigned int tpu_to1_b_pins[] = { ++ /* TPU0TO1_B */ + RCAR_GP_PIN(1, 26), + }; +-static const unsigned int tpu_to1_a_mux[] = { +- TPU0TO1_A_MARK, ++static const unsigned int tpu_to1_b_mux[] = { ++ TPU0TO1_B_MARK, + }; +-static const unsigned int tpu_to2_a_pins[] = { +- /* TPU0TO2_A */ ++static const unsigned int tpu_to2_b_pins[] = { ++ /* TPU0TO2_B */ + RCAR_GP_PIN(2, 0), + }; +-static const unsigned int tpu_to2_a_mux[] = { +- TPU0TO2_A_MARK, ++static const unsigned int tpu_to2_b_mux[] = { ++ TPU0TO2_B_MARK, + }; +-static const unsigned int tpu_to3_a_pins[] = { +- /* TPU0TO3_A */ ++static const unsigned int tpu_to3_b_pins[] = { ++ /* TPU0TO3_B */ + RCAR_GP_PIN(2, 1), + }; +-static const unsigned int tpu_to3_a_mux[] = { +- TPU0TO3_A_MARK, ++static const unsigned int tpu_to3_b_mux[] = { ++ TPU0TO3_B_MARK, + }; + + /* - TSN0 ------------------------------------------------ */ +@@ -2702,14 +2701,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(ssi_data), + SH_PFC_PIN_GROUP(ssi_ctrl), + +- SH_PFC_PIN_GROUP(tpu_to0), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(tpu_to0_a), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(tpu_to1), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(tpu_to1_a), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(tpu_to2), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(tpu_to2_a), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(tpu_to3), /* suffix might be updated */ +- SH_PFC_PIN_GROUP(tpu_to3_a), /* suffix might be updated */ ++ SH_PFC_PIN_GROUP(tpu_to0_a), ++ SH_PFC_PIN_GROUP(tpu_to0_b), ++ SH_PFC_PIN_GROUP(tpu_to1_a), ++ SH_PFC_PIN_GROUP(tpu_to1_b), ++ SH_PFC_PIN_GROUP(tpu_to2_a), ++ SH_PFC_PIN_GROUP(tpu_to2_b), ++ SH_PFC_PIN_GROUP(tpu_to3_a), ++ SH_PFC_PIN_GROUP(tpu_to3_b), + + SH_PFC_PIN_GROUP(tsn0_link), + SH_PFC_PIN_GROUP(tsn0_phy_int), +@@ -3020,15 +3019,14 @@ static const char * const ssi_groups[] = { + }; + + static const char * const tpu_groups[] = { +- /* suffix might be updated */ +- "tpu_to0", + "tpu_to0_a", +- "tpu_to1", ++ "tpu_to0_b", + "tpu_to1_a", +- "tpu_to2", ++ "tpu_to1_b", + "tpu_to2_a", +- "tpu_to3", ++ "tpu_to2_b", + "tpu_to3_a", ++ "tpu_to3_b", + }; + + static const char * const tsn0_groups[] = { +-- +2.43.0 + diff --git a/queue-6.6/pinctrl-rockchip-update-rk3308-iomux-routes.patch b/queue-6.6/pinctrl-rockchip-update-rk3308-iomux-routes.patch new file mode 100644 index 00000000000..dc8bd10a703 --- /dev/null +++ b/queue-6.6/pinctrl-rockchip-update-rk3308-iomux-routes.patch @@ -0,0 +1,60 @@ +From 4779c7fdc7fdcee074ba8c24cfa846b14b6844bf Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 15 May 2024 17:16:32 +0500 +Subject: pinctrl: rockchip: update rk3308 iomux routes + +From: Dmitry Yashin + +[ Upstream commit a8f2548548584549ea29d43431781d67c4afa42b ] + +Some of the rk3308 iomux routes in rk3308_mux_route_data belong to +the rk3308b SoC. Remove them and correct i2c3 routes. + +Fixes: 7825aeb7b208 ("pinctrl: rockchip: add rk3308 SoC support") +Signed-off-by: Dmitry Yashin +Reviewed-by: Heiko Stuebner +Link: https://lore.kernel.org/r/20240515121634.23945-2-dmt.yashin@gmail.com +Signed-off-by: Linus Walleij +Signed-off-by: Sasha Levin +--- + drivers/pinctrl/pinctrl-rockchip.c | 17 ++--------------- + 1 file changed, 2 insertions(+), 15 deletions(-) + +diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c +index caf8d0a98c327..b02eaba010d10 100644 +--- a/drivers/pinctrl/pinctrl-rockchip.c ++++ b/drivers/pinctrl/pinctrl-rockchip.c +@@ -915,9 +915,8 @@ static struct rockchip_mux_route_data rk3308_mux_route_data[] = { + RK_MUXROUTE_SAME(0, RK_PC3, 1, 0x314, BIT(16 + 0) | BIT(0)), /* rtc_clk */ + RK_MUXROUTE_SAME(1, RK_PC6, 2, 0x314, BIT(16 + 2) | BIT(16 + 3)), /* uart2_rxm0 */ + RK_MUXROUTE_SAME(4, RK_PD2, 2, 0x314, BIT(16 + 2) | BIT(16 + 3) | BIT(2)), /* uart2_rxm1 */ +- RK_MUXROUTE_SAME(0, RK_PB7, 2, 0x608, BIT(16 + 8) | BIT(16 + 9)), /* i2c3_sdam0 */ +- RK_MUXROUTE_SAME(3, RK_PB4, 2, 0x608, BIT(16 + 8) | BIT(16 + 9) | BIT(8)), /* i2c3_sdam1 */ +- RK_MUXROUTE_SAME(2, RK_PA0, 3, 0x608, BIT(16 + 8) | BIT(16 + 9) | BIT(9)), /* i2c3_sdam2 */ ++ RK_MUXROUTE_SAME(0, RK_PB7, 2, 0x314, BIT(16 + 4)), /* i2c3_sdam0 */ ++ RK_MUXROUTE_SAME(3, RK_PB4, 2, 0x314, BIT(16 + 4) | BIT(4)), /* i2c3_sdam1 */ + RK_MUXROUTE_SAME(1, RK_PA3, 2, 0x308, BIT(16 + 3)), /* i2s-8ch-1-sclktxm0 */ + RK_MUXROUTE_SAME(1, RK_PA4, 2, 0x308, BIT(16 + 3)), /* i2s-8ch-1-sclkrxm0 */ + RK_MUXROUTE_SAME(1, RK_PB5, 2, 0x308, BIT(16 + 3) | BIT(3)), /* i2s-8ch-1-sclktxm1 */ +@@ -926,18 +925,6 @@ static struct rockchip_mux_route_data rk3308_mux_route_data[] = { + RK_MUXROUTE_SAME(1, RK_PB6, 4, 0x308, BIT(16 + 12) | BIT(16 + 13) | BIT(12)), /* pdm-clkm1 */ + RK_MUXROUTE_SAME(2, RK_PA6, 2, 0x308, BIT(16 + 12) | BIT(16 + 13) | BIT(13)), /* pdm-clkm2 */ + RK_MUXROUTE_SAME(2, RK_PA4, 3, 0x600, BIT(16 + 2) | BIT(2)), /* pdm-clkm-m2 */ +- RK_MUXROUTE_SAME(3, RK_PB2, 3, 0x314, BIT(16 + 9)), /* spi1_miso */ +- RK_MUXROUTE_SAME(2, RK_PA4, 2, 0x314, BIT(16 + 9) | BIT(9)), /* spi1_miso_m1 */ +- RK_MUXROUTE_SAME(0, RK_PB3, 3, 0x314, BIT(16 + 10) | BIT(16 + 11)), /* owire_m0 */ +- RK_MUXROUTE_SAME(1, RK_PC6, 7, 0x314, BIT(16 + 10) | BIT(16 + 11) | BIT(10)), /* owire_m1 */ +- RK_MUXROUTE_SAME(2, RK_PA2, 5, 0x314, BIT(16 + 10) | BIT(16 + 11) | BIT(11)), /* owire_m2 */ +- RK_MUXROUTE_SAME(0, RK_PB3, 2, 0x314, BIT(16 + 12) | BIT(16 + 13)), /* can_rxd_m0 */ +- RK_MUXROUTE_SAME(1, RK_PC6, 5, 0x314, BIT(16 + 12) | BIT(16 + 13) | BIT(12)), /* can_rxd_m1 */ +- RK_MUXROUTE_SAME(2, RK_PA2, 4, 0x314, BIT(16 + 12) | BIT(16 + 13) | BIT(13)), /* can_rxd_m2 */ +- RK_MUXROUTE_SAME(1, RK_PC4, 3, 0x314, BIT(16 + 14)), /* mac_rxd0_m0 */ +- RK_MUXROUTE_SAME(4, RK_PA2, 2, 0x314, BIT(16 + 14) | BIT(14)), /* mac_rxd0_m1 */ +- RK_MUXROUTE_SAME(3, RK_PB4, 4, 0x314, BIT(16 + 15)), /* uart3_rx */ +- RK_MUXROUTE_SAME(0, RK_PC1, 3, 0x314, BIT(16 + 15) | BIT(15)), /* uart3_rx_m1 */ + }; + + static struct rockchip_mux_route_data rk3328_mux_route_data[] = { +-- +2.43.0 + diff --git a/queue-6.6/pinctrl-single-fix-possible-memory-leak-when-pinctrl.patch b/queue-6.6/pinctrl-single-fix-possible-memory-leak-when-pinctrl.patch new file mode 100644 index 00000000000..674ddfa3153 --- /dev/null +++ b/queue-6.6/pinctrl-single-fix-possible-memory-leak-when-pinctrl.patch @@ -0,0 +1,60 @@ +From 86b154592d1995119bebcff6a7ed3bdda41994e6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 Jun 2024 10:37:03 +0800 +Subject: pinctrl: single: fix possible memory leak when pinctrl_enable() fails + +From: Yang Yingliang + +[ Upstream commit 8f773bfbdd428819328a2d185976cfc6ae811cd3 ] + +This driver calls pinctrl_register_and_init() which is not +devm_ managed, it will leads memory leak if pinctrl_enable() +fails. Replace it with devm_pinctrl_register_and_init(). +And call pcs_free_resources() if pinctrl_enable() fails. + +Fixes: 5038a66dad01 ("pinctrl: core: delete incorrect free in pinctrl_enable()") +Signed-off-by: Yang Yingliang +Reviewed-by: Dan Carpenter +Link: https://lore.kernel.org/r/20240606023704.3931561-3-yangyingliang@huawei.com +Signed-off-by: Linus Walleij +Signed-off-by: Sasha Levin +--- + drivers/pinctrl/pinctrl-single.c | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c +index 461a7c02d4a39..17e08f21756c3 100644 +--- a/drivers/pinctrl/pinctrl-single.c ++++ b/drivers/pinctrl/pinctrl-single.c +@@ -1327,7 +1327,6 @@ static void pcs_irq_free(struct pcs_device *pcs) + static void pcs_free_resources(struct pcs_device *pcs) + { + pcs_irq_free(pcs); +- pinctrl_unregister(pcs->pctl); + + #if IS_BUILTIN(CONFIG_PINCTRL_SINGLE) + if (pcs->missing_nr_pinctrl_cells) +@@ -1884,7 +1883,7 @@ static int pcs_probe(struct platform_device *pdev) + if (ret < 0) + goto free; + +- ret = pinctrl_register_and_init(&pcs->desc, pcs->dev, pcs, &pcs->pctl); ++ ret = devm_pinctrl_register_and_init(pcs->dev, &pcs->desc, pcs, &pcs->pctl); + if (ret) { + dev_err(pcs->dev, "could not register single pinctrl driver\n"); + goto free; +@@ -1917,8 +1916,10 @@ static int pcs_probe(struct platform_device *pdev) + + dev_info(pcs->dev, "%i pins, size %u\n", pcs->desc.npins, pcs->size); + +- return pinctrl_enable(pcs->pctl); ++ if (pinctrl_enable(pcs->pctl)) ++ goto free; + ++ return 0; + free: + pcs_free_resources(pcs); + +-- +2.43.0 + diff --git a/queue-6.6/pinctrl-ti-ti-iodelay-drop-if-block-with-always-fals.patch b/queue-6.6/pinctrl-ti-ti-iodelay-drop-if-block-with-always-fals.patch new file mode 100644 index 00000000000..063edf55e4e --- /dev/null +++ b/queue-6.6/pinctrl-ti-ti-iodelay-drop-if-block-with-always-fals.patch @@ -0,0 +1,44 @@ +From fe05155d77b87470fbd0735f3e90dde84e043e7c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 9 Oct 2023 10:38:39 +0200 +Subject: pinctrl: ti: ti-iodelay: Drop if block with always false condition +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Uwe Kleine-König + +[ Upstream commit 88b3f108502bc45e6ebd005702add46759f3f45a ] + +ti_iodelay_remove() is only called after ti_iodelay_probe() completed +successfully. In this case platform_set_drvdata() was called with a +non-NULL argument and so platform_get_drvdata() won't return NULL. + +Simplify by removing the if block with the always false condition. + +Signed-off-by: Uwe Kleine-König +Link: https://lore.kernel.org/r/20231009083856.222030-4-u.kleine-koenig@pengutronix.de +Signed-off-by: Linus Walleij +Stable-dep-of: 9b401f4a7170 ("pinctrl: ti: ti-iodelay: fix possible memory leak when pinctrl_enable() fails") +Signed-off-by: Sasha Levin +--- + drivers/pinctrl/ti/pinctrl-ti-iodelay.c | 3 --- + 1 file changed, 3 deletions(-) + +diff --git a/drivers/pinctrl/ti/pinctrl-ti-iodelay.c b/drivers/pinctrl/ti/pinctrl-ti-iodelay.c +index c1477f6578393..f3a2735620955 100644 +--- a/drivers/pinctrl/ti/pinctrl-ti-iodelay.c ++++ b/drivers/pinctrl/ti/pinctrl-ti-iodelay.c +@@ -903,9 +903,6 @@ static int ti_iodelay_remove(struct platform_device *pdev) + { + struct ti_iodelay_device *iod = platform_get_drvdata(pdev); + +- if (!iod) +- return 0; +- + if (iod->pctl) + pinctrl_unregister(iod->pctl); + +-- +2.43.0 + diff --git a/queue-6.6/pinctrl-ti-ti-iodelay-fix-possible-memory-leak-when-.patch b/queue-6.6/pinctrl-ti-ti-iodelay-fix-possible-memory-leak-when-.patch new file mode 100644 index 00000000000..ec38747b469 --- /dev/null +++ b/queue-6.6/pinctrl-ti-ti-iodelay-fix-possible-memory-leak-when-.patch @@ -0,0 +1,64 @@ +From 13b3fcf0ab905825a8bf70ac3069b13e764f728e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 Jun 2024 10:37:04 +0800 +Subject: pinctrl: ti: ti-iodelay: fix possible memory leak when + pinctrl_enable() fails + +From: Yang Yingliang + +[ Upstream commit 9b401f4a7170125365160c9af267a41ff6b39001 ] + +This driver calls pinctrl_register_and_init() which is not +devm_ managed, it will leads memory leak if pinctrl_enable() +fails. Replace it with devm_pinctrl_register_and_init(). +And add missing of_node_put() in the error path. + +Fixes: 5038a66dad01 ("pinctrl: core: delete incorrect free in pinctrl_enable()") +Signed-off-by: Yang Yingliang +Reviewed-by: Dan Carpenter +Link: https://lore.kernel.org/r/20240606023704.3931561-4-yangyingliang@huawei.com +Signed-off-by: Linus Walleij +Signed-off-by: Sasha Levin +--- + drivers/pinctrl/ti/pinctrl-ti-iodelay.c | 11 ++++++----- + 1 file changed, 6 insertions(+), 5 deletions(-) + +diff --git a/drivers/pinctrl/ti/pinctrl-ti-iodelay.c b/drivers/pinctrl/ti/pinctrl-ti-iodelay.c +index f3a2735620955..5370bbdf2e1a1 100644 +--- a/drivers/pinctrl/ti/pinctrl-ti-iodelay.c ++++ b/drivers/pinctrl/ti/pinctrl-ti-iodelay.c +@@ -878,7 +878,7 @@ static int ti_iodelay_probe(struct platform_device *pdev) + iod->desc.name = dev_name(dev); + iod->desc.owner = THIS_MODULE; + +- ret = pinctrl_register_and_init(&iod->desc, dev, iod, &iod->pctl); ++ ret = devm_pinctrl_register_and_init(dev, &iod->desc, iod, &iod->pctl); + if (ret) { + dev_err(dev, "Failed to register pinctrl\n"); + goto exit_out; +@@ -886,7 +886,11 @@ static int ti_iodelay_probe(struct platform_device *pdev) + + platform_set_drvdata(pdev, iod); + +- return pinctrl_enable(iod->pctl); ++ ret = pinctrl_enable(iod->pctl); ++ if (ret) ++ goto exit_out; ++ ++ return 0; + + exit_out: + of_node_put(np); +@@ -903,9 +907,6 @@ static int ti_iodelay_remove(struct platform_device *pdev) + { + struct ti_iodelay_device *iod = platform_get_drvdata(pdev); + +- if (iod->pctl) +- pinctrl_unregister(iod->pctl); +- + ti_iodelay_pinconf_deinit_dev(iod); + + /* Expect other allocations to be freed by devm */ +-- +2.43.0 + diff --git a/queue-6.6/platform-chrome-cros_ec_debugfs-fix-wrong-ec-message.patch b/queue-6.6/platform-chrome-cros_ec_debugfs-fix-wrong-ec-message.patch new file mode 100644 index 00000000000..e8e9d8003eb --- /dev/null +++ b/queue-6.6/platform-chrome-cros_ec_debugfs-fix-wrong-ec-message.patch @@ -0,0 +1,38 @@ +From 2f405a40365ae9df9bfd3a46a40a7276ecff2159 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 11 Jun 2024 11:31:10 +0000 +Subject: platform/chrome: cros_ec_debugfs: fix wrong EC message version + +From: Tzung-Bi Shih + +[ Upstream commit c2a28647bbb4e0894e8824362410f72b06ac57a4 ] + +ec_read_version_supported() uses ec_params_get_cmd_versions_v1 but it +wrongly uses message version 0. + +Fix it. + +Fixes: e86264595225 ("mfd: cros_ec: add debugfs, console log file") +Reviewed-by: Guenter Roeck +Link: https://lore.kernel.org/r/20240611113110.16955-1-tzungbi@kernel.org +Signed-off-by: Tzung-Bi Shih +Signed-off-by: Sasha Levin +--- + drivers/platform/chrome/cros_ec_debugfs.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/platform/chrome/cros_ec_debugfs.c b/drivers/platform/chrome/cros_ec_debugfs.c +index c876120e0ebc9..793c8c4bf35ba 100644 +--- a/drivers/platform/chrome/cros_ec_debugfs.c ++++ b/drivers/platform/chrome/cros_ec_debugfs.c +@@ -329,6 +329,7 @@ static int ec_read_version_supported(struct cros_ec_dev *ec) + if (!msg) + return 0; + ++ msg->version = 1; + msg->command = EC_CMD_GET_CMD_VERSIONS + ec->cmd_offset; + msg->outsize = sizeof(*params); + msg->insize = sizeof(*response); +-- +2.43.0 + diff --git a/queue-6.6/powerpc-8xx-fix-size-given-to-set_huge_pte_at.patch b/queue-6.6/powerpc-8xx-fix-size-given-to-set_huge_pte_at.patch new file mode 100644 index 00000000000..ba8e68b835d --- /dev/null +++ b/queue-6.6/powerpc-8xx-fix-size-given-to-set_huge_pte_at.patch @@ -0,0 +1,43 @@ +From eac7c94d0f914a6cb683f26733ce0206733d6c3e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 2 Jul 2024 15:51:24 +0200 +Subject: powerpc/8xx: fix size given to set_huge_pte_at() + +From: Christophe Leroy + +[ Upstream commit 7ea981070fd9ec24bc0111636038193aebb0289c ] + +set_huge_pte_at() expects the size of the hugepage as an int, not the +psize which is the index of the page definition in table mmu_psize_defs[] + +Link: https://lkml.kernel.org/r/97f2090011e25d99b6b0aae73e22e1b921c5d1fb.1719928057.git.christophe.leroy@csgroup.eu +Fixes: 935d4f0c6dc8 ("mm: hugetlb: add huge page size param to set_huge_pte_at()") +Signed-off-by: Christophe Leroy +Reviewed-by: Oscar Salvador +Cc: Jason Gunthorpe +Cc: Michael Ellerman +Cc: Nicholas Piggin +Cc: Peter Xu +Signed-off-by: Andrew Morton +Signed-off-by: Sasha Levin +--- + arch/powerpc/mm/nohash/8xx.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/arch/powerpc/mm/nohash/8xx.c b/arch/powerpc/mm/nohash/8xx.c +index a642a79298929..3245016302787 100644 +--- a/arch/powerpc/mm/nohash/8xx.c ++++ b/arch/powerpc/mm/nohash/8xx.c +@@ -92,7 +92,8 @@ static int __ref __early_map_kernel_hugepage(unsigned long va, phys_addr_t pa, + return -EINVAL; + + set_huge_pte_at(&init_mm, va, ptep, +- pte_mkhuge(pfn_pte(pa >> PAGE_SHIFT, prot)), psize); ++ pte_mkhuge(pfn_pte(pa >> PAGE_SHIFT, prot)), ++ 1UL << mmu_psize_to_shift(psize)); + + return 0; + } +-- +2.43.0 + diff --git a/queue-6.6/powerpc-prom-add-cpu-info-to-hardware-description-st.patch b/queue-6.6/powerpc-prom-add-cpu-info-to-hardware-description-st.patch new file mode 100644 index 00000000000..57b45e15a59 --- /dev/null +++ b/queue-6.6/powerpc-prom-add-cpu-info-to-hardware-description-st.patch @@ -0,0 +1,86 @@ +From 481efda2b663385964829a5b0ee51b404a2402fc Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 3 Jun 2024 07:36:55 -0500 +Subject: powerpc/prom: Add CPU info to hardware description string later + +From: Nathan Lynch + +[ Upstream commit 7bdd1c6c87de758750d419eedab7285b95b66417 ] + +cur_cpu_spec->cpu_name is appended to ppc_hw_desc before cur_cpu_spec +has taken on its final value. This is illustrated on pseries by +comparing the CPU name as reported at boot ("POWER8E (raw)") to the +contents of /proc/cpuinfo ("POWER8 (architected)"): + + $ dmesg | grep Hardware + Hardware name: IBM,8408-E8E POWER8E (raw) 0x4b0201 0xf000004 \ + of:IBM,FW860.50 (SV860_146) hv:phyp pSeries + + $ grep -m 1 ^cpu /proc/cpuinfo + cpu : POWER8 (architected), altivec supported + +Some 44x models would appear to be affected as well; see +identical_pvr_fixup(). + +This results in incorrect CPU information in stack dumps -- +ppc_hw_desc is an input to dump_stack_set_arch_desc(). + +Delay gathering the CPU name until after all potential calls to +identify_cpu(). + +Signed-off-by: Nathan Lynch +Fixes: bd649d40e0f2 ("powerpc: Add PVR & CPU name to hardware description") +Signed-off-by: Michael Ellerman +Link: https://msgid.link/20240603-fix-cpu-hwdesc-v1-1-945f2850fcaa@linux.ibm.com +Signed-off-by: Sasha Levin +--- + arch/powerpc/kernel/prom.c | 12 ++++++++---- + 1 file changed, 8 insertions(+), 4 deletions(-) + +diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c +index 77364729a1b61..bf6d8ad3819e9 100644 +--- a/arch/powerpc/kernel/prom.c ++++ b/arch/powerpc/kernel/prom.c +@@ -327,6 +327,7 @@ static int __init early_init_dt_scan_cpus(unsigned long node, + void *data) + { + const char *type = of_get_flat_dt_prop(node, "device_type", NULL); ++ const __be32 *cpu_version = NULL; + const __be32 *prop; + const __be32 *intserv; + int i, nthreads; +@@ -410,7 +411,7 @@ static int __init early_init_dt_scan_cpus(unsigned long node, + prop = of_get_flat_dt_prop(node, "cpu-version", NULL); + if (prop && (be32_to_cpup(prop) & 0xff000000) == 0x0f000000) { + identify_cpu(0, be32_to_cpup(prop)); +- seq_buf_printf(&ppc_hw_desc, "0x%04x ", be32_to_cpup(prop)); ++ cpu_version = prop; + } + + check_cpu_feature_properties(node); +@@ -421,6 +422,12 @@ static int __init early_init_dt_scan_cpus(unsigned long node, + } + + identical_pvr_fixup(node); ++ ++ // We can now add the CPU name & PVR to the hardware description ++ seq_buf_printf(&ppc_hw_desc, "%s 0x%04lx ", cur_cpu_spec->cpu_name, mfspr(SPRN_PVR)); ++ if (cpu_version) ++ seq_buf_printf(&ppc_hw_desc, "0x%04x ", be32_to_cpup(cpu_version)); ++ + init_mmu_slb_size(node); + + #ifdef CONFIG_PPC64 +@@ -858,9 +865,6 @@ void __init early_init_devtree(void *params) + + dt_cpu_ftrs_scan(); + +- // We can now add the CPU name & PVR to the hardware description +- seq_buf_printf(&ppc_hw_desc, "%s 0x%04lx ", cur_cpu_spec->cpu_name, mfspr(SPRN_PVR)); +- + /* Retrieve CPU related informations from the flat tree + * (altivec support, boot CPU ID, ...) + */ +-- +2.43.0 + diff --git a/queue-6.6/powerpc-xmon-fix-disassembly-cpu-feature-checks.patch b/queue-6.6/powerpc-xmon-fix-disassembly-cpu-feature-checks.patch new file mode 100644 index 00000000000..5d0cbc9e052 --- /dev/null +++ b/queue-6.6/powerpc-xmon-fix-disassembly-cpu-feature-checks.patch @@ -0,0 +1,99 @@ +From ec9b1b2787738f4d01674c8d60c9e733f6bfa9f5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 9 May 2024 22:12:47 +1000 +Subject: powerpc/xmon: Fix disassembly CPU feature checks + +From: Michael Ellerman + +[ Upstream commit 14196e47c5ffe32af7ed5a51c9e421c5ea5bccce ] + +In the xmon disassembly code there are several CPU feature checks to +determine what dialects should be passed to the disassembler. The +dialect controls which instructions the disassembler will recognise. + +Unfortunately the checks are incorrect, because instead of passing a +single CPU feature they are passing a mask of feature bits. + +For example the code: + + if (cpu_has_feature(CPU_FTRS_POWER5)) + dialect |= PPC_OPCODE_POWER5; + +Is trying to check if the system is running on a Power5 CPU. But +CPU_FTRS_POWER5 is a mask of *all* the feature bits that are enabled on +a Power5. + +In practice the test will always return true for any 64-bit CPU, because +at least one bit in the mask will be present in the CPU_FTRS_ALWAYS +mask. + +Similarly for all the other checks against CPU_FTRS_xx masks. + +Rather than trying to match the disassembly behaviour exactly to the +current CPU, just differentiate between 32-bit and 64-bit, and Altivec, +VSX and HTM. + +That will cause some instructions to be shown in disassembly even +on a CPU that doesn't support them, but that's OK, objdump -d output +has the same behaviour, and if anything it's less confusing than some +instructions not being disassembled. + +Fixes: 897f112bb42e ("[POWERPC] Import updated version of ppc disassembly code for xmon") +Signed-off-by: Michael Ellerman +Link: https://msgid.link/20240509121248.270878-2-mpe@ellerman.id.au +Signed-off-by: Sasha Levin +--- + arch/powerpc/xmon/ppc-dis.c | 33 +++++++++++---------------------- + 1 file changed, 11 insertions(+), 22 deletions(-) + +diff --git a/arch/powerpc/xmon/ppc-dis.c b/arch/powerpc/xmon/ppc-dis.c +index 75fa98221d485..af105e1bc3fca 100644 +--- a/arch/powerpc/xmon/ppc-dis.c ++++ b/arch/powerpc/xmon/ppc-dis.c +@@ -122,32 +122,21 @@ int print_insn_powerpc (unsigned long insn, unsigned long memaddr) + bool insn_is_short; + ppc_cpu_t dialect; + +- dialect = PPC_OPCODE_PPC | PPC_OPCODE_COMMON +- | PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_ALTIVEC; ++ dialect = PPC_OPCODE_PPC | PPC_OPCODE_COMMON; + +- if (cpu_has_feature(CPU_FTRS_POWER5)) +- dialect |= PPC_OPCODE_POWER5; ++ if (IS_ENABLED(CONFIG_PPC64)) ++ dialect |= PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_CELL | ++ PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | ++ PPC_OPCODE_POWER9; + +- if (cpu_has_feature(CPU_FTRS_CELL)) +- dialect |= (PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC); ++ if (cpu_has_feature(CPU_FTR_TM)) ++ dialect |= PPC_OPCODE_HTM; + +- if (cpu_has_feature(CPU_FTRS_POWER6)) +- dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC); ++ if (cpu_has_feature(CPU_FTR_ALTIVEC)) ++ dialect |= PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2; + +- if (cpu_has_feature(CPU_FTRS_POWER7)) +- dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 +- | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX); +- +- if (cpu_has_feature(CPU_FTRS_POWER8)) +- dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 +- | PPC_OPCODE_POWER8 | PPC_OPCODE_HTM +- | PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_VSX); +- +- if (cpu_has_feature(CPU_FTRS_POWER9)) +- dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 +- | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9 | PPC_OPCODE_HTM +- | PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 +- | PPC_OPCODE_VSX | PPC_OPCODE_VSX3); ++ if (cpu_has_feature(CPU_FTR_VSX)) ++ dialect |= PPC_OPCODE_VSX | PPC_OPCODE_VSX3; + + /* Get the major opcode of the insn. */ + opcode = NULL; +-- +2.43.0 + diff --git a/queue-6.6/pwm-atmel-tcb-fix-race-condition-and-convert-to-guar.patch b/queue-6.6/pwm-atmel-tcb-fix-race-condition-and-convert-to-guar.patch new file mode 100644 index 00000000000..350e1eb8626 --- /dev/null +++ b/queue-6.6/pwm-atmel-tcb-fix-race-condition-and-convert-to-guar.patch @@ -0,0 +1,105 @@ +From e83db1a80a7c4f2f67f328479c88a8ab660f0d31 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 9 Jul 2024 12:18:05 +0200 +Subject: pwm: atmel-tcb: Fix race condition and convert to guards +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Uwe Kleine-König + +[ Upstream commit 37f7707077f5ea2515bf4b1dc7fad43f8e12993e ] + +The hardware only supports a single period length for both PWM outputs. So +atmel_tcb_pwm_config() checks the configuration of the other output if it's +compatible with the currently requested setting. The register values are +then actually updated in atmel_tcb_pwm_enable(). To make this race free +the lock must be held during the whole process, so grab the lock in +.apply() instead of individually in atmel_tcb_pwm_disable() and +atmel_tcb_pwm_enable() which then also covers atmel_tcb_pwm_config(). + +To simplify handling, use the guard helper to let the compiler care for +unlocking. Otherwise unlocking would be more difficult as there is more +than one exit path in atmel_tcb_pwm_apply(). + +Fixes: 9421bade0765 ("pwm: atmel: add Timer Counter Block PWM driver") +Signed-off-by: Uwe Kleine-König +Acked-by: Nicolas Ferre +Link: https://lore.kernel.org/r/20240709101806.52394-3-u.kleine-koenig@baylibre.com +Signed-off-by: Uwe Kleine-König +Signed-off-by: Sasha Levin +--- + drivers/pwm/pwm-atmel-tcb.c | 12 +++++------- + 1 file changed, 5 insertions(+), 7 deletions(-) + +diff --git a/drivers/pwm/pwm-atmel-tcb.c b/drivers/pwm/pwm-atmel-tcb.c +index c00dd37c5fbd8..06df8c6127416 100644 +--- a/drivers/pwm/pwm-atmel-tcb.c ++++ b/drivers/pwm/pwm-atmel-tcb.c +@@ -82,7 +82,8 @@ static int atmel_tcb_pwm_request(struct pwm_chip *chip, + tcbpwm->period = 0; + tcbpwm->div = 0; + +- spin_lock(&tcbpwmc->lock); ++ guard(spinlock)(&tcbpwmc->lock); ++ + regmap_read(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CMR), &cmr); + /* + * Get init config from Timer Counter registers if +@@ -108,7 +109,6 @@ static int atmel_tcb_pwm_request(struct pwm_chip *chip, + + cmr |= ATMEL_TC_WAVE | ATMEL_TC_WAVESEL_UP_AUTO | ATMEL_TC_EEVT_XC0; + regmap_write(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CMR), cmr); +- spin_unlock(&tcbpwmc->lock); + + return 0; + } +@@ -138,7 +138,6 @@ static void atmel_tcb_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm, + if (tcbpwm->duty == 0) + polarity = !polarity; + +- spin_lock(&tcbpwmc->lock); + regmap_read(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CMR), &cmr); + + /* flush old setting and set the new one */ +@@ -173,8 +172,6 @@ static void atmel_tcb_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm, + ATMEL_TC_SWTRG); + tcbpwmc->bkup.enabled = 0; + } +- +- spin_unlock(&tcbpwmc->lock); + } + + static int atmel_tcb_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm, +@@ -195,7 +192,6 @@ static int atmel_tcb_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm, + if (tcbpwm->duty == 0) + polarity = !polarity; + +- spin_lock(&tcbpwmc->lock); + regmap_read(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CMR), &cmr); + + /* flush old setting and set the new one */ +@@ -257,7 +253,6 @@ static int atmel_tcb_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm, + regmap_write(tcbpwmc->regmap, ATMEL_TC_REG(tcbpwmc->channel, CCR), + ATMEL_TC_SWTRG | ATMEL_TC_CLKEN); + tcbpwmc->bkup.enabled = 1; +- spin_unlock(&tcbpwmc->lock); + return 0; + } + +@@ -342,9 +337,12 @@ static int atmel_tcb_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, + static int atmel_tcb_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, + const struct pwm_state *state) + { ++ struct atmel_tcb_pwm_chip *tcbpwmc = to_tcb_chip(chip); + int duty_cycle, period; + int ret; + ++ guard(spinlock)(&tcbpwmc->lock); ++ + if (!state->enabled) { + atmel_tcb_pwm_disable(chip, pwm, state->polarity); + return 0; +-- +2.43.0 + diff --git a/queue-6.6/pwm-stm32-always-do-lazy-disabling.patch b/queue-6.6/pwm-stm32-always-do-lazy-disabling.patch new file mode 100644 index 00000000000..e65215c19e6 --- /dev/null +++ b/queue-6.6/pwm-stm32-always-do-lazy-disabling.patch @@ -0,0 +1,56 @@ +From 2ad8c8986161eee7718d7ab60b6750b371569845 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 3 Jul 2024 13:00:06 +0200 +Subject: pwm: stm32: Always do lazy disabling +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Uwe Kleine-König + +[ Upstream commit 7346e7a058a2c9aa9ff1cc699c7bf18a402d9f84 ] + +When the state changes from enabled to disabled, polarity, duty_cycle +and period are not configured in hardware and TIM_CCER_CCxE is just +cleared. However if the state changes from one disabled state to +another, all parameters are written to hardware because the early exit +from stm32_pwm_apply() is only taken if the pwm is currently enabled. + +This yields surprises like: Applying + + { .period = 1, .duty_cycle = 0, .enabled = false } + +succeeds if the pwm is initially on, but fails if it's already off +because 1 is a too small period. + +Update the check for lazy disable to always exit early if the target +state is disabled, no matter what is currently configured. + +Fixes: 7edf7369205b ("pwm: Add driver for STM32 plaftorm") +Signed-off-by: Uwe Kleine-König +Link: https://lore.kernel.org/r/20240703110010.672654-2-u.kleine-koenig@baylibre.com +Signed-off-by: Uwe Kleine-König +Signed-off-by: Sasha Levin +--- + drivers/pwm/pwm-stm32.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/drivers/pwm/pwm-stm32.c b/drivers/pwm/pwm-stm32.c +index 9bdab6c24fbaf..b91a14c895bea 100644 +--- a/drivers/pwm/pwm-stm32.c ++++ b/drivers/pwm/pwm-stm32.c +@@ -456,8 +456,9 @@ static int stm32_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, + + enabled = pwm->state.enabled; + +- if (enabled && !state->enabled) { +- stm32_pwm_disable(priv, pwm->hwpwm); ++ if (!state->enabled) { ++ if (enabled) ++ stm32_pwm_disable(priv, pwm->hwpwm); + return 0; + } + +-- +2.43.0 + diff --git a/queue-6.6/rcu-tasks-fix-stale-task-snaphot-for-tasks-trace.patch b/queue-6.6/rcu-tasks-fix-stale-task-snaphot-for-tasks-trace.patch new file mode 100644 index 00000000000..5c55c89f6a1 --- /dev/null +++ b/queue-6.6/rcu-tasks-fix-stale-task-snaphot-for-tasks-trace.patch @@ -0,0 +1,111 @@ +From 29451279c151d087ea89f16d612fec5aed65c619 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 17 May 2024 17:23:02 +0200 +Subject: rcu/tasks: Fix stale task snaphot for Tasks Trace + +From: Frederic Weisbecker + +[ Upstream commit 399ced9594dfab51b782798efe60a2376cd5b724 ] + +When RCU-TASKS-TRACE pre-gp takes a snapshot of the current task running +on all online CPUs, no explicit ordering synchronizes properly with a +context switch. This lack of ordering can permit the new task to miss +pre-grace-period update-side accesses. The following diagram, courtesy +of Paul, shows the possible bad scenario: + + CPU 0 CPU 1 + ----- ----- + + // Pre-GP update side access + WRITE_ONCE(*X, 1); + smp_mb(); + r0 = rq->curr; + RCU_INIT_POINTER(rq->curr, TASK_B) + spin_unlock(rq) + rcu_read_lock_trace() + r1 = X; + /* ignore TASK_B */ + +Either r0==TASK_B or r1==1 is needed but neither is guaranteed. + +One possible solution to solve this is to wait for an RCU grace period +at the beginning of the RCU-tasks-trace grace period before taking the +current tasks snaphot. However this would introduce large additional +latencies to RCU-tasks-trace grace periods. + +Another solution is to lock the target runqueue while taking the current +task snapshot. This ensures that the update side sees the latest context +switch and subsequent context switches will see the pre-grace-period +update side accesses. + +This commit therefore adds runqueue locking to cpu_curr_snapshot(). + +Fixes: e386b6725798 ("rcu-tasks: Eliminate RCU Tasks Trace IPIs to online CPUs") +Signed-off-by: Frederic Weisbecker +Signed-off-by: Paul E. McKenney +Signed-off-by: Sasha Levin +--- + kernel/rcu/tasks.h | 10 ++++++++++ + kernel/sched/core.c | 14 +++++++------- + 2 files changed, 17 insertions(+), 7 deletions(-) + +diff --git a/kernel/rcu/tasks.h b/kernel/rcu/tasks.h +index 305e960c08ac5..ff8d539ee22be 100644 +--- a/kernel/rcu/tasks.h ++++ b/kernel/rcu/tasks.h +@@ -1675,6 +1675,16 @@ static void rcu_tasks_trace_pregp_step(struct list_head *hop) + // allow safe access to the hop list. + for_each_online_cpu(cpu) { + rcu_read_lock(); ++ // Note that cpu_curr_snapshot() picks up the target ++ // CPU's current task while its runqueue is locked with ++ // an smp_mb__after_spinlock(). This ensures that either ++ // the grace-period kthread will see that task's read-side ++ // critical section or the task will see the updater's pre-GP ++ // accesses. The trailing smp_mb() in cpu_curr_snapshot() ++ // does not currently play a role other than simplify ++ // that function's ordering semantics. If these simplified ++ // ordering semantics continue to be redundant, that smp_mb() ++ // might be removed. + t = cpu_curr_snapshot(cpu); + if (rcu_tasks_trace_pertask_prep(t, true)) + trc_add_holdout(t, hop); +diff --git a/kernel/sched/core.c b/kernel/sched/core.c +index 820880960513b..1f3efdf6c6d60 100644 +--- a/kernel/sched/core.c ++++ b/kernel/sched/core.c +@@ -4438,12 +4438,7 @@ int task_call_func(struct task_struct *p, task_call_f func, void *arg) + * @cpu: The CPU on which to snapshot the task. + * + * Returns the task_struct pointer of the task "currently" running on +- * the specified CPU. If the same task is running on that CPU throughout, +- * the return value will be a pointer to that task's task_struct structure. +- * If the CPU did any context switches even vaguely concurrently with the +- * execution of this function, the return value will be a pointer to the +- * task_struct structure of a randomly chosen task that was running on +- * that CPU somewhere around the time that this function was executing. ++ * the specified CPU. + * + * If the specified CPU was offline, the return value is whatever it + * is, perhaps a pointer to the task_struct structure of that CPU's idle +@@ -4457,11 +4452,16 @@ int task_call_func(struct task_struct *p, task_call_f func, void *arg) + */ + struct task_struct *cpu_curr_snapshot(int cpu) + { ++ struct rq *rq = cpu_rq(cpu); + struct task_struct *t; ++ struct rq_flags rf; + +- smp_mb(); /* Pairing determined by caller's synchronization design. */ ++ rq_lock_irqsave(rq, &rf); ++ smp_mb__after_spinlock(); /* Pairing determined by caller's synchronization design. */ + t = rcu_dereference(cpu_curr(cpu)); ++ rq_unlock_irqrestore(rq, &rf); + smp_mb(); /* Pairing determined by caller's synchronization design. */ ++ + return t; + } + +-- +2.43.0 + diff --git a/queue-6.6/rdma-cache-release-gid-table-even-if-leak-is-detecte.patch b/queue-6.6/rdma-cache-release-gid-table-even-if-leak-is-detecte.patch new file mode 100644 index 00000000000..075dc0c653f --- /dev/null +++ b/queue-6.6/rdma-cache-release-gid-table-even-if-leak-is-detecte.patch @@ -0,0 +1,58 @@ +From f25a4382cd9a18456e2b2f47eef35ab4117f96f9 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 28 May 2024 15:52:51 +0300 +Subject: RDMA/cache: Release GID table even if leak is detected + +From: Leon Romanovsky + +[ Upstream commit a92fbeac7e94a420b55570c10fe1b90e64da4025 ] + +When the table is released, we nullify pointer to GID table, it means +that in case GID entry leak is detected, we will leak table too. + +Delete code that prevents table destruction. + +Fixes: b150c3862d21 ("IB/core: Introduce GID entry reference counts") +Link: https://lore.kernel.org/r/a62560af06ba82c88ef9194982bfa63d14768ff9.1716900410.git.leon@kernel.org +Signed-off-by: Leon Romanovsky +Signed-off-by: Sasha Levin +--- + drivers/infiniband/core/cache.c | 14 +++++--------- + 1 file changed, 5 insertions(+), 9 deletions(-) + +diff --git a/drivers/infiniband/core/cache.c b/drivers/infiniband/core/cache.c +index 7acc0f936dad3..b7251ed7a8dfb 100644 +--- a/drivers/infiniband/core/cache.c ++++ b/drivers/infiniband/core/cache.c +@@ -794,7 +794,6 @@ static struct ib_gid_table *alloc_gid_table(int sz) + static void release_gid_table(struct ib_device *device, + struct ib_gid_table *table) + { +- bool leak = false; + int i; + + if (!table) +@@ -803,15 +802,12 @@ static void release_gid_table(struct ib_device *device, + for (i = 0; i < table->sz; i++) { + if (is_gid_entry_free(table->data_vec[i])) + continue; +- if (kref_read(&table->data_vec[i]->kref) > 1) { +- dev_err(&device->dev, +- "GID entry ref leak for index %d ref=%u\n", i, +- kref_read(&table->data_vec[i]->kref)); +- leak = true; +- } ++ ++ WARN_ONCE(true, ++ "GID entry ref leak for dev %s index %d ref=%u\n", ++ dev_name(&device->dev), i, ++ kref_read(&table->data_vec[i]->kref)); + } +- if (leak) +- return; + + mutex_destroy(&table->lock); + kfree(table->data_vec); +-- +2.43.0 + diff --git a/queue-6.6/rdma-core-remove-null-check-before-dev_-put-hold.patch b/queue-6.6/rdma-core-remove-null-check-before-dev_-put-hold.patch new file mode 100644 index 00000000000..738d36d7374 --- /dev/null +++ b/queue-6.6/rdma-core-remove-null-check-before-dev_-put-hold.patch @@ -0,0 +1,94 @@ +From 919c8f6db068226e96f59a9e64d425aed254d1ff Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 30 Apr 2024 23:47:45 +0100 +Subject: RDMA/core: Remove NULL check before dev_{put, hold} + +From: Jules Irenge + +[ Upstream commit 7a1c2abf9a2be7d969b25e8d65567933335ca88e ] + +The call netdev_{put, hold} of dev_{put, hold} will check NULL, +so there is no need to check before using dev_{put, hold}, +remove it to silence the warning: + +./drivers/infiniband/core/nldev.c:375:2-9: WARNING: NULL check before dev_{put, hold} functions is not needed. + +Reported-by: Abaci Robot +Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=7047 +Signed-off-by: Yang Li +Link: https://lore.kernel.org/r/20231024003815.89742-1-yang.lee@linux.alibaba.com +Signed-off-by: Leon Romanovsky +Stable-dep-of: 2043a14fb3de ("RDMA: Fix netdev tracker in ib_device_set_netdev") +Signed-off-by: Sasha Levin +--- + drivers/infiniband/core/device.c | 10 +++------- + drivers/infiniband/core/lag.c | 3 +-- + drivers/infiniband/core/roce_gid_mgmt.c | 3 +-- + 3 files changed, 5 insertions(+), 11 deletions(-) + +diff --git a/drivers/infiniband/core/device.c b/drivers/infiniband/core/device.c +index d1b5908c70cdc..e70804d8de828 100644 +--- a/drivers/infiniband/core/device.c ++++ b/drivers/infiniband/core/device.c +@@ -2174,8 +2174,7 @@ int ib_device_set_netdev(struct ib_device *ib_dev, struct net_device *ndev, + spin_unlock_irqrestore(&pdata->netdev_lock, flags); + + add_ndev_hash(pdata); +- if (old_ndev) +- __dev_put(old_ndev); ++ __dev_put(old_ndev); + + return 0; + } +@@ -2235,8 +2234,7 @@ struct net_device *ib_device_get_netdev(struct ib_device *ib_dev, + spin_lock(&pdata->netdev_lock); + res = rcu_dereference_protected( + pdata->netdev, lockdep_is_held(&pdata->netdev_lock)); +- if (res) +- dev_hold(res); ++ dev_hold(res); + spin_unlock(&pdata->netdev_lock); + } + +@@ -2311,9 +2309,7 @@ void ib_enum_roce_netdev(struct ib_device *ib_dev, + + if (filter(ib_dev, port, idev, filter_cookie)) + cb(ib_dev, port, idev, cookie); +- +- if (idev) +- dev_put(idev); ++ dev_put(idev); + } + } + +diff --git a/drivers/infiniband/core/lag.c b/drivers/infiniband/core/lag.c +index c77d7d2559a11..66c7e1e6600dc 100644 +--- a/drivers/infiniband/core/lag.c ++++ b/drivers/infiniband/core/lag.c +@@ -93,8 +93,7 @@ static struct net_device *rdma_get_xmit_slave_udp(struct ib_device *device, + slave = netdev_get_xmit_slave(master, skb, + !!(device->lag_flags & + RDMA_LAG_FLAGS_HASH_ALL_SLAVES)); +- if (slave) +- dev_hold(slave); ++ dev_hold(slave); + rcu_read_unlock(); + kfree_skb(skb); + return slave; +diff --git a/drivers/infiniband/core/roce_gid_mgmt.c b/drivers/infiniband/core/roce_gid_mgmt.c +index e958c43dd28fd..d5131b3ba8ab0 100644 +--- a/drivers/infiniband/core/roce_gid_mgmt.c ++++ b/drivers/infiniband/core/roce_gid_mgmt.c +@@ -601,8 +601,7 @@ static void del_netdev_default_ips_join(struct ib_device *ib_dev, u32 port, + + rcu_read_lock(); + master_ndev = netdev_master_upper_dev_get_rcu(rdma_ndev); +- if (master_ndev) +- dev_hold(master_ndev); ++ dev_hold(master_ndev); + rcu_read_unlock(); + + if (master_ndev) { +-- +2.43.0 + diff --git a/queue-6.6/rdma-device-return-error-earlier-if-port-in-not-vali.patch b/queue-6.6/rdma-device-return-error-earlier-if-port-in-not-vali.patch new file mode 100644 index 00000000000..6112a95980b --- /dev/null +++ b/queue-6.6/rdma-device-return-error-earlier-if-port-in-not-vali.patch @@ -0,0 +1,46 @@ +From fc0120ece45d733fee2f5d43dfd872b6697bc98a Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 24 Jun 2024 16:24:32 +0300 +Subject: RDMA/device: Return error earlier if port in not valid + +From: Leon Romanovsky + +[ Upstream commit 917918f57a7b139c043e78c502876f2c286f4f0a ] + +There is no need to allocate port data if port provided is not valid. + +Fixes: c2261dd76b54 ("RDMA/device: Add ib_device_set_netdev() as an alternative to get_netdev") +Link: https://lore.kernel.org/r/022047a8b16988fc88d4426da50bf60a4833311b.1719235449.git.leon@kernel.org +Signed-off-by: Leon Romanovsky +Signed-off-by: Sasha Levin +--- + drivers/infiniband/core/device.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/drivers/infiniband/core/device.c b/drivers/infiniband/core/device.c +index db0a58c82838d..d1b5908c70cdc 100644 +--- a/drivers/infiniband/core/device.c ++++ b/drivers/infiniband/core/device.c +@@ -2146,6 +2146,9 @@ int ib_device_set_netdev(struct ib_device *ib_dev, struct net_device *ndev, + unsigned long flags; + int ret; + ++ if (!rdma_is_port_valid(ib_dev, port)) ++ return -EINVAL; ++ + /* + * Drivers wish to call this before ib_register_driver, so we have to + * setup the port data early. +@@ -2154,9 +2157,6 @@ int ib_device_set_netdev(struct ib_device *ib_dev, struct net_device *ndev, + if (ret) + return ret; + +- if (!rdma_is_port_valid(ib_dev, port)) +- return -EINVAL; +- + pdata = &ib_dev->port_data[port]; + spin_lock_irqsave(&pdata->netdev_lock, flags); + old_ndev = rcu_dereference_protected( +-- +2.43.0 + diff --git a/queue-6.6/rdma-fix-netdev-tracker-in-ib_device_set_netdev.patch b/queue-6.6/rdma-fix-netdev-tracker-in-ib_device_set_netdev.patch new file mode 100644 index 00000000000..7c938f1c7e8 --- /dev/null +++ b/queue-6.6/rdma-fix-netdev-tracker-in-ib_device_set_netdev.patch @@ -0,0 +1,49 @@ +From 31f5dc06fffe335649062c602097ccadff2a285e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 10 Jul 2024 13:33:10 -0700 +Subject: RDMA: Fix netdev tracker in ib_device_set_netdev + +From: David Ahern + +[ Upstream commit 2043a14fb3de9d88440b21590f714306fcbbd55f ] + +If a netdev has already been assigned, ib_device_set_netdev needs to +release the reference on the older netdev but it is mistakenly being +called for the new netdev. Fix it and in the process use netdev_put +to be symmetrical with the netdev_hold. + +Fixes: 09f530f0c6d6 ("RDMA: Add netdevice_tracker to ib_device_set_netdev()") +Signed-off-by: David Ahern +Link: https://lore.kernel.org/r/20240710203310.19317-1-dsahern@kernel.org +Signed-off-by: Leon Romanovsky +Signed-off-by: Sasha Levin +--- + drivers/infiniband/core/device.c | 8 ++------ + 1 file changed, 2 insertions(+), 6 deletions(-) + +diff --git a/drivers/infiniband/core/device.c b/drivers/infiniband/core/device.c +index e70804d8de828..56dd030045a20 100644 +--- a/drivers/infiniband/core/device.c ++++ b/drivers/infiniband/core/device.c +@@ -2166,16 +2166,12 @@ int ib_device_set_netdev(struct ib_device *ib_dev, struct net_device *ndev, + return 0; + } + +- if (old_ndev) +- netdev_tracker_free(ndev, &pdata->netdev_tracker); +- if (ndev) +- netdev_hold(ndev, &pdata->netdev_tracker, GFP_ATOMIC); + rcu_assign_pointer(pdata->netdev, ndev); ++ netdev_put(old_ndev, &pdata->netdev_tracker); ++ netdev_hold(ndev, &pdata->netdev_tracker, GFP_ATOMIC); + spin_unlock_irqrestore(&pdata->netdev_lock, flags); + + add_ndev_hash(pdata); +- __dev_put(old_ndev); +- + return 0; + } + EXPORT_SYMBOL(ib_device_set_netdev); +-- +2.43.0 + diff --git a/queue-6.6/rdma-hns-check-atomic-wr-length.patch b/queue-6.6/rdma-hns-check-atomic-wr-length.patch new file mode 100644 index 00000000000..45d695de49b --- /dev/null +++ b/queue-6.6/rdma-hns-check-atomic-wr-length.patch @@ -0,0 +1,62 @@ +From 7128b5139ff51d4062c5a2ec516109e6fdfaccb8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 10 Jul 2024 21:36:58 +0800 +Subject: RDMA/hns: Check atomic wr length + +From: Junxian Huang + +[ Upstream commit 6afa2c0bfb8ef69f65715ae059e5bd5f9bbaf03b ] + +8 bytes is the only supported length of atomic. Add this check in +set_rc_wqe(). Besides, stop processing WQEs and return from +set_rc_wqe() if there is any error. + +Fixes: 384f88185112 ("RDMA/hns: Add atomic support") +Signed-off-by: Junxian Huang +Link: https://lore.kernel.org/r/20240710133705.896445-2-huangjunxian6@hisilicon.com +Signed-off-by: Leon Romanovsky +Signed-off-by: Sasha Levin +--- + drivers/infiniband/hw/hns/hns_roce_device.h | 2 ++ + drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 9 +++++++-- + 2 files changed, 9 insertions(+), 2 deletions(-) + +diff --git a/drivers/infiniband/hw/hns/hns_roce_device.h b/drivers/infiniband/hw/hns/hns_roce_device.h +index 82066859cc113..b3719579a24b3 100644 +--- a/drivers/infiniband/hw/hns/hns_roce_device.h ++++ b/drivers/infiniband/hw/hns/hns_roce_device.h +@@ -90,6 +90,8 @@ + /* Configure to HW for PAGE_SIZE larger than 4KB */ + #define PG_SHIFT_OFFSET (PAGE_SHIFT - 12) + ++#define ATOMIC_WR_LEN 8 ++ + #define HNS_ROCE_IDX_QUE_ENTRY_SZ 4 + #define SRQ_DB_REG 0x230 + +diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c +index 32fb2c00a8f26..8c90391fd3524 100644 +--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c ++++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c +@@ -595,11 +595,16 @@ static inline int set_rc_wqe(struct hns_roce_qp *qp, + (wr->send_flags & IB_SEND_SIGNALED) ? 1 : 0); + + if (wr->opcode == IB_WR_ATOMIC_CMP_AND_SWP || +- wr->opcode == IB_WR_ATOMIC_FETCH_AND_ADD) ++ wr->opcode == IB_WR_ATOMIC_FETCH_AND_ADD) { ++ if (msg_len != ATOMIC_WR_LEN) ++ return -EINVAL; + set_atomic_seg(wr, rc_sq_wqe, valid_num_sge); +- else if (wr->opcode != IB_WR_REG_MR) ++ } else if (wr->opcode != IB_WR_REG_MR) { + ret = set_rwqe_data_seg(&qp->ibqp, wr, rc_sq_wqe, + &curr_idx, valid_num_sge); ++ if (ret) ++ return ret; ++ } + + /* + * The pipeline can sequentially post all valid WQEs into WQ buffer, +-- +2.43.0 + diff --git a/queue-6.6/rdma-hns-fix-insufficient-extend-db-for-vfs.patch b/queue-6.6/rdma-hns-fix-insufficient-extend-db-for-vfs.patch new file mode 100644 index 00000000000..805f6597767 --- /dev/null +++ b/queue-6.6/rdma-hns-fix-insufficient-extend-db-for-vfs.patch @@ -0,0 +1,50 @@ +From 2e07f23cc2730ac2e8a6297a9bb1ede832d699c1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 10 Jul 2024 21:37:04 +0800 +Subject: RDMA/hns: Fix insufficient extend DB for VFs. + +From: Chengchang Tang + +[ Upstream commit 0b8e658f70ffd5dc7cda3872fd524d657d4796b7 ] + +VFs and its PF will share the memory of the extend DB. Currently, +the number of extend DB allocated by driver is only enough for PF. +This leads to a probability of DB loss and some other problems in +scenarios where both PF and VFs use a large number of QPs. + +Fixes: 6b63597d3540 ("RDMA/hns: Add TSQ link table support") +Signed-off-by: Chengchang Tang +Signed-off-by: Junxian Huang +Link: https://lore.kernel.org/r/20240710133705.896445-8-huangjunxian6@hisilicon.com +Signed-off-by: Leon Romanovsky +Signed-off-by: Sasha Levin +--- + drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c +index 680fe2bdda09d..a49280e2df8ca 100644 +--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c ++++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c +@@ -2448,14 +2448,16 @@ static int set_llm_cfg_to_hw(struct hns_roce_dev *hr_dev, + static struct hns_roce_link_table * + alloc_link_table_buf(struct hns_roce_dev *hr_dev) + { ++ u16 total_sl = hr_dev->caps.sl_num * hr_dev->func_num; + struct hns_roce_v2_priv *priv = hr_dev->priv; + struct hns_roce_link_table *link_tbl; + u32 pg_shift, size, min_size; + + link_tbl = &priv->ext_llm; + pg_shift = hr_dev->caps.llm_buf_pg_sz + PAGE_SHIFT; +- size = hr_dev->caps.num_qps * HNS_ROCE_V2_EXT_LLM_ENTRY_SZ; +- min_size = HNS_ROCE_EXT_LLM_MIN_PAGES(hr_dev->caps.sl_num) << pg_shift; ++ size = hr_dev->caps.num_qps * hr_dev->func_num * ++ HNS_ROCE_V2_EXT_LLM_ENTRY_SZ; ++ min_size = HNS_ROCE_EXT_LLM_MIN_PAGES(total_sl) << pg_shift; + + /* Alloc data table */ + size = max(size, min_size); +-- +2.43.0 + diff --git a/queue-6.6/rdma-hns-fix-missing-pagesize-and-alignment-check-in.patch b/queue-6.6/rdma-hns-fix-missing-pagesize-and-alignment-check-in.patch new file mode 100644 index 00000000000..01e89177289 --- /dev/null +++ b/queue-6.6/rdma-hns-fix-missing-pagesize-and-alignment-check-in.patch @@ -0,0 +1,64 @@ +From 4dcf4c058e7d84ca1711db846bbf85e1c1906e1e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 10 Jul 2024 21:37:01 +0800 +Subject: RDMA/hns: Fix missing pagesize and alignment check in FRMR + +From: Chengchang Tang + +[ Upstream commit d387d4b54eb84208bd4ca13572e106851d0a0819 ] + +The offset requires 128B alignment and the page size ranges from +4K to 128M. + +Fixes: 68a997c5d28c ("RDMA/hns: Add FRMR support for hip08") +Signed-off-by: Chengchang Tang +Signed-off-by: Junxian Huang +Link: https://lore.kernel.org/r/20240710133705.896445-5-huangjunxian6@hisilicon.com +Signed-off-by: Leon Romanovsky +Signed-off-by: Sasha Levin +--- + drivers/infiniband/hw/hns/hns_roce_device.h | 4 ++++ + drivers/infiniband/hw/hns/hns_roce_mr.c | 5 +++++ + 2 files changed, 9 insertions(+) + +diff --git a/drivers/infiniband/hw/hns/hns_roce_device.h b/drivers/infiniband/hw/hns/hns_roce_device.h +index b3719579a24b3..cd593d651e4ca 100644 +--- a/drivers/infiniband/hw/hns/hns_roce_device.h ++++ b/drivers/infiniband/hw/hns/hns_roce_device.h +@@ -82,6 +82,7 @@ + #define MR_TYPE_DMA 0x03 + + #define HNS_ROCE_FRMR_MAX_PA 512 ++#define HNS_ROCE_FRMR_ALIGN_SIZE 128 + + #define PKEY_ID 0xffff + #define NODE_DESC_SIZE 64 +@@ -183,6 +184,9 @@ enum { + #define HNS_HW_PAGE_SHIFT 12 + #define HNS_HW_PAGE_SIZE (1 << HNS_HW_PAGE_SHIFT) + ++#define HNS_HW_MAX_PAGE_SHIFT 27 ++#define HNS_HW_MAX_PAGE_SIZE (1 << HNS_HW_MAX_PAGE_SHIFT) ++ + struct hns_roce_uar { + u64 pfn; + unsigned long index; +diff --git a/drivers/infiniband/hw/hns/hns_roce_mr.c b/drivers/infiniband/hw/hns/hns_roce_mr.c +index 190e62da98e4b..980261969b0c0 100644 +--- a/drivers/infiniband/hw/hns/hns_roce_mr.c ++++ b/drivers/infiniband/hw/hns/hns_roce_mr.c +@@ -423,6 +423,11 @@ int hns_roce_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents, + struct hns_roce_mtr *mtr = &mr->pbl_mtr; + int ret, sg_num = 0; + ++ if (!IS_ALIGNED(*sg_offset, HNS_ROCE_FRMR_ALIGN_SIZE) || ++ ibmr->page_size < HNS_HW_PAGE_SIZE || ++ ibmr->page_size > HNS_HW_MAX_PAGE_SIZE) ++ return sg_num; ++ + mr->npages = 0; + mr->page_list = kvcalloc(mr->pbl_mtr.hem_cfg.buf_pg_count, + sizeof(dma_addr_t), GFP_KERNEL); +-- +2.43.0 + diff --git a/queue-6.6/rdma-hns-fix-shift-out-bounds-when-max_inline_data-i.patch b/queue-6.6/rdma-hns-fix-shift-out-bounds-when-max_inline_data-i.patch new file mode 100644 index 00000000000..e3a2475f5fa --- /dev/null +++ b/queue-6.6/rdma-hns-fix-shift-out-bounds-when-max_inline_data-i.patch @@ -0,0 +1,83 @@ +From 92867dfa3867619d6c2c8216f760c76a83af86a7 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 10 Jul 2024 21:37:02 +0800 +Subject: RDMA/hns: Fix shift-out-bounds when max_inline_data is 0 + +From: Chengchang Tang + +[ Upstream commit 24c6291346d98c7ece4f4bfeb5733bec1d6c7b4f ] + +A shift-out-bounds may occur, if the max_inline_data has not been set. + +The related log: +UBSAN: shift-out-of-bounds in kernel/include/linux/log2.h:57:13 +shift exponent 64 is too large for 64-bit type 'long unsigned int' +Call trace: + dump_backtrace+0xb0/0x118 + show_stack+0x20/0x38 + dump_stack_lvl+0xbc/0x120 + dump_stack+0x1c/0x28 + __ubsan_handle_shift_out_of_bounds+0x104/0x240 + set_ext_sge_param+0x40c/0x420 [hns_roce_hw_v2] + hns_roce_create_qp+0xf48/0x1c40 [hns_roce_hw_v2] + create_qp.part.0+0x294/0x3c0 + ib_create_qp_kernel+0x7c/0x150 + create_mad_qp+0x11c/0x1e0 + ib_mad_init_device+0x834/0xc88 + add_client_context+0x248/0x318 + enable_device_and_get+0x158/0x280 + ib_register_device+0x4ac/0x610 + hns_roce_init+0x890/0xf98 [hns_roce_hw_v2] + __hns_roce_hw_v2_init_instance+0x398/0x720 [hns_roce_hw_v2] + hns_roce_hw_v2_init_instance+0x108/0x1e0 [hns_roce_hw_v2] + hclge_init_roce_client_instance+0x1a0/0x358 [hclge] + hclge_init_client_instance+0xa0/0x508 [hclge] + hnae3_register_client+0x18c/0x210 [hnae3] + hns_roce_hw_v2_init+0x28/0xff8 [hns_roce_hw_v2] + do_one_initcall+0xe0/0x510 + do_init_module+0x110/0x370 + load_module+0x2c6c/0x2f20 + init_module_from_file+0xe0/0x140 + idempotent_init_module+0x24c/0x350 + __arm64_sys_finit_module+0x88/0xf8 + invoke_syscall+0x68/0x1a0 + el0_svc_common.constprop.0+0x11c/0x150 + do_el0_svc+0x38/0x50 + el0_svc+0x50/0xa0 + el0t_64_sync_handler+0xc0/0xc8 + el0t_64_sync+0x1a4/0x1a8 + +Fixes: 0c5e259b06a8 ("RDMA/hns: Fix incorrect sge nums calculation") +Signed-off-by: Chengchang Tang +Signed-off-by: Junxian Huang +Link: https://lore.kernel.org/r/20240710133705.896445-6-huangjunxian6@hisilicon.com +Signed-off-by: Leon Romanovsky +Signed-off-by: Sasha Levin +--- + drivers/infiniband/hw/hns/hns_roce_qp.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/infiniband/hw/hns/hns_roce_qp.c b/drivers/infiniband/hw/hns/hns_roce_qp.c +index 828b58534aa97..bff00b3af41fb 100644 +--- a/drivers/infiniband/hw/hns/hns_roce_qp.c ++++ b/drivers/infiniband/hw/hns/hns_roce_qp.c +@@ -531,13 +531,15 @@ static unsigned int get_sge_num_from_max_inl_data(bool is_ud_or_gsi, + { + unsigned int inline_sge; + +- inline_sge = roundup_pow_of_two(max_inline_data) / HNS_ROCE_SGE_SIZE; ++ if (!max_inline_data) ++ return 0; + + /* + * if max_inline_data less than + * HNS_ROCE_SGE_IN_WQE * HNS_ROCE_SGE_SIZE, + * In addition to ud's mode, no need to extend sge. + */ ++ inline_sge = roundup_pow_of_two(max_inline_data) / HNS_ROCE_SGE_SIZE; + if (!is_ud_or_gsi && inline_sge <= HNS_ROCE_SGE_IN_WQE) + inline_sge = 0; + +-- +2.43.0 + diff --git a/queue-6.6/rdma-hns-fix-undifined-behavior-caused-by-invalid-ma.patch b/queue-6.6/rdma-hns-fix-undifined-behavior-caused-by-invalid-ma.patch new file mode 100644 index 00000000000..13aa755c33e --- /dev/null +++ b/queue-6.6/rdma-hns-fix-undifined-behavior-caused-by-invalid-ma.patch @@ -0,0 +1,38 @@ +From d1991f87a426a370929144ea0e4e758aabd69b7f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 10 Jul 2024 21:37:03 +0800 +Subject: RDMA/hns: Fix undifined behavior caused by invalid max_sge + +From: Chengchang Tang + +[ Upstream commit 36397b907355e2fdb5a25a02a7921a937fd8ef4c ] + +If max_sge has been set to 0, roundup_pow_of_two() in +set_srq_basic_param() may have undefined behavior. + +Fixes: 9dd052474a26 ("RDMA/hns: Allocate one more recv SGE for HIP08") +Signed-off-by: Chengchang Tang +Signed-off-by: Junxian Huang +Link: https://lore.kernel.org/r/20240710133705.896445-7-huangjunxian6@hisilicon.com +Signed-off-by: Leon Romanovsky +Signed-off-by: Sasha Levin +--- + drivers/infiniband/hw/hns/hns_roce_srq.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/infiniband/hw/hns/hns_roce_srq.c b/drivers/infiniband/hw/hns/hns_roce_srq.c +index 6a4923c21cbc6..727f926500712 100644 +--- a/drivers/infiniband/hw/hns/hns_roce_srq.c ++++ b/drivers/infiniband/hw/hns/hns_roce_srq.c +@@ -296,7 +296,7 @@ static int set_srq_basic_param(struct hns_roce_srq *srq, + + max_sge = proc_srq_sge(hr_dev, srq, !!udata); + if (attr->max_wr > hr_dev->caps.max_srq_wrs || +- attr->max_sge > max_sge) { ++ attr->max_sge > max_sge || !attr->max_sge) { + ibdev_err(&hr_dev->ib_dev, + "invalid SRQ attr, depth = %u, sge = %u.\n", + attr->max_wr, attr->max_sge); +-- +2.43.0 + diff --git a/queue-6.6/rdma-hns-fix-unmatch-exception-handling-when-init-eq.patch b/queue-6.6/rdma-hns-fix-unmatch-exception-handling-when-init-eq.patch new file mode 100644 index 00000000000..be0c4d5113d --- /dev/null +++ b/queue-6.6/rdma-hns-fix-unmatch-exception-handling-when-init-eq.patch @@ -0,0 +1,83 @@ +From 7091e696a6d6879079cd000567679306ac0c2eca Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 10 Jul 2024 21:37:00 +0800 +Subject: RDMA/hns: Fix unmatch exception handling when init eq table fails + +From: Junxian Huang + +[ Upstream commit 543fb987bd63ed27409b5dea3d3eec27b9c1eac9 ] + +The hw ctx should be destroyed when init eq table fails. + +Fixes: a5073d6054f7 ("RDMA/hns: Add eq support of hip08") +Signed-off-by: Junxian Huang +Link: https://lore.kernel.org/r/20240710133705.896445-4-huangjunxian6@hisilicon.com +Signed-off-by: Leon Romanovsky +Signed-off-by: Sasha Levin +--- + drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 25 +++++++++++----------- + 1 file changed, 13 insertions(+), 12 deletions(-) + +diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c +index 8c90391fd3524..680fe2bdda09d 100644 +--- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c ++++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c +@@ -6261,9 +6261,16 @@ static void hns_roce_v2_int_mask_enable(struct hns_roce_dev *hr_dev, + roce_write(hr_dev, ROCEE_VF_ABN_INT_CFG_REG, enable_flag); + } + +-static void hns_roce_v2_destroy_eqc(struct hns_roce_dev *hr_dev, u32 eqn) ++static void free_eq_buf(struct hns_roce_dev *hr_dev, struct hns_roce_eq *eq) ++{ ++ hns_roce_mtr_destroy(hr_dev, &eq->mtr); ++} ++ ++static void hns_roce_v2_destroy_eqc(struct hns_roce_dev *hr_dev, ++ struct hns_roce_eq *eq) + { + struct device *dev = hr_dev->dev; ++ int eqn = eq->eqn; + int ret; + u8 cmd; + +@@ -6274,12 +6281,9 @@ static void hns_roce_v2_destroy_eqc(struct hns_roce_dev *hr_dev, u32 eqn) + + ret = hns_roce_destroy_hw_ctx(hr_dev, cmd, eqn & HNS_ROCE_V2_EQN_M); + if (ret) +- dev_err(dev, "[mailbox cmd] destroy eqc(%u) failed.\n", eqn); +-} ++ dev_err(dev, "[mailbox cmd] destroy eqc(%d) failed.\n", eqn); + +-static void free_eq_buf(struct hns_roce_dev *hr_dev, struct hns_roce_eq *eq) +-{ +- hns_roce_mtr_destroy(hr_dev, &eq->mtr); ++ free_eq_buf(hr_dev, eq); + } + + static void init_eq_config(struct hns_roce_dev *hr_dev, struct hns_roce_eq *eq) +@@ -6585,7 +6589,7 @@ static int hns_roce_v2_init_eq_table(struct hns_roce_dev *hr_dev) + + err_create_eq_fail: + for (i -= 1; i >= 0; i--) +- free_eq_buf(hr_dev, &eq_table->eq[i]); ++ hns_roce_v2_destroy_eqc(hr_dev, &eq_table->eq[i]); + kfree(eq_table->eq); + + return ret; +@@ -6605,11 +6609,8 @@ static void hns_roce_v2_cleanup_eq_table(struct hns_roce_dev *hr_dev) + __hns_roce_free_irq(hr_dev); + destroy_workqueue(hr_dev->irq_workq); + +- for (i = 0; i < eq_num; i++) { +- hns_roce_v2_destroy_eqc(hr_dev, i); +- +- free_eq_buf(hr_dev, &eq_table->eq[i]); +- } ++ for (i = 0; i < eq_num; i++) ++ hns_roce_v2_destroy_eqc(hr_dev, &eq_table->eq[i]); + + kfree(eq_table->eq); + } +-- +2.43.0 + diff --git a/queue-6.6/rdma-mlx4-fix-truncated-output-warning-in-alias_guid.patch b/queue-6.6/rdma-mlx4-fix-truncated-output-warning-in-alias_guid.patch new file mode 100644 index 00000000000..9f6c124cfd8 --- /dev/null +++ b/queue-6.6/rdma-mlx4-fix-truncated-output-warning-in-alias_guid.patch @@ -0,0 +1,52 @@ +From 84c2afe716b5beb4d668da70874f255daa4dcc35 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 16 Jun 2024 19:17:30 +0300 +Subject: RDMA/mlx4: Fix truncated output warning in alias_GUID.c +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Leon Romanovsky + +[ Upstream commit 5953e0647cec703ef436ead37fed48943507b433 ] + +drivers/infiniband/hw/mlx4/alias_GUID.c: In function ‘mlx4_ib_init_alias_guid_service’: +drivers/infiniband/hw/mlx4/alias_GUID.c:878:74: error: ‘%d’ directive +output may be truncated writing between 1 and 11 bytes into a region of +size 5 [-Werror=format-truncation=] + 878 | snprintf(alias_wq_name, sizeof alias_wq_name, "alias_guid%d", i); + | ^~ +drivers/infiniband/hw/mlx4/alias_GUID.c:878:63: note: directive argument in the range [-2147483641, 2147483646] + 878 | snprintf(alias_wq_name, sizeof alias_wq_name, "alias_guid%d", i); + | ^~~~~~~~~~~~~~ +drivers/infiniband/hw/mlx4/alias_GUID.c:878:17: note: ‘snprintf’ output +between 12 and 22 bytes into a destination of size 15 + 878 | snprintf(alias_wq_name, sizeof alias_wq_name, "alias_guid%d", i); + | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +cc1: all warnings being treated as errors + +Fixes: a0c64a17aba8 ("mlx4: Add alias_guid mechanism") +Link: https://lore.kernel.org/r/1951c9500109ca7e36dcd523f8a5f2d0d2a608d1.1718554641.git.leon@kernel.org +Signed-off-by: Leon Romanovsky +Signed-off-by: Jason Gunthorpe +Signed-off-by: Sasha Levin +--- + drivers/infiniband/hw/mlx4/alias_GUID.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/infiniband/hw/mlx4/alias_GUID.c b/drivers/infiniband/hw/mlx4/alias_GUID.c +index 111fa88a3be44..9a439569ffcf3 100644 +--- a/drivers/infiniband/hw/mlx4/alias_GUID.c ++++ b/drivers/infiniband/hw/mlx4/alias_GUID.c +@@ -829,7 +829,7 @@ void mlx4_ib_destroy_alias_guid_service(struct mlx4_ib_dev *dev) + + int mlx4_ib_init_alias_guid_service(struct mlx4_ib_dev *dev) + { +- char alias_wq_name[15]; ++ char alias_wq_name[22]; + int ret = 0; + int i, j; + union ib_gid gid; +-- +2.43.0 + diff --git a/queue-6.6/rdma-mlx4-fix-truncated-output-warning-in-mad.c.patch b/queue-6.6/rdma-mlx4-fix-truncated-output-warning-in-mad.c.patch new file mode 100644 index 00000000000..483e487f7e5 --- /dev/null +++ b/queue-6.6/rdma-mlx4-fix-truncated-output-warning-in-mad.c.patch @@ -0,0 +1,82 @@ +From 6cf005fdf34a1b2d8c281927db96d46073ffd682 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 16 Jun 2024 19:16:33 +0300 +Subject: RDMA/mlx4: Fix truncated output warning in mad.c +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Leon Romanovsky + +[ Upstream commit 0d2e6992fc956e3308cd5376c18567def4cb3967 ] + +Increase size of the name array to avoid truncated output warning. + +drivers/infiniband/hw/mlx4/mad.c: In function ‘mlx4_ib_alloc_demux_ctx’: +drivers/infiniband/hw/mlx4/mad.c:2197:47: error: ‘%d’ directive output +may be truncated writing between 1 and 11 bytes into a region of size 4 +[-Werror=format-truncation=] + 2197 | snprintf(name, sizeof(name), "mlx4_ibt%d", port); + | ^~ +drivers/infiniband/hw/mlx4/mad.c:2197:38: note: directive argument in +the range [-2147483645, 2147483647] + 2197 | snprintf(name, sizeof(name), "mlx4_ibt%d", port); + | ^~~~~~~~~~~~ +drivers/infiniband/hw/mlx4/mad.c:2197:9: note: ‘snprintf’ output between +10 and 20 bytes into a destination of size 12 + 2197 | snprintf(name, sizeof(name), "mlx4_ibt%d", port); + | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +drivers/infiniband/hw/mlx4/mad.c:2205:48: error: ‘%d’ directive output +may be truncated writing between 1 and 11 bytes into a region of size 3 +[-Werror=format-truncation=] + 2205 | snprintf(name, sizeof(name), "mlx4_ibwi%d", port); + | ^~ +drivers/infiniband/hw/mlx4/mad.c:2205:38: note: directive argument in +the range [-2147483645, 2147483647] + 2205 | snprintf(name, sizeof(name), "mlx4_ibwi%d", port); + | ^~~~~~~~~~~~~ +drivers/infiniband/hw/mlx4/mad.c:2205:9: note: ‘snprintf’ output between +11 and 21 bytes into a destination of size 12 + 2205 | snprintf(name, sizeof(name), "mlx4_ibwi%d", port); + | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +drivers/infiniband/hw/mlx4/mad.c:2213:48: error: ‘%d’ directive output +may be truncated writing between 1 and 11 bytes into a region of size 3 +[-Werror=format-truncation=] + 2213 | snprintf(name, sizeof(name), "mlx4_ibud%d", port); + | ^~ +drivers/infiniband/hw/mlx4/mad.c:2213:38: note: directive argument in +the range [-2147483645, 2147483647] + 2213 | snprintf(name, sizeof(name), "mlx4_ibud%d", port); + | ^~~~~~~~~~~~~ +drivers/infiniband/hw/mlx4/mad.c:2213:9: note: ‘snprintf’ output between +11 and 21 bytes into a destination of size 12 + 2213 | snprintf(name, sizeof(name), "mlx4_ibud%d", port); + | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +cc1: all warnings being treated as errors +make[6]: *** [scripts/Makefile.build:244: drivers/infiniband/hw/mlx4/mad.o] Error 1 + +Fixes: fc06573dfaf8 ("IB/mlx4: Initialize SR-IOV IB support for slaves in master context") +Link: https://lore.kernel.org/r/f3798b3ce9a410257d7e1ec7c9e285f1352e256a.1718554569.git.leon@kernel.org +Signed-off-by: Leon Romanovsky +Signed-off-by: Jason Gunthorpe +Signed-off-by: Sasha Levin +--- + drivers/infiniband/hw/mlx4/mad.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/infiniband/hw/mlx4/mad.c b/drivers/infiniband/hw/mlx4/mad.c +index a37cfac5e23f9..dc9cf45d2d320 100644 +--- a/drivers/infiniband/hw/mlx4/mad.c ++++ b/drivers/infiniband/hw/mlx4/mad.c +@@ -2158,7 +2158,7 @@ static int mlx4_ib_alloc_demux_ctx(struct mlx4_ib_dev *dev, + struct mlx4_ib_demux_ctx *ctx, + int port) + { +- char name[12]; ++ char name[21]; + int ret = 0; + int i; + +-- +2.43.0 + diff --git a/queue-6.6/rdma-mlx5-set-mkeys-for-dmabuf-at-page_size.patch b/queue-6.6/rdma-mlx5-set-mkeys-for-dmabuf-at-page_size.patch new file mode 100644 index 00000000000..3ab2b51f7c5 --- /dev/null +++ b/queue-6.6/rdma-mlx5-set-mkeys-for-dmabuf-at-page_size.patch @@ -0,0 +1,70 @@ +From fa28b629eeab6f87840aa3db3d650446c5fddfa2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 13 Jun 2024 21:01:42 +0300 +Subject: RDMA/mlx5: Set mkeys for dmabuf at PAGE_SIZE + +From: Chiara Meiohas + +[ Upstream commit a4e540119be565f47c305f295ed43f8e0bc3f5c3 ] + +Set the mkey for dmabuf at PAGE_SIZE to support any SGL +after a move operation. + +ib_umem_find_best_pgsz returns 0 on error, so it is +incorrect to check the returned page_size against PAGE_SIZE + +Fixes: 90da7dc8206a ("RDMA/mlx5: Support dma-buf based userspace memory region") +Signed-off-by: Chiara Meiohas +Reviewed-by: Michael Guralnik +Link: https://lore.kernel.org/r/1e2289b9133e89f273a4e68d459057d032cbc2ce.1718301631.git.leon@kernel.org +Signed-off-by: Leon Romanovsky +Signed-off-by: Sasha Levin +--- + drivers/infiniband/hw/mlx5/mlx5_ib.h | 13 +++++++++++++ + drivers/infiniband/hw/mlx5/odp.c | 6 ++---- + 2 files changed, 15 insertions(+), 4 deletions(-) + +diff --git a/drivers/infiniband/hw/mlx5/mlx5_ib.h b/drivers/infiniband/hw/mlx5/mlx5_ib.h +index 6a57af8fa231b..43a963e205eb4 100644 +--- a/drivers/infiniband/hw/mlx5/mlx5_ib.h ++++ b/drivers/infiniband/hw/mlx5/mlx5_ib.h +@@ -115,6 +115,19 @@ unsigned long __mlx5_umem_find_best_quantized_pgoff( + __mlx5_bit_sz(typ, page_offset_fld), 0, scale, \ + page_offset_quantized) + ++static inline unsigned long ++mlx5_umem_dmabuf_find_best_pgsz(struct ib_umem_dmabuf *umem_dmabuf) ++{ ++ /* ++ * mkeys used for dmabuf are fixed at PAGE_SIZE because we must be able ++ * to hold any sgl after a move operation. Ideally the mkc page size ++ * could be changed at runtime to be optimal, but right now the driver ++ * cannot do that. ++ */ ++ return ib_umem_find_best_pgsz(&umem_dmabuf->umem, PAGE_SIZE, ++ umem_dmabuf->umem.iova); ++} ++ + enum { + MLX5_IB_MMAP_OFFSET_START = 9, + MLX5_IB_MMAP_OFFSET_END = 255, +diff --git a/drivers/infiniband/hw/mlx5/odp.c b/drivers/infiniband/hw/mlx5/odp.c +index 4a04cbc5b78a4..a524181f34df9 100644 +--- a/drivers/infiniband/hw/mlx5/odp.c ++++ b/drivers/infiniband/hw/mlx5/odp.c +@@ -705,10 +705,8 @@ static int pagefault_dmabuf_mr(struct mlx5_ib_mr *mr, size_t bcnt, + return err; + } + +- page_size = mlx5_umem_find_best_pgsz(&umem_dmabuf->umem, mkc, +- log_page_size, 0, +- umem_dmabuf->umem.iova); +- if (unlikely(page_size < PAGE_SIZE)) { ++ page_size = mlx5_umem_dmabuf_find_best_pgsz(umem_dmabuf); ++ if (!page_size) { + ib_umem_dmabuf_unmap_pages(umem_dmabuf); + err = -EINVAL; + } else { +-- +2.43.0 + diff --git a/queue-6.6/rdma-mlx5-use-sq-timestamp-as-qp-timestamp-when-roce.patch b/queue-6.6/rdma-mlx5-use-sq-timestamp-as-qp-timestamp-when-roce.patch new file mode 100644 index 00000000000..362ad3ece51 --- /dev/null +++ b/queue-6.6/rdma-mlx5-use-sq-timestamp-as-qp-timestamp-when-roce.patch @@ -0,0 +1,62 @@ +From fa82647de2b90422e05e63422314a440e174e420 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sun, 16 Jun 2024 19:10:36 +0300 +Subject: RDMA/mlx5: Use sq timestamp as QP timestamp when RoCE is disabled + +From: Or Har-Toov + +[ Upstream commit 0c5275bf75ec3708d95654195ae4ed80d946d088 ] + +When creating a QP, one of the attributes is TS format (timestamp). +In some devices, we have a limitation that all QPs should have the same +ts_format. The ts_format is chosen based on the device's capability. +The qp_ts_format cap resides under the RoCE caps table, and the +cap will be 0 when RoCE is disabled. So when RoCE is disabled, the +value that should be queried is sq_ts_format under HCA caps. + +Consider the case when the system supports REAL_TIME_TS format (0x2), +some QPs are created with REAL_TIME_TS as ts_format, and afterwards +RoCE gets disabled. When trying to construct a new QP, we can't use +the qp_ts_format, that is queried from the RoCE caps table, Since it +leads to passing 0x0 (FREE_RUNNING_TS) as the value of the qp_ts_format, +which is different than the ts_format of the previously allocated +QPs REAL_TIME_TS format (0x2). + +Thus, to resolve this, read the sq_ts_format, which also reflect +the supported ts format for the QP when RoCE is disabled. + +Fixes: 4806f1e2fee8 ("net/mlx5: Set QP timestamp mode to default") +Signed-off-by: Maher Sanalla +Signed-off-by: Or Har-Toov +Link: https://lore.kernel.org/r/32801966eb767c7fd62b8dea3b63991d5fbfe213.1718554199.git.leon@kernel.org +Reviewed-by: Simon Horman +Signed-off-by: Leon Romanovsky +Signed-off-by: Jason Gunthorpe +Signed-off-by: Sasha Levin +--- + include/linux/mlx5/qp.h | 9 ++++++--- + 1 file changed, 6 insertions(+), 3 deletions(-) + +diff --git a/include/linux/mlx5/qp.h b/include/linux/mlx5/qp.h +index f0e55bf3ec8b5..ad1ce650146cb 100644 +--- a/include/linux/mlx5/qp.h ++++ b/include/linux/mlx5/qp.h +@@ -576,9 +576,12 @@ static inline const char *mlx5_qp_state_str(int state) + + static inline int mlx5_get_qp_default_ts(struct mlx5_core_dev *dev) + { +- return !MLX5_CAP_ROCE(dev, qp_ts_format) ? +- MLX5_TIMESTAMP_FORMAT_FREE_RUNNING : +- MLX5_TIMESTAMP_FORMAT_DEFAULT; ++ u8 supported_ts_cap = mlx5_get_roce_state(dev) ? ++ MLX5_CAP_ROCE(dev, qp_ts_format) : ++ MLX5_CAP_GEN(dev, sq_ts_format); ++ ++ return supported_ts_cap ? MLX5_TIMESTAMP_FORMAT_DEFAULT : ++ MLX5_TIMESTAMP_FORMAT_FREE_RUNNING; + } + + #endif /* MLX5_QP_H */ +-- +2.43.0 + diff --git a/queue-6.6/rdma-rxe-don-t-set-bth_ack_mask-for-uc-or-ud-qps.patch b/queue-6.6/rdma-rxe-don-t-set-bth_ack_mask-for-uc-or-ud-qps.patch new file mode 100644 index 00000000000..1c0edfef9b6 --- /dev/null +++ b/queue-6.6/rdma-rxe-don-t-set-bth_ack_mask-for-uc-or-ud-qps.patch @@ -0,0 +1,53 @@ +From 05086153ca71fe3cf10ec72aeb3cda2700a398ab Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 24 Jun 2024 10:03:48 +0800 +Subject: RDMA/rxe: Don't set BTH_ACK_MASK for UC or UD QPs + +From: Honggang LI + +[ Upstream commit 4adcaf969d77d3d3aa3871bbadc196258a38aec6 ] + +BTH_ACK_MASK bit is used to indicate that an acknowledge +(for this packet) should be scheduled by the responder. +Both UC and UD QPs are unacknowledged, so don't set +BTH_ACK_MASK for UC or UD QPs. + +Fixes: 8700e3e7c485 ("Soft RoCE driver") +Signed-off-by: Honggang LI +Link: https://lore.kernel.org/r/20240624020348.494338-1-honggangli@163.com +Reviewed-by: Zhu Yanjun +Signed-off-by: Leon Romanovsky +Signed-off-by: Jason Gunthorpe +Signed-off-by: Sasha Levin +--- + drivers/infiniband/sw/rxe/rxe_req.c | 7 ++++--- + 1 file changed, 4 insertions(+), 3 deletions(-) + +diff --git a/drivers/infiniband/sw/rxe/rxe_req.c b/drivers/infiniband/sw/rxe/rxe_req.c +index d8c41fd626a94..7a36080d2baef 100644 +--- a/drivers/infiniband/sw/rxe/rxe_req.c ++++ b/drivers/infiniband/sw/rxe/rxe_req.c +@@ -424,7 +424,7 @@ static struct sk_buff *init_req_packet(struct rxe_qp *qp, + int paylen; + int solicited; + u32 qp_num; +- int ack_req; ++ int ack_req = 0; + + /* length from start of bth to end of icrc */ + paylen = rxe_opcode[opcode].length + payload + pad + RXE_ICRC_SIZE; +@@ -445,8 +445,9 @@ static struct sk_buff *init_req_packet(struct rxe_qp *qp, + qp_num = (pkt->mask & RXE_DETH_MASK) ? ibwr->wr.ud.remote_qpn : + qp->attr.dest_qp_num; + +- ack_req = ((pkt->mask & RXE_END_MASK) || +- (qp->req.noack_pkts++ > RXE_MAX_PKT_PER_ACK)); ++ if (qp_type(qp) != IB_QPT_UD && qp_type(qp) != IB_QPT_UC) ++ ack_req = ((pkt->mask & RXE_END_MASK) || ++ (qp->req.noack_pkts++ > RXE_MAX_PKT_PER_ACK)); + if (ack_req) + qp->req.noack_pkts = 0; + +-- +2.43.0 + diff --git a/queue-6.6/revert-leds-led-core-fix-refcount-leak-in-of_led_get.patch b/queue-6.6/revert-leds-led-core-fix-refcount-leak-in-of_led_get.patch new file mode 100644 index 00000000000..44d67e29ec6 --- /dev/null +++ b/queue-6.6/revert-leds-led-core-fix-refcount-leak-in-of_led_get.patch @@ -0,0 +1,84 @@ +From e98af6d112896e961079173fc22c393561e760ad Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 Jun 2024 10:34:38 +0200 +Subject: Revert "leds: led-core: Fix refcount leak in of_led_get()" +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Luca Ceresoli + +[ Upstream commit 940b27161afc6ec53fc66245a4fb3518394cdc92 ] + +This reverts commit da1afe8e6099980fe1e2fd7436dca284af9d3f29. + +Commit 699a8c7c4bd3 ("leds: Add of_led_get() and led_put()"), introduced in +5.5, added of_led_get() and led_put() but missed a put_device() in +led_put(), thus creating a leak in case the consumer device is removed. + +Arguably device removal was not very popular, so this went apparently +unnoticed until 2022. In January 2023 two different patches got merged to +fix the same bug: + + - commit da1afe8e6099 ("leds: led-core: Fix refcount leak in of_led_get()") + - commit 445110941eb9 ("leds: led-class: Add missing put_device() to led_put()") + +They fix the bug in two different ways, which creates no patch conflicts, +and both were merged in v6.2. The result is that now there is one more +put_device() than get_device()s, instead of one less. + +Arguably device removal is not very popular yet, so this apparently hasn't +been noticed as well up to now. But it blew up here while I'm working with +device tree overlay insertion and removal. The symptom is an apparently +unrelated list of oopses on device removal, with reasons: + + kernfs: can not remove 'uevent', no directory + kernfs: can not remove 'brightness', no directory + kernfs: can not remove 'max_brightness', no directory + ... + +Here sysfs fails removing attribute files, which is because the device name +changed and so the sysfs path. This is because the device name string got +corrupted, which is because it got freed too early and its memory reused. + +Different symptoms could appear in different use cases. + +Fix by removing one of the two fixes. + +The choice was to remove commit da1afe8e6099 because: + + * it is calling put_device() inside of_led_get() just after getting the + device, thus it is basically not refcounting the LED device at all + during its entire lifetime + * it does not add a corresponding put_device() in led_get(), so it fixes + only the OF case + +The other fix (445110941eb9) is adding the put_device() in led_put() so it +covers the entire lifetime, and it works even in the non-DT case. + +Fixes: da1afe8e6099 ("leds: led-core: Fix refcount leak in of_led_get()") +Co-developed-by: Hervé Codina +Signed-off-by: Hervé Codina +Signed-off-by: Luca Ceresoli +Link: https://lore.kernel.org/r/20240625-led-class-device-leak-v2-1-75fdccf47421@bootlin.com +Signed-off-by: Lee Jones +Signed-off-by: Sasha Levin +--- + drivers/leds/led-class.c | 1 - + 1 file changed, 1 deletion(-) + +diff --git a/drivers/leds/led-class.c b/drivers/leds/led-class.c +index ba1be15cfd8ea..c66d1bead0a4a 100644 +--- a/drivers/leds/led-class.c ++++ b/drivers/leds/led-class.c +@@ -258,7 +258,6 @@ struct led_classdev *of_led_get(struct device_node *np, int index) + + led_dev = class_find_device_by_of_node(&leds_class, led_node); + of_node_put(led_node); +- put_device(led_dev); + + return led_module_get(led_dev); + } +-- +2.43.0 + diff --git a/queue-6.6/rtc-interface-add-rtc-offset-to-alarm-after-fix-up.patch b/queue-6.6/rtc-interface-add-rtc-offset-to-alarm-after-fix-up.patch new file mode 100644 index 00000000000..2b5831d9651 --- /dev/null +++ b/queue-6.6/rtc-interface-add-rtc-offset-to-alarm-after-fix-up.patch @@ -0,0 +1,60 @@ +From c792e0b9505ae16563b6427fc52585e622487352 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 19 Jun 2024 16:04:52 +0200 +Subject: rtc: interface: Add RTC offset to alarm after fix-up +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Csókás, Bence + +[ Upstream commit 463927a8902a9f22c3633960119410f57d4c8920 ] + +`rtc_add_offset()` is called by `__rtc_read_time()` +and `__rtc_read_alarm()` to add the RTC's offset to +the raw read-outs from the device drivers. However, +in the latter case, a fix-up algorithm is run if +the RTC device does not report a full `struct rtc_time` +alarm value. In that case, the offset was forgot to be +added. + +Fixes: fd6792bb022e ("rtc: fix alarm read and set offset") + +Signed-off-by: Csókás, Bence +Link: https://lore.kernel.org/r/20240619140451.2800578-1-csokas.bence@prolan.hu +Signed-off-by: Alexandre Belloni +Signed-off-by: Sasha Levin +--- + drivers/rtc/interface.c | 9 +++++---- + 1 file changed, 5 insertions(+), 4 deletions(-) + +diff --git a/drivers/rtc/interface.c b/drivers/rtc/interface.c +index 1b63111cdda2e..0b23706d9fd3c 100644 +--- a/drivers/rtc/interface.c ++++ b/drivers/rtc/interface.c +@@ -274,10 +274,9 @@ int __rtc_read_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm) + return err; + + /* full-function RTCs won't have such missing fields */ +- if (rtc_valid_tm(&alarm->time) == 0) { +- rtc_add_offset(rtc, &alarm->time); +- return 0; +- } ++ err = rtc_valid_tm(&alarm->time); ++ if (!err) ++ goto done; + + /* get the "after" timestamp, to detect wrapped fields */ + err = rtc_read_time(rtc, &now); +@@ -379,6 +378,8 @@ int __rtc_read_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm) + if (err && alarm->enabled) + dev_warn(&rtc->dev, "invalid alarm value: %ptR\n", + &alarm->time); ++ else ++ rtc_add_offset(rtc, &alarm->time); + + return err; + } +-- +2.43.0 + diff --git a/queue-6.6/s390-dasd-fix-error-checks-in-dasd_copy_pair_store.patch b/queue-6.6/s390-dasd-fix-error-checks-in-dasd_copy_pair_store.patch new file mode 100644 index 00000000000..b7cb52b6ac2 --- /dev/null +++ b/queue-6.6/s390-dasd-fix-error-checks-in-dasd_copy_pair_store.patch @@ -0,0 +1,57 @@ +From 8171315fd1d8e164c60f62786d607b7cbd4dfb51 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 15 Jul 2024 13:24:34 +0200 +Subject: s390/dasd: fix error checks in dasd_copy_pair_store() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Carlos López + +[ Upstream commit 8e64d2356cbc800b4cd0e3e614797f76bcf0cdb8 ] + +dasd_add_busid() can return an error via ERR_PTR() if an allocation +fails. However, two callsites in dasd_copy_pair_store() do not check +the result, potentially resulting in a NULL pointer dereference. Fix +this by checking the result with IS_ERR() and returning the error up +the stack. + +Fixes: a91ff09d39f9b ("s390/dasd: add copy pair setup") +Signed-off-by: Carlos López +Signed-off-by: Stefan Haberland +Link: https://lore.kernel.org/r/20240715112434.2111291-3-sth@linux.ibm.com +Signed-off-by: Jens Axboe +Signed-off-by: Sasha Levin +--- + drivers/s390/block/dasd_devmap.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +diff --git a/drivers/s390/block/dasd_devmap.c b/drivers/s390/block/dasd_devmap.c +index c4e36650c4264..91522dba9fd98 100644 +--- a/drivers/s390/block/dasd_devmap.c ++++ b/drivers/s390/block/dasd_devmap.c +@@ -2258,13 +2258,19 @@ static ssize_t dasd_copy_pair_store(struct device *dev, + + /* allocate primary devmap if needed */ + prim_devmap = dasd_find_busid(prim_busid); +- if (IS_ERR(prim_devmap)) ++ if (IS_ERR(prim_devmap)) { + prim_devmap = dasd_add_busid(prim_busid, DASD_FEATURE_DEFAULT); ++ if (IS_ERR(prim_devmap)) ++ return PTR_ERR(prim_devmap); ++ } + + /* allocate secondary devmap if needed */ + sec_devmap = dasd_find_busid(sec_busid); +- if (IS_ERR(sec_devmap)) ++ if (IS_ERR(sec_devmap)) { + sec_devmap = dasd_add_busid(sec_busid, DASD_FEATURE_DEFAULT); ++ if (IS_ERR(sec_devmap)) ++ return PTR_ERR(sec_devmap); ++ } + + /* setting copy relation is only allowed for offline secondary */ + if (sec_devmap->device) +-- +2.43.0 + diff --git a/queue-6.6/s390-mm-convert-gmap_make_secure-to-use-a-folio.patch b/queue-6.6/s390-mm-convert-gmap_make_secure-to-use-a-folio.patch new file mode 100644 index 00000000000..484c1f6f8cb --- /dev/null +++ b/queue-6.6/s390-mm-convert-gmap_make_secure-to-use-a-folio.patch @@ -0,0 +1,102 @@ +From d3439afe4bf27dc10fb9d6720eb137c8b149c376 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 22 Mar 2024 16:11:47 +0000 +Subject: s390/mm: Convert gmap_make_secure to use a folio + +From: Matthew Wilcox (Oracle) + +[ Upstream commit d35c34bb32f2cc4ec0b52e91ad7a8fcab55d7856 ] + +Remove uses of deprecated page APIs, and move the check for large +folios to here to avoid taking the folio lock if the folio is too large. +We could do better here by attempting to split the large folio, but I'll +leave that improvement for someone who can test it. + +Acked-by: Claudio Imbrenda +Signed-off-by: Matthew Wilcox (Oracle) +Link: https://lore.kernel.org/r/20240322161149.2327518-3-willy@infradead.org +Signed-off-by: Alexander Gordeev +Stable-dep-of: 3f29f6537f54 ("s390/uv: Don't call folio_wait_writeback() without a folio reference") +Signed-off-by: Sasha Levin +--- + arch/s390/kernel/uv.c | 27 ++++++++++++++------------- + 1 file changed, 14 insertions(+), 13 deletions(-) + +diff --git a/arch/s390/kernel/uv.c b/arch/s390/kernel/uv.c +index 0634448698b03..2aed5af7c4e52 100644 +--- a/arch/s390/kernel/uv.c ++++ b/arch/s390/kernel/uv.c +@@ -201,13 +201,10 @@ static int expected_folio_refs(struct folio *folio) + return res; + } + +-static int make_page_secure(struct page *page, struct uv_cb_header *uvcb) ++static int make_folio_secure(struct folio *folio, struct uv_cb_header *uvcb) + { +- struct folio *folio = page_folio(page); + int expected, cc = 0; + +- if (folio_test_large(folio)) +- return -EINVAL; + if (folio_test_writeback(folio)) + return -EAGAIN; + expected = expected_folio_refs(folio); +@@ -280,7 +277,7 @@ int gmap_make_secure(struct gmap *gmap, unsigned long gaddr, void *uvcb) + bool local_drain = false; + spinlock_t *ptelock; + unsigned long uaddr; +- struct page *page; ++ struct folio *folio; + pte_t *ptep; + int rc; + +@@ -309,15 +306,19 @@ int gmap_make_secure(struct gmap *gmap, unsigned long gaddr, void *uvcb) + if (!ptep) + goto out; + if (pte_present(*ptep) && !(pte_val(*ptep) & _PAGE_INVALID) && pte_write(*ptep)) { +- page = pte_page(*ptep); ++ folio = page_folio(pte_page(*ptep)); ++ rc = -EINVAL; ++ if (folio_test_large(folio)) ++ goto unlock; + rc = -EAGAIN; +- if (trylock_page(page)) { ++ if (folio_trylock(folio)) { + if (should_export_before_import(uvcb, gmap->mm)) +- uv_convert_from_secure(page_to_phys(page)); +- rc = make_page_secure(page, uvcb); +- unlock_page(page); ++ uv_convert_from_secure(PFN_PHYS(folio_pfn(folio))); ++ rc = make_folio_secure(folio, uvcb); ++ folio_unlock(folio); + } + } ++unlock: + pte_unmap_unlock(ptep, ptelock); + out: + mmap_read_unlock(gmap->mm); +@@ -327,10 +328,10 @@ int gmap_make_secure(struct gmap *gmap, unsigned long gaddr, void *uvcb) + * If we are here because the UVC returned busy or partial + * completion, this is just a useless check, but it is safe. + */ +- wait_on_page_writeback(page); ++ folio_wait_writeback(folio); + } else if (rc == -EBUSY) { + /* +- * If we have tried a local drain and the page refcount ++ * If we have tried a local drain and the folio refcount + * still does not match our expected safe value, try with a + * system wide drain. This is needed if the pagevecs holding + * the page are on a different CPU. +@@ -341,7 +342,7 @@ int gmap_make_secure(struct gmap *gmap, unsigned long gaddr, void *uvcb) + return -EAGAIN; + } + /* +- * We are here if the page refcount does not match the ++ * We are here if the folio refcount does not match the + * expected safe value. The main culprits are usually + * pagevecs. With lru_add_drain() we drain the pagevecs + * on the local CPU so that hopefully the refcount will +-- +2.43.0 + diff --git a/queue-6.6/s390-mm-convert-make_page_secure-to-use-a-folio.patch b/queue-6.6/s390-mm-convert-make_page_secure-to-use-a-folio.patch new file mode 100644 index 00000000000..73f1921cbc9 --- /dev/null +++ b/queue-6.6/s390-mm-convert-make_page_secure-to-use-a-folio.patch @@ -0,0 +1,93 @@ +From 6fd47aaf94aa05cbf2933c28ea73a2fbd004b84d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 22 Mar 2024 16:11:46 +0000 +Subject: s390/mm: Convert make_page_secure to use a folio + +From: Matthew Wilcox (Oracle) + +[ Upstream commit 259e660d91d0e7261ae0ee37bb37266d6006a546 ] + +These page APIs are deprecated, so convert the incoming page to a folio +and use the folio APIs instead. The ultravisor API cannot handle large +folios, so return -EINVAL if one has slipped through. + +Acked-by: Claudio Imbrenda +Signed-off-by: Matthew Wilcox (Oracle) +Link: https://lore.kernel.org/r/20240322161149.2327518-2-willy@infradead.org +Signed-off-by: Alexander Gordeev +Stable-dep-of: 3f29f6537f54 ("s390/uv: Don't call folio_wait_writeback() without a folio reference") +Signed-off-by: Sasha Levin +--- + arch/s390/kernel/uv.c | 29 ++++++++++++++++------------- + 1 file changed, 16 insertions(+), 13 deletions(-) + +diff --git a/arch/s390/kernel/uv.c b/arch/s390/kernel/uv.c +index fc07bc39e6983..0634448698b03 100644 +--- a/arch/s390/kernel/uv.c ++++ b/arch/s390/kernel/uv.c +@@ -181,21 +181,21 @@ int uv_convert_owned_from_secure(unsigned long paddr) + } + + /* +- * Calculate the expected ref_count for a page that would otherwise have no ++ * Calculate the expected ref_count for a folio that would otherwise have no + * further pins. This was cribbed from similar functions in other places in + * the kernel, but with some slight modifications. We know that a secure +- * page can not be a huge page for example. ++ * folio can not be a large folio, for example. + */ +-static int expected_page_refs(struct page *page) ++static int expected_folio_refs(struct folio *folio) + { + int res; + +- res = page_mapcount(page); +- if (PageSwapCache(page)) { ++ res = folio_mapcount(folio); ++ if (folio_test_swapcache(folio)) { + res++; +- } else if (page_mapping(page)) { ++ } else if (folio_mapping(folio)) { + res++; +- if (page_has_private(page)) ++ if (folio->private) + res++; + } + return res; +@@ -203,14 +203,17 @@ static int expected_page_refs(struct page *page) + + static int make_page_secure(struct page *page, struct uv_cb_header *uvcb) + { ++ struct folio *folio = page_folio(page); + int expected, cc = 0; + +- if (PageWriteback(page)) ++ if (folio_test_large(folio)) ++ return -EINVAL; ++ if (folio_test_writeback(folio)) + return -EAGAIN; +- expected = expected_page_refs(page); +- if (!page_ref_freeze(page, expected)) ++ expected = expected_folio_refs(folio); ++ if (!folio_ref_freeze(folio, expected)) + return -EBUSY; +- set_bit(PG_arch_1, &page->flags); ++ set_bit(PG_arch_1, &folio->flags); + /* + * If the UVC does not succeed or fail immediately, we don't want to + * loop for long, or we might get stall notifications. +@@ -220,9 +223,9 @@ static int make_page_secure(struct page *page, struct uv_cb_header *uvcb) + * -EAGAIN and we let the callers deal with it. + */ + cc = __uv_call(0, (u64)uvcb); +- page_ref_unfreeze(page, expected); ++ folio_ref_unfreeze(folio, expected); + /* +- * Return -ENXIO if the page was not mapped, -EINVAL for other errors. ++ * Return -ENXIO if the folio was not mapped, -EINVAL for other errors. + * If busy or partially completed, return -EAGAIN. + */ + if (cc == UVC_CC_OK) +-- +2.43.0 + diff --git a/queue-6.6/s390-uv-don-t-call-folio_wait_writeback-without-a-fo.patch b/queue-6.6/s390-uv-don-t-call-folio_wait_writeback-without-a-fo.patch new file mode 100644 index 00000000000..6616cc51d88 --- /dev/null +++ b/queue-6.6/s390-uv-don-t-call-folio_wait_writeback-without-a-fo.patch @@ -0,0 +1,53 @@ +From 1b5830a417731629391fd75667bf491f60fb99ba Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 8 May 2024 20:29:46 +0200 +Subject: s390/uv: Don't call folio_wait_writeback() without a folio reference + +From: David Hildenbrand + +[ Upstream commit 3f29f6537f54d74e64bac0a390fb2e26da25800d ] + +folio_wait_writeback() requires that no spinlocks are held and that +a folio reference is held, as documented. After we dropped the PTL, the +folio could get freed concurrently. So grab a temporary reference. + +Fixes: 214d9bbcd3a6 ("s390/mm: provide memory management functions for protected KVM guests") +Reviewed-by: Claudio Imbrenda +Signed-off-by: David Hildenbrand +Link: https://lore.kernel.org/r/20240508182955.358628-2-david@redhat.com +Signed-off-by: Heiko Carstens +Signed-off-by: Alexander Gordeev +Signed-off-by: Sasha Levin +--- + arch/s390/kernel/uv.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +diff --git a/arch/s390/kernel/uv.c b/arch/s390/kernel/uv.c +index 2aed5af7c4e52..81fdee22a497d 100644 +--- a/arch/s390/kernel/uv.c ++++ b/arch/s390/kernel/uv.c +@@ -317,6 +317,13 @@ int gmap_make_secure(struct gmap *gmap, unsigned long gaddr, void *uvcb) + rc = make_folio_secure(folio, uvcb); + folio_unlock(folio); + } ++ ++ /* ++ * Once we drop the PTL, the folio may get unmapped and ++ * freed immediately. We need a temporary reference. ++ */ ++ if (rc == -EAGAIN) ++ folio_get(folio); + } + unlock: + pte_unmap_unlock(ptep, ptelock); +@@ -329,6 +336,7 @@ int gmap_make_secure(struct gmap *gmap, unsigned long gaddr, void *uvcb) + * completion, this is just a useless check, but it is safe. + */ + folio_wait_writeback(folio); ++ folio_put(folio); + } else if (rc == -EBUSY) { + /* + * If we have tried a local drain and the folio refcount +-- +2.43.0 + diff --git a/queue-6.6/saa7134-unchecked-i2c_transfer-function-result-fixed.patch b/queue-6.6/saa7134-unchecked-i2c_transfer-function-result-fixed.patch new file mode 100644 index 00000000000..a4702dbce74 --- /dev/null +++ b/queue-6.6/saa7134-unchecked-i2c_transfer-function-result-fixed.patch @@ -0,0 +1,51 @@ +From 39cabdcbc52eeafa854498b9d1edfba5a2ee315b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 16 Feb 2024 15:40:06 +0300 +Subject: saa7134: Unchecked i2c_transfer function result fixed + +From: Aleksandr Burakov + +[ Upstream commit 9d8683b3fd93f0e378f24dc3d9604e5d7d3e0a17 ] + +Return value of function 'i2c_transfer' is not checked that +may cause undefined behaviour. + +Found by Linux Verification Center (linuxtesting.org) with SVACE. + +Fixes: 2cf36ac44730 ("[PATCH] v4l: 656: added support for the following cards") +Signed-off-by: Aleksandr Burakov +Signed-off-by: Hans Verkuil +Signed-off-by: Sasha Levin +--- + drivers/media/pci/saa7134/saa7134-dvb.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +diff --git a/drivers/media/pci/saa7134/saa7134-dvb.c b/drivers/media/pci/saa7134/saa7134-dvb.c +index 9c6cfef03331d..a66df6adfaad8 100644 +--- a/drivers/media/pci/saa7134/saa7134-dvb.c ++++ b/drivers/media/pci/saa7134/saa7134-dvb.c +@@ -466,7 +466,9 @@ static int philips_europa_tuner_sleep(struct dvb_frontend *fe) + /* switch the board to analog mode */ + if (fe->ops.i2c_gate_ctrl) + fe->ops.i2c_gate_ctrl(fe, 1); +- i2c_transfer(&dev->i2c_adap, &analog_msg, 1); ++ if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1) ++ return -EIO; ++ + return 0; + } + +@@ -1018,7 +1020,9 @@ static int md8800_set_voltage2(struct dvb_frontend *fe, + else + wbuf[1] = rbuf & 0xef; + msg[0].len = 2; +- i2c_transfer(&dev->i2c_adap, msg, 1); ++ if (i2c_transfer(&dev->i2c_adap, msg, 1) != 1) ++ return -EIO; ++ + return 0; + } + +-- +2.43.0 + diff --git a/queue-6.6/sbitmap-fix-io-hung-due-to-race-on-sbitmap_word-clea.patch b/queue-6.6/sbitmap-fix-io-hung-due-to-race-on-sbitmap_word-clea.patch new file mode 100644 index 00000000000..85baa65b46e --- /dev/null +++ b/queue-6.6/sbitmap-fix-io-hung-due-to-race-on-sbitmap_word-clea.patch @@ -0,0 +1,162 @@ +From 9c056e728b0f3e36f431a17109bf9a759e2711d5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 16 Jul 2024 16:26:27 +0800 +Subject: sbitmap: fix io hung due to race on sbitmap_word::cleared + +From: Yang Yang + +[ Upstream commit 72d04bdcf3f7d7e07d82f9757946f68802a7270a ] + +Configuration for sbq: + depth=64, wake_batch=6, shift=6, map_nr=1 + +1. There are 64 requests in progress: + map->word = 0xFFFFFFFFFFFFFFFF +2. After all the 64 requests complete, and no more requests come: + map->word = 0xFFFFFFFFFFFFFFFF, map->cleared = 0xFFFFFFFFFFFFFFFF +3. Now two tasks try to allocate requests: + T1: T2: + __blk_mq_get_tag . + __sbitmap_queue_get . + sbitmap_get . + sbitmap_find_bit . + sbitmap_find_bit_in_word . + __sbitmap_get_word -> nr=-1 __blk_mq_get_tag + sbitmap_deferred_clear __sbitmap_queue_get + /* map->cleared=0xFFFFFFFFFFFFFFFF */ sbitmap_find_bit + if (!READ_ONCE(map->cleared)) sbitmap_find_bit_in_word + return false; __sbitmap_get_word -> nr=-1 + mask = xchg(&map->cleared, 0) sbitmap_deferred_clear + atomic_long_andnot() /* map->cleared=0 */ + if (!(map->cleared)) + return false; + /* + * map->cleared is cleared by T1 + * T2 fail to acquire the tag + */ + +4. T2 is the sole tag waiter. When T1 puts the tag, T2 cannot be woken +up due to the wake_batch being set at 6. If no more requests come, T1 +will wait here indefinitely. + +This patch achieves two purposes: +1. Check on ->cleared and update on both ->cleared and ->word need to +be done atomically, and using spinlock could be the simplest solution. +2. Add extra check in sbitmap_deferred_clear(), to identify whether +->word has free bits. + +Fixes: ea86ea2cdced ("sbitmap: ammortize cost of clearing bits") +Signed-off-by: Yang Yang +Reviewed-by: Ming Lei +Reviewed-by: Bart Van Assche +Link: https://lore.kernel.org/r/20240716082644.659566-1-yang.yang@vivo.com +Signed-off-by: Jens Axboe +Signed-off-by: Sasha Levin +--- + include/linux/sbitmap.h | 5 +++++ + lib/sbitmap.c | 36 +++++++++++++++++++++++++++++------- + 2 files changed, 34 insertions(+), 7 deletions(-) + +diff --git a/include/linux/sbitmap.h b/include/linux/sbitmap.h +index d662cf136021d..c09cdcc99471e 100644 +--- a/include/linux/sbitmap.h ++++ b/include/linux/sbitmap.h +@@ -36,6 +36,11 @@ struct sbitmap_word { + * @cleared: word holding cleared bits + */ + unsigned long cleared ____cacheline_aligned_in_smp; ++ ++ /** ++ * @swap_lock: serializes simultaneous updates of ->word and ->cleared ++ */ ++ spinlock_t swap_lock; + } ____cacheline_aligned_in_smp; + + /** +diff --git a/lib/sbitmap.c b/lib/sbitmap.c +index d1247f34d584e..9307bf17a8175 100644 +--- a/lib/sbitmap.c ++++ b/lib/sbitmap.c +@@ -60,12 +60,30 @@ static inline void update_alloc_hint_after_get(struct sbitmap *sb, + /* + * See if we have deferred clears that we can batch move + */ +-static inline bool sbitmap_deferred_clear(struct sbitmap_word *map) ++static inline bool sbitmap_deferred_clear(struct sbitmap_word *map, ++ unsigned int depth, unsigned int alloc_hint, bool wrap) + { +- unsigned long mask; ++ unsigned long mask, word_mask; + +- if (!READ_ONCE(map->cleared)) +- return false; ++ guard(spinlock_irqsave)(&map->swap_lock); ++ ++ if (!map->cleared) { ++ if (depth == 0) ++ return false; ++ ++ word_mask = (~0UL) >> (BITS_PER_LONG - depth); ++ /* ++ * The current behavior is to always retry after moving ++ * ->cleared to word, and we change it to retry in case ++ * of any free bits. To avoid an infinite loop, we need ++ * to take wrap & alloc_hint into account, otherwise a ++ * soft lockup may occur. ++ */ ++ if (!wrap && alloc_hint) ++ word_mask &= ~((1UL << alloc_hint) - 1); ++ ++ return (READ_ONCE(map->word) & word_mask) != word_mask; ++ } + + /* + * First get a stable cleared mask, setting the old mask to 0. +@@ -85,6 +103,7 @@ int sbitmap_init_node(struct sbitmap *sb, unsigned int depth, int shift, + bool alloc_hint) + { + unsigned int bits_per_word; ++ int i; + + if (shift < 0) + shift = sbitmap_calculate_shift(depth); +@@ -116,6 +135,9 @@ int sbitmap_init_node(struct sbitmap *sb, unsigned int depth, int shift, + return -ENOMEM; + } + ++ for (i = 0; i < sb->map_nr; i++) ++ spin_lock_init(&sb->map[i].swap_lock); ++ + return 0; + } + EXPORT_SYMBOL_GPL(sbitmap_init_node); +@@ -126,7 +148,7 @@ void sbitmap_resize(struct sbitmap *sb, unsigned int depth) + unsigned int i; + + for (i = 0; i < sb->map_nr; i++) +- sbitmap_deferred_clear(&sb->map[i]); ++ sbitmap_deferred_clear(&sb->map[i], 0, 0, 0); + + sb->depth = depth; + sb->map_nr = DIV_ROUND_UP(sb->depth, bits_per_word); +@@ -179,7 +201,7 @@ static int sbitmap_find_bit_in_word(struct sbitmap_word *map, + alloc_hint, wrap); + if (nr != -1) + break; +- if (!sbitmap_deferred_clear(map)) ++ if (!sbitmap_deferred_clear(map, depth, alloc_hint, wrap)) + break; + } while (1); + +@@ -501,7 +523,7 @@ unsigned long __sbitmap_queue_get_batch(struct sbitmap_queue *sbq, int nr_tags, + unsigned int map_depth = __map_depth(sb, index); + unsigned long val; + +- sbitmap_deferred_clear(map); ++ sbitmap_deferred_clear(map, 0, 0, 0); + val = READ_ONCE(map->word); + if (val == (1UL << (map_depth - 1)) - 1) + goto next; +-- +2.43.0 + diff --git a/queue-6.6/sbitmap-use-read_once-to-access-map-word.patch b/queue-6.6/sbitmap-use-read_once-to-access-map-word.patch new file mode 100644 index 00000000000..6466268df6c --- /dev/null +++ b/queue-6.6/sbitmap-use-read_once-to-access-map-word.patch @@ -0,0 +1,57 @@ +From 27fe5b47611cacb0fb53db941ec41ebbc8e31c1e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 26 Apr 2024 18:34:44 +0800 +Subject: sbitmap: use READ_ONCE to access map->word + +From: linke li + +[ Upstream commit 6ad0d7e0f4b68f87a98ea2b239123b7d865df86b ] + +In __sbitmap_queue_get_batch(), map->word is read several times, and +update atomically using atomic_long_try_cmpxchg(). But the first two read +of map->word is not protected. + +This patch moves the statement val = READ_ONCE(map->word) forward, +eliminating unprotected accesses to map->word within the function. +It is aimed at reducing the number of benign races reported by KCSAN in +order to focus future debugging effort on harmful races. + +Signed-off-by: linke li +Link: https://lore.kernel.org/r/tencent_0B517C25E519D3D002194E8445E86C04AD0A@qq.com +Signed-off-by: Jens Axboe +Stable-dep-of: 72d04bdcf3f7 ("sbitmap: fix io hung due to race on sbitmap_word::cleared") +Signed-off-by: Sasha Levin +--- + lib/sbitmap.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/lib/sbitmap.c b/lib/sbitmap.c +index d0a5081dfd122..d1247f34d584e 100644 +--- a/lib/sbitmap.c ++++ b/lib/sbitmap.c +@@ -499,18 +499,18 @@ unsigned long __sbitmap_queue_get_batch(struct sbitmap_queue *sbq, int nr_tags, + struct sbitmap_word *map = &sb->map[index]; + unsigned long get_mask; + unsigned int map_depth = __map_depth(sb, index); ++ unsigned long val; + + sbitmap_deferred_clear(map); +- if (map->word == (1UL << (map_depth - 1)) - 1) ++ val = READ_ONCE(map->word); ++ if (val == (1UL << (map_depth - 1)) - 1) + goto next; + +- nr = find_first_zero_bit(&map->word, map_depth); ++ nr = find_first_zero_bit(&val, map_depth); + if (nr + nr_tags <= map_depth) { + atomic_long_t *ptr = (atomic_long_t *) &map->word; +- unsigned long val; + + get_mask = ((1UL << nr_tags) - 1) << nr; +- val = READ_ONCE(map->word); + while (!atomic_long_try_cmpxchg(ptr, &val, + get_mask | val)) + ; +-- +2.43.0 + diff --git a/queue-6.6/scsi-lpfc-fix-a-possible-null-pointer-dereference.patch b/queue-6.6/scsi-lpfc-fix-a-possible-null-pointer-dereference.patch new file mode 100644 index 00000000000..85c9189fe2b --- /dev/null +++ b/queue-6.6/scsi-lpfc-fix-a-possible-null-pointer-dereference.patch @@ -0,0 +1,46 @@ +From c0076388942df479fdfcffa388b8986ceedd4289 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 21 Jun 2024 16:25:45 +0800 +Subject: scsi: lpfc: Fix a possible null pointer dereference + +From: Huai-Yuan Liu + +[ Upstream commit 5e0bf3e8aec2cbc51123f84b29aaacbd91fc56fa ] + +In function lpfc_xcvr_data_show, the memory allocation with kmalloc might +fail, thereby making rdp_context a null pointer. In the following context +and functions that use this pointer, there are dereferencing operations, +leading to null pointer dereference. + +To fix this issue, a null pointer check should be added. If it is null, +use scnprintf to notify the user and return len. + +Fixes: 479b0917e447 ("scsi: lpfc: Create a sysfs entry called lpfc_xcvr_data for transceiver info") +Signed-off-by: Huai-Yuan Liu +Link: https://lore.kernel.org/r/20240621082545.449170-1-qq810974084@gmail.com +Reviewed-by: Justin Tee +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/scsi/lpfc/lpfc_attr.c | 5 +++++ + 1 file changed, 5 insertions(+) + +diff --git a/drivers/scsi/lpfc/lpfc_attr.c b/drivers/scsi/lpfc/lpfc_attr.c +index 79b45ea5fdb5e..8123062ec2faf 100644 +--- a/drivers/scsi/lpfc/lpfc_attr.c ++++ b/drivers/scsi/lpfc/lpfc_attr.c +@@ -1904,6 +1904,11 @@ lpfc_xcvr_data_show(struct device *dev, struct device_attribute *attr, + + /* Get transceiver information */ + rdp_context = kmalloc(sizeof(*rdp_context), GFP_KERNEL); ++ if (!rdp_context) { ++ len = scnprintf(buf, PAGE_SIZE - len, ++ "SPF info NA: alloc failure\n"); ++ return len; ++ } + + rc = lpfc_get_sfp_info_wait(phba, rdp_context); + if (rc) { +-- +2.43.0 + diff --git a/queue-6.6/scsi-ufs-mcq-fix-missing-argument-hba-in-mcq_opr_off.patch b/queue-6.6/scsi-ufs-mcq-fix-missing-argument-hba-in-mcq_opr_off.patch new file mode 100644 index 00000000000..97a94a75d67 --- /dev/null +++ b/queue-6.6/scsi-ufs-mcq-fix-missing-argument-hba-in-mcq_opr_off.patch @@ -0,0 +1,84 @@ +From f126e05571eddd5180c28099f4368a5437bc02d2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 20 May 2024 07:14:56 +0900 +Subject: scsi: ufs: mcq: Fix missing argument 'hba' in MCQ_OPR_OFFSET_n + +From: Minwoo Im + +[ Upstream commit 2fc39848952dfb91a9233563cc1444669b8e79c3 ] + +The MCQ_OPR_OFFSET_n macro takes 'hba' in the caller context without +receiving 'hba' instance as an argument. To prevent potential bugs in +future use cases, add an argument 'hba'. + +Fixes: 2468da61ea09 ("scsi: ufs: core: mcq: Configure operation and runtime interface") +Cc: Asutosh Das +Signed-off-by: Minwoo Im +Link: https://lore.kernel.org/r/20240519221457.772346-2-minwoo.im@samsung.com +Reviewed-by: Bart Van Assche +Signed-off-by: Martin K. Petersen +Signed-off-by: Sasha Levin +--- + drivers/ufs/core/ufs-mcq.c | 10 ++++------ + include/ufs/ufshcd.h | 6 ++++++ + 2 files changed, 10 insertions(+), 6 deletions(-) + +diff --git a/drivers/ufs/core/ufs-mcq.c b/drivers/ufs/core/ufs-mcq.c +index a10fc7a697109..af5ce45315b3c 100644 +--- a/drivers/ufs/core/ufs-mcq.c ++++ b/drivers/ufs/core/ufs-mcq.c +@@ -230,8 +230,6 @@ int ufshcd_mcq_memory_alloc(struct ufs_hba *hba) + + /* Operation and runtime registers configuration */ + #define MCQ_CFG_n(r, i) ((r) + MCQ_QCFG_SIZE * (i)) +-#define MCQ_OPR_OFFSET_n(p, i) \ +- (hba->mcq_opr[(p)].offset + hba->mcq_opr[(p)].stride * (i)) + + static void __iomem *mcq_opr_base(struct ufs_hba *hba, + enum ufshcd_mcq_opr n, int i) +@@ -344,10 +342,10 @@ void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba) + ufsmcq_writelx(hba, upper_32_bits(hwq->sqe_dma_addr), + MCQ_CFG_n(REG_SQUBA, i)); + /* Submission Queue Doorbell Address Offset */ +- ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_SQD, i), ++ ufsmcq_writelx(hba, ufshcd_mcq_opr_offset(hba, OPR_SQD, i), + MCQ_CFG_n(REG_SQDAO, i)); + /* Submission Queue Interrupt Status Address Offset */ +- ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_SQIS, i), ++ ufsmcq_writelx(hba, ufshcd_mcq_opr_offset(hba, OPR_SQIS, i), + MCQ_CFG_n(REG_SQISAO, i)); + + /* Completion Queue Lower Base Address */ +@@ -357,10 +355,10 @@ void ufshcd_mcq_make_queues_operational(struct ufs_hba *hba) + ufsmcq_writelx(hba, upper_32_bits(hwq->cqe_dma_addr), + MCQ_CFG_n(REG_CQUBA, i)); + /* Completion Queue Doorbell Address Offset */ +- ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_CQD, i), ++ ufsmcq_writelx(hba, ufshcd_mcq_opr_offset(hba, OPR_CQD, i), + MCQ_CFG_n(REG_CQDAO, i)); + /* Completion Queue Interrupt Status Address Offset */ +- ufsmcq_writelx(hba, MCQ_OPR_OFFSET_n(OPR_CQIS, i), ++ ufsmcq_writelx(hba, ufshcd_mcq_opr_offset(hba, OPR_CQIS, i), + MCQ_CFG_n(REG_CQISAO, i)); + + /* Save the base addresses for quicker access */ +diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h +index 7d07b256e906b..e4da397360682 100644 +--- a/include/ufs/ufshcd.h ++++ b/include/ufs/ufshcd.h +@@ -1117,6 +1117,12 @@ static inline bool is_mcq_enabled(struct ufs_hba *hba) + return hba->mcq_enabled; + } + ++static inline unsigned int ufshcd_mcq_opr_offset(struct ufs_hba *hba, ++ enum ufshcd_mcq_opr opr, int idx) ++{ ++ return hba->mcq_opr[opr].offset + hba->mcq_opr[opr].stride * idx; ++} ++ + #ifdef CONFIG_SCSI_UFS_VARIABLE_SG_ENTRY_SIZE + static inline size_t ufshcd_sg_entry_size(const struct ufs_hba *hba) + { +-- +2.43.0 + diff --git a/queue-6.6/selftests-bpf-check-length-of-recv-in-test_sockmap.patch b/queue-6.6/selftests-bpf-check-length-of-recv-in-test_sockmap.patch new file mode 100644 index 00000000000..7eefe6c3a9b --- /dev/null +++ b/queue-6.6/selftests-bpf-check-length-of-recv-in-test_sockmap.patch @@ -0,0 +1,40 @@ +From b9b4c63ed9e981c019c2e558b23a2b333e117c00 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 23 May 2024 14:50:03 +0800 +Subject: selftests/bpf: Check length of recv in test_sockmap + +From: Geliang Tang + +[ Upstream commit de1b5ea789dc28066cc8dc634b6825bd6148f38b ] + +The value of recv in msg_loop may be negative, like EWOULDBLOCK, so it's +necessary to check if it is positive before accumulating it to bytes_recvd. + +Fixes: 16962b2404ac ("bpf: sockmap, add selftests") +Signed-off-by: Geliang Tang +Signed-off-by: Daniel Borkmann +Tested-by: Jakub Sitnicki +Acked-by: John Fastabend +Link: https://lore.kernel.org/bpf/5172563f7c7b2a2e953cef02e89fc34664a7b190.1716446893.git.tanggeliang@kylinos.cn +Signed-off-by: Sasha Levin +--- + tools/testing/selftests/bpf/test_sockmap.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/tools/testing/selftests/bpf/test_sockmap.c b/tools/testing/selftests/bpf/test_sockmap.c +index e32e49a3eec2c..a181c0ccf98b2 100644 +--- a/tools/testing/selftests/bpf/test_sockmap.c ++++ b/tools/testing/selftests/bpf/test_sockmap.c +@@ -680,7 +680,8 @@ static int msg_loop(int fd, int iov_count, int iov_length, int cnt, + } + } + +- s->bytes_recvd += recv; ++ if (recv > 0) ++ s->bytes_recvd += recv; + + if (opt->check_recved_len && s->bytes_recvd > total_bytes) { + errno = EMSGSIZE; +-- +2.43.0 + diff --git a/queue-6.6/selftests-bpf-close-fd-in-error-path-in-drop_on_reus.patch b/queue-6.6/selftests-bpf-close-fd-in-error-path-in-drop_on_reus.patch new file mode 100644 index 00000000000..4f484e693a9 --- /dev/null +++ b/queue-6.6/selftests-bpf-close-fd-in-error-path-in-drop_on_reus.patch @@ -0,0 +1,40 @@ +From 007b328a283b8b7c7ed10037337eb59dc7d7fcfb Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 9 Jul 2024 17:16:19 +0800 +Subject: selftests/bpf: Close fd in error path in drop_on_reuseport + +From: Geliang Tang + +[ Upstream commit adae187ebedcd95d02f045bc37dfecfd5b29434b ] + +In the error path when update_lookup_map() fails in drop_on_reuseport in +prog_tests/sk_lookup.c, "server1", the fd of server 1, should be closed. +This patch fixes this by using "goto close_srv1" lable instead of "detach" +to close "server1" in this case. + +Fixes: 0ab5539f8584 ("selftests/bpf: Tests for BPF_SK_LOOKUP attach point") +Acked-by: Eduard Zingerman +Signed-off-by: Geliang Tang +Link: https://lore.kernel.org/r/86aed33b4b0ea3f04497c757845cff7e8e621a2d.1720515893.git.tanggeliang@kylinos.cn +Signed-off-by: Martin KaFai Lau +Signed-off-by: Sasha Levin +--- + tools/testing/selftests/bpf/prog_tests/sk_lookup.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/tools/testing/selftests/bpf/prog_tests/sk_lookup.c b/tools/testing/selftests/bpf/prog_tests/sk_lookup.c +index 597d0467a9267..de2466547efe0 100644 +--- a/tools/testing/selftests/bpf/prog_tests/sk_lookup.c ++++ b/tools/testing/selftests/bpf/prog_tests/sk_lookup.c +@@ -994,7 +994,7 @@ static void drop_on_reuseport(const struct test *t) + + err = update_lookup_map(t->sock_map, SERVER_A, server1); + if (err) +- goto detach; ++ goto close_srv1; + + /* second server on destination address we should never reach */ + server2 = make_server(t->sotype, t->connect_to.ip, t->connect_to.port, +-- +2.43.0 + diff --git a/queue-6.6/selftests-bpf-close-obj-in-error-path-in-xdp_adjust_.patch b/queue-6.6/selftests-bpf-close-obj-in-error-path-in-xdp_adjust_.patch new file mode 100644 index 00000000000..4c669573065 --- /dev/null +++ b/queue-6.6/selftests-bpf-close-obj-in-error-path-in-xdp_adjust_.patch @@ -0,0 +1,38 @@ +From 1727ab629b757b63aa2e01ecb1fe39745d90f6d4 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 10 Jul 2024 21:10:17 +0800 +Subject: selftests/bpf: Close obj in error path in xdp_adjust_tail + +From: Geliang Tang + +[ Upstream commit 52b49ec1b2c78deb258596c3b231201445ef5380 ] + +If bpf_object__load() fails in test_xdp_adjust_frags_tail_grow(), "obj" +opened before this should be closed. So use "goto out" to close it instead +of using "return" here. + +Fixes: 110221081aac ("bpf: selftests: update xdp_adjust_tail selftest to include xdp frags") +Signed-off-by: Geliang Tang +Link: https://lore.kernel.org/r/f282a1ed2d0e3fb38cceefec8e81cabb69cab260.1720615848.git.tanggeliang@kylinos.cn +Signed-off-by: Martin KaFai Lau +Signed-off-by: Sasha Levin +--- + tools/testing/selftests/bpf/prog_tests/xdp_adjust_tail.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/tools/testing/selftests/bpf/prog_tests/xdp_adjust_tail.c b/tools/testing/selftests/bpf/prog_tests/xdp_adjust_tail.c +index f09505f8b0386..53d6ad8c2257e 100644 +--- a/tools/testing/selftests/bpf/prog_tests/xdp_adjust_tail.c ++++ b/tools/testing/selftests/bpf/prog_tests/xdp_adjust_tail.c +@@ -222,7 +222,7 @@ static void test_xdp_adjust_frags_tail_grow(void) + + prog = bpf_object__next_program(obj, NULL); + if (bpf_object__load(obj)) +- return; ++ goto out; + + prog_fd = bpf_program__fd(prog); + +-- +2.43.0 + diff --git a/queue-6.6/selftests-bpf-fix-prog-numbers-in-test_sockmap.patch b/queue-6.6/selftests-bpf-fix-prog-numbers-in-test_sockmap.patch new file mode 100644 index 00000000000..b2eeb61e007 --- /dev/null +++ b/queue-6.6/selftests-bpf-fix-prog-numbers-in-test_sockmap.patch @@ -0,0 +1,78 @@ +From 30dd14f090a3f5a6194204e851b95618c19909f1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 17 May 2024 14:21:46 +0800 +Subject: selftests/bpf: Fix prog numbers in test_sockmap + +From: Geliang Tang + +[ Upstream commit 6c8d7598dfed759bf1d9d0322b4c2b42eb7252d8 ] + +bpf_prog5 and bpf_prog7 are removed from progs/test_sockmap_kern.h in +commit d79a32129b21 ("bpf: Selftests, remove prints from sockmap tests"), +now there are only 9 progs in it, not 11: + + SEC("sk_skb1") + int bpf_prog1(struct __sk_buff *skb) + SEC("sk_skb2") + int bpf_prog2(struct __sk_buff *skb) + SEC("sk_skb3") + int bpf_prog3(struct __sk_buff *skb) + SEC("sockops") + int bpf_sockmap(struct bpf_sock_ops *skops) + SEC("sk_msg1") + int bpf_prog4(struct sk_msg_md *msg) + SEC("sk_msg2") + int bpf_prog6(struct sk_msg_md *msg) + SEC("sk_msg3") + int bpf_prog8(struct sk_msg_md *msg) + SEC("sk_msg4") + int bpf_prog9(struct sk_msg_md *msg) + SEC("sk_msg5") + int bpf_prog10(struct sk_msg_md *msg) + +This patch updates the array sizes of prog_fd[], prog_attach_type[] and +prog_type[] from 11 to 9 accordingly. + +Fixes: d79a32129b21 ("bpf: Selftests, remove prints from sockmap tests") +Signed-off-by: Geliang Tang +Signed-off-by: Andrii Nakryiko +Link: https://lore.kernel.org/bpf/9c10d9f974f07fcb354a43a8eca67acb2fafc587.1715926605.git.tanggeliang@kylinos.cn +Signed-off-by: Sasha Levin +--- + tools/testing/selftests/bpf/test_sockmap.c | 6 +----- + 1 file changed, 1 insertion(+), 5 deletions(-) + +diff --git a/tools/testing/selftests/bpf/test_sockmap.c b/tools/testing/selftests/bpf/test_sockmap.c +index 43612de44fbf5..e32e49a3eec2c 100644 +--- a/tools/testing/selftests/bpf/test_sockmap.c ++++ b/tools/testing/selftests/bpf/test_sockmap.c +@@ -63,7 +63,7 @@ int passed; + int failed; + int map_fd[9]; + struct bpf_map *maps[9]; +-int prog_fd[11]; ++int prog_fd[9]; + + int txmsg_pass; + int txmsg_redir; +@@ -1793,8 +1793,6 @@ int prog_attach_type[] = { + BPF_SK_MSG_VERDICT, + BPF_SK_MSG_VERDICT, + BPF_SK_MSG_VERDICT, +- BPF_SK_MSG_VERDICT, +- BPF_SK_MSG_VERDICT, + }; + + int prog_type[] = { +@@ -1807,8 +1805,6 @@ int prog_type[] = { + BPF_PROG_TYPE_SK_MSG, + BPF_PROG_TYPE_SK_MSG, + BPF_PROG_TYPE_SK_MSG, +- BPF_PROG_TYPE_SK_MSG, +- BPF_PROG_TYPE_SK_MSG, + }; + + static int populate_progs(char *bpf_file) +-- +2.43.0 + diff --git a/queue-6.6/selftests-bpf-null-checks-for-links-in-bpf_tcp_ca.patch b/queue-6.6/selftests-bpf-null-checks-for-links-in-bpf_tcp_ca.patch new file mode 100644 index 00000000000..660a977b612 --- /dev/null +++ b/queue-6.6/selftests-bpf-null-checks-for-links-in-bpf_tcp_ca.patch @@ -0,0 +1,151 @@ +From 48c26a4d30ad61e449947e294fbaedd90824c588 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 10 Jul 2024 21:10:16 +0800 +Subject: selftests/bpf: Null checks for links in bpf_tcp_ca + +From: Geliang Tang + +[ Upstream commit eef0532e900c20a6760da829e82dac3ee18688c5 ] + +Run bpf_tcp_ca selftests (./test_progs -t bpf_tcp_ca) on a Loongarch +platform, some "Segmentation fault" errors occur: + +''' + test_dctcp:PASS:bpf_dctcp__open_and_load 0 nsec + test_dctcp:FAIL:bpf_map__attach_struct_ops unexpected error: -524 + #29/1 bpf_tcp_ca/dctcp:FAIL + test_cubic:PASS:bpf_cubic__open_and_load 0 nsec + test_cubic:FAIL:bpf_map__attach_struct_ops unexpected error: -524 + #29/2 bpf_tcp_ca/cubic:FAIL + test_dctcp_fallback:PASS:dctcp_skel 0 nsec + test_dctcp_fallback:PASS:bpf_dctcp__load 0 nsec + test_dctcp_fallback:FAIL:dctcp link unexpected error: -524 + #29/4 bpf_tcp_ca/dctcp_fallback:FAIL + test_write_sk_pacing:PASS:open_and_load 0 nsec + test_write_sk_pacing:FAIL:attach_struct_ops unexpected error: -524 + #29/6 bpf_tcp_ca/write_sk_pacing:FAIL + test_update_ca:PASS:open 0 nsec + test_update_ca:FAIL:attach_struct_ops unexpected error: -524 + settcpca:FAIL:setsockopt unexpected setsockopt: \ + actual -1 == expected -1 + (network_helpers.c:99: errno: No such file or directory) \ + Failed to call post_socket_cb + start_test:FAIL:start_server_str unexpected start_server_str: \ + actual -1 == expected -1 + test_update_ca:FAIL:ca1_ca1_cnt unexpected ca1_ca1_cnt: \ + actual 0 <= expected 0 + #29/9 bpf_tcp_ca/update_ca:FAIL + #29 bpf_tcp_ca:FAIL + Caught signal #11! + Stack trace: + ./test_progs(crash_handler+0x28)[0x5555567ed91c] + linux-vdso.so.1(__vdso_rt_sigreturn+0x0)[0x7ffffee408b0] + ./test_progs(bpf_link__update_map+0x80)[0x555556824a78] + ./test_progs(+0x94d68)[0x5555564c4d68] + ./test_progs(test_bpf_tcp_ca+0xe8)[0x5555564c6a88] + ./test_progs(+0x3bde54)[0x5555567ede54] + ./test_progs(main+0x61c)[0x5555567efd54] + /usr/lib64/libc.so.6(+0x22208)[0x7ffff2aaa208] + /usr/lib64/libc.so.6(__libc_start_main+0xac)[0x7ffff2aaa30c] + ./test_progs(_start+0x48)[0x55555646bca8] + Segmentation fault +''' + +This is because BPF trampoline is not implemented on Loongarch yet, +"link" returned by bpf_map__attach_struct_ops() is NULL. test_progs +crashs when this NULL link passes to bpf_link__update_map(). This +patch adds NULL checks for all links in bpf_tcp_ca to fix these errors. +If "link" is NULL, goto the newly added label "out" to destroy the skel. + +v2: + - use "goto out" instead of "return" as Eduard suggested. + +Fixes: 06da9f3bd641 ("selftests/bpf: Test switching TCP Congestion Control algorithms.") +Signed-off-by: Geliang Tang +Reviewed-by: Alan Maguire +Link: https://lore.kernel.org/r/b4c841492bd4ed97964e4e61e92827ce51bf1dc9.1720615848.git.tanggeliang@kylinos.cn +Signed-off-by: Martin KaFai Lau +Signed-off-by: Sasha Levin +--- + .../selftests/bpf/prog_tests/bpf_tcp_ca.c | 16 ++++++++++++---- + 1 file changed, 12 insertions(+), 4 deletions(-) + +diff --git a/tools/testing/selftests/bpf/prog_tests/bpf_tcp_ca.c b/tools/testing/selftests/bpf/prog_tests/bpf_tcp_ca.c +index 4aabeaa525d47..d0d9a02415454 100644 +--- a/tools/testing/selftests/bpf/prog_tests/bpf_tcp_ca.c ++++ b/tools/testing/selftests/bpf/prog_tests/bpf_tcp_ca.c +@@ -396,7 +396,8 @@ static void test_update_ca(void) + return; + + link = bpf_map__attach_struct_ops(skel->maps.ca_update_1); +- ASSERT_OK_PTR(link, "attach_struct_ops"); ++ if (!ASSERT_OK_PTR(link, "attach_struct_ops")) ++ goto out; + + do_test("tcp_ca_update", NULL); + saved_ca1_cnt = skel->bss->ca1_cnt; +@@ -410,6 +411,7 @@ static void test_update_ca(void) + ASSERT_GT(skel->bss->ca2_cnt, 0, "ca2_ca2_cnt"); + + bpf_link__destroy(link); ++out: + tcp_ca_update__destroy(skel); + } + +@@ -425,7 +427,8 @@ static void test_update_wrong(void) + return; + + link = bpf_map__attach_struct_ops(skel->maps.ca_update_1); +- ASSERT_OK_PTR(link, "attach_struct_ops"); ++ if (!ASSERT_OK_PTR(link, "attach_struct_ops")) ++ goto out; + + do_test("tcp_ca_update", NULL); + saved_ca1_cnt = skel->bss->ca1_cnt; +@@ -438,6 +441,7 @@ static void test_update_wrong(void) + ASSERT_GT(skel->bss->ca1_cnt, saved_ca1_cnt, "ca2_ca1_cnt"); + + bpf_link__destroy(link); ++out: + tcp_ca_update__destroy(skel); + } + +@@ -452,7 +456,8 @@ static void test_mixed_links(void) + return; + + link_nl = bpf_map__attach_struct_ops(skel->maps.ca_no_link); +- ASSERT_OK_PTR(link_nl, "attach_struct_ops_nl"); ++ if (!ASSERT_OK_PTR(link_nl, "attach_struct_ops_nl")) ++ goto out; + + link = bpf_map__attach_struct_ops(skel->maps.ca_update_1); + ASSERT_OK_PTR(link, "attach_struct_ops"); +@@ -465,6 +470,7 @@ static void test_mixed_links(void) + + bpf_link__destroy(link); + bpf_link__destroy(link_nl); ++out: + tcp_ca_update__destroy(skel); + } + +@@ -507,7 +513,8 @@ static void test_link_replace(void) + bpf_link__destroy(link); + + link = bpf_map__attach_struct_ops(skel->maps.ca_update_2); +- ASSERT_OK_PTR(link, "attach_struct_ops_2nd"); ++ if (!ASSERT_OK_PTR(link, "attach_struct_ops_2nd")) ++ goto out; + + /* BPF_F_REPLACE with a wrong old map Fd. It should fail! + * +@@ -530,6 +537,7 @@ static void test_link_replace(void) + + bpf_link__destroy(link); + ++out: + tcp_ca_update__destroy(skel); + } + +-- +2.43.0 + diff --git a/queue-6.6/selftests-forwarding-devlink_lib-wait-for-udev-event.patch b/queue-6.6/selftests-forwarding-devlink_lib-wait-for-udev-event.patch new file mode 100644 index 00000000000..39a129c97fb --- /dev/null +++ b/queue-6.6/selftests-forwarding-devlink_lib-wait-for-udev-event.patch @@ -0,0 +1,77 @@ +From db9c6a7f0e712d4c251d6c161469e787e6dc714b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 11 Jul 2024 17:27:02 +0200 +Subject: selftests: forwarding: devlink_lib: Wait for udev events after + reloading + +From: Amit Cohen + +[ Upstream commit f67a90a0c8f5b3d0acc18f10650d90fec44775f9 ] + +Lately, an additional locking was added by commit c0a40097f0bc +("drivers: core: synchronize really_probe() and dev_uevent()"). The +locking protects dev_uevent() calling. This function is used to send +messages from the kernel to user space. Uevent messages notify user space +about changes in device states, such as when a device is added, removed, +or changed. These messages are used by udev (or other similar user-space +tools) to apply device-specific rules. + +After reloading devlink instance, udev events should be processed. This +locking causes a short delay of udev events handling. + +One example for useful udev rule is renaming ports. 'forwading.config' +can be configured to use names after udev rules are applied. Some tests run +devlink_reload() and immediately use the updated names. This worked before +the above mentioned commit was pushed, but now the delay of uevent messages +causes that devlink_reload() returns before udev events are handled and +tests fail. + +Adjust devlink_reload() to not assume that udev events are already +processed when devlink reload is done, instead, wait for udev events to +ensure they are processed before returning from the function. + +Without this patch: +TESTS='rif_mac_profile' ./resource_scale.sh +TEST: 'rif_mac_profile' 4 [ OK ] +sysctl: cannot stat /proc/sys/net/ipv6/conf/swp1/disable_ipv6: No such file or directory +sysctl: cannot stat /proc/sys/net/ipv6/conf/swp1/disable_ipv6: No such file or directory +sysctl: cannot stat /proc/sys/net/ipv6/conf/swp2/disable_ipv6: No such file or directory +sysctl: cannot stat /proc/sys/net/ipv6/conf/swp2/disable_ipv6: No such file or directory +Cannot find device "swp1" +Cannot find device "swp2" +TEST: setup_wait_dev (: Interface swp1 does not come up.) [FAIL] + +With this patch: +$ TESTS='rif_mac_profile' ./resource_scale.sh +TEST: 'rif_mac_profile' 4 [ OK ] +TEST: 'rif_mac_profile' overflow 5 [ OK ] + +This is relevant not only for this test. + +Fixes: bc7cbb1e9f4c ("selftests: forwarding: Add devlink_lib.sh") +Signed-off-by: Amit Cohen +Reviewed-by: Ido Schimmel +Signed-off-by: Petr Machata +Link: https://patch.msgid.link/89367666e04b38a8993027f1526801ca327ab96a.1720709333.git.petrm@nvidia.com +Signed-off-by: Jakub Kicinski +Signed-off-by: Sasha Levin +--- + tools/testing/selftests/net/forwarding/devlink_lib.sh | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/tools/testing/selftests/net/forwarding/devlink_lib.sh b/tools/testing/selftests/net/forwarding/devlink_lib.sh +index f1de525cfa55b..62a05bca1e825 100644 +--- a/tools/testing/selftests/net/forwarding/devlink_lib.sh ++++ b/tools/testing/selftests/net/forwarding/devlink_lib.sh +@@ -122,6 +122,8 @@ devlink_reload() + still_pending=$(devlink resource show "$DEVLINK_DEV" | \ + grep -c "size_new") + check_err $still_pending "Failed reload - There are still unset sizes" ++ ++ udevadm settle + } + + declare -A DEVLINK_ORIG +-- +2.43.0 + diff --git a/queue-6.6/selftests-resctrl-convert-perror-to-ksft_perror-or-k.patch b/queue-6.6/selftests-resctrl-convert-perror-to-ksft_perror-or-k.patch new file mode 100644 index 00000000000..44f257d6383 --- /dev/null +++ b/queue-6.6/selftests-resctrl-convert-perror-to-ksft_perror-or-k.patch @@ -0,0 +1,643 @@ +From 652a287238287fbb695cb8849ffc19139d1628d5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 15 Dec 2023 17:04:47 +0200 +Subject: selftests/resctrl: Convert perror() to ksft_perror() or + ksft_print_msg() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Ilpo Järvinen + +[ Upstream commit cc8ff7f5c85c076297b18fb9f6d45ec5569d3d44 ] + +The resctrl selftest code contains a number of perror() calls. Some of +them come with hash character and some don't. The kselftest framework +provides ksft_perror() that is compatible with test output formatting +so it should be used instead of adding custom hash signs. + +Some perror() calls are too far away from anything that sets error. +For those call sites, ksft_print_msg() must be used instead. + +Convert perror() to ksft_perror() or ksft_print_msg(). + +Other related changes: +- Remove hash signs +- Remove trailing stops & newlines from ksft_perror() +- Add terminating newlines for converted ksft_print_msg() +- Use consistent capitalization +- Small fixes/tweaks to typos & grammar of the messages +- Extract error printing out of PARENT_EXIT() to be able to + differentiate + +Signed-off-by: Ilpo Järvinen +Reviewed-by: Reinette Chatre +Signed-off-by: Shuah Khan +Stable-dep-of: c44000b6535d ("selftests/resctrl: Fix closing IMC fds on error and open-code R+W instead of loops") +Signed-off-by: Sasha Levin +--- + tools/testing/selftests/resctrl/cache.c | 10 +-- + tools/testing/selftests/resctrl/cat_test.c | 8 +- + tools/testing/selftests/resctrl/cmt_test.c | 2 +- + tools/testing/selftests/resctrl/fill_buf.c | 2 +- + tools/testing/selftests/resctrl/mba_test.c | 2 +- + tools/testing/selftests/resctrl/mbm_test.c | 2 +- + tools/testing/selftests/resctrl/resctrl.h | 3 +- + tools/testing/selftests/resctrl/resctrl_val.c | 76 ++++++++++--------- + tools/testing/selftests/resctrl/resctrlfs.c | 42 +++++----- + 9 files changed, 77 insertions(+), 70 deletions(-) + +diff --git a/tools/testing/selftests/resctrl/cache.c b/tools/testing/selftests/resctrl/cache.c +index a0318bd3a63d8..601ab78dbf421 100644 +--- a/tools/testing/selftests/resctrl/cache.c ++++ b/tools/testing/selftests/resctrl/cache.c +@@ -40,7 +40,7 @@ static int perf_event_open_llc_miss(pid_t pid, int cpu_no) + fd_lm = perf_event_open(&pea_llc_miss, pid, cpu_no, -1, + PERF_FLAG_FD_CLOEXEC); + if (fd_lm == -1) { +- perror("Error opening leader"); ++ ksft_perror("Error opening leader"); + ctrlc_handler(0, NULL, NULL); + return -1; + } +@@ -95,7 +95,7 @@ static int get_llc_perf(unsigned long *llc_perf_miss) + + ret = read(fd_lm, &rf_cqm, sizeof(struct read_format)); + if (ret == -1) { +- perror("Could not get llc misses through perf"); ++ ksft_perror("Could not get llc misses through perf"); + return -1; + } + +@@ -124,12 +124,12 @@ static int get_llc_occu_resctrl(unsigned long *llc_occupancy) + + fp = fopen(llc_occup_path, "r"); + if (!fp) { +- perror("Failed to open results file"); ++ ksft_perror("Failed to open results file"); + + return errno; + } + if (fscanf(fp, "%lu", llc_occupancy) <= 0) { +- perror("Could not get llc occupancy"); ++ ksft_perror("Could not get llc occupancy"); + fclose(fp); + + return -1; +@@ -159,7 +159,7 @@ static int print_results_cache(char *filename, int bm_pid, + } else { + fp = fopen(filename, "a"); + if (!fp) { +- perror("Cannot open results file"); ++ ksft_perror("Cannot open results file"); + + return errno; + } +diff --git a/tools/testing/selftests/resctrl/cat_test.c b/tools/testing/selftests/resctrl/cat_test.c +index 224ba8544d8af..9bb8ba93f4335 100644 +--- a/tools/testing/selftests/resctrl/cat_test.c ++++ b/tools/testing/selftests/resctrl/cat_test.c +@@ -51,7 +51,7 @@ static int check_results(struct resctrl_val_param *param, size_t span) + ksft_print_msg("Checking for pass/fail\n"); + fp = fopen(param->filename, "r"); + if (!fp) { +- perror("# Cannot open file"); ++ ksft_perror("Cannot open file"); + + return errno; + } +@@ -149,7 +149,7 @@ int cat_perf_miss_val(int cpu_no, int n, char *cache_type) + param.num_of_runs = 0; + + if (pipe(pipefd)) { +- perror("# Unable to create pipe"); ++ ksft_perror("Unable to create pipe"); + return errno; + } + +@@ -185,7 +185,7 @@ int cat_perf_miss_val(int cpu_no, int n, char *cache_type) + * Just print the error message. + * Let while(1) run and wait for itself to be killed. + */ +- perror("# failed signaling parent process"); ++ ksft_perror("Failed signaling parent process"); + + close(pipefd[1]); + while (1) +@@ -197,7 +197,7 @@ int cat_perf_miss_val(int cpu_no, int n, char *cache_type) + while (pipe_message != 1) { + if (read(pipefd[0], &pipe_message, + sizeof(pipe_message)) < sizeof(pipe_message)) { +- perror("# failed reading from child process"); ++ ksft_perror("Failed reading from child process"); + break; + } + } +diff --git a/tools/testing/selftests/resctrl/cmt_test.c b/tools/testing/selftests/resctrl/cmt_test.c +index 50bdbce9fba95..16fc0488e0a54 100644 +--- a/tools/testing/selftests/resctrl/cmt_test.c ++++ b/tools/testing/selftests/resctrl/cmt_test.c +@@ -37,7 +37,7 @@ static int check_results(struct resctrl_val_param *param, size_t span, int no_of + ksft_print_msg("Checking for pass/fail\n"); + fp = fopen(param->filename, "r"); + if (!fp) { +- perror("# Error in opening file\n"); ++ ksft_perror("Error in opening file"); + + return errno; + } +diff --git a/tools/testing/selftests/resctrl/fill_buf.c b/tools/testing/selftests/resctrl/fill_buf.c +index 0d425f26583a9..0f6cca61ec94b 100644 +--- a/tools/testing/selftests/resctrl/fill_buf.c ++++ b/tools/testing/selftests/resctrl/fill_buf.c +@@ -115,7 +115,7 @@ static int fill_cache_read(unsigned char *buf, size_t buf_size, bool once) + /* Consume read result so that reading memory is not optimized out. */ + fp = fopen("/dev/null", "w"); + if (!fp) { +- perror("Unable to write to /dev/null"); ++ ksft_perror("Unable to write to /dev/null"); + return -1; + } + fprintf(fp, "Sum: %d ", ret); +diff --git a/tools/testing/selftests/resctrl/mba_test.c b/tools/testing/selftests/resctrl/mba_test.c +index d3bf4368341ec..4988b93add6a7 100644 +--- a/tools/testing/selftests/resctrl/mba_test.c ++++ b/tools/testing/selftests/resctrl/mba_test.c +@@ -109,7 +109,7 @@ static int check_results(void) + + fp = fopen(output, "r"); + if (!fp) { +- perror(output); ++ ksft_perror(output); + + return errno; + } +diff --git a/tools/testing/selftests/resctrl/mbm_test.c b/tools/testing/selftests/resctrl/mbm_test.c +index d3c0d30c676a7..eb488aabb9ae6 100644 +--- a/tools/testing/selftests/resctrl/mbm_test.c ++++ b/tools/testing/selftests/resctrl/mbm_test.c +@@ -59,7 +59,7 @@ static int check_results(size_t span) + + fp = fopen(output, "r"); + if (!fp) { +- perror(output); ++ ksft_perror(output); + + return errno; + } +diff --git a/tools/testing/selftests/resctrl/resctrl.h b/tools/testing/selftests/resctrl/resctrl.h +index a33f414f60199..dd3546655657a 100644 +--- a/tools/testing/selftests/resctrl/resctrl.h ++++ b/tools/testing/selftests/resctrl/resctrl.h +@@ -37,9 +37,8 @@ + + #define DEFAULT_SPAN (250 * MB) + +-#define PARENT_EXIT(err_msg) \ ++#define PARENT_EXIT() \ + do { \ +- perror(err_msg); \ + kill(ppid, SIGKILL); \ + umount_resctrlfs(); \ + exit(EXIT_FAILURE); \ +diff --git a/tools/testing/selftests/resctrl/resctrl_val.c b/tools/testing/selftests/resctrl/resctrl_val.c +index 88789678917b6..231d2012de2bd 100644 +--- a/tools/testing/selftests/resctrl/resctrl_val.c ++++ b/tools/testing/selftests/resctrl/resctrl_val.c +@@ -156,12 +156,12 @@ static int read_from_imc_dir(char *imc_dir, int count) + sprintf(imc_counter_type, "%s%s", imc_dir, "type"); + fp = fopen(imc_counter_type, "r"); + if (!fp) { +- perror("Failed to open imc counter type file"); ++ ksft_perror("Failed to open iMC counter type file"); + + return -1; + } + if (fscanf(fp, "%u", &imc_counters_config[count][READ].type) <= 0) { +- perror("Could not get imc type"); ++ ksft_perror("Could not get iMC type"); + fclose(fp); + + return -1; +@@ -175,12 +175,12 @@ static int read_from_imc_dir(char *imc_dir, int count) + sprintf(imc_counter_cfg, "%s%s", imc_dir, READ_FILE_NAME); + fp = fopen(imc_counter_cfg, "r"); + if (!fp) { +- perror("Failed to open imc config file"); ++ ksft_perror("Failed to open iMC config file"); + + return -1; + } + if (fscanf(fp, "%s", cas_count_cfg) <= 0) { +- perror("Could not get imc cas count read"); ++ ksft_perror("Could not get iMC cas count read"); + fclose(fp); + + return -1; +@@ -193,12 +193,12 @@ static int read_from_imc_dir(char *imc_dir, int count) + sprintf(imc_counter_cfg, "%s%s", imc_dir, WRITE_FILE_NAME); + fp = fopen(imc_counter_cfg, "r"); + if (!fp) { +- perror("Failed to open imc config file"); ++ ksft_perror("Failed to open iMC config file"); + + return -1; + } + if (fscanf(fp, "%s", cas_count_cfg) <= 0) { +- perror("Could not get imc cas count write"); ++ ksft_perror("Could not get iMC cas count write"); + fclose(fp); + + return -1; +@@ -262,12 +262,12 @@ static int num_of_imcs(void) + } + closedir(dp); + if (count == 0) { +- perror("Unable find iMC counters!\n"); ++ ksft_print_msg("Unable to find iMC counters\n"); + + return -1; + } + } else { +- perror("Unable to open PMU directory!\n"); ++ ksft_perror("Unable to open PMU directory"); + + return -1; + } +@@ -339,14 +339,14 @@ static int get_mem_bw_imc(int cpu_no, char *bw_report, float *bw_imc) + + if (read(r->fd, &r->return_value, + sizeof(struct membw_read_format)) == -1) { +- perror("Couldn't get read b/w through iMC"); ++ ksft_perror("Couldn't get read b/w through iMC"); + + return -1; + } + + if (read(w->fd, &w->return_value, + sizeof(struct membw_read_format)) == -1) { +- perror("Couldn't get write bw through iMC"); ++ ksft_perror("Couldn't get write bw through iMC"); + + return -1; + } +@@ -416,7 +416,7 @@ static void initialize_mem_bw_resctrl(const char *ctrlgrp, const char *mongrp, + int resource_id; + + if (get_resource_id(cpu_no, &resource_id) < 0) { +- perror("Could not get resource_id"); ++ ksft_print_msg("Could not get resource_id\n"); + return; + } + +@@ -449,12 +449,12 @@ static int get_mem_bw_resctrl(unsigned long *mbm_total) + + fp = fopen(mbm_total_path, "r"); + if (!fp) { +- perror("Failed to open total bw file"); ++ ksft_perror("Failed to open total bw file"); + + return -1; + } + if (fscanf(fp, "%lu", mbm_total) <= 0) { +- perror("Could not get mbm local bytes"); ++ ksft_perror("Could not get mbm local bytes"); + fclose(fp); + + return -1; +@@ -495,7 +495,7 @@ int signal_handler_register(void) + if (sigaction(SIGINT, &sigact, NULL) || + sigaction(SIGTERM, &sigact, NULL) || + sigaction(SIGHUP, &sigact, NULL)) { +- perror("# sigaction"); ++ ksft_perror("sigaction"); + ret = -1; + } + return ret; +@@ -515,7 +515,7 @@ void signal_handler_unregister(void) + if (sigaction(SIGINT, &sigact, NULL) || + sigaction(SIGTERM, &sigact, NULL) || + sigaction(SIGHUP, &sigact, NULL)) { +- perror("# sigaction"); ++ ksft_perror("sigaction"); + } + } + +@@ -540,14 +540,14 @@ static int print_results_bw(char *filename, int bm_pid, float bw_imc, + } else { + fp = fopen(filename, "a"); + if (!fp) { +- perror("Cannot open results file"); ++ ksft_perror("Cannot open results file"); + + return errno; + } + if (fprintf(fp, "Pid: %d \t Mem_BW_iMC: %f \t Mem_BW_resc: %lu \t Difference: %lu\n", + bm_pid, bw_imc, bw_resc, diff) <= 0) { ++ ksft_print_msg("Could not log results\n"); + fclose(fp); +- perror("Could not log results."); + + return errno; + } +@@ -585,7 +585,7 @@ static void initialize_llc_occu_resctrl(const char *ctrlgrp, const char *mongrp, + int resource_id; + + if (get_resource_id(cpu_no, &resource_id) < 0) { +- perror("# Unable to resource_id"); ++ ksft_print_msg("Could not get resource_id\n"); + return; + } + +@@ -647,20 +647,24 @@ static void run_benchmark(int signum, siginfo_t *info, void *ucontext) + * stdio (console) + */ + fp = freopen("/dev/null", "w", stdout); +- if (!fp) +- PARENT_EXIT("Unable to direct benchmark status to /dev/null"); ++ if (!fp) { ++ ksft_perror("Unable to direct benchmark status to /dev/null"); ++ PARENT_EXIT(); ++ } + + if (strcmp(benchmark_cmd[0], "fill_buf") == 0) { + /* Execute default fill_buf benchmark */ + span = strtoul(benchmark_cmd[1], NULL, 10); + memflush = atoi(benchmark_cmd[2]); + operation = atoi(benchmark_cmd[3]); +- if (!strcmp(benchmark_cmd[4], "true")) ++ if (!strcmp(benchmark_cmd[4], "true")) { + once = true; +- else if (!strcmp(benchmark_cmd[4], "false")) ++ } else if (!strcmp(benchmark_cmd[4], "false")) { + once = false; +- else +- PARENT_EXIT("Invalid once parameter"); ++ } else { ++ ksft_print_msg("Invalid once parameter\n"); ++ PARENT_EXIT(); ++ } + + if (run_fill_buf(span, memflush, operation, once)) + fprintf(stderr, "Error in running fill buffer\n"); +@@ -668,11 +672,12 @@ static void run_benchmark(int signum, siginfo_t *info, void *ucontext) + /* Execute specified benchmark */ + ret = execvp(benchmark_cmd[0], benchmark_cmd); + if (ret) +- perror("wrong\n"); ++ ksft_perror("execvp"); + } + + fclose(stdout); +- PARENT_EXIT("Unable to run specified benchmark"); ++ ksft_print_msg("Unable to run specified benchmark\n"); ++ PARENT_EXIT(); + } + + /* +@@ -709,7 +714,7 @@ int resctrl_val(const char * const *benchmark_cmd, struct resctrl_val_param *par + ppid = getpid(); + + if (pipe(pipefd)) { +- perror("# Unable to create pipe"); ++ ksft_perror("Unable to create pipe"); + + return -1; + } +@@ -721,7 +726,7 @@ int resctrl_val(const char * const *benchmark_cmd, struct resctrl_val_param *par + fflush(stdout); + bm_pid = fork(); + if (bm_pid == -1) { +- perror("# Unable to fork"); ++ ksft_perror("Unable to fork"); + + return -1; + } +@@ -738,15 +743,17 @@ int resctrl_val(const char * const *benchmark_cmd, struct resctrl_val_param *par + sigact.sa_flags = SA_SIGINFO; + + /* Register for "SIGUSR1" signal from parent */ +- if (sigaction(SIGUSR1, &sigact, NULL)) +- PARENT_EXIT("Can't register child for signal"); ++ if (sigaction(SIGUSR1, &sigact, NULL)) { ++ ksft_perror("Can't register child for signal"); ++ PARENT_EXIT(); ++ } + + /* Tell parent that child is ready */ + close(pipefd[0]); + pipe_message = 1; + if (write(pipefd[1], &pipe_message, sizeof(pipe_message)) < + sizeof(pipe_message)) { +- perror("# failed signaling parent process"); ++ ksft_perror("Failed signaling parent process"); + close(pipefd[1]); + return -1; + } +@@ -755,7 +762,8 @@ int resctrl_val(const char * const *benchmark_cmd, struct resctrl_val_param *par + /* Suspend child until delivery of "SIGUSR1" from parent */ + sigsuspend(&sigact.sa_mask); + +- PARENT_EXIT("Child is done"); ++ ksft_perror("Child is done"); ++ PARENT_EXIT(); + } + + ksft_print_msg("Benchmark PID: %d\n", bm_pid); +@@ -796,7 +804,7 @@ int resctrl_val(const char * const *benchmark_cmd, struct resctrl_val_param *par + while (pipe_message != 1) { + if (read(pipefd[0], &pipe_message, sizeof(pipe_message)) < + sizeof(pipe_message)) { +- perror("# failed reading message from child process"); ++ ksft_perror("Failed reading message from child process"); + close(pipefd[0]); + goto out; + } +@@ -805,7 +813,7 @@ int resctrl_val(const char * const *benchmark_cmd, struct resctrl_val_param *par + + /* Signal child to start benchmark */ + if (sigqueue(bm_pid, SIGUSR1, value) == -1) { +- perror("# sigqueue SIGUSR1 to child"); ++ ksft_perror("sigqueue SIGUSR1 to child"); + ret = errno; + goto out; + } +diff --git a/tools/testing/selftests/resctrl/resctrlfs.c b/tools/testing/selftests/resctrl/resctrlfs.c +index 9ac19acaf781d..71ad2b335b83f 100644 +--- a/tools/testing/selftests/resctrl/resctrlfs.c ++++ b/tools/testing/selftests/resctrl/resctrlfs.c +@@ -19,7 +19,7 @@ static int find_resctrl_mount(char *buffer) + + mounts = fopen("/proc/mounts", "r"); + if (!mounts) { +- perror("/proc/mounts"); ++ ksft_perror("/proc/mounts"); + return -ENXIO; + } + while (!feof(mounts)) { +@@ -68,7 +68,7 @@ int mount_resctrlfs(void) + ksft_print_msg("Mounting resctrl to \"%s\"\n", RESCTRL_PATH); + ret = mount("resctrl", RESCTRL_PATH, "resctrl", 0, NULL); + if (ret) +- perror("# mount"); ++ ksft_perror("mount"); + + return ret; + } +@@ -85,7 +85,7 @@ int umount_resctrlfs(void) + return ret; + + if (umount(mountpoint)) { +- perror("# Unable to umount resctrl"); ++ ksft_perror("Unable to umount resctrl"); + + return errno; + } +@@ -114,12 +114,12 @@ int get_resource_id(int cpu_no, int *resource_id) + + fp = fopen(phys_pkg_path, "r"); + if (!fp) { +- perror("Failed to open physical_package_id"); ++ ksft_perror("Failed to open physical_package_id"); + + return -1; + } + if (fscanf(fp, "%d", resource_id) <= 0) { +- perror("Could not get socket number or l3 id"); ++ ksft_perror("Could not get socket number or l3 id"); + fclose(fp); + + return -1; +@@ -148,7 +148,7 @@ int get_cache_size(int cpu_no, char *cache_type, unsigned long *cache_size) + } else if (!strcmp(cache_type, "L2")) { + cache_num = 2; + } else { +- perror("Invalid cache level"); ++ ksft_print_msg("Invalid cache level\n"); + return -1; + } + +@@ -156,12 +156,12 @@ int get_cache_size(int cpu_no, char *cache_type, unsigned long *cache_size) + cpu_no, cache_num); + fp = fopen(cache_path, "r"); + if (!fp) { +- perror("Failed to open cache size"); ++ ksft_perror("Failed to open cache size"); + + return -1; + } + if (fscanf(fp, "%s", cache_str) <= 0) { +- perror("Could not get cache_size"); ++ ksft_perror("Could not get cache_size"); + fclose(fp); + + return -1; +@@ -213,12 +213,12 @@ int get_cbm_mask(char *cache_type, char *cbm_mask) + + fp = fopen(cbm_mask_path, "r"); + if (!fp) { +- perror("Failed to open cache level"); ++ ksft_perror("Failed to open cache level"); + + return -1; + } + if (fscanf(fp, "%s", cbm_mask) <= 0) { +- perror("Could not get max cbm_mask"); ++ ksft_perror("Could not get max cbm_mask"); + fclose(fp); + + return -1; +@@ -245,12 +245,12 @@ int get_core_sibling(int cpu_no) + + fp = fopen(core_siblings_path, "r"); + if (!fp) { +- perror("Failed to open core siblings path"); ++ ksft_perror("Failed to open core siblings path"); + + return -1; + } + if (fscanf(fp, "%s", cpu_list_str) <= 0) { +- perror("Could not get core_siblings list"); ++ ksft_perror("Could not get core_siblings list"); + fclose(fp); + + return -1; +@@ -285,7 +285,7 @@ int taskset_benchmark(pid_t bm_pid, int cpu_no) + CPU_SET(cpu_no, &my_set); + + if (sched_setaffinity(bm_pid, sizeof(cpu_set_t), &my_set)) { +- perror("Unable to taskset benchmark"); ++ ksft_perror("Unable to taskset benchmark"); + + return -1; + } +@@ -324,7 +324,7 @@ static int create_grp(const char *grp_name, char *grp, const char *parent_grp) + } + closedir(dp); + } else { +- perror("Unable to open resctrl for group"); ++ ksft_perror("Unable to open resctrl for group"); + + return -1; + } +@@ -332,7 +332,7 @@ static int create_grp(const char *grp_name, char *grp, const char *parent_grp) + /* Requested grp doesn't exist, hence create it */ + if (found_grp == 0) { + if (mkdir(grp, 0) == -1) { +- perror("Unable to create group"); ++ ksft_perror("Unable to create group"); + + return -1; + } +@@ -347,12 +347,12 @@ static int write_pid_to_tasks(char *tasks, pid_t pid) + + fp = fopen(tasks, "w"); + if (!fp) { +- perror("Failed to open tasks file"); ++ ksft_perror("Failed to open tasks file"); + + return -1; + } + if (fprintf(fp, "%d\n", pid) < 0) { +- perror("Failed to wr pid to tasks file"); ++ ksft_print_msg("Failed to write pid to tasks file\n"); + fclose(fp); + + return -1; +@@ -419,7 +419,7 @@ int write_bm_pid_to_resctrl(pid_t bm_pid, char *ctrlgrp, char *mongrp, + out: + ksft_print_msg("Writing benchmark parameters to resctrl FS\n"); + if (ret) +- perror("# writing to resctrlfs"); ++ ksft_print_msg("Failed writing to resctrlfs\n"); + + return ret; + } +@@ -606,7 +606,7 @@ int filter_dmesg(void) + + ret = pipe(pipefds); + if (ret) { +- perror("pipe"); ++ ksft_perror("pipe"); + return ret; + } + fflush(stdout); +@@ -615,13 +615,13 @@ int filter_dmesg(void) + close(pipefds[0]); + dup2(pipefds[1], STDOUT_FILENO); + execlp("dmesg", "dmesg", NULL); +- perror("executing dmesg"); ++ ksft_perror("Executing dmesg"); + exit(1); + } + close(pipefds[1]); + fp = fdopen(pipefds[0], "r"); + if (!fp) { +- perror("fdopen(pipe)"); ++ ksft_perror("fdopen(pipe)"); + kill(pid, SIGTERM); + + return -1; +-- +2.43.0 + diff --git a/queue-6.6/selftests-resctrl-fix-closing-imc-fds-on-error-and-o.patch b/queue-6.6/selftests-resctrl-fix-closing-imc-fds-on-error-and-o.patch new file mode 100644 index 00000000000..be08be0197b --- /dev/null +++ b/queue-6.6/selftests-resctrl-fix-closing-imc-fds-on-error-and-o.patch @@ -0,0 +1,142 @@ +From a9735a319064a97b83f99ca173689e40478211bc Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 10 Jun 2024 18:14:42 +0300 +Subject: selftests/resctrl: Fix closing IMC fds on error and open-code R+W + instead of loops +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Ilpo Järvinen + +[ Upstream commit c44000b6535dc9806b9128d1aed403862b2adab9 ] + +The imc perf fd close() calls are missing from all error paths. In +addition, get_mem_bw_imc() handles fds in a for loop but close() is +based on two fixed indexes READ and WRITE. + +Open code inner for loops to READ+WRITE entries for clarity and add a +function to close() IMC fds properly in all cases. + +Fixes: 7f4d257e3a2a ("selftests/resctrl: Add callback to start a benchmark") +Suggested-by: Reinette Chatre +Signed-off-by: Ilpo Järvinen +Tested-by: Babu Moger +Reviewed-by: Reinette Chatre +Signed-off-by: Shuah Khan +Signed-off-by: Sasha Levin +--- + tools/testing/selftests/resctrl/resctrl_val.c | 54 ++++++++++++------- + 1 file changed, 36 insertions(+), 18 deletions(-) + +diff --git a/tools/testing/selftests/resctrl/resctrl_val.c b/tools/testing/selftests/resctrl/resctrl_val.c +index 231d2012de2bd..45439e726e79c 100644 +--- a/tools/testing/selftests/resctrl/resctrl_val.c ++++ b/tools/testing/selftests/resctrl/resctrl_val.c +@@ -292,6 +292,18 @@ static int initialize_mem_bw_imc(void) + return 0; + } + ++static void perf_close_imc_mem_bw(void) ++{ ++ int mc; ++ ++ for (mc = 0; mc < imcs; mc++) { ++ if (imc_counters_config[mc][READ].fd != -1) ++ close(imc_counters_config[mc][READ].fd); ++ if (imc_counters_config[mc][WRITE].fd != -1) ++ close(imc_counters_config[mc][WRITE].fd); ++ } ++} ++ + /* + * get_mem_bw_imc: Memory band width as reported by iMC counters + * @cpu_no: CPU number that the benchmark PID is binded to +@@ -305,26 +317,33 @@ static int initialize_mem_bw_imc(void) + static int get_mem_bw_imc(int cpu_no, char *bw_report, float *bw_imc) + { + float reads, writes, of_mul_read, of_mul_write; +- int imc, j, ret; ++ int imc, ret; ++ ++ for (imc = 0; imc < imcs; imc++) { ++ imc_counters_config[imc][READ].fd = -1; ++ imc_counters_config[imc][WRITE].fd = -1; ++ } + + /* Start all iMC counters to log values (both read and write) */ + reads = 0, writes = 0, of_mul_read = 1, of_mul_write = 1; + for (imc = 0; imc < imcs; imc++) { +- for (j = 0; j < 2; j++) { +- ret = open_perf_event(imc, cpu_no, j); +- if (ret) +- return -1; +- } +- for (j = 0; j < 2; j++) +- membw_ioctl_perf_event_ioc_reset_enable(imc, j); ++ ret = open_perf_event(imc, cpu_no, READ); ++ if (ret) ++ goto close_fds; ++ ret = open_perf_event(imc, cpu_no, WRITE); ++ if (ret) ++ goto close_fds; ++ ++ membw_ioctl_perf_event_ioc_reset_enable(imc, READ); ++ membw_ioctl_perf_event_ioc_reset_enable(imc, WRITE); + } + + sleep(1); + + /* Stop counters after a second to get results (both read and write) */ + for (imc = 0; imc < imcs; imc++) { +- for (j = 0; j < 2; j++) +- membw_ioctl_perf_event_ioc_disable(imc, j); ++ membw_ioctl_perf_event_ioc_disable(imc, READ); ++ membw_ioctl_perf_event_ioc_disable(imc, WRITE); + } + + /* +@@ -340,15 +359,13 @@ static int get_mem_bw_imc(int cpu_no, char *bw_report, float *bw_imc) + if (read(r->fd, &r->return_value, + sizeof(struct membw_read_format)) == -1) { + ksft_perror("Couldn't get read b/w through iMC"); +- +- return -1; ++ goto close_fds; + } + + if (read(w->fd, &w->return_value, + sizeof(struct membw_read_format)) == -1) { + ksft_perror("Couldn't get write bw through iMC"); +- +- return -1; ++ goto close_fds; + } + + __u64 r_time_enabled = r->return_value.time_enabled; +@@ -368,10 +385,7 @@ static int get_mem_bw_imc(int cpu_no, char *bw_report, float *bw_imc) + writes += w->return_value.value * of_mul_write * SCALE; + } + +- for (imc = 0; imc < imcs; imc++) { +- close(imc_counters_config[imc][READ].fd); +- close(imc_counters_config[imc][WRITE].fd); +- } ++ perf_close_imc_mem_bw(); + + if (strcmp(bw_report, "reads") == 0) { + *bw_imc = reads; +@@ -385,6 +399,10 @@ static int get_mem_bw_imc(int cpu_no, char *bw_report, float *bw_imc) + + *bw_imc = reads + writes; + return 0; ++ ++close_fds: ++ perf_close_imc_mem_bw(); ++ return -1; + } + + void set_mbm_path(const char *ctrlgrp, const char *mongrp, int resource_id) +-- +2.43.0 + diff --git a/queue-6.6/selftests-resctrl-move-run_benchmark-to-a-more-fitti.patch b/queue-6.6/selftests-resctrl-move-run_benchmark-to-a-more-fitti.patch new file mode 100644 index 00000000000..ca32c0f6794 --- /dev/null +++ b/queue-6.6/selftests-resctrl-move-run_benchmark-to-a-more-fitti.patch @@ -0,0 +1,177 @@ +From d47cf77dca9edd3ff856d71673a4b0c9109a97c5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 10 Oct 2023 09:56:12 +0200 +Subject: selftests/resctrl: Move run_benchmark() to a more fitting file +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Maciej Wieczor-Retman + +[ Upstream commit 508934b5d15ab79fd5895cc2a6063bc9d95f6a55 ] + +resctrlfs.c contains mostly functions that interact in some way with +resctrl FS entries while functions inside resctrl_val.c deal with +measurements and benchmarking. + +run_benchmark() is located in resctrlfs.c even though it's purpose +is not interacting with the resctrl FS but to execute cache checking +logic. + +Move run_benchmark() to resctrl_val.c just before resctrl_val() that +makes use of run_benchmark(). Make run_benchmark() static since it's +not used between multiple files anymore. + +Remove return comment from kernel-doc since the function is type void. + +Signed-off-by: Maciej Wieczor-Retman +Reviewed-by: Ilpo Järvinen +Reviewed-by: Reinette Chatre +Signed-off-by: Shuah Khan +Stable-dep-of: c44000b6535d ("selftests/resctrl: Fix closing IMC fds on error and open-code R+W instead of loops") +Signed-off-by: Sasha Levin +--- + tools/testing/selftests/resctrl/resctrl.h | 1 - + tools/testing/selftests/resctrl/resctrl_val.c | 50 ++++++++++++++++++ + tools/testing/selftests/resctrl/resctrlfs.c | 52 ------------------- + 3 files changed, 50 insertions(+), 53 deletions(-) + +diff --git a/tools/testing/selftests/resctrl/resctrl.h b/tools/testing/selftests/resctrl/resctrl.h +index 8578a8b4e1459..a33f414f60199 100644 +--- a/tools/testing/selftests/resctrl/resctrl.h ++++ b/tools/testing/selftests/resctrl/resctrl.h +@@ -86,7 +86,6 @@ int validate_bw_report_request(char *bw_report); + bool validate_resctrl_feature_request(const char *resource, const char *feature); + char *fgrep(FILE *inf, const char *str); + int taskset_benchmark(pid_t bm_pid, int cpu_no); +-void run_benchmark(int signum, siginfo_t *info, void *ucontext); + int write_schemata(char *ctrlgrp, char *schemata, int cpu_no, + char *resctrl_val); + int write_bm_pid_to_resctrl(pid_t bm_pid, char *ctrlgrp, char *mongrp, +diff --git a/tools/testing/selftests/resctrl/resctrl_val.c b/tools/testing/selftests/resctrl/resctrl_val.c +index b8ca6fa40b3bf..88789678917b6 100644 +--- a/tools/testing/selftests/resctrl/resctrl_val.c ++++ b/tools/testing/selftests/resctrl/resctrl_val.c +@@ -625,6 +625,56 @@ measure_vals(struct resctrl_val_param *param, unsigned long *bw_resc_start) + return 0; + } + ++/* ++ * run_benchmark - Run a specified benchmark or fill_buf (default benchmark) ++ * in specified signal. Direct benchmark stdio to /dev/null. ++ * @signum: signal number ++ * @info: signal info ++ * @ucontext: user context in signal handling ++ */ ++static void run_benchmark(int signum, siginfo_t *info, void *ucontext) ++{ ++ int operation, ret, memflush; ++ char **benchmark_cmd; ++ size_t span; ++ bool once; ++ FILE *fp; ++ ++ benchmark_cmd = info->si_ptr; ++ ++ /* ++ * Direct stdio of child to /dev/null, so that only parent writes to ++ * stdio (console) ++ */ ++ fp = freopen("/dev/null", "w", stdout); ++ if (!fp) ++ PARENT_EXIT("Unable to direct benchmark status to /dev/null"); ++ ++ if (strcmp(benchmark_cmd[0], "fill_buf") == 0) { ++ /* Execute default fill_buf benchmark */ ++ span = strtoul(benchmark_cmd[1], NULL, 10); ++ memflush = atoi(benchmark_cmd[2]); ++ operation = atoi(benchmark_cmd[3]); ++ if (!strcmp(benchmark_cmd[4], "true")) ++ once = true; ++ else if (!strcmp(benchmark_cmd[4], "false")) ++ once = false; ++ else ++ PARENT_EXIT("Invalid once parameter"); ++ ++ if (run_fill_buf(span, memflush, operation, once)) ++ fprintf(stderr, "Error in running fill buffer\n"); ++ } else { ++ /* Execute specified benchmark */ ++ ret = execvp(benchmark_cmd[0], benchmark_cmd); ++ if (ret) ++ perror("wrong\n"); ++ } ++ ++ fclose(stdout); ++ PARENT_EXIT("Unable to run specified benchmark"); ++} ++ + /* + * resctrl_val: execute benchmark and measure memory bandwidth on + * the benchmark +diff --git a/tools/testing/selftests/resctrl/resctrlfs.c b/tools/testing/selftests/resctrl/resctrlfs.c +index 3a8111362d262..9ac19acaf781d 100644 +--- a/tools/testing/selftests/resctrl/resctrlfs.c ++++ b/tools/testing/selftests/resctrl/resctrlfs.c +@@ -293,58 +293,6 @@ int taskset_benchmark(pid_t bm_pid, int cpu_no) + return 0; + } + +-/* +- * run_benchmark - Run a specified benchmark or fill_buf (default benchmark) +- * in specified signal. Direct benchmark stdio to /dev/null. +- * @signum: signal number +- * @info: signal info +- * @ucontext: user context in signal handling +- * +- * Return: void +- */ +-void run_benchmark(int signum, siginfo_t *info, void *ucontext) +-{ +- int operation, ret, memflush; +- char **benchmark_cmd; +- size_t span; +- bool once; +- FILE *fp; +- +- benchmark_cmd = info->si_ptr; +- +- /* +- * Direct stdio of child to /dev/null, so that only parent writes to +- * stdio (console) +- */ +- fp = freopen("/dev/null", "w", stdout); +- if (!fp) +- PARENT_EXIT("Unable to direct benchmark status to /dev/null"); +- +- if (strcmp(benchmark_cmd[0], "fill_buf") == 0) { +- /* Execute default fill_buf benchmark */ +- span = strtoul(benchmark_cmd[1], NULL, 10); +- memflush = atoi(benchmark_cmd[2]); +- operation = atoi(benchmark_cmd[3]); +- if (!strcmp(benchmark_cmd[4], "true")) +- once = true; +- else if (!strcmp(benchmark_cmd[4], "false")) +- once = false; +- else +- PARENT_EXIT("Invalid once parameter"); +- +- if (run_fill_buf(span, memflush, operation, once)) +- fprintf(stderr, "Error in running fill buffer\n"); +- } else { +- /* Execute specified benchmark */ +- ret = execvp(benchmark_cmd[0], benchmark_cmd); +- if (ret) +- perror("wrong\n"); +- } +- +- fclose(stdout); +- PARENT_EXIT("Unable to run specified benchmark"); +-} +- + /* + * create_grp - Create a group only if one doesn't exist + * @grp_name: Name of the group +-- +2.43.0 + diff --git a/queue-6.6/series b/queue-6.6/series new file mode 100644 index 00000000000..901eeb1d49c --- /dev/null +++ b/queue-6.6/series @@ -0,0 +1,357 @@ +spi-spi-microchip-core-fix-the-number-of-chip-select.patch +spi-atmel-quadspi-add-missing-check-for-clk_prepare.patch +edac-i10nm-make-skx_common.o-a-separate-module.patch +rcu-tasks-fix-stale-task-snaphot-for-tasks-trace.patch +md-fix-deadlock-between-mddev_suspend-and-flush-bio.patch +platform-chrome-cros_ec_debugfs-fix-wrong-ec-message.patch +ubd-refactor-the-interrupt-handler.patch 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+sbitmap-use-read_once-to-access-map-word.patch +sbitmap-fix-io-hung-due-to-race-on-sbitmap_word-clea.patch +loongarch-check-tif_load_watch-to-enable-user-space-.patch diff --git a/queue-6.6/soc-qcom-icc-bwmon-fix-refcount-imbalance-seen-durin.patch b/queue-6.6/soc-qcom-icc-bwmon-fix-refcount-imbalance-seen-durin.patch new file mode 100644 index 00000000000..345805abc19 --- /dev/null +++ b/queue-6.6/soc-qcom-icc-bwmon-fix-refcount-imbalance-seen-durin.patch @@ -0,0 +1,79 @@ +From 2dde1327ef1c5e7c29465468ee5ee59928f64f16 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 13 Jun 2024 22:15:06 +0530 +Subject: soc: qcom: icc-bwmon: Fix refcount imbalance seen during bwmon_remove + +From: Sibi Sankar + +[ Upstream commit 24086640ab39396eb1a92d1cb1cd2f31b2677c52 ] + +The following warning is seen during bwmon_remove due to refcount +imbalance, fix this by releasing the OPPs after use. + +Logs: +WARNING: at drivers/opp/core.c:1640 _opp_table_kref_release+0x150/0x158 +Hardware name: Qualcomm Technologies, Inc. X1E80100 CRD (DT) +... +Call trace: +_opp_table_kref_release+0x150/0x158 +dev_pm_opp_remove_table+0x100/0x1b4 +devm_pm_opp_of_table_release+0x10/0x1c +devm_action_release+0x14/0x20 +devres_release_all+0xa4/0x104 +device_unbind_cleanup+0x18/0x60 +device_release_driver_internal+0x1ec/0x228 +driver_detach+0x50/0x98 +bus_remove_driver+0x6c/0xbc +driver_unregister+0x30/0x60 +platform_driver_unregister+0x14/0x20 +bwmon_driver_exit+0x18/0x524 [icc_bwmon] +__arm64_sys_delete_module+0x184/0x264 +invoke_syscall+0x48/0x118 +el0_svc_common.constprop.0+0xc8/0xe8 +do_el0_svc+0x20/0x2c +el0_svc+0x34/0xdc +el0t_64_sync_handler+0x13c/0x158 +el0t_64_sync+0x190/0x194 +--[ end trace 0000000000000000 ]--- + +Fixes: 0276f69f13e2 ("soc: qcom: icc-bwmon: Set default thresholds dynamically") +Fixes: b9c2ae6cac40 ("soc: qcom: icc-bwmon: Add bandwidth monitoring driver") +Signed-off-by: Sibi Sankar +Reviewed-by: Konrad Dybcio +Link: https://lore.kernel.org/r/20240613164506.982068-1-quic_sibis@quicinc.com +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + drivers/soc/qcom/icc-bwmon.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/soc/qcom/icc-bwmon.c b/drivers/soc/qcom/icc-bwmon.c +index adf2d523f103c..59ef8d739e93b 100644 +--- a/drivers/soc/qcom/icc-bwmon.c ++++ b/drivers/soc/qcom/icc-bwmon.c +@@ -565,7 +565,7 @@ static void bwmon_start(struct icc_bwmon *bwmon) + int window; + + /* No need to check for errors, as this must have succeeded before. */ +- dev_pm_opp_find_bw_ceil(bwmon->dev, &bw_low, 0); ++ dev_pm_opp_put(dev_pm_opp_find_bw_ceil(bwmon->dev, &bw_low, 0)); + + bwmon_clear_counters(bwmon, true); + +@@ -772,11 +772,13 @@ static int bwmon_probe(struct platform_device *pdev) + opp = dev_pm_opp_find_bw_floor(dev, &bwmon->max_bw_kbps, 0); + if (IS_ERR(opp)) + return dev_err_probe(dev, PTR_ERR(opp), "failed to find max peak bandwidth\n"); ++ dev_pm_opp_put(opp); + + bwmon->min_bw_kbps = 0; + opp = dev_pm_opp_find_bw_ceil(dev, &bwmon->min_bw_kbps, 0); + if (IS_ERR(opp)) + return dev_err_probe(dev, PTR_ERR(opp), "failed to find min peak bandwidth\n"); ++ dev_pm_opp_put(opp); + + bwmon->dev = dev; + +-- +2.43.0 + diff --git a/queue-6.6/soc-qcom-pdr-fix-parsing-of-domains-lists.patch b/queue-6.6/soc-qcom-pdr-fix-parsing-of-domains-lists.patch new file mode 100644 index 00000000000..146c1d6c9f7 --- /dev/null +++ b/queue-6.6/soc-qcom-pdr-fix-parsing-of-domains-lists.patch @@ -0,0 +1,43 @@ +From b33261aaac4195e6f534c93de7225743d7949ead Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 22 Jun 2024 01:03:41 +0300 +Subject: soc: qcom: pdr: fix parsing of domains lists + +From: Dmitry Baryshkov + +[ Upstream commit 57f20d51f35780f240ecf39d81cda23612800a92 ] + +While parsing the domains list, start offsets from 0 rather than from +domains_read. The domains_read is equal to the total count of the +domains we have seen, while the domains list in the message starts from +offset 0. + +Fixes: fbe639b44a82 ("soc: qcom: Introduce Protection Domain Restart helpers") +Tested-by: Steev Klimaszewski +Tested-by: Alexey Minnekhanov +Reviewed-by: Chris Lew +Tested-by: Neil Armstrong # on SM8550-QRD +Signed-off-by: Dmitry Baryshkov +Link: https://lore.kernel.org/r/20240622-qcom-pd-mapper-v9-2-a84ee3591c8e@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + drivers/soc/qcom/pdr_interface.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/soc/qcom/pdr_interface.c b/drivers/soc/qcom/pdr_interface.c +index fbf91d7904482..c7cd4daa10b0f 100644 +--- a/drivers/soc/qcom/pdr_interface.c ++++ b/drivers/soc/qcom/pdr_interface.c +@@ -417,7 +417,7 @@ static int pdr_locate_service(struct pdr_handle *pdr, struct pdr_service *pds) + if (ret < 0) + goto out; + +- for (i = domains_read; i < resp->domain_list_len; i++) { ++ for (i = 0; i < resp->domain_list_len; i++) { + entry = &resp->domain_list[i]; + + if (strnlen(entry->name, sizeof(entry->name)) == sizeof(entry->name)) +-- +2.43.0 + diff --git a/queue-6.6/soc-qcom-pdr-protect-locator_addr-with-the-main-mute.patch b/queue-6.6/soc-qcom-pdr-protect-locator_addr-with-the-main-mute.patch new file mode 100644 index 00000000000..0de48edd88e --- /dev/null +++ b/queue-6.6/soc-qcom-pdr-protect-locator_addr-with-the-main-mute.patch @@ -0,0 +1,73 @@ +From c7ca2b7f384be046108eeee598395127f99f2042 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Sat, 22 Jun 2024 01:03:40 +0300 +Subject: soc: qcom: pdr: protect locator_addr with the main mutex + +From: Dmitry Baryshkov + +[ Upstream commit 107924c14e3ddd85119ca43c26a4ee1056fa9b84 ] + +If the service locator server is restarted fast enough, the PDR can +rewrite locator_addr fields concurrently. Protect them by placing +modification of those fields under the main pdr->lock. + +Fixes: fbe639b44a82 ("soc: qcom: Introduce Protection Domain Restart helpers") +Tested-by: Neil Armstrong # on SM8550-QRD +Tested-by: Steev Klimaszewski +Tested-by: Alexey Minnekhanov +Signed-off-by: Dmitry Baryshkov +Link: https://lore.kernel.org/r/20240622-qcom-pd-mapper-v9-1-a84ee3591c8e@linaro.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + drivers/soc/qcom/pdr_interface.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +diff --git a/drivers/soc/qcom/pdr_interface.c b/drivers/soc/qcom/pdr_interface.c +index 0034af927b488..fbf91d7904482 100644 +--- a/drivers/soc/qcom/pdr_interface.c ++++ b/drivers/soc/qcom/pdr_interface.c +@@ -76,12 +76,12 @@ static int pdr_locator_new_server(struct qmi_handle *qmi, + locator_hdl); + struct pdr_service *pds; + ++ mutex_lock(&pdr->lock); + /* Create a local client port for QMI communication */ + pdr->locator_addr.sq_family = AF_QIPCRTR; + pdr->locator_addr.sq_node = svc->node; + pdr->locator_addr.sq_port = svc->port; + +- mutex_lock(&pdr->lock); + pdr->locator_init_complete = true; + mutex_unlock(&pdr->lock); + +@@ -104,10 +104,10 @@ static void pdr_locator_del_server(struct qmi_handle *qmi, + + mutex_lock(&pdr->lock); + pdr->locator_init_complete = false; +- mutex_unlock(&pdr->lock); + + pdr->locator_addr.sq_node = 0; + pdr->locator_addr.sq_port = 0; ++ mutex_unlock(&pdr->lock); + } + + static const struct qmi_ops pdr_locator_ops = { +@@ -365,12 +365,14 @@ static int pdr_get_domain_list(struct servreg_get_domain_list_req *req, + if (ret < 0) + return ret; + ++ mutex_lock(&pdr->lock); + ret = qmi_send_request(&pdr->locator_hdl, + &pdr->locator_addr, + &txn, SERVREG_GET_DOMAIN_LIST_REQ, + SERVREG_GET_DOMAIN_LIST_REQ_MAX_LEN, + servreg_get_domain_list_req_ei, + req); ++ mutex_unlock(&pdr->lock); + if (ret < 0) { + qmi_txn_cancel(&txn); + return ret; +-- +2.43.0 + diff --git a/queue-6.6/soc-qcom-pmic_glink-handle-the-return-value-of-pmic_.patch b/queue-6.6/soc-qcom-pmic_glink-handle-the-return-value-of-pmic_.patch new file mode 100644 index 00000000000..1e1bed4ba04 --- /dev/null +++ b/queue-6.6/soc-qcom-pmic_glink-handle-the-return-value-of-pmic_.patch @@ -0,0 +1,50 @@ +From 63b325f4d686153b6a071d986f1bb4fb17087c9d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 10 May 2024 16:31:56 +0800 +Subject: soc: qcom: pmic_glink: Handle the return value of pmic_glink_init + +From: Chen Ni + +[ Upstream commit 0780c836673b25f5aad306630afcb1172d694cb4 ] + +As platform_driver_register() and register_rpmsg_driver() can return +error numbers, it should be better to check the return value and deal +with the exception. + +Signed-off-by: Chen Ni +Fixes: 58ef4ece1e41 ("soc: qcom: pmic_glink: Introduce base PMIC GLINK driver") +Reviewed-by: Bryan O'Donoghue +Link: https://lore.kernel.org/r/20240510083156.1996783-1-nichen@iscas.ac.cn +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + drivers/soc/qcom/pmic_glink.c | 13 +++++++++++-- + 1 file changed, 11 insertions(+), 2 deletions(-) + +diff --git a/drivers/soc/qcom/pmic_glink.c b/drivers/soc/qcom/pmic_glink.c +index 61a359938b6c4..71d261ac8aa45 100644 +--- a/drivers/soc/qcom/pmic_glink.c ++++ b/drivers/soc/qcom/pmic_glink.c +@@ -376,8 +376,17 @@ static struct platform_driver pmic_glink_driver = { + + static int pmic_glink_init(void) + { +- platform_driver_register(&pmic_glink_driver); +- register_rpmsg_driver(&pmic_glink_rpmsg_driver); ++ int ret; ++ ++ ret = platform_driver_register(&pmic_glink_driver); ++ if (ret < 0) ++ return ret; ++ ++ ret = register_rpmsg_driver(&pmic_glink_rpmsg_driver); ++ if (ret < 0) { ++ platform_driver_unregister(&pmic_glink_driver); ++ return ret; ++ } + + return 0; + }; +-- +2.43.0 + diff --git a/queue-6.6/soc-qcom-rpmh-rsc-ensure-irqs-aren-t-disabled-by-rpm.patch b/queue-6.6/soc-qcom-rpmh-rsc-ensure-irqs-aren-t-disabled-by-rpm.patch new file mode 100644 index 00000000000..9bdbd6f01c7 --- /dev/null +++ b/queue-6.6/soc-qcom-rpmh-rsc-ensure-irqs-aren-t-disabled-by-rpm.patch @@ -0,0 +1,84 @@ +From 66f1b0ac2709feb1e4263050b259e66850687272 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 9 May 2024 11:41:28 -0700 +Subject: soc: qcom: rpmh-rsc: Ensure irqs aren't disabled by + rpmh_rsc_send_data() callers + +From: Stephen Boyd + +[ Upstream commit e43111f52b9ec5c2d700f89a1d61c8d10dc2d9e9 ] + +Dan pointed out that Smatch is concerned about this code because it uses +spin_lock_irqsave() and then calls wait_event_lock_irq() which enables +irqs before going to sleep. The comment above the function says it +should be called with interrupts enabled, but we simply hope that's true +without really confirming that. Let's add a might_sleep() here to +confirm that interrupts and preemption aren't disabled. Once we do that, +we can change the lock to be non-saving, spin_lock_irq(), to clarify +that we don't expect irqs to be disabled. If irqs are disabled by +callers they're going to be enabled anyway in the wait_event_lock_irq() +call which would be bad. + +This should make Smatch happier and find bad callers faster with the +might_sleep(). We can drop the WARN_ON() in the caller because we have +the might_sleep() now, simplifying the code. + +Reported-by: Dan Carpenter +Closes: https://lore.kernel.org/r/911181ed-c430-4592-ad26-4dc948834e08@moroto.mountain +Fixes: 2bc20f3c8487 ("soc: qcom: rpmh-rsc: Sleep waiting for tcs slots to be free") +Cc: Douglas Anderson +Signed-off-by: Stephen Boyd +Reviewed-by: Douglas Anderson +Link: https://lore.kernel.org/r/20240509184129.3924422-1-swboyd@chromium.org +Signed-off-by: Bjorn Andersson +Signed-off-by: Sasha Levin +--- + drivers/soc/qcom/rpmh-rsc.c | 7 ++++--- + drivers/soc/qcom/rpmh.c | 1 - + 2 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/soc/qcom/rpmh-rsc.c b/drivers/soc/qcom/rpmh-rsc.c +index daf64be966fe1..dfc2d4e38fa9b 100644 +--- a/drivers/soc/qcom/rpmh-rsc.c ++++ b/drivers/soc/qcom/rpmh-rsc.c +@@ -646,13 +646,14 @@ int rpmh_rsc_send_data(struct rsc_drv *drv, const struct tcs_request *msg) + { + struct tcs_group *tcs; + int tcs_id; +- unsigned long flags; ++ ++ might_sleep(); + + tcs = get_tcs_for_msg(drv, msg); + if (IS_ERR(tcs)) + return PTR_ERR(tcs); + +- spin_lock_irqsave(&drv->lock, flags); ++ spin_lock_irq(&drv->lock); + + /* Wait forever for a free tcs. It better be there eventually! */ + wait_event_lock_irq(drv->tcs_wait, +@@ -670,7 +671,7 @@ int rpmh_rsc_send_data(struct rsc_drv *drv, const struct tcs_request *msg) + write_tcs_reg_sync(drv, drv->regs[RSC_DRV_CMD_ENABLE], tcs_id, 0); + enable_tcs_irq(drv, tcs_id, true); + } +- spin_unlock_irqrestore(&drv->lock, flags); ++ spin_unlock_irq(&drv->lock); + + /* + * These two can be done after the lock is released because: +diff --git a/drivers/soc/qcom/rpmh.c b/drivers/soc/qcom/rpmh.c +index 08e09642d7f55..62dfc7df93541 100644 +--- a/drivers/soc/qcom/rpmh.c ++++ b/drivers/soc/qcom/rpmh.c +@@ -183,7 +183,6 @@ static int __rpmh_write(const struct device *dev, enum rpmh_state state, + } + + if (state == RPMH_ACTIVE_ONLY_STATE) { +- WARN_ON(irqs_disabled()); + ret = rpmh_rsc_send_data(ctrlr_to_drv(ctrlr), &rpm_msg->msg); + } else { + /* Clean up our call by spoofing tx_done */ +-- +2.43.0 + diff --git a/queue-6.6/soc-xilinx-rename-cpu_number1-to-dummy_cpu_number.patch b/queue-6.6/soc-xilinx-rename-cpu_number1-to-dummy_cpu_number.patch new file mode 100644 index 00000000000..8663c7ee4e3 --- /dev/null +++ b/queue-6.6/soc-xilinx-rename-cpu_number1-to-dummy_cpu_number.patch @@ -0,0 +1,105 @@ +From a7ee9ad8bdf89fb1bd7bf110edefb17edff042b8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 8 Apr 2024 04:06:10 -0700 +Subject: soc: xilinx: rename cpu_number1 to dummy_cpu_number + +From: Jay Buddhabhatti + +[ Upstream commit 4a95449dd975e2ea6629a034f3e74b46c9634916 ] + +The per cpu variable cpu_number1 is passed to xlnx_event_handler as +argument "dev_id", but it is not used in this function. So drop the +initialization of this variable and rename it to dummy_cpu_number. +This patch is to fix the following call trace when the kernel option +CONFIG_DEBUG_ATOMIC_SLEEP is enabled: + +BUG: sleeping function called from invalid context at include/linux/sched/mm.h:274 + in_atomic(): 1, irqs_disabled(): 0, non_block: 0, pid: 1, name: swapper/0 + preempt_count: 1, expected: 0 + CPU: 0 PID: 1 Comm: swapper/0 Not tainted 6.1.0 #53 + Hardware name: Xilinx Versal vmk180 Eval board rev1.1 (QSPI) (DT) + Call trace: + dump_backtrace+0xd0/0xe0 + show_stack+0x18/0x40 + dump_stack_lvl+0x7c/0xa0 + dump_stack+0x18/0x34 + __might_resched+0x10c/0x140 + __might_sleep+0x4c/0xa0 + __kmem_cache_alloc_node+0xf4/0x168 + kmalloc_trace+0x28/0x38 + __request_percpu_irq+0x74/0x138 + xlnx_event_manager_probe+0xf8/0x298 + platform_probe+0x68/0xd8 + +Fixes: daed80ed0758 ("soc: xilinx: Fix for call trace due to the usage of smp_processor_id()") +Signed-off-by: Jay Buddhabhatti +Link: https://lore.kernel.org/r/20240408110610.15676-1-jay.buddhabhatti@amd.com +Signed-off-by: Michal Simek +Signed-off-by: Sasha Levin +--- + drivers/soc/xilinx/xlnx_event_manager.c | 15 ++++----------- + 1 file changed, 4 insertions(+), 11 deletions(-) + +diff --git a/drivers/soc/xilinx/xlnx_event_manager.c b/drivers/soc/xilinx/xlnx_event_manager.c +index 042553abe1bf8..098a2ecfd5c68 100644 +--- a/drivers/soc/xilinx/xlnx_event_manager.c ++++ b/drivers/soc/xilinx/xlnx_event_manager.c +@@ -3,6 +3,7 @@ + * Xilinx Event Management Driver + * + * Copyright (C) 2021 Xilinx, Inc. ++ * Copyright (C) 2024 Advanced Micro Devices, Inc. + * + * Abhyuday Godhasara + */ +@@ -19,7 +20,7 @@ + #include + #include + +-static DEFINE_PER_CPU_READ_MOSTLY(int, cpu_number1); ++static DEFINE_PER_CPU_READ_MOSTLY(int, dummy_cpu_number); + + static int virq_sgi; + static int event_manager_availability = -EACCES; +@@ -555,7 +556,6 @@ static void xlnx_disable_percpu_irq(void *data) + static int xlnx_event_init_sgi(struct platform_device *pdev) + { + int ret = 0; +- int cpu; + /* + * IRQ related structures are used for the following: + * for each SGI interrupt ensure its mapped by GIC IRQ domain +@@ -592,11 +592,8 @@ static int xlnx_event_init_sgi(struct platform_device *pdev) + sgi_fwspec.param[0] = sgi_num; + virq_sgi = irq_create_fwspec_mapping(&sgi_fwspec); + +- cpu = get_cpu(); +- per_cpu(cpu_number1, cpu) = cpu; + ret = request_percpu_irq(virq_sgi, xlnx_event_handler, "xlnx_event_mgmt", +- &cpu_number1); +- put_cpu(); ++ &dummy_cpu_number); + + WARN_ON(ret); + if (ret) { +@@ -612,16 +609,12 @@ static int xlnx_event_init_sgi(struct platform_device *pdev) + + static void xlnx_event_cleanup_sgi(struct platform_device *pdev) + { +- int cpu = smp_processor_id(); +- +- per_cpu(cpu_number1, cpu) = cpu; +- + cpuhp_remove_state(CPUHP_AP_ONLINE_DYN); + + on_each_cpu(xlnx_disable_percpu_irq, NULL, 1); + + irq_clear_status_flags(virq_sgi, IRQ_PER_CPU); +- free_percpu_irq(virq_sgi, &cpu_number1); ++ free_percpu_irq(virq_sgi, &dummy_cpu_number); + irq_dispose_mapping(virq_sgi); + } + +-- +2.43.0 + diff --git a/queue-6.6/sparc64-fix-incorrect-function-signature-and-add-pro.patch b/queue-6.6/sparc64-fix-incorrect-function-signature-and-add-pro.patch new file mode 100644 index 00000000000..66e0989fbc9 --- /dev/null +++ b/queue-6.6/sparc64-fix-incorrect-function-signature-and-add-pro.patch @@ -0,0 +1,75 @@ +From f6d08f225b3261ded6b16a858f4147cf96e37a4c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 10 Jul 2024 11:41:53 +0200 +Subject: sparc64: Fix incorrect function signature and add prototype for + prom_cif_init +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Andreas Larsson + +[ Upstream commit a6c3ea1ec96307dbfbb2f16d96c674c5cc80f445 ] + +Remove the unused cif_stack argument and add a protype in oplib_64.h +Commit ef3e035c3a9b ("sparc64: Fix register corruption in top-most +kernel stack frame during boot.") removed the cif_stack argument to +prom_cif init in the declaration at the caller site and the usage of it +within prom_cif_init, but not in the function signature of the function +itself. + +This also fixes the following warning: +arch/sparc/prom/p1275.c:52:6: warning: no previous prototype for ‘prom_cif_init’ + +Fixes: ef3e035c3a9b ("sparc64: Fix register corruption in top-most kernel stack frame during boot.") +Link: https://lore.kernel.org/r/20240710094155.458731-3-andreas@gaisler.com +Signed-off-by: Andreas Larsson +Signed-off-by: Sasha Levin +--- + arch/sparc/include/asm/oplib_64.h | 1 + + arch/sparc/prom/init_64.c | 3 --- + arch/sparc/prom/p1275.c | 2 +- + 3 files changed, 2 insertions(+), 4 deletions(-) + +diff --git a/arch/sparc/include/asm/oplib_64.h b/arch/sparc/include/asm/oplib_64.h +index a67abebd43592..1b86d02a84556 100644 +--- a/arch/sparc/include/asm/oplib_64.h ++++ b/arch/sparc/include/asm/oplib_64.h +@@ -247,6 +247,7 @@ void prom_sun4v_guest_soft_state(void); + int prom_ihandle2path(int handle, char *buffer, int bufsize); + + /* Client interface level routines. */ ++void prom_cif_init(void *cif_handler); + void p1275_cmd_direct(unsigned long *); + + #endif /* !(__SPARC64_OPLIB_H) */ +diff --git a/arch/sparc/prom/init_64.c b/arch/sparc/prom/init_64.c +index 103aa91043185..f7b8a1a865b8f 100644 +--- a/arch/sparc/prom/init_64.c ++++ b/arch/sparc/prom/init_64.c +@@ -26,9 +26,6 @@ phandle prom_chosen_node; + * routines in the prom library. + * It gets passed the pointer to the PROM vector. + */ +- +-extern void prom_cif_init(void *); +- + void __init prom_init(void *cif_handler) + { + phandle node; +diff --git a/arch/sparc/prom/p1275.c b/arch/sparc/prom/p1275.c +index 889aa602f8d86..51c3f984bbf72 100644 +--- a/arch/sparc/prom/p1275.c ++++ b/arch/sparc/prom/p1275.c +@@ -49,7 +49,7 @@ void p1275_cmd_direct(unsigned long *args) + local_irq_restore(flags); + } + +-void prom_cif_init(void *cif_handler, void *cif_stack) ++void prom_cif_init(void *cif_handler) + { + p1275buf.prom_cif_handler = (void (*)(long *))cif_handler; + } +-- +2.43.0 + diff --git a/queue-6.6/spi-atmel-quadspi-add-missing-check-for-clk_prepare.patch b/queue-6.6/spi-atmel-quadspi-add-missing-check-for-clk_prepare.patch new file mode 100644 index 00000000000..dafb8bd2be8 --- /dev/null +++ b/queue-6.6/spi-atmel-quadspi-add-missing-check-for-clk_prepare.patch @@ -0,0 +1,46 @@ +From 11576909dcbe70a12d5634dfb10920409f19622d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 15 May 2024 16:40:28 +0800 +Subject: spi: atmel-quadspi: Add missing check for clk_prepare + +From: Chen Ni + +[ Upstream commit ef901b38d3a4610c4067cd306c1a209f32e7ca31 ] + +Add check for the return value of clk_prepare() and return the error if +it fails in order to catch the error. + +Fixes: 4a2f83b7f780 ("spi: atmel-quadspi: add runtime pm support") +Signed-off-by: Chen Ni +Link: https://msgid.link/r/20240515084028.3210406-1-nichen@iscas.ac.cn +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + drivers/spi/atmel-quadspi.c | 11 +++++++++-- + 1 file changed, 9 insertions(+), 2 deletions(-) + +diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel-quadspi.c +index 3d1252566134b..4cc4f32ca4490 100644 +--- a/drivers/spi/atmel-quadspi.c ++++ b/drivers/spi/atmel-quadspi.c +@@ -756,8 +756,15 @@ static int __maybe_unused atmel_qspi_resume(struct device *dev) + struct atmel_qspi *aq = spi_controller_get_devdata(ctrl); + int ret; + +- clk_prepare(aq->pclk); +- clk_prepare(aq->qspick); ++ ret = clk_prepare(aq->pclk); ++ if (ret) ++ return ret; ++ ++ ret = clk_prepare(aq->qspick); ++ if (ret) { ++ clk_unprepare(aq->pclk); ++ return ret; ++ } + + ret = pm_runtime_force_resume(dev); + if (ret < 0) +-- +2.43.0 + diff --git a/queue-6.6/spi-spi-microchip-core-fix-the-number-of-chip-select.patch b/queue-6.6/spi-spi-microchip-core-fix-the-number-of-chip-select.patch new file mode 100644 index 00000000000..3680cff44c0 --- /dev/null +++ b/queue-6.6/spi-spi-microchip-core-fix-the-number-of-chip-select.patch @@ -0,0 +1,42 @@ +From f1f229766e5f042677f28acf87d826551c04e4eb Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 14 May 2024 11:45:07 +0100 +Subject: spi: spi-microchip-core: Fix the number of chip selects supported + +From: Prajna Rajendra Kumar + +[ Upstream commit a7ed3a11202d90939a3d00ffcc8cf50703cb7b35 ] + +The SPI "hard" controller in PolarFire SoC has eight CS lines, but only +one CS line is wired. When the 'num-cs' property is not specified in +the device tree, the driver defaults to the MAX_CS value, which has +been fixed to 1 to match the hardware configuration; however, when the +'num-cs' property is explicitly defined in the device tree, it +overrides the default value. + +Fixes: 9ac8d17694b6 ("spi: add support for microchip fpga spi controllers") +Signed-off-by: Prajna Rajendra Kumar +Reviewed-by: Conor Dooley +Link: https://msgid.link/r/20240514104508.938448-3-prajna.rajendrakumar@microchip.com +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +--- + drivers/spi/spi-microchip-core.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/spi/spi-microchip-core.c b/drivers/spi/spi-microchip-core.c +index b451cd4860ecb..6092f20f0a607 100644 +--- a/drivers/spi/spi-microchip-core.c ++++ b/drivers/spi/spi-microchip-core.c +@@ -21,7 +21,7 @@ + #include + + #define MAX_LEN (0xffff) +-#define MAX_CS (8) ++#define MAX_CS (1) + #define DEFAULT_FRAMESIZE (8) + #define FIFO_DEPTH (32) + #define CLK_GEN_MODE1_MAX (255) +-- +2.43.0 + diff --git a/queue-6.6/sunrpc-avoid-soft-lockup-when-transmitting-udp-to-re.patch b/queue-6.6/sunrpc-avoid-soft-lockup-when-transmitting-udp-to-re.patch new file mode 100644 index 00000000000..1632c186897 --- /dev/null +++ b/queue-6.6/sunrpc-avoid-soft-lockup-when-transmitting-udp-to-re.patch @@ -0,0 +1,57 @@ +From 58c1083a224a942644a7f7b238f2907471ba62c1 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 19 Jun 2024 11:05:13 +1000 +Subject: SUNRPC: avoid soft lockup when transmitting UDP to reachable server. + +From: NeilBrown + +[ Upstream commit 6258cf25d5e3155c3219ab5a79b970eef7996356 ] + +Prior to the commit identified below, call_transmit_status() would +handle -EPERM and other errors related to an unreachable server by +falling through to call_status() which added a 3-second delay and +handled the failure as a timeout. + +Since that commit, call_transmit_status() falls through to +handle_bind(). For UDP this moves straight on to handle_connect() and +handle_transmit() so we immediately retransmit - and likely get the same +error. + +This results in an indefinite loop in __rpc_execute() which triggers a +soft-lockup warning. + +For the errors that indicate an unreachable server, +call_transmit_status() should fall back to call_status() as it did +before. This cannot cause the thundering herd that the previous patch +was avoiding, as the call_status() will insert a delay. + +Fixes: ed7dc973bd91 ("SUNRPC: Prevent thundering herd when the socket is not connected") +Signed-off-by: NeilBrown +Signed-off-by: Anna Schumaker +Signed-off-by: Sasha Levin +--- + net/sunrpc/clnt.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/net/sunrpc/clnt.c b/net/sunrpc/clnt.c +index d3c917c0c8d59..142ee6554848a 100644 +--- a/net/sunrpc/clnt.c ++++ b/net/sunrpc/clnt.c +@@ -2310,12 +2310,13 @@ call_transmit_status(struct rpc_task *task) + task->tk_action = call_transmit; + task->tk_status = 0; + break; +- case -ECONNREFUSED: + case -EHOSTDOWN: + case -ENETDOWN: + case -EHOSTUNREACH: + case -ENETUNREACH: + case -EPERM: ++ break; ++ case -ECONNREFUSED: + if (RPC_IS_SOFTCONN(task)) { + if (!task->tk_msg.rpc_proc->p_proc) + trace_xprt_ping(task->tk_xprt, +-- +2.43.0 + diff --git a/queue-6.6/sunrpc-fixup-gss_status-tracepoint-error-output.patch b/queue-6.6/sunrpc-fixup-gss_status-tracepoint-error-output.patch new file mode 100644 index 00000000000..a25ddfcfc50 --- /dev/null +++ b/queue-6.6/sunrpc-fixup-gss_status-tracepoint-error-output.patch @@ -0,0 +1,36 @@ +From a5bcc304db25519c1d88a2000950944d908aa83e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 11 Jul 2024 13:21:00 -0400 +Subject: SUNRPC: Fixup gss_status tracepoint error output + +From: Benjamin Coddington + +[ Upstream commit b9fae9f06d84ffab0f3f9118f3a96bbcdc528bf6 ] + +The GSS routine errors are values, not flags. + +Fixes: 0c77668ddb4e ("SUNRPC: Introduce trace points in rpc_auth_gss.ko") +Signed-off-by: Benjamin Coddington +Reviewed-by: Chuck Lever +Signed-off-by: Anna Schumaker +Signed-off-by: Sasha Levin +--- + include/trace/events/rpcgss.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/include/trace/events/rpcgss.h b/include/trace/events/rpcgss.h +index f50fcafc69de2..78704f1209d3e 100644 +--- a/include/trace/events/rpcgss.h ++++ b/include/trace/events/rpcgss.h +@@ -54,7 +54,7 @@ TRACE_DEFINE_ENUM(GSS_S_UNSEQ_TOKEN); + TRACE_DEFINE_ENUM(GSS_S_GAP_TOKEN); + + #define show_gss_status(x) \ +- __print_flags(x, "|", \ ++ __print_symbolic(x, \ + { GSS_S_BAD_MECH, "GSS_S_BAD_MECH" }, \ + { GSS_S_BAD_NAME, "GSS_S_BAD_NAME" }, \ + { GSS_S_BAD_NAMETYPE, "GSS_S_BAD_NAMETYPE" }, \ +-- +2.43.0 + diff --git a/queue-6.6/tcp-add-tcp_done_with_error-helper.patch b/queue-6.6/tcp-add-tcp_done_with_error-helper.patch new file mode 100644 index 00000000000..4261503a2ad --- /dev/null +++ b/queue-6.6/tcp-add-tcp_done_with_error-helper.patch @@ -0,0 +1,115 @@ +From 4bd8cff41d111bb772b91c003d09d084ef846ee3 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 28 May 2024 12:52:50 +0000 +Subject: tcp: add tcp_done_with_error() helper + +From: Eric Dumazet + +[ Upstream commit 5e514f1cba090e1c8fff03e92a175eccfe46305f ] + +tcp_reset() ends with a sequence that is carefuly ordered. + +We need to fix [e]poll bugs in the following patches, +it makes sense to use a common helper. + +Suggested-by: Neal Cardwell +Signed-off-by: Eric Dumazet +Acked-by: Neal Cardwell +Link: https://lore.kernel.org/r/20240528125253.1966136-2-edumazet@google.com +Signed-off-by: Jakub Kicinski +Stable-dep-of: 853c3bd7b791 ("tcp: fix race in tcp_write_err()") +Signed-off-by: Sasha Levin +--- + include/net/tcp.h | 1 + + net/ipv4/tcp.c | 2 +- + net/ipv4/tcp_input.c | 32 +++++++++++++++++++++----------- + 3 files changed, 23 insertions(+), 12 deletions(-) + +diff --git a/include/net/tcp.h b/include/net/tcp.h +index 690770321a6e3..71af244104433 100644 +--- a/include/net/tcp.h ++++ b/include/net/tcp.h +@@ -624,6 +624,7 @@ void tcp_skb_collapse_tstamp(struct sk_buff *skb, + /* tcp_input.c */ + void tcp_rearm_rto(struct sock *sk); + void tcp_synack_rtt_meas(struct sock *sk, struct request_sock *req); ++void tcp_done_with_error(struct sock *sk, int err); + void tcp_reset(struct sock *sk, struct sk_buff *skb); + void tcp_fin(struct sock *sk); + void tcp_check_space(struct sock *sk); +diff --git a/net/ipv4/tcp.c b/net/ipv4/tcp.c +index 2df05ea2e00fe..91c3d8264059d 100644 +--- a/net/ipv4/tcp.c ++++ b/net/ipv4/tcp.c +@@ -591,7 +591,7 @@ __poll_t tcp_poll(struct file *file, struct socket *sock, poll_table *wait) + */ + mask |= EPOLLOUT | EPOLLWRNORM; + } +- /* This barrier is coupled with smp_wmb() in tcp_reset() */ ++ /* This barrier is coupled with smp_wmb() in tcp_done_with_error() */ + smp_rmb(); + if (READ_ONCE(sk->sk_err) || + !skb_queue_empty_lockless(&sk->sk_error_queue)) +diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c +index b9133c0972d38..c2e4dac42453b 100644 +--- a/net/ipv4/tcp_input.c ++++ b/net/ipv4/tcp_input.c +@@ -4367,9 +4367,26 @@ static enum skb_drop_reason tcp_sequence(const struct tcp_sock *tp, + return SKB_NOT_DROPPED_YET; + } + ++ ++void tcp_done_with_error(struct sock *sk, int err) ++{ ++ /* This barrier is coupled with smp_rmb() in tcp_poll() */ ++ WRITE_ONCE(sk->sk_err, err); ++ smp_wmb(); ++ ++ tcp_write_queue_purge(sk); ++ tcp_done(sk); ++ ++ if (!sock_flag(sk, SOCK_DEAD)) ++ sk_error_report(sk); ++} ++EXPORT_SYMBOL(tcp_done_with_error); ++ + /* When we get a reset we do this. */ + void tcp_reset(struct sock *sk, struct sk_buff *skb) + { ++ int err; ++ + trace_tcp_receive_reset(sk); + + /* mptcp can't tell us to ignore reset pkts, +@@ -4381,24 +4398,17 @@ void tcp_reset(struct sock *sk, struct sk_buff *skb) + /* We want the right error as BSD sees it (and indeed as we do). */ + switch (sk->sk_state) { + case TCP_SYN_SENT: +- WRITE_ONCE(sk->sk_err, ECONNREFUSED); ++ err = ECONNREFUSED; + break; + case TCP_CLOSE_WAIT: +- WRITE_ONCE(sk->sk_err, EPIPE); ++ err = EPIPE; + break; + case TCP_CLOSE: + return; + default: +- WRITE_ONCE(sk->sk_err, ECONNRESET); ++ err = ECONNRESET; + } +- /* This barrier is coupled with smp_rmb() in tcp_poll() */ +- smp_wmb(); +- +- tcp_write_queue_purge(sk); +- tcp_done(sk); +- +- if (!sock_flag(sk, SOCK_DEAD)) +- sk_error_report(sk); ++ tcp_done_with_error(sk, err); + } + + /* +-- +2.43.0 + diff --git a/queue-6.6/tcp-fix-race-in-tcp_write_err.patch b/queue-6.6/tcp-fix-race-in-tcp_write_err.patch new file mode 100644 index 00000000000..6262679abcf --- /dev/null +++ b/queue-6.6/tcp-fix-race-in-tcp_write_err.patch @@ -0,0 +1,64 @@ +From d31ca02835d85fa05f88575bccf00e5afdae1e86 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 28 May 2024 12:52:51 +0000 +Subject: tcp: fix race in tcp_write_err() + +From: Eric Dumazet + +[ Upstream commit 853c3bd7b7917670224c9fe5245bd045cac411dd ] + +I noticed flakes in a packetdrill test, expecting an epoll_wait() +to return EPOLLERR | EPOLLHUP on a failed connect() attempt, +after multiple SYN retransmits. It sometimes return EPOLLERR only. + +The issue is that tcp_write_err(): + 1) writes an error in sk->sk_err, + 2) calls sk_error_report(), + 3) then calls tcp_done(). + +tcp_done() is writing SHUTDOWN_MASK into sk->sk_shutdown, +among other things. + +Problem is that the awaken user thread (from 2) sk_error_report()) +might call tcp_poll() before tcp_done() has written sk->sk_shutdown. + +tcp_poll() only sees a non zero sk->sk_err and returns EPOLLERR. + +This patch fixes the issue by making sure to call sk_error_report() +after tcp_done(). + +tcp_write_err() also lacks an smp_wmb(). + +We can reuse tcp_done_with_error() to factor out the details, +as Neal suggested. + +Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2") +Signed-off-by: Eric Dumazet +Acked-by: Neal Cardwell +Link: https://lore.kernel.org/r/20240528125253.1966136-3-edumazet@google.com +Signed-off-by: Jakub Kicinski +Signed-off-by: Sasha Levin +--- + net/ipv4/tcp_timer.c | 6 +----- + 1 file changed, 1 insertion(+), 5 deletions(-) + +diff --git a/net/ipv4/tcp_timer.c b/net/ipv4/tcp_timer.c +index 87ebe958a642f..64bcf384e9ddc 100644 +--- a/net/ipv4/tcp_timer.c ++++ b/net/ipv4/tcp_timer.c +@@ -69,11 +69,7 @@ u32 tcp_clamp_probe0_to_user_timeout(const struct sock *sk, u32 when) + + static void tcp_write_err(struct sock *sk) + { +- WRITE_ONCE(sk->sk_err, READ_ONCE(sk->sk_err_soft) ? : ETIMEDOUT); +- sk_error_report(sk); +- +- tcp_write_queue_purge(sk); +- tcp_done(sk); ++ tcp_done_with_error(sk, READ_ONCE(sk->sk_err_soft) ? : ETIMEDOUT); + __NET_INC_STATS(sock_net(sk), LINUX_MIB_TCPABORTONTIMEOUT); + } + +-- +2.43.0 + diff --git a/queue-6.6/tcp-fix-races-in-tcp_v-46-_err.patch b/queue-6.6/tcp-fix-races-in-tcp_v-46-_err.patch new file mode 100644 index 00000000000..da51b1a38cd --- /dev/null +++ b/queue-6.6/tcp-fix-races-in-tcp_v-46-_err.patch @@ -0,0 +1,83 @@ +From 00e0b84d722d31418e59aad38455e64cd3e43032 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 28 May 2024 12:52:53 +0000 +Subject: tcp: fix races in tcp_v[46]_err() + +From: Eric Dumazet + +[ Upstream commit fde6f897f2a184546bf5516ac736523ef24dc6a7 ] + +These functions have races when they: + +1) Write sk->sk_err +2) call sk_error_report(sk) +3) call tcp_done(sk) + +As described in prior patches in this series: + +An smp_wmb() is missing. +We should call tcp_done() before sk_error_report(sk) +to have consistent tcp_poll() results on SMP hosts. + +Use tcp_done_with_error() where we centralized the +correct sequence. + +Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2") +Signed-off-by: Eric Dumazet +Acked-by: Neal Cardwell +Link: https://lore.kernel.org/r/20240528125253.1966136-5-edumazet@google.com +Signed-off-by: Jakub Kicinski +Signed-off-by: Sasha Levin +--- + net/ipv4/tcp_ipv4.c | 11 +++-------- + net/ipv6/tcp_ipv6.c | 10 +++------- + 2 files changed, 6 insertions(+), 15 deletions(-) + +diff --git a/net/ipv4/tcp_ipv4.c b/net/ipv4/tcp_ipv4.c +index 7c2ca4df0daa3..48ec2c1777d45 100644 +--- a/net/ipv4/tcp_ipv4.c ++++ b/net/ipv4/tcp_ipv4.c +@@ -602,15 +602,10 @@ int tcp_v4_err(struct sk_buff *skb, u32 info) + + ip_icmp_error(sk, skb, err, th->dest, info, (u8 *)th); + +- if (!sock_owned_by_user(sk)) { +- WRITE_ONCE(sk->sk_err, err); +- +- sk_error_report(sk); +- +- tcp_done(sk); +- } else { ++ if (!sock_owned_by_user(sk)) ++ tcp_done_with_error(sk, err); ++ else + WRITE_ONCE(sk->sk_err_soft, err); +- } + goto out; + } + +diff --git a/net/ipv6/tcp_ipv6.c b/net/ipv6/tcp_ipv6.c +index 07bcb690932e1..d0034916d386b 100644 +--- a/net/ipv6/tcp_ipv6.c ++++ b/net/ipv6/tcp_ipv6.c +@@ -488,14 +488,10 @@ static int tcp_v6_err(struct sk_buff *skb, struct inet6_skb_parm *opt, + + ipv6_icmp_error(sk, skb, err, th->dest, ntohl(info), (u8 *)th); + +- if (!sock_owned_by_user(sk)) { +- WRITE_ONCE(sk->sk_err, err); +- sk_error_report(sk); /* Wake people up to see the error (see connect in sock.c) */ +- +- tcp_done(sk); +- } else { ++ if (!sock_owned_by_user(sk)) ++ tcp_done_with_error(sk, err); ++ else + WRITE_ONCE(sk->sk_err_soft, err); +- } + goto out; + case TCP_LISTEN: + break; +-- +2.43.0 + diff --git a/queue-6.6/ubd-refactor-the-interrupt-handler.patch b/queue-6.6/ubd-refactor-the-interrupt-handler.patch new file mode 100644 index 00000000000..26da90d2b4e --- /dev/null +++ b/queue-6.6/ubd-refactor-the-interrupt-handler.patch @@ -0,0 +1,93 @@ +From 5b4a49cd1249310c5d50c6f77f130c0fe4e2b448 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 31 May 2024 09:47:56 +0200 +Subject: ubd: refactor the interrupt handler + +From: Christoph Hellwig + +[ Upstream commit 5db755fbb1a0de4a4cfd5d5edfaa19853b9c56e6 ] + +Instead of a separate handler function that leaves no work in the +interrupt hanler itself, split out a per-request end I/O helper and +clean up the coding style and variable naming while we're at it. + +Signed-off-by: Christoph Hellwig +Reviewed-by: Martin K. Petersen +Acked-By: Anton Ivanov +Link: https://lore.kernel.org/r/20240531074837.1648501-2-hch@lst.de +Signed-off-by: Jens Axboe +Stable-dep-of: 31ade7d4fdcf ("ubd: untagle discard vs write zeroes not support handling") +Signed-off-by: Sasha Levin +--- + arch/um/drivers/ubd_kern.c | 49 ++++++++++++++------------------------ + 1 file changed, 18 insertions(+), 31 deletions(-) + +diff --git a/arch/um/drivers/ubd_kern.c b/arch/um/drivers/ubd_kern.c +index 81405aeab8bf1..73354782f5871 100644 +--- a/arch/um/drivers/ubd_kern.c ++++ b/arch/um/drivers/ubd_kern.c +@@ -456,43 +456,30 @@ static int bulk_req_safe_read( + return n; + } + +-/* Called without dev->lock held, and only in interrupt context. */ +-static void ubd_handler(void) ++static void ubd_end_request(struct io_thread_req *io_req) + { +- int n; +- int count; +- +- while(1){ +- n = bulk_req_safe_read( +- thread_fd, +- irq_req_buffer, +- &irq_remainder, +- &irq_remainder_size, +- UBD_REQ_BUFFER_SIZE +- ); +- if (n < 0) { +- if(n == -EAGAIN) +- break; +- printk(KERN_ERR "spurious interrupt in ubd_handler, " +- "err = %d\n", -n); +- return; +- } +- for (count = 0; count < n/sizeof(struct io_thread_req *); count++) { +- struct io_thread_req *io_req = (*irq_req_buffer)[count]; +- +- if ((io_req->error == BLK_STS_NOTSUPP) && (req_op(io_req->req) == REQ_OP_DISCARD)) { +- blk_queue_max_discard_sectors(io_req->req->q, 0); +- blk_queue_max_write_zeroes_sectors(io_req->req->q, 0); +- } +- blk_mq_end_request(io_req->req, io_req->error); +- kfree(io_req); +- } ++ if (io_req->error == BLK_STS_NOTSUPP && ++ req_op(io_req->req) == REQ_OP_DISCARD) { ++ blk_queue_max_discard_sectors(io_req->req->q, 0); ++ blk_queue_max_write_zeroes_sectors(io_req->req->q, 0); + } ++ blk_mq_end_request(io_req->req, io_req->error); ++ kfree(io_req); + } + + static irqreturn_t ubd_intr(int irq, void *dev) + { +- ubd_handler(); ++ int len, i; ++ ++ while ((len = bulk_req_safe_read(thread_fd, irq_req_buffer, ++ &irq_remainder, &irq_remainder_size, ++ UBD_REQ_BUFFER_SIZE)) >= 0) { ++ for (i = 0; i < len / sizeof(struct io_thread_req *); i++) ++ ubd_end_request((*irq_req_buffer)[i]); ++ } ++ ++ if (len < 0 && len != -EAGAIN) ++ pr_err("spurious interrupt in %s, err = %d\n", __func__, len); + return IRQ_HANDLED; + } + +-- +2.43.0 + diff --git a/queue-6.6/ubd-untagle-discard-vs-write-zeroes-not-support-hand.patch b/queue-6.6/ubd-untagle-discard-vs-write-zeroes-not-support-hand.patch new file mode 100644 index 00000000000..07626efd0ff --- /dev/null +++ b/queue-6.6/ubd-untagle-discard-vs-write-zeroes-not-support-hand.patch @@ -0,0 +1,52 @@ +From 2ad1515e9beec1ae6b78f95fc440d3d9b1d1c823 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 31 May 2024 09:47:57 +0200 +Subject: ubd: untagle discard vs write zeroes not support handling + +From: Christoph Hellwig + +[ Upstream commit 31ade7d4fdcf382beb8cb229a1f5d77e0f239672 ] + +Discard and Write Zeroes are different operation and implemented +by different fallocate opcodes for ubd. If one fails the other one +can work and vice versa. + +Split the code to disable the operations in ubd_handler to only +disable the operation that actually failed. + +Fixes: 50109b5a03b4 ("um: Add support for DISCARD in the UBD Driver") +Signed-off-by: Christoph Hellwig +Reviewed-by: Bart Van Assche +Reviewed-by: Damien Le Moal +Reviewed-by: Martin K. Petersen +Acked-By: Anton Ivanov +Link: https://lore.kernel.org/r/20240531074837.1648501-3-hch@lst.de +Signed-off-by: Jens Axboe +Signed-off-by: Sasha Levin +--- + arch/um/drivers/ubd_kern.c | 9 +++++---- + 1 file changed, 5 insertions(+), 4 deletions(-) + +diff --git a/arch/um/drivers/ubd_kern.c b/arch/um/drivers/ubd_kern.c +index 73354782f5871..ef7b4b911a455 100644 +--- a/arch/um/drivers/ubd_kern.c ++++ b/arch/um/drivers/ubd_kern.c +@@ -458,10 +458,11 @@ static int bulk_req_safe_read( + + static void ubd_end_request(struct io_thread_req *io_req) + { +- if (io_req->error == BLK_STS_NOTSUPP && +- req_op(io_req->req) == REQ_OP_DISCARD) { +- blk_queue_max_discard_sectors(io_req->req->q, 0); +- blk_queue_max_write_zeroes_sectors(io_req->req->q, 0); ++ if (io_req->error == BLK_STS_NOTSUPP) { ++ if (req_op(io_req->req) == REQ_OP_DISCARD) ++ blk_queue_max_discard_sectors(io_req->req->q, 0); ++ else if (req_op(io_req->req) == REQ_OP_WRITE_ZEROES) ++ blk_queue_max_write_zeroes_sectors(io_req->req->q, 0); + } + blk_mq_end_request(io_req->req, io_req->error); + kfree(io_req); +-- +2.43.0 + diff --git a/queue-6.6/udf-fix-bogus-checksum-computation-in-udf_rename.patch b/queue-6.6/udf-fix-bogus-checksum-computation-in-udf_rename.patch new file mode 100644 index 00000000000..dd45a1a8601 --- /dev/null +++ b/queue-6.6/udf-fix-bogus-checksum-computation-in-udf_rename.patch @@ -0,0 +1,45 @@ +From bf636f5bd298c416a6668504292b1f9d3cc7518f Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 17 Jun 2024 17:41:51 +0200 +Subject: udf: Fix bogus checksum computation in udf_rename() + +From: Jan Kara + +[ Upstream commit 27ab33854873e6fb958cb074681a0107cc2ecc4c ] + +Syzbot reports uninitialized memory access in udf_rename() when updating +checksum of '..' directory entry of a moved directory. This is indeed +true as we pass on-stack diriter.fi to the udf_update_tag() and because +that has only struct fileIdentDesc included in it and not the impUse or +name fields, the checksumming function is going to checksum random stack +contents beyond the end of the structure. This is actually harmless +because the following udf_fiiter_write_fi() will recompute the checksum +from on-disk buffers where everything is properly included. So all that +is needed is just removing the bogus calculation. + +Fixes: e9109a92d2a9 ("udf: Convert udf_rename() to new directory iteration code") +Link: https://lore.kernel.org/all/000000000000cf405f060d8f75a9@google.com/T/ +Link: https://patch.msgid.link/20240617154201.29512-1-jack@suse.cz +Reported-by: syzbot+d31185aa54170f7fc1f5@syzkaller.appspotmail.com +Signed-off-by: Jan Kara +Signed-off-by: Sasha Levin +--- + fs/udf/namei.c | 2 -- + 1 file changed, 2 deletions(-) + +diff --git a/fs/udf/namei.c b/fs/udf/namei.c +index ae55ab8859b6d..605f182da42cb 100644 +--- a/fs/udf/namei.c ++++ b/fs/udf/namei.c +@@ -874,8 +874,6 @@ static int udf_rename(struct mnt_idmap *idmap, struct inode *old_dir, + if (has_diriter) { + diriter.fi.icb.extLocation = + cpu_to_lelb(UDF_I(new_dir)->i_location); +- udf_update_tag((char *)&diriter.fi, +- udf_dir_entry_len(&diriter.fi)); + udf_fiiter_write_fi(&diriter, NULL); + udf_fiiter_release(&diriter); + +-- +2.43.0 + diff --git a/queue-6.6/udf-fix-lock-ordering-in-udf_evict_inode.patch b/queue-6.6/udf-fix-lock-ordering-in-udf_evict_inode.patch new file mode 100644 index 00000000000..1c401f06a86 --- /dev/null +++ b/queue-6.6/udf-fix-lock-ordering-in-udf_evict_inode.patch @@ -0,0 +1,99 @@ +From 4587cfd20b21a90079987274b388a032a000c572 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 20 May 2024 15:23:37 +0200 +Subject: udf: Fix lock ordering in udf_evict_inode() + +From: Jan Kara + +[ Upstream commit 8832fc1e502687869606bb0a7b79848ed3bf036f ] + +udf_evict_inode() calls udf_setsize() to truncate deleted inode. +However inode deletion through udf_evict_inode() can happen from inode +reclaim context and udf_setsize() grabs mapping->invalidate_lock which +isn't generally safe to acquire from fs reclaim context since we +allocate pages under mapping->invalidate_lock for example in a page +fault path. This is however not a real deadlock possibility as by the +time udf_evict_inode() is called, nobody can be accessing the inode, +even less work with its page cache. So this is just a lockdep triggering +false positive. Fix the problem by moving mapping->invalidate_lock +locking outsize of udf_setsize() into udf_setattr() as grabbing +mapping->invalidate_lock from udf_evict_inode() is pointless. + +Reported-by: syzbot+0333a6f4b88bcd68a62f@syzkaller.appspotmail.com +Fixes: b9a861fd527a ("udf: Protect truncate and file type conversion with invalidate_lock") +Signed-off-by: Jan Kara +Signed-off-by: Sasha Levin +--- + fs/udf/file.c | 2 ++ + fs/udf/inode.c | 11 ++++------- + 2 files changed, 6 insertions(+), 7 deletions(-) + +diff --git a/fs/udf/file.c b/fs/udf/file.c +index 0ceac4b5937c7..94daaaf76f71c 100644 +--- a/fs/udf/file.c ++++ b/fs/udf/file.c +@@ -232,7 +232,9 @@ static int udf_setattr(struct mnt_idmap *idmap, struct dentry *dentry, + + if ((attr->ia_valid & ATTR_SIZE) && + attr->ia_size != i_size_read(inode)) { ++ filemap_invalidate_lock(inode->i_mapping); + error = udf_setsize(inode, attr->ia_size); ++ filemap_invalidate_unlock(inode->i_mapping); + if (error) + return error; + } +diff --git a/fs/udf/inode.c b/fs/udf/inode.c +index 1ff8c1f17f9e6..8db07d1f56bc9 100644 +--- a/fs/udf/inode.c ++++ b/fs/udf/inode.c +@@ -1252,7 +1252,6 @@ int udf_setsize(struct inode *inode, loff_t newsize) + if (IS_APPEND(inode) || IS_IMMUTABLE(inode)) + return -EPERM; + +- filemap_invalidate_lock(inode->i_mapping); + iinfo = UDF_I(inode); + if (newsize > inode->i_size) { + if (iinfo->i_alloc_type == ICBTAG_FLAG_AD_IN_ICB) { +@@ -1265,11 +1264,11 @@ int udf_setsize(struct inode *inode, loff_t newsize) + } + err = udf_expand_file_adinicb(inode); + if (err) +- goto out_unlock; ++ return err; + } + err = udf_extend_file(inode, newsize); + if (err) +- goto out_unlock; ++ return err; + set_size: + truncate_setsize(inode, newsize); + } else { +@@ -1287,14 +1286,14 @@ int udf_setsize(struct inode *inode, loff_t newsize) + err = block_truncate_page(inode->i_mapping, newsize, + udf_get_block); + if (err) +- goto out_unlock; ++ return err; + truncate_setsize(inode, newsize); + down_write(&iinfo->i_data_sem); + udf_clear_extent_cache(inode); + err = udf_truncate_extents(inode); + up_write(&iinfo->i_data_sem); + if (err) +- goto out_unlock; ++ return err; + } + update_time: + inode->i_mtime = inode_set_ctime_current(inode); +@@ -1302,8 +1301,6 @@ int udf_setsize(struct inode *inode, loff_t newsize) + udf_sync_inode(inode); + else + mark_inode_dirty(inode); +-out_unlock: +- filemap_invalidate_unlock(inode->i_mapping); + return err; + } + +-- +2.43.0 + diff --git a/queue-6.6/usb-typec-mux-nb7vpq904m-unregister-typec-switch-on-.patch b/queue-6.6/usb-typec-mux-nb7vpq904m-unregister-typec-switch-on-.patch new file mode 100644 index 00000000000..2638e2fd67c --- /dev/null +++ b/queue-6.6/usb-typec-mux-nb7vpq904m-unregister-typec-switch-on-.patch @@ -0,0 +1,60 @@ +From eee8c4da7fe8076a124c0419208dba8b6e2699bb Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 Jun 2024 15:11:14 +0200 +Subject: usb: typec-mux: nb7vpq904m: unregister typec switch on probe error + and remove + +From: Neil Armstrong + +[ Upstream commit 74b64e760ee3433c0f8d95715038c869bcddacf7 ] + +Add the missing call to typec_switch_put() when probe fails and +the nb7vpq904m_remove() call is called. + +Fixes: 348359e7c232 ("usb: typec: nb7vpq904m: Add an error handling path in nb7vpq904m_probe()") +Signed-off-by: Neil Armstrong +Fixes: 88d8f3ac9c67 ("usb: typec: add support for the nb7vpq904m Type-C Linear Redriver") +Reviewed-by: Dmitry Baryshkov +Reviewed-by: Heikki Krogerus +Link: https://lore.kernel.org/r/20240606-topic-sm8x50-upstream-retimer-broadcast-mode-v2-2-c6f6eae479c3@linaro.org +Signed-off-by: Greg Kroah-Hartman +Signed-off-by: Sasha Levin +--- + drivers/usb/typec/mux/nb7vpq904m.c | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +diff --git a/drivers/usb/typec/mux/nb7vpq904m.c b/drivers/usb/typec/mux/nb7vpq904m.c +index cda206cf0c387..596639dad31d7 100644 +--- a/drivers/usb/typec/mux/nb7vpq904m.c ++++ b/drivers/usb/typec/mux/nb7vpq904m.c +@@ -453,7 +453,7 @@ static int nb7vpq904m_probe(struct i2c_client *client) + + ret = nb7vpq904m_parse_data_lanes_mapping(nb7); + if (ret) +- return ret; ++ goto err_switch_put; + + ret = regulator_enable(nb7->vcc_supply); + if (ret) +@@ -496,6 +496,9 @@ static int nb7vpq904m_probe(struct i2c_client *client) + gpiod_set_value(nb7->enable_gpio, 0); + regulator_disable(nb7->vcc_supply); + ++err_switch_put: ++ typec_switch_put(nb7->typec_switch); ++ + return ret; + } + +@@ -509,6 +512,8 @@ static void nb7vpq904m_remove(struct i2c_client *client) + gpiod_set_value(nb7->enable_gpio, 0); + + regulator_disable(nb7->vcc_supply); ++ ++ typec_switch_put(nb7->typec_switch); + } + + static const struct i2c_device_id nb7vpq904m_table[] = { +-- +2.43.0 + diff --git a/queue-6.6/vhost-vsock-always-initialize-seqpacket_allow.patch b/queue-6.6/vhost-vsock-always-initialize-seqpacket_allow.patch new file mode 100644 index 00000000000..64e1e7ed013 --- /dev/null +++ b/queue-6.6/vhost-vsock-always-initialize-seqpacket_allow.patch @@ -0,0 +1,68 @@ +From 9d7062afccb9cf442111e3e9ee7e6589f346a0dc Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 22 Apr 2024 10:03:13 -0400 +Subject: vhost/vsock: always initialize seqpacket_allow +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Michael S. Tsirkin + +[ Upstream commit 1e1fdcbdde3b7663e5d8faeb2245b9b151417d22 ] + +There are two issues around seqpacket_allow: +1. seqpacket_allow is not initialized when socket is + created. Thus if features are never set, it will be + read uninitialized. +2. if VIRTIO_VSOCK_F_SEQPACKET is set and then cleared, + then seqpacket_allow will not be cleared appropriately + (existing apps I know about don't usually do this but + it's legal and there's no way to be sure no one relies + on this). + +To fix: + - initialize seqpacket_allow after allocation + - set it unconditionally in set_features + +Reported-by: syzbot+6c21aeb59d0e82eb2782@syzkaller.appspotmail.com +Reported-by: Jeongjun Park +Fixes: ced7b713711f ("vhost/vsock: support SEQPACKET for transport"). +Tested-by: Arseny Krasnov +Cc: David S. Miller +Cc: Stefan Hajnoczi +Message-ID: <20240422100010-mutt-send-email-mst@kernel.org> +Signed-off-by: Michael S. Tsirkin +Acked-by: Jason Wang +Reviewed-by: Stefano Garzarella +Reviewed-by: Eugenio Pérez +Acked-by: Jakub Kicinski +Signed-off-by: Sasha Levin +--- + drivers/vhost/vsock.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/vhost/vsock.c b/drivers/vhost/vsock.c +index 61255855d4906..d94a06008ff64 100644 +--- a/drivers/vhost/vsock.c ++++ b/drivers/vhost/vsock.c +@@ -656,6 +656,7 @@ static int vhost_vsock_dev_open(struct inode *inode, struct file *file) + } + + vsock->guest_cid = 0; /* no CID assigned yet */ ++ vsock->seqpacket_allow = false; + + atomic_set(&vsock->queued_replies, 0); + +@@ -799,8 +800,7 @@ static int vhost_vsock_set_features(struct vhost_vsock *vsock, u64 features) + goto err; + } + +- if (features & (1ULL << VIRTIO_VSOCK_F_SEQPACKET)) +- vsock->seqpacket_allow = true; ++ vsock->seqpacket_allow = features & (1ULL << VIRTIO_VSOCK_F_SEQPACKET); + + for (i = 0; i < ARRAY_SIZE(vsock->vqs); i++) { + vq = &vsock->vqs[i]; +-- +2.43.0 + diff --git a/queue-6.6/vmlinux.lds.h-catch-.bss.l-sections-into-bss.patch b/queue-6.6/vmlinux.lds.h-catch-.bss.l-sections-into-bss.patch new file mode 100644 index 00000000000..6ff3b964186 --- /dev/null +++ b/queue-6.6/vmlinux.lds.h-catch-.bss.l-sections-into-bss.patch @@ -0,0 +1,57 @@ +From 31f0bfcc955f4e9d74960a0da67213062233be2b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 12 Jul 2024 07:51:58 +0200 +Subject: vmlinux.lds.h: catch .bss..L* sections into BSS") + +From: Christophe Leroy + +[ Upstream commit 1a7b7326d587c9a5e8ff067e70d6aaf0333f4bb3 ] + +Commit 9a427556fb8e ("vmlinux.lds.h: catch compound literals into +data and BSS") added catches for .data..L* and .rodata..L* but missed +.bss..L* + +Since commit 5431fdd2c181 ("ptrace: Convert ptrace_attach() to use +lock guards") the following appears at build: + + LD .tmp_vmlinux.kallsyms1 +powerpc64-linux-ld: warning: orphan section `.bss..Lubsan_data33' from `kernel/ptrace.o' being placed in section `.bss..Lubsan_data33' + NM .tmp_vmlinux.kallsyms1.syms + KSYMS .tmp_vmlinux.kallsyms1.S + AS .tmp_vmlinux.kallsyms1.S + LD .tmp_vmlinux.kallsyms2 +powerpc64-linux-ld: warning: orphan section `.bss..Lubsan_data33' from `kernel/ptrace.o' being placed in section `.bss..Lubsan_data33' + NM .tmp_vmlinux.kallsyms2.syms + KSYMS .tmp_vmlinux.kallsyms2.S + AS .tmp_vmlinux.kallsyms2.S + LD vmlinux +powerpc64-linux-ld: warning: orphan section `.bss..Lubsan_data33' from `kernel/ptrace.o' being placed in section `.bss..Lubsan_data33' + +Lets add .bss..L* to BSS_MAIN macro to catch those sections into BSS. + +Fixes: 9a427556fb8e ("vmlinux.lds.h: catch compound literals into data and BSS") +Signed-off-by: Christophe Leroy +Reported-by: kernel test robot +Closes: https://lore.kernel.org/oe-kbuild-all/202404031349.nmKhyuUG-lkp@intel.com/ +Signed-off-by: Arnd Bergmann +Signed-off-by: Sasha Levin +--- + include/asm-generic/vmlinux.lds.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h +index bae0fe4d499bc..63029bc7c9dd0 100644 +--- a/include/asm-generic/vmlinux.lds.h ++++ b/include/asm-generic/vmlinux.lds.h +@@ -101,7 +101,7 @@ + #define DATA_MAIN .data .data.[0-9a-zA-Z_]* .data..L* .data..compoundliteral* .data.$__unnamed_* .data.$L* + #define SDATA_MAIN .sdata .sdata.[0-9a-zA-Z_]* + #define RODATA_MAIN .rodata .rodata.[0-9a-zA-Z_]* .rodata..L* +-#define BSS_MAIN .bss .bss.[0-9a-zA-Z_]* .bss..compoundliteral* ++#define BSS_MAIN .bss .bss.[0-9a-zA-Z_]* .bss..L* .bss..compoundliteral* + #define SBSS_MAIN .sbss .sbss.[0-9a-zA-Z_]* + #else + #define TEXT_MAIN .text +-- +2.43.0 + diff --git a/queue-6.6/wifi-ath11k-fix-wrong-definition-of-ce-ring-s-base-a.patch b/queue-6.6/wifi-ath11k-fix-wrong-definition-of-ce-ring-s-base-a.patch new file mode 100644 index 00000000000..140fccd6fb0 --- /dev/null +++ b/queue-6.6/wifi-ath11k-fix-wrong-definition-of-ce-ring-s-base-a.patch @@ -0,0 +1,65 @@ +From 649a97fd45403e79b53848b50a1f817cb5e00c55 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 24 May 2024 10:15:58 +0800 +Subject: wifi: ath11k: fix wrong definition of CE ring's base address + +From: Baochen Qiang + +[ Upstream commit 5714e25f1d1875b300fb337dadfaa75324c1161a ] + +Base address of CE ring is defined as u32, currently this works +because coherent DMA mask configured as 32 bit: + + #define ATH11K_PCI_COHERENT_DMA_MASK 32 + +However this mask could be changed once firmware bugs are fixed +to fully support 36 bit DMA addressing. So to protect against any +future changes to the DMA mask, change the type of the fields that +are dependent upon it. + +This is found during code review. Compile tested only. + +Fixes: d5c65159f289 ("ath11k: driver for Qualcomm IEEE 802.11ax devices") +Signed-off-by: Baochen Qiang +Acked-by: Jeff Johnson +Signed-off-by: Kalle Valo +Link: https://msgid.link/20240524021558.34452-1-quic_bqiang@quicinc.com +Signed-off-by: Sasha Levin +--- + drivers/net/wireless/ath/ath11k/ce.h | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/drivers/net/wireless/ath/ath11k/ce.h b/drivers/net/wireless/ath/ath11k/ce.h +index 69946fc700777..bcde2fcf02cf7 100644 +--- a/drivers/net/wireless/ath/ath11k/ce.h ++++ b/drivers/net/wireless/ath/ath11k/ce.h +@@ -1,7 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. +- * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2022, 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #ifndef ATH11K_CE_H +@@ -146,7 +146,7 @@ struct ath11k_ce_ring { + /* Host address space */ + void *base_addr_owner_space_unaligned; + /* CE address space */ +- u32 base_addr_ce_space_unaligned; ++ dma_addr_t base_addr_ce_space_unaligned; + + /* Actual start of descriptors. + * Aligned to descriptor-size boundary. +@@ -156,7 +156,7 @@ struct ath11k_ce_ring { + void *base_addr_owner_space; + + /* CE address space */ +- u32 base_addr_ce_space; ++ dma_addr_t base_addr_ce_space; + + /* HAL ring id */ + u32 hal_ring_id; +-- +2.43.0 + diff --git a/queue-6.6/wifi-ath11k-fix-wrong-handling-of-ccmp256-and-gcmp-c.patch b/queue-6.6/wifi-ath11k-fix-wrong-handling-of-ccmp256-and-gcmp-c.patch new file mode 100644 index 00000000000..a1126502cc3 --- /dev/null +++ b/queue-6.6/wifi-ath11k-fix-wrong-handling-of-ccmp256-and-gcmp-c.patch @@ -0,0 +1,133 @@ +From 659e4966b38ea460d6b1239f7fbf6301184a76bb Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 11 Jun 2024 09:42:34 +0300 +Subject: wifi: ath11k: fix wrong handling of CCMP256 and GCMP ciphers + +From: Baochen Qiang + +[ Upstream commit d2b0ca38d362ebf16ca79cd7f309d5bb8b581deb ] + +Currently for CCMP256, GCMP128 and GCMP256 ciphers, in ath11k_install_key() +IEEE80211_KEY_FLAG_GENERATE_IV_MGMT is not set. And in ath11k_mac_mgmt_tx_wmi() +a length of IEEE80211_CCMP_MIC_LEN is reserved for all ciphers. + +This results in unexpected management frame drop in case either of above 3 ciphers +is used. The reason is, without IEEE80211_KEY_FLAG_GENERATE_IV_MGMT set, mac80211 +will not generate CCMP/GCMP headers in frame for ath11k. Also MIC length reserved +is wrong. Such frame is dropped later by hardware: + +ath11k_pci 0000:5a:00.0: mac tx mgmt frame, buf id 0 +ath11k_pci 0000:5a:00.0: mgmt tx compl ev pdev_id 1, desc_id 0, status 1 + +From user point of view, we have observed very low throughput due to this issue: +action frames are all dropped so ADDBA response from DUT never reaches AP. AP +can not use aggregation thus throughput is low. + +Fix this by setting IEEE80211_KEY_FLAG_GENERATE_IV_MGMT flag and by reserving proper +MIC length for those ciphers. + +Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3.6510.30 +Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1 + +Fixes: d5c65159f289 ("ath11k: driver for Qualcomm IEEE 802.11ax devices") +Reported-by: Yaroslav Isakov +Tested-by: Yaroslav Isakov +Closes: https://lore.kernel.org/all/CADS+iDX5=JtJr0apAtAQ02WWBxgOFEv8G063vuGYwDTC8AVZaw@mail.gmail.com +Signed-off-by: Baochen Qiang +Acked-by: Jeff Johnson +Signed-off-by: Kalle Valo +Link: https://msgid.link/20240605014826.22498-1-quic_bqiang@quicinc.com +Signed-off-by: Sasha Levin +--- + drivers/net/wireless/ath/ath11k/dp_rx.c | 3 +-- + drivers/net/wireless/ath/ath11k/dp_rx.h | 3 +++ + drivers/net/wireless/ath/ath11k/mac.c | 15 +++++++++++---- + 3 files changed, 15 insertions(+), 6 deletions(-) + +diff --git a/drivers/net/wireless/ath/ath11k/dp_rx.c b/drivers/net/wireless/ath/ath11k/dp_rx.c +index 6b21634930efe..b3499f966a9d6 100644 +--- a/drivers/net/wireless/ath/ath11k/dp_rx.c ++++ b/drivers/net/wireless/ath/ath11k/dp_rx.c +@@ -1880,8 +1880,7 @@ static void ath11k_dp_rx_h_csum_offload(struct ath11k *ar, struct sk_buff *msdu) + CHECKSUM_NONE : CHECKSUM_UNNECESSARY; + } + +-static int ath11k_dp_rx_crypto_mic_len(struct ath11k *ar, +- enum hal_encrypt_type enctype) ++int ath11k_dp_rx_crypto_mic_len(struct ath11k *ar, enum hal_encrypt_type enctype) + { + switch (enctype) { + case HAL_ENCRYPT_TYPE_OPEN: +diff --git a/drivers/net/wireless/ath/ath11k/dp_rx.h b/drivers/net/wireless/ath/ath11k/dp_rx.h +index 623da3bf9dc81..c322e30caa968 100644 +--- a/drivers/net/wireless/ath/ath11k/dp_rx.h ++++ b/drivers/net/wireless/ath/ath11k/dp_rx.h +@@ -1,6 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + #ifndef ATH11K_DP_RX_H + #define ATH11K_DP_RX_H +@@ -95,4 +96,6 @@ int ath11k_peer_rx_frag_setup(struct ath11k *ar, const u8 *peer_mac, int vdev_id + int ath11k_dp_rx_pktlog_start(struct ath11k_base *ab); + int ath11k_dp_rx_pktlog_stop(struct ath11k_base *ab, bool stop_timer); + ++int ath11k_dp_rx_crypto_mic_len(struct ath11k *ar, enum hal_encrypt_type enctype); ++ + #endif /* ATH11K_DP_RX_H */ +diff --git a/drivers/net/wireless/ath/ath11k/mac.c b/drivers/net/wireless/ath/ath11k/mac.c +index 445f59ad1fc08..33f2c189b4d86 100644 +--- a/drivers/net/wireless/ath/ath11k/mac.c ++++ b/drivers/net/wireless/ath/ath11k/mac.c +@@ -4130,6 +4130,7 @@ static int ath11k_install_key(struct ath11k_vif *arvif, + + switch (key->cipher) { + case WLAN_CIPHER_SUITE_CCMP: ++ case WLAN_CIPHER_SUITE_CCMP_256: + arg.key_cipher = WMI_CIPHER_AES_CCM; + /* TODO: Re-check if flag is valid */ + key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV_MGMT; +@@ -4139,12 +4140,10 @@ static int ath11k_install_key(struct ath11k_vif *arvif, + arg.key_txmic_len = 8; + arg.key_rxmic_len = 8; + break; +- case WLAN_CIPHER_SUITE_CCMP_256: +- arg.key_cipher = WMI_CIPHER_AES_CCM; +- break; + case WLAN_CIPHER_SUITE_GCMP: + case WLAN_CIPHER_SUITE_GCMP_256: + arg.key_cipher = WMI_CIPHER_AES_GCM; ++ key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV_MGMT; + break; + default: + ath11k_warn(ar->ab, "cipher %d is not supported\n", key->cipher); +@@ -6023,7 +6022,10 @@ static int ath11k_mac_mgmt_tx_wmi(struct ath11k *ar, struct ath11k_vif *arvif, + { + struct ath11k_base *ab = ar->ab; + struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; ++ struct ath11k_skb_cb *skb_cb = ATH11K_SKB_CB(skb); + struct ieee80211_tx_info *info; ++ enum hal_encrypt_type enctype; ++ unsigned int mic_len; + dma_addr_t paddr; + int buf_id; + int ret; +@@ -6047,7 +6049,12 @@ static int ath11k_mac_mgmt_tx_wmi(struct ath11k *ar, struct ath11k_vif *arvif, + ieee80211_is_deauth(hdr->frame_control) || + ieee80211_is_disassoc(hdr->frame_control)) && + ieee80211_has_protected(hdr->frame_control)) { +- skb_put(skb, IEEE80211_CCMP_MIC_LEN); ++ if (!(skb_cb->flags & ATH11K_SKB_CIPHER_SET)) ++ ath11k_warn(ab, "WMI management tx frame without ATH11K_SKB_CIPHER_SET"); ++ ++ enctype = ath11k_dp_tx_get_encrypt_type(skb_cb->cipher); ++ mic_len = ath11k_dp_rx_crypto_mic_len(ar, enctype); ++ skb_put(skb, mic_len); + } + } + +-- +2.43.0 + diff --git a/queue-6.6/wifi-ath11k-update-qualcomm-innovation-center-inc.-c.patch b/queue-6.6/wifi-ath11k-update-qualcomm-innovation-center-inc.-c.patch new file mode 100644 index 00000000000..43fff618063 --- /dev/null +++ b/queue-6.6/wifi-ath11k-update-qualcomm-innovation-center-inc.-c.patch @@ -0,0 +1,640 @@ +From 710f0127e1dd74a547907c0c7e5a3a00caaeb371 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 29 Nov 2023 13:39:23 +0200 +Subject: wifi: ath11k: Update Qualcomm Innovation Center, Inc. copyrights + +From: Jeff Johnson + +[ Upstream commit ea77e9398b326d65b052096840b883271f8a7a48 ] + +Update the copyright for all ath11k files modified on behalf of +Qualcomm Innovation Center, Inc. in 2021 through 2023. + +Signed-off-by: Jeff Johnson +Signed-off-by: Kalle Valo +Link: https://lore.kernel.org/r/20231128-ath12kcopyrights-v1-2-be0b7408cbac@quicinc.com +Stable-dep-of: 5714e25f1d18 ("wifi: ath11k: fix wrong definition of CE ring's base address") +Signed-off-by: Sasha Levin +--- + drivers/net/wireless/ath/ath11k/ce.c | 2 +- + drivers/net/wireless/ath/ath11k/ce.h | 1 + + drivers/net/wireless/ath/ath11k/dbring.c | 1 + + drivers/net/wireless/ath/ath11k/dbring.h | 1 + + drivers/net/wireless/ath/ath11k/debug.c | 1 + + drivers/net/wireless/ath/ath11k/debug.h | 2 +- + drivers/net/wireless/ath/ath11k/debugfs.c | 1 + + drivers/net/wireless/ath/ath11k/debugfs.h | 1 + + drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c | 2 +- + drivers/net/wireless/ath/ath11k/debugfs_htt_stats.h | 2 +- + drivers/net/wireless/ath/ath11k/debugfs_sta.c | 1 + + drivers/net/wireless/ath/ath11k/debugfs_sta.h | 1 + + drivers/net/wireless/ath/ath11k/dp.c | 2 +- + drivers/net/wireless/ath/ath11k/dp.h | 2 +- + drivers/net/wireless/ath/ath11k/dp_rx.c | 1 + + drivers/net/wireless/ath/ath11k/dp_tx.c | 2 +- + drivers/net/wireless/ath/ath11k/dp_tx.h | 1 + + drivers/net/wireless/ath/ath11k/hal.c | 2 +- + drivers/net/wireless/ath/ath11k/hal.h | 2 +- + drivers/net/wireless/ath/ath11k/hal_desc.h | 1 + + drivers/net/wireless/ath/ath11k/hal_rx.c | 1 + + drivers/net/wireless/ath/ath11k/hal_rx.h | 1 + + drivers/net/wireless/ath/ath11k/hif.h | 1 + + drivers/net/wireless/ath/ath11k/htc.c | 1 + + drivers/net/wireless/ath/ath11k/htc.h | 1 + + drivers/net/wireless/ath/ath11k/hw.c | 2 +- + drivers/net/wireless/ath/ath11k/hw.h | 2 +- + drivers/net/wireless/ath/ath11k/mac.h | 1 + + drivers/net/wireless/ath/ath11k/mhi.c | 2 +- + drivers/net/wireless/ath/ath11k/mhi.h | 1 + + drivers/net/wireless/ath/ath11k/pcic.c | 2 +- + drivers/net/wireless/ath/ath11k/peer.c | 2 +- + drivers/net/wireless/ath/ath11k/peer.h | 2 +- + drivers/net/wireless/ath/ath11k/qmi.c | 2 +- + drivers/net/wireless/ath/ath11k/qmi.h | 2 +- + drivers/net/wireless/ath/ath11k/reg.c | 1 + + drivers/net/wireless/ath/ath11k/reg.h | 1 + + drivers/net/wireless/ath/ath11k/rx_desc.h | 1 + + drivers/net/wireless/ath/ath11k/spectral.c | 1 + + drivers/net/wireless/ath/ath11k/spectral.h | 1 + + drivers/net/wireless/ath/ath11k/thermal.c | 1 + + drivers/net/wireless/ath/ath11k/thermal.h | 1 + + drivers/net/wireless/ath/ath11k/trace.h | 1 + + drivers/net/wireless/ath/ath11k/wmi.c | 2 +- + drivers/net/wireless/ath/ath11k/wmi.h | 2 +- + drivers/net/wireless/ath/ath11k/wow.h | 1 + + 46 files changed, 46 insertions(+), 19 deletions(-) + +diff --git a/drivers/net/wireless/ath/ath11k/ce.c b/drivers/net/wireless/ath/ath11k/ce.c +index 289d47ae92afc..e66e86bdec20f 100644 +--- a/drivers/net/wireless/ath/ath11k/ce.c ++++ b/drivers/net/wireless/ath/ath11k/ce.c +@@ -1,7 +1,7 @@ + // SPDX-License-Identifier: BSD-3-Clause-Clear + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. +- * Copyright (c) 2021, Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include "dp_rx.h" +diff --git a/drivers/net/wireless/ath/ath11k/ce.h b/drivers/net/wireless/ath/ath11k/ce.h +index c0f6a0ba86df0..69946fc700777 100644 +--- a/drivers/net/wireless/ath/ath11k/ce.h ++++ b/drivers/net/wireless/ath/ath11k/ce.h +@@ -1,6 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #ifndef ATH11K_CE_H +diff --git a/drivers/net/wireless/ath/ath11k/dbring.c b/drivers/net/wireless/ath/ath11k/dbring.c +index 5536e86423312..fbb6e8d8a4769 100644 +--- a/drivers/net/wireless/ath/ath11k/dbring.c ++++ b/drivers/net/wireless/ath/ath11k/dbring.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: BSD-3-Clause-Clear + /* + * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include "core.h" +diff --git a/drivers/net/wireless/ath/ath11k/dbring.h b/drivers/net/wireless/ath/ath11k/dbring.h +index ef906c687b8cd..2f93b78a50df0 100644 +--- a/drivers/net/wireless/ath/ath11k/dbring.h ++++ b/drivers/net/wireless/ath/ath11k/dbring.h +@@ -1,6 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #ifndef ATH11K_DBRING_H +diff --git a/drivers/net/wireless/ath/ath11k/debug.c b/drivers/net/wireless/ath/ath11k/debug.c +index f5c8a34c8802f..2b8544355fc1a 100644 +--- a/drivers/net/wireless/ath/ath11k/debug.c ++++ b/drivers/net/wireless/ath/ath11k/debug.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: BSD-3-Clause-Clear + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include +diff --git a/drivers/net/wireless/ath/ath11k/debug.h b/drivers/net/wireless/ath/ath11k/debug.h +index 9c52804ef8ac3..cc8934d156977 100644 +--- a/drivers/net/wireless/ath/ath11k/debug.h ++++ b/drivers/net/wireless/ath/ath11k/debug.h +@@ -1,7 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. +- * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #ifndef _ATH11K_DEBUG_H_ +diff --git a/drivers/net/wireless/ath/ath11k/debugfs.c b/drivers/net/wireless/ath/ath11k/debugfs.c +index 5bb6fd17fdf6f..8cda73b78ebf4 100644 +--- a/drivers/net/wireless/ath/ath11k/debugfs.c ++++ b/drivers/net/wireless/ath/ath11k/debugfs.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: BSD-3-Clause-Clear + /* + * Copyright (c) 2018-2020 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include +diff --git a/drivers/net/wireless/ath/ath11k/debugfs.h b/drivers/net/wireless/ath/ath11k/debugfs.h +index 3af0169f6cf21..44d15845f39a6 100644 +--- a/drivers/net/wireless/ath/ath11k/debugfs.h ++++ b/drivers/net/wireless/ath/ath11k/debugfs.h +@@ -1,6 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #ifndef _ATH11K_DEBUGFS_H_ +diff --git a/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c b/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c +index 0207fc4910f34..870e86a31bf89 100644 +--- a/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c ++++ b/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.c +@@ -1,7 +1,7 @@ + // SPDX-License-Identifier: BSD-3-Clause-Clear + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. +- * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include +diff --git a/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.h b/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.h +index 96219301f05bd..476689bbd4dad 100644 +--- a/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.h ++++ b/drivers/net/wireless/ath/ath11k/debugfs_htt_stats.h +@@ -1,7 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. +- * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #ifndef DEBUG_HTT_STATS_H +diff --git a/drivers/net/wireless/ath/ath11k/debugfs_sta.c b/drivers/net/wireless/ath/ath11k/debugfs_sta.c +index 9cc4ef28e7519..168879a380cb2 100644 +--- a/drivers/net/wireless/ath/ath11k/debugfs_sta.c ++++ b/drivers/net/wireless/ath/ath11k/debugfs_sta.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: BSD-3-Clause-Clear + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include +diff --git a/drivers/net/wireless/ath/ath11k/debugfs_sta.h b/drivers/net/wireless/ath/ath11k/debugfs_sta.h +index e6c11b3a40aa9..ace877e19275e 100644 +--- a/drivers/net/wireless/ath/ath11k/debugfs_sta.h ++++ b/drivers/net/wireless/ath/ath11k/debugfs_sta.h +@@ -1,6 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2018-2020 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #ifndef _ATH11K_DEBUGFS_STA_H_ +diff --git a/drivers/net/wireless/ath/ath11k/dp.c b/drivers/net/wireless/ath/ath11k/dp.c +index d070bcb3fe247..be0beb6bae8fb 100644 +--- a/drivers/net/wireless/ath/ath11k/dp.c ++++ b/drivers/net/wireless/ath/ath11k/dp.c +@@ -1,7 +1,7 @@ + // SPDX-License-Identifier: BSD-3-Clause-Clear + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. +- * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include +diff --git a/drivers/net/wireless/ath/ath11k/dp.h b/drivers/net/wireless/ath/ath11k/dp.h +index 15815af453b2a..2f6dd69d3be27 100644 +--- a/drivers/net/wireless/ath/ath11k/dp.h ++++ b/drivers/net/wireless/ath/ath11k/dp.h +@@ -1,7 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. +- * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #ifndef ATH11K_DP_H +diff --git a/drivers/net/wireless/ath/ath11k/dp_rx.c b/drivers/net/wireless/ath/ath11k/dp_rx.c +index a993e74bbae83..6b21634930efe 100644 +--- a/drivers/net/wireless/ath/ath11k/dp_rx.c ++++ b/drivers/net/wireless/ath/ath11k/dp_rx.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: BSD-3-Clause-Clear + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include +diff --git a/drivers/net/wireless/ath/ath11k/dp_tx.c b/drivers/net/wireless/ath/ath11k/dp_tx.c +index 0dda76f7a4b50..7dd1ee5898017 100644 +--- a/drivers/net/wireless/ath/ath11k/dp_tx.c ++++ b/drivers/net/wireless/ath/ath11k/dp_tx.c +@@ -1,7 +1,7 @@ + // SPDX-License-Identifier: BSD-3-Clause-Clear + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. +- * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include "core.h" +diff --git a/drivers/net/wireless/ath/ath11k/dp_tx.h b/drivers/net/wireless/ath/ath11k/dp_tx.h +index 68a21ea9b9346..61be2265e09f0 100644 +--- a/drivers/net/wireless/ath/ath11k/dp_tx.h ++++ b/drivers/net/wireless/ath/ath11k/dp_tx.h +@@ -1,6 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2021, 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #ifndef ATH11K_DP_TX_H +diff --git a/drivers/net/wireless/ath/ath11k/hal.c b/drivers/net/wireless/ath/ath11k/hal.c +index 0a99aa7ddbf45..ae5f7e401e21b 100644 +--- a/drivers/net/wireless/ath/ath11k/hal.c ++++ b/drivers/net/wireless/ath/ath11k/hal.c +@@ -1,7 +1,7 @@ + // SPDX-License-Identifier: BSD-3-Clause-Clear + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. +- * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + #include + #include "hal_tx.h" +diff --git a/drivers/net/wireless/ath/ath11k/hal.h b/drivers/net/wireless/ath/ath11k/hal.h +index 1942d41d6de54..80447f488954a 100644 +--- a/drivers/net/wireless/ath/ath11k/hal.h ++++ b/drivers/net/wireless/ath/ath11k/hal.h +@@ -1,7 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. +- * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #ifndef ATH11K_HAL_H +diff --git a/drivers/net/wireless/ath/ath11k/hal_desc.h b/drivers/net/wireless/ath/ath11k/hal_desc.h +index d895ea878d9f0..b2fd180bd28e6 100644 +--- a/drivers/net/wireless/ath/ath11k/hal_desc.h ++++ b/drivers/net/wireless/ath/ath11k/hal_desc.h +@@ -1,6 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + #include "core.h" + +diff --git a/drivers/net/wireless/ath/ath11k/hal_rx.c b/drivers/net/wireless/ath/ath11k/hal_rx.c +index e5ed5efb139e1..363adac84a870 100644 +--- a/drivers/net/wireless/ath/ath11k/hal_rx.c ++++ b/drivers/net/wireless/ath/ath11k/hal_rx.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: BSD-3-Clause-Clear + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include "debug.h" +diff --git a/drivers/net/wireless/ath/ath11k/hal_rx.h b/drivers/net/wireless/ath/ath11k/hal_rx.h +index 61bd8416c4fde..e05411005fc61 100644 +--- a/drivers/net/wireless/ath/ath11k/hal_rx.h ++++ b/drivers/net/wireless/ath/ath11k/hal_rx.h +@@ -1,6 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #ifndef ATH11K_HAL_RX_H +diff --git a/drivers/net/wireless/ath/ath11k/hif.h b/drivers/net/wireless/ath/ath11k/hif.h +index 659b80d2abd4d..e0952c0629293 100644 +--- a/drivers/net/wireless/ath/ath11k/hif.h ++++ b/drivers/net/wireless/ath/ath11k/hif.h +@@ -1,6 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #ifndef _HIF_H_ +diff --git a/drivers/net/wireless/ath/ath11k/htc.c b/drivers/net/wireless/ath/ath11k/htc.c +index 2c2e425c86659..23054ab29a5ee 100644 +--- a/drivers/net/wireless/ath/ath11k/htc.c ++++ b/drivers/net/wireless/ath/ath11k/htc.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: BSD-3-Clause-Clear + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + #include + #include +diff --git a/drivers/net/wireless/ath/ath11k/htc.h b/drivers/net/wireless/ath/ath11k/htc.h +index f429b37cfdf75..e9b123a50b5d9 100644 +--- a/drivers/net/wireless/ath/ath11k/htc.h ++++ b/drivers/net/wireless/ath/ath11k/htc.h +@@ -1,6 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #ifndef ATH11K_HTC_H +diff --git a/drivers/net/wireless/ath/ath11k/hw.c b/drivers/net/wireless/ath/ath11k/hw.c +index d7b5ec6e69049..77d8f9237680b 100644 +--- a/drivers/net/wireless/ath/ath11k/hw.c ++++ b/drivers/net/wireless/ath/ath11k/hw.c +@@ -1,7 +1,7 @@ + // SPDX-License-Identifier: BSD-3-Clause-Clear + /* + * Copyright (c) 2018-2020 The Linux Foundation. All rights reserved. +- * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include +diff --git a/drivers/net/wireless/ath/ath11k/hw.h b/drivers/net/wireless/ath/ath11k/hw.h +index d51a99669dd6e..1b070747a5dbf 100644 +--- a/drivers/net/wireless/ath/ath11k/hw.h ++++ b/drivers/net/wireless/ath/ath11k/hw.h +@@ -1,7 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. +- * Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #ifndef ATH11K_HW_H +diff --git a/drivers/net/wireless/ath/ath11k/mac.h b/drivers/net/wireless/ath/ath11k/mac.h +index 0231783ad754b..0dfdeed5177b8 100644 +--- a/drivers/net/wireless/ath/ath11k/mac.h ++++ b/drivers/net/wireless/ath/ath11k/mac.h +@@ -1,6 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #ifndef ATH11K_MAC_H +diff --git a/drivers/net/wireless/ath/ath11k/mhi.c b/drivers/net/wireless/ath/ath11k/mhi.c +index 76de891d6c0f1..48ae81efc2696 100644 +--- a/drivers/net/wireless/ath/ath11k/mhi.c ++++ b/drivers/net/wireless/ath/ath11k/mhi.c +@@ -1,7 +1,7 @@ + // SPDX-License-Identifier: BSD-3-Clause-Clear + /* + * Copyright (c) 2020 The Linux Foundation. All rights reserved. +- * Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include +diff --git a/drivers/net/wireless/ath/ath11k/mhi.h b/drivers/net/wireless/ath/ath11k/mhi.h +index 8d9f852da6952..f81fba2644a4c 100644 +--- a/drivers/net/wireless/ath/ath11k/mhi.h ++++ b/drivers/net/wireless/ath/ath11k/mhi.h +@@ -1,6 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2020 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + #ifndef _ATH11K_MHI_H + #define _ATH11K_MHI_H +diff --git a/drivers/net/wireless/ath/ath11k/pcic.c b/drivers/net/wireless/ath/ath11k/pcic.c +index 011cf5fb8023e..803ee9dd7967d 100644 +--- a/drivers/net/wireless/ath/ath11k/pcic.c ++++ b/drivers/net/wireless/ath/ath11k/pcic.c +@@ -1,7 +1,7 @@ + // SPDX-License-Identifier: BSD-3-Clause-Clear + /* + * Copyright (c) 2019-2021 The Linux Foundation. All rights reserved. +- * Copyright (c) 2021-2022, Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include "core.h" +diff --git a/drivers/net/wireless/ath/ath11k/peer.c b/drivers/net/wireless/ath/ath11k/peer.c +index 114aa3a9a3397..ca719eb3f7f82 100644 +--- a/drivers/net/wireless/ath/ath11k/peer.c ++++ b/drivers/net/wireless/ath/ath11k/peer.c +@@ -1,7 +1,7 @@ + // SPDX-License-Identifier: BSD-3-Clause-Clear + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. +- * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include "core.h" +diff --git a/drivers/net/wireless/ath/ath11k/peer.h b/drivers/net/wireless/ath/ath11k/peer.h +index 9bd385d0a38c9..3ad2f3355b14f 100644 +--- a/drivers/net/wireless/ath/ath11k/peer.h ++++ b/drivers/net/wireless/ath/ath11k/peer.h +@@ -1,7 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. +- * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #ifndef ATH11K_PEER_H +diff --git a/drivers/net/wireless/ath/ath11k/qmi.c b/drivers/net/wireless/ath/ath11k/qmi.c +index 41fad03a3025c..a831d9474e9e0 100644 +--- a/drivers/net/wireless/ath/ath11k/qmi.c ++++ b/drivers/net/wireless/ath/ath11k/qmi.c +@@ -1,7 +1,7 @@ + // SPDX-License-Identifier: BSD-3-Clause-Clear + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. +- * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include +diff --git a/drivers/net/wireless/ath/ath11k/qmi.h b/drivers/net/wireless/ath/ath11k/qmi.h +index d477e2be814b1..7e06d100af575 100644 +--- a/drivers/net/wireless/ath/ath11k/qmi.h ++++ b/drivers/net/wireless/ath/ath11k/qmi.h +@@ -1,7 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. +- * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #ifndef ATH11K_QMI_H +diff --git a/drivers/net/wireless/ath/ath11k/reg.c b/drivers/net/wireless/ath/ath11k/reg.c +index 7f9fb968dac6d..c9e8bbc4896f3 100644 +--- a/drivers/net/wireless/ath/ath11k/reg.c ++++ b/drivers/net/wireless/ath/ath11k/reg.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: BSD-3-Clause-Clear + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + #include + +diff --git a/drivers/net/wireless/ath/ath11k/reg.h b/drivers/net/wireless/ath/ath11k/reg.h +index 2f284f26378d1..d873b9cf7fc4f 100644 +--- a/drivers/net/wireless/ath/ath11k/reg.h ++++ b/drivers/net/wireless/ath/ath11k/reg.h +@@ -1,6 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2019 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #ifndef ATH11K_REG_H +diff --git a/drivers/net/wireless/ath/ath11k/rx_desc.h b/drivers/net/wireless/ath/ath11k/rx_desc.h +index 786d5f36f5e54..2da6da7272789 100644 +--- a/drivers/net/wireless/ath/ath11k/rx_desc.h ++++ b/drivers/net/wireless/ath/ath11k/rx_desc.h +@@ -1,6 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + #ifndef ATH11K_RX_DESC_H + #define ATH11K_RX_DESC_H +diff --git a/drivers/net/wireless/ath/ath11k/spectral.c b/drivers/net/wireless/ath/ath11k/spectral.c +index 705868198df4b..ae2abe8ae9920 100644 +--- a/drivers/net/wireless/ath/ath11k/spectral.c ++++ b/drivers/net/wireless/ath/ath11k/spectral.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: BSD-3-Clause-Clear + /* + * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include +diff --git a/drivers/net/wireless/ath/ath11k/spectral.h b/drivers/net/wireless/ath/ath11k/spectral.h +index 96bfa16e18e96..789cff7c64a72 100644 +--- a/drivers/net/wireless/ath/ath11k/spectral.h ++++ b/drivers/net/wireless/ath/ath11k/spectral.h +@@ -1,6 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #ifndef ATH11K_SPECTRAL_H +diff --git a/drivers/net/wireless/ath/ath11k/thermal.c b/drivers/net/wireless/ath/ath11k/thermal.c +index 23ed01bd44f9a..d39acc03be5b1 100644 +--- a/drivers/net/wireless/ath/ath11k/thermal.c ++++ b/drivers/net/wireless/ath/ath11k/thermal.c +@@ -1,6 +1,7 @@ + // SPDX-License-Identifier: BSD-3-Clause-Clear + /* + * Copyright (c) 2020 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #include +diff --git a/drivers/net/wireless/ath/ath11k/thermal.h b/drivers/net/wireless/ath/ath11k/thermal.h +index 3e39675ef7f57..40c1a9563e0c2 100644 +--- a/drivers/net/wireless/ath/ath11k/thermal.h ++++ b/drivers/net/wireless/ath/ath11k/thermal.h +@@ -1,6 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2020 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #ifndef _ATH11K_THERMAL_ +diff --git a/drivers/net/wireless/ath/ath11k/trace.h b/drivers/net/wireless/ath/ath11k/trace.h +index 9535745fe026c..235ab8ea715fe 100644 +--- a/drivers/net/wireless/ath/ath11k/trace.h ++++ b/drivers/net/wireless/ath/ath11k/trace.h +@@ -1,6 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2019 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #if !defined(_TRACE_H_) || defined(TRACE_HEADER_MULTI_READ) +diff --git a/drivers/net/wireless/ath/ath11k/wmi.c b/drivers/net/wireless/ath/ath11k/wmi.c +index 1c07f55c25e67..2cc13e60f422f 100644 +--- a/drivers/net/wireless/ath/ath11k/wmi.c ++++ b/drivers/net/wireless/ath/ath11k/wmi.c +@@ -1,7 +1,7 @@ + // SPDX-License-Identifier: BSD-3-Clause-Clear + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. +- * Copyright (c) 2021, 2023 Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + #include + #include +diff --git a/drivers/net/wireless/ath/ath11k/wmi.h b/drivers/net/wireless/ath/ath11k/wmi.h +index 100bb816b5923..fa3b480b9d24f 100644 +--- a/drivers/net/wireless/ath/ath11k/wmi.h ++++ b/drivers/net/wireless/ath/ath11k/wmi.h +@@ -1,7 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. +- * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #ifndef ATH11K_WMI_H +diff --git a/drivers/net/wireless/ath/ath11k/wow.h b/drivers/net/wireless/ath/ath11k/wow.h +index 553ba850d910b..c85811e3f42b2 100644 +--- a/drivers/net/wireless/ath/ath11k/wow.h ++++ b/drivers/net/wireless/ath/ath11k/wow.h +@@ -1,6 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2020 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #ifndef _WOW_H_ +-- +2.43.0 + diff --git a/queue-6.6/wifi-ath12k-change-dma-direction-while-mapping-reinj.patch b/queue-6.6/wifi-ath12k-change-dma-direction-while-mapping-reinj.patch new file mode 100644 index 00000000000..4a1dcc4fc8e --- /dev/null +++ b/queue-6.6/wifi-ath12k-change-dma-direction-while-mapping-reinj.patch @@ -0,0 +1,61 @@ +From 7c0825f75f2eec704427ccc102ef62e0360a1b71 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 20 May 2024 12:30:43 +0530 +Subject: wifi: ath12k: change DMA direction while mapping reinjected packets +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: P Praneesh + +[ Upstream commit 33322e3ef07409278a18c6919c448e369d66a18e ] + +For fragmented packets, ath12k reassembles each fragment as a normal +packet and then reinjects it into HW ring. In this case, the DMA +direction should be DMA_TO_DEVICE, not DMA_FROM_DEVICE. Otherwise, +an invalid payload may be reinjected into the HW and +subsequently delivered to the host. + +Given that arbitrary memory can be allocated to the skb buffer, +knowledge about the data contained in the reinjected buffer is lacking. +Consequently, there’s a risk of private information being leaked. + +Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00209-QCAHKSWPL_SILICONZ-1 + +Fixes: d889913205cf ("wifi: ath12k: driver for Qualcomm Wi-Fi 7 devices") +Co-developed-by: Baochen Qiang +Signed-off-by: Baochen Qiang +Signed-off-by: P Praneesh +Acked-by: Jeff Johnson +Signed-off-by: Kalle Valo +Link: https://msgid.link/20240520070045.631029-2-quic_ppranees@quicinc.com +Signed-off-by: Sasha Levin +--- + drivers/net/wireless/ath/ath12k/dp_rx.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/wireless/ath/ath12k/dp_rx.c b/drivers/net/wireless/ath/ath12k/dp_rx.c +index a2d1ee1d51884..fb51cab23b623 100644 +--- a/drivers/net/wireless/ath/ath12k/dp_rx.c ++++ b/drivers/net/wireless/ath/ath12k/dp_rx.c +@@ -3024,7 +3024,7 @@ static int ath12k_dp_rx_h_defrag_reo_reinject(struct ath12k *ar, + + buf_paddr = dma_map_single(ab->dev, defrag_skb->data, + defrag_skb->len + skb_tailroom(defrag_skb), +- DMA_FROM_DEVICE); ++ DMA_TO_DEVICE); + if (dma_mapping_error(ab->dev, buf_paddr)) + return -ENOMEM; + +@@ -3110,7 +3110,7 @@ static int ath12k_dp_rx_h_defrag_reo_reinject(struct ath12k *ar, + spin_unlock_bh(&dp->rx_desc_lock); + err_unmap_dma: + dma_unmap_single(ab->dev, buf_paddr, defrag_skb->len + skb_tailroom(defrag_skb), +- DMA_FROM_DEVICE); ++ DMA_TO_DEVICE); + return ret; + } + +-- +2.43.0 + diff --git a/queue-6.6/wifi-ath12k-correct-6-ghz-frequency-value-in-rx-stat.patch b/queue-6.6/wifi-ath12k-correct-6-ghz-frequency-value-in-rx-stat.patch new file mode 100644 index 00000000000..54fab28ae29 --- /dev/null +++ b/queue-6.6/wifi-ath12k-correct-6-ghz-frequency-value-in-rx-stat.patch @@ -0,0 +1,88 @@ +From eefd20cba4fedda8153cc051483229dfb98fcee8 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 8 May 2024 10:36:51 -0700 +Subject: wifi: ath12k: Correct 6 GHz frequency value in rx status + +From: Pradeep Kumar Chitrapu + +[ Upstream commit c3c84a74bd797f76d7da036c9fef947d674bbc18 ] + +The frequency in the rx status is currently being filled +incorrectly for the 6 GHz band. The channel number received is +invalid in this case, resulting in packet drops. Fix this +issue by correcting the frequency calculation. + +Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.0.1-00029-QCAHKSWPL_SILICONZ-1 +Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3 + +Fixes: d889913205cf ("wifi: ath12k: driver for Qualcomm Wi-Fi 7 devices") +Signed-off-by: Pradeep Kumar Chitrapu +Acked-by: Jeff Johnson +Signed-off-by: Kalle Valo +Link: https://msgid.link/20240508173655.22191-3-quic_pradeepc@quicinc.com +Signed-off-by: Sasha Levin +--- + drivers/net/wireless/ath/ath12k/dp_rx.c | 9 ++++++--- + drivers/net/wireless/ath/ath12k/wmi.c | 10 +++++++--- + 2 files changed, 13 insertions(+), 6 deletions(-) + +diff --git a/drivers/net/wireless/ath/ath12k/dp_rx.c b/drivers/net/wireless/ath/ath12k/dp_rx.c +index dbcbe7e0cd2a7..a2d1ee1d51884 100644 +--- a/drivers/net/wireless/ath/ath12k/dp_rx.c ++++ b/drivers/net/wireless/ath/ath12k/dp_rx.c +@@ -2376,8 +2376,10 @@ void ath12k_dp_rx_h_ppdu(struct ath12k *ar, struct hal_rx_desc *rx_desc, + channel_num = meta_data; + center_freq = meta_data >> 16; + +- if (center_freq >= 5935 && center_freq <= 7105) { ++ if (center_freq >= ATH12K_MIN_6G_FREQ && ++ center_freq <= ATH12K_MAX_6G_FREQ) { + rx_status->band = NL80211_BAND_6GHZ; ++ rx_status->freq = center_freq; + } else if (channel_num >= 1 && channel_num <= 14) { + rx_status->band = NL80211_BAND_2GHZ; + } else if (channel_num >= 36 && channel_num <= 173) { +@@ -2395,8 +2397,9 @@ void ath12k_dp_rx_h_ppdu(struct ath12k *ar, struct hal_rx_desc *rx_desc, + rx_desc, sizeof(*rx_desc)); + } + +- rx_status->freq = ieee80211_channel_to_frequency(channel_num, +- rx_status->band); ++ if (rx_status->band != NL80211_BAND_6GHZ) ++ rx_status->freq = ieee80211_channel_to_frequency(channel_num, ++ rx_status->band); + + ath12k_dp_rx_h_rate(ar, rx_desc, rx_status); + } +diff --git a/drivers/net/wireless/ath/ath12k/wmi.c b/drivers/net/wireless/ath/ath12k/wmi.c +index cd89032fa25e1..21399ad233c02 100644 +--- a/drivers/net/wireless/ath/ath12k/wmi.c ++++ b/drivers/net/wireless/ath/ath12k/wmi.c +@@ -5772,8 +5772,10 @@ static void ath12k_mgmt_rx_event(struct ath12k_base *ab, struct sk_buff *skb) + if (rx_ev.status & WMI_RX_STATUS_ERR_MIC) + status->flag |= RX_FLAG_MMIC_ERROR; + +- if (rx_ev.chan_freq >= ATH12K_MIN_6G_FREQ) { ++ if (rx_ev.chan_freq >= ATH12K_MIN_6G_FREQ && ++ rx_ev.chan_freq <= ATH12K_MAX_6G_FREQ) { + status->band = NL80211_BAND_6GHZ; ++ status->freq = rx_ev.chan_freq; + } else if (rx_ev.channel >= 1 && rx_ev.channel <= 14) { + status->band = NL80211_BAND_2GHZ; + } else if (rx_ev.channel >= 36 && rx_ev.channel <= ATH12K_MAX_5G_CHAN) { +@@ -5794,8 +5796,10 @@ static void ath12k_mgmt_rx_event(struct ath12k_base *ab, struct sk_buff *skb) + + sband = &ar->mac.sbands[status->band]; + +- status->freq = ieee80211_channel_to_frequency(rx_ev.channel, +- status->band); ++ if (status->band != NL80211_BAND_6GHZ) ++ status->freq = ieee80211_channel_to_frequency(rx_ev.channel, ++ status->band); ++ + status->signal = rx_ev.snr + ATH12K_DEFAULT_NOISE_FLOOR; + status->rate_idx = ath12k_mac_bitrate_to_idx(sband, rx_ev.rate / 100); + +-- +2.43.0 + diff --git a/queue-6.6/wifi-ath12k-fix-firmware-crash-during-reo-reinject.patch b/queue-6.6/wifi-ath12k-fix-firmware-crash-during-reo-reinject.patch new file mode 100644 index 00000000000..e8c59db6b1c --- /dev/null +++ b/queue-6.6/wifi-ath12k-fix-firmware-crash-during-reo-reinject.patch @@ -0,0 +1,67 @@ +From c0e4e769071e7aa79d58d3dbe3bfbd2db77cd86d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 20 May 2024 12:30:45 +0530 +Subject: wifi: ath12k: fix firmware crash during reo reinject +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: P Praneesh + +[ Upstream commit a57ab7cced454f69b8ee8aa5f5019ea8de4674da ] + +When handling fragmented packets, the ath12k driver reassembles each +fragment into a normal packet and then reinjects it into the HW ring. +However, a firmware crash occurs during this reinjection process. +The issue arises because the driver populates peer metadata in +reo_ent_ring->queue_addr_lo, while the firmware expects the physical +address obtained from the corresponding peer’s queue descriptor. Fix it +by filling peer's queue descriptor's physical address in queue_addr_lo. + +Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00209-QCAHKSWPL_SILICONZ-1 + +Fixes: d889913205cf ("wifi: ath12k: driver for Qualcomm Wi-Fi 7 devices") +Signed-off-by: P Praneesh +Acked-by: Jeff Johnson +Signed-off-by: Kalle Valo +Link: https://msgid.link/20240520070045.631029-4-quic_ppranees@quicinc.com +Signed-off-by: Sasha Levin +--- + drivers/net/wireless/ath/ath12k/dp_rx.c | 14 ++++++-------- + 1 file changed, 6 insertions(+), 8 deletions(-) + +diff --git a/drivers/net/wireless/ath/ath12k/dp_rx.c b/drivers/net/wireless/ath/ath12k/dp_rx.c +index fb51cab23b623..2c17b1e7681a5 100644 +--- a/drivers/net/wireless/ath/ath12k/dp_rx.c ++++ b/drivers/net/wireless/ath/ath12k/dp_rx.c +@@ -2988,7 +2988,7 @@ static int ath12k_dp_rx_h_defrag_reo_reinject(struct ath12k *ar, + struct hal_srng *srng; + dma_addr_t link_paddr, buf_paddr; + u32 desc_bank, msdu_info, msdu_ext_info, mpdu_info; +- u32 cookie, hal_rx_desc_sz, dest_ring_info0; ++ u32 cookie, hal_rx_desc_sz, dest_ring_info0, queue_addr_hi; + int ret; + struct ath12k_rx_desc_info *desc_info; + u8 dst_ind; +@@ -3080,13 +3080,11 @@ static int ath12k_dp_rx_h_defrag_reo_reinject(struct ath12k *ar, + reo_ent_ring->rx_mpdu_info.peer_meta_data = + reo_dest_ring->rx_mpdu_info.peer_meta_data; + +- /* Firmware expects physical address to be filled in queue_addr_lo in +- * the MLO scenario and in case of non MLO peer meta data needs to be +- * filled. +- * TODO: Need to handle for MLO scenario. +- */ +- reo_ent_ring->queue_addr_lo = reo_dest_ring->rx_mpdu_info.peer_meta_data; +- reo_ent_ring->info0 = le32_encode_bits(dst_ind, ++ reo_ent_ring->queue_addr_lo = cpu_to_le32(lower_32_bits(rx_tid->paddr)); ++ queue_addr_hi = upper_32_bits(rx_tid->paddr); ++ reo_ent_ring->info0 = le32_encode_bits(queue_addr_hi, ++ HAL_REO_ENTR_RING_INFO0_QUEUE_ADDR_HI) | ++ le32_encode_bits(dst_ind, + HAL_REO_ENTR_RING_INFO0_DEST_IND); + + reo_ent_ring->info1 = le32_encode_bits(rx_tid->cur_sn, +-- +2.43.0 + diff --git a/queue-6.6/wifi-ath12k-fix-invalid-memory-access-while-processi.patch b/queue-6.6/wifi-ath12k-fix-invalid-memory-access-while-processi.patch new file mode 100644 index 00000000000..832fda8d0d2 --- /dev/null +++ b/queue-6.6/wifi-ath12k-fix-invalid-memory-access-while-processi.patch @@ -0,0 +1,55 @@ +From a9572a3399d38bc9a015f961b2b53c61065b54a6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 20 May 2024 12:30:44 +0530 +Subject: wifi: ath12k: fix invalid memory access while processing fragmented + packets + +From: P Praneesh + +[ Upstream commit 073f9f249eecd64ab9d59c91c4a23cfdcc02afe4 ] + +The monitor ring and the reo reinject ring share the same ring mask index. +When the driver receives an interrupt for the reo reinject ring, the +monitor ring is also processed, leading to invalid memory access. Since +monitor support is not yet enabled in ath12k, the ring mask for the monitor +ring should be removed. + +Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.1.1-00209-QCAHKSWPL_SILICONZ-1 + +Fixes: d889913205cf ("wifi: ath12k: driver for Qualcomm Wi-Fi 7 devices") +Signed-off-by: P Praneesh +Acked-by: Jeff Johnson +Signed-off-by: Kalle Valo +Link: https://msgid.link/20240520070045.631029-3-quic_ppranees@quicinc.com +Signed-off-by: Sasha Levin +--- + drivers/net/wireless/ath/ath12k/hw.c | 6 +----- + 1 file changed, 1 insertion(+), 5 deletions(-) + +diff --git a/drivers/net/wireless/ath/ath12k/hw.c b/drivers/net/wireless/ath/ath12k/hw.c +index 96ad8807a9a88..dafd7c34d7465 100644 +--- a/drivers/net/wireless/ath/ath12k/hw.c ++++ b/drivers/net/wireless/ath/ath12k/hw.c +@@ -540,9 +540,6 @@ static const struct ath12k_hw_ring_mask ath12k_hw_ring_mask_qcn9274 = { + }, + .rx_mon_dest = { + 0, 0, 0, +- ATH12K_RX_MON_RING_MASK_0, +- ATH12K_RX_MON_RING_MASK_1, +- ATH12K_RX_MON_RING_MASK_2, + }, + .rx = { + 0, 0, 0, 0, +@@ -568,8 +565,7 @@ static const struct ath12k_hw_ring_mask ath12k_hw_ring_mask_qcn9274 = { + ATH12K_HOST2RXDMA_RING_MASK_0, + }, + .tx_mon_dest = { +- ATH12K_TX_MON_RING_MASK_0, +- ATH12K_TX_MON_RING_MASK_1, ++ 0, 0, 0, + }, + }; + +-- +2.43.0 + diff --git a/queue-6.6/wifi-ath12k-fix-tx-completion-ring-wbm2sw-setup-fail.patch b/queue-6.6/wifi-ath12k-fix-tx-completion-ring-wbm2sw-setup-fail.patch new file mode 100644 index 00000000000..ae549863338 --- /dev/null +++ b/queue-6.6/wifi-ath12k-fix-tx-completion-ring-wbm2sw-setup-fail.patch @@ -0,0 +1,117 @@ +From fb25b63fe0e05b7dbb7bd95e6723874ffd0c2c1d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 10 May 2024 12:34:27 +0530 +Subject: wifi: ath12k: Fix tx completion ring (WBM2SW) setup failure + +From: Nithyanantham Paramasivam + +[ Upstream commit 0ce9ab2785e4e9ca0752390d8e5ab65bd08f0e78 ] + +We observe intermittent ping failures from the access point (AP) to +station (STA) in any mode (AP-STA or Mesh) configured. Specifically, +the transmission completion status is not received at tx completion +ring id 4 (WBM2SW ring4) for the packets transmitted via TCL DATA +ring id 3. This prevents freeing up tx descriptors and leads +to buffer exhaustion. + +Currently, during initialization of the WBM2SW ring, we are directly +mapping the ring number to the ring mask to obtain the ring mask +group index. This approach is causing setup failures for WBM2SW +ring 4. Similarly, during runtime, when receiving incoming +transmission completion status, the validation of the ring number by +mapping the interrupted ring mask. This is resulting in +validation failure. Thereby preventing entry into the completion +handler ath12k_dp_tx_completion_handler(). + +The existing design assumed that the ring numbers would always be +sequential and could be directly mapped with the ring mask. However, +this assumption does not hold true for WBM2SW ring 4. Therefore, +modify the design such that, instead of mapping the ring number, +the ring ID is mapped with the ring mask. + +According to this design: + +1. During initialization of the WBM2SW ring, mapping the ring ID +to the ring mask will ensure obtaining the correct ring mask group +ID. + +2. During runtime, validating the interrupted ring mask group ID +within the transmission completion group is sufficient. This +approach allows the ring ID to be derived from the interrupted ring +mask and enables entry into the completion handler. + +Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.0.1-00029-QCAHKSWPL_SILICONZ-1 +Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3 + +Fixes: d889913205cf ("wifi: ath12k: driver for Qualcomm Wi-Fi 7 devices") +Signed-off-by: Nithyanantham Paramasivam +Acked-by: Jeff Johnson +Signed-off-by: Kalle Valo +Link: https://msgid.link/20240510070427.206152-1-quic_nithp@quicinc.com +Signed-off-by: Sasha Levin +--- + drivers/net/wireless/ath/ath12k/dp.c | 18 +++++++++++++----- + drivers/net/wireless/ath/ath12k/hw.c | 2 +- + 2 files changed, 14 insertions(+), 6 deletions(-) + +diff --git a/drivers/net/wireless/ath/ath12k/dp.c b/drivers/net/wireless/ath/ath12k/dp.c +index 6893466f61f04..907655c45a4b9 100644 +--- a/drivers/net/wireless/ath/ath12k/dp.c ++++ b/drivers/net/wireless/ath/ath12k/dp.c +@@ -127,7 +127,9 @@ static int ath12k_dp_srng_find_ring_in_mask(int ring_num, const u8 *grp_mask) + static int ath12k_dp_srng_calculate_msi_group(struct ath12k_base *ab, + enum hal_ring_type type, int ring_num) + { ++ const struct ath12k_hal_tcl_to_wbm_rbm_map *map; + const u8 *grp_mask; ++ int i; + + switch (type) { + case HAL_WBM2SW_RELEASE: +@@ -135,6 +137,14 @@ static int ath12k_dp_srng_calculate_msi_group(struct ath12k_base *ab, + grp_mask = &ab->hw_params->ring_mask->rx_wbm_rel[0]; + ring_num = 0; + } else { ++ map = ab->hw_params->hal_ops->tcl_to_wbm_rbm_map; ++ for (i = 0; i < ab->hw_params->max_tx_ring; i++) { ++ if (ring_num == map[i].wbm_ring_num) { ++ ring_num = i; ++ break; ++ } ++ } ++ + grp_mask = &ab->hw_params->ring_mask->tx[0]; + } + break; +@@ -876,11 +886,9 @@ int ath12k_dp_service_srng(struct ath12k_base *ab, + enum dp_monitor_mode monitor_mode; + u8 ring_mask; + +- while (i < ab->hw_params->max_tx_ring) { +- if (ab->hw_params->ring_mask->tx[grp_id] & +- BIT(ab->hw_params->hal_ops->tcl_to_wbm_rbm_map[i].wbm_ring_num)) +- ath12k_dp_tx_completion_handler(ab, i); +- i++; ++ if (ab->hw_params->ring_mask->tx[grp_id]) { ++ i = fls(ab->hw_params->ring_mask->tx[grp_id]) - 1; ++ ath12k_dp_tx_completion_handler(ab, i); + } + + if (ab->hw_params->ring_mask->rx_err[grp_id]) { +diff --git a/drivers/net/wireless/ath/ath12k/hw.c b/drivers/net/wireless/ath/ath12k/hw.c +index ba7720f760c55..96ad8807a9a88 100644 +--- a/drivers/net/wireless/ath/ath12k/hw.c ++++ b/drivers/net/wireless/ath/ath12k/hw.c +@@ -576,8 +576,8 @@ static const struct ath12k_hw_ring_mask ath12k_hw_ring_mask_qcn9274 = { + static const struct ath12k_hw_ring_mask ath12k_hw_ring_mask_wcn7850 = { + .tx = { + ATH12K_TX_RING_MASK_0, ++ ATH12K_TX_RING_MASK_1, + ATH12K_TX_RING_MASK_2, +- ATH12K_TX_RING_MASK_4, + }, + .rx_mon_dest = { + }, +-- +2.43.0 + diff --git a/queue-6.6/wifi-ath12k-fix-wrong-definition-of-ce-ring-s-base-a.patch b/queue-6.6/wifi-ath12k-fix-wrong-definition-of-ce-ring-s-base-a.patch new file mode 100644 index 00000000000..e189d1f53b8 --- /dev/null +++ b/queue-6.6/wifi-ath12k-fix-wrong-definition-of-ce-ring-s-base-a.patch @@ -0,0 +1,65 @@ +From 8f5288592bea3287ac8c0c6d82271d1ad60c077e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 24 May 2024 10:40:21 +0800 +Subject: wifi: ath12k: fix wrong definition of CE ring's base address + +From: Baochen Qiang + +[ Upstream commit 0ae570703754858a77cc42b3c9fff42e9f084608 ] + +Base address of CE ring is defined as u32, currently this works +because DMA mask configured as 32 bit: + + #define ATH12K_PCI_DMA_MASK 32 + +However this mask could be changed once firmware bugs are fixed +to fully support 36 bit DMA addressing. So to protect against any +future changes to the DMA mask, change the type of the fields that +are dependent upon it. + +This is found during code review. Compile tested only. + +Fixes: d889913205cf ("wifi: ath12k: driver for Qualcomm Wi-Fi 7 devices") +Signed-off-by: Baochen Qiang +Acked-by: Jeff Johnson +Signed-off-by: Kalle Valo +Link: https://msgid.link/20240524024021.37711-1-quic_bqiang@quicinc.com +Signed-off-by: Sasha Levin +--- + drivers/net/wireless/ath/ath12k/ce.h | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +diff --git a/drivers/net/wireless/ath/ath12k/ce.h b/drivers/net/wireless/ath/ath12k/ce.h +index 79af3b6159f1c..857bc5f9e946a 100644 +--- a/drivers/net/wireless/ath/ath12k/ce.h ++++ b/drivers/net/wireless/ath/ath12k/ce.h +@@ -1,7 +1,7 @@ + /* SPDX-License-Identifier: BSD-3-Clause-Clear */ + /* + * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. +- * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. ++ * Copyright (c) 2021-2022, 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + + #ifndef ATH12K_CE_H +@@ -119,7 +119,7 @@ struct ath12k_ce_ring { + /* Host address space */ + void *base_addr_owner_space_unaligned; + /* CE address space */ +- u32 base_addr_ce_space_unaligned; ++ dma_addr_t base_addr_ce_space_unaligned; + + /* Actual start of descriptors. + * Aligned to descriptor-size boundary. +@@ -129,7 +129,7 @@ struct ath12k_ce_ring { + void *base_addr_owner_space; + + /* CE address space */ +- u32 base_addr_ce_space; ++ dma_addr_t base_addr_ce_space; + + /* HAL ring id */ + u32 hal_ring_id; +-- +2.43.0 + diff --git a/queue-6.6/wifi-brcmsmac-lcn-phy-code-is-used-for-bcm4313-2g-on.patch b/queue-6.6/wifi-brcmsmac-lcn-phy-code-is-used-for-bcm4313-2g-on.patch new file mode 100644 index 00000000000..66f51392bd3 --- /dev/null +++ b/queue-6.6/wifi-brcmsmac-lcn-phy-code-is-used-for-bcm4313-2g-on.patch @@ -0,0 +1,75 @@ +From 4bf95441c9a615c2b89d7925a80d1d962fb945dc Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 9 May 2024 16:10:37 -0700 +Subject: wifi: brcmsmac: LCN PHY code is used for BCM4313 2G-only device + +From: Samasth Norway Ananda + +[ Upstream commit c636fa85feb450ca414a10010ed05361a73c93a6 ] + +The band_idx variable in the function wlc_lcnphy_tx_iqlo_cal() will +never be set to 1 as BCM4313 is the only device for which the LCN PHY +code is used. This is a 2G-only device. + +Fixes: 5b435de0d786 ("net: wireless: add brcm80211 drivers") +Signed-off-by: Samasth Norway Ananda +Acked-by: Arend van Spriel +Signed-off-by: Kalle Valo +Link: https://msgid.link/20240509231037.2014109-1-samasth.norway.ananda@oracle.com +Signed-off-by: Sasha Levin +--- + .../broadcom/brcm80211/brcmsmac/phy/phy_lcn.c | 18 +++++++++--------- + 1 file changed, 9 insertions(+), 9 deletions(-) + +diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c b/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c +index 7717eb85a1db6..47c0e8e429e54 100644 +--- a/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c ++++ b/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c +@@ -2567,7 +2567,6 @@ wlc_lcnphy_tx_iqlo_cal(struct brcms_phy *pi, + + struct lcnphy_txgains cal_gains, temp_gains; + u16 hash; +- u8 band_idx; + int j; + u16 ncorr_override[5]; + u16 syst_coeffs[] = { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, +@@ -2599,6 +2598,9 @@ wlc_lcnphy_tx_iqlo_cal(struct brcms_phy *pi, + u16 *values_to_save; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; + ++ if (WARN_ON(CHSPEC_IS5G(pi->radio_chanspec))) ++ return; ++ + values_to_save = kmalloc_array(20, sizeof(u16), GFP_ATOMIC); + if (NULL == values_to_save) + return; +@@ -2662,20 +2664,18 @@ wlc_lcnphy_tx_iqlo_cal(struct brcms_phy *pi, + hash = (target_gains->gm_gain << 8) | + (target_gains->pga_gain << 4) | (target_gains->pad_gain); + +- band_idx = (CHSPEC_IS5G(pi->radio_chanspec) ? 1 : 0); +- + cal_gains = *target_gains; + memset(ncorr_override, 0, sizeof(ncorr_override)); +- for (j = 0; j < iqcal_gainparams_numgains_lcnphy[band_idx]; j++) { +- if (hash == tbl_iqcal_gainparams_lcnphy[band_idx][j][0]) { ++ for (j = 0; j < iqcal_gainparams_numgains_lcnphy[0]; j++) { ++ if (hash == tbl_iqcal_gainparams_lcnphy[0][j][0]) { + cal_gains.gm_gain = +- tbl_iqcal_gainparams_lcnphy[band_idx][j][1]; ++ tbl_iqcal_gainparams_lcnphy[0][j][1]; + cal_gains.pga_gain = +- tbl_iqcal_gainparams_lcnphy[band_idx][j][2]; ++ tbl_iqcal_gainparams_lcnphy[0][j][2]; + cal_gains.pad_gain = +- tbl_iqcal_gainparams_lcnphy[band_idx][j][3]; ++ tbl_iqcal_gainparams_lcnphy[0][j][3]; + memcpy(ncorr_override, +- &tbl_iqcal_gainparams_lcnphy[band_idx][j][3], ++ &tbl_iqcal_gainparams_lcnphy[0][j][3], + sizeof(ncorr_override)); + break; + } +-- +2.43.0 + diff --git a/queue-6.6/wifi-cfg80211-fix-typo-in-cfg80211_calculate_bitrate.patch b/queue-6.6/wifi-cfg80211-fix-typo-in-cfg80211_calculate_bitrate.patch new file mode 100644 index 00000000000..420cb236ff8 --- /dev/null +++ b/queue-6.6/wifi-cfg80211-fix-typo-in-cfg80211_calculate_bitrate.patch @@ -0,0 +1,45 @@ +From ed1a9f15b6ecb175c698763c731c1986f4ba1b7d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 Jun 2024 10:06:52 +0800 +Subject: wifi: cfg80211: fix typo in cfg80211_calculate_bitrate_he() + +From: Baochen Qiang + +[ Upstream commit 9ee0d44f055276fe2802b2f65058e920853f4f99 ] + +rates_996 is mistakenly written as rates_969, fix it. + +Fixes: c4cbaf7973a7 ("cfg80211: Add support for HE") +Signed-off-by: Baochen Qiang +Link: https://msgid.link/20240606020653.33205-2-quic_bqiang@quicinc.com +Signed-off-by: Johannes Berg +Signed-off-by: Sasha Levin +--- + net/wireless/util.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/net/wireless/util.c b/net/wireless/util.c +index 57ea6d5b092d4..187e29a30c2af 100644 +--- a/net/wireless/util.c ++++ b/net/wireless/util.c +@@ -1460,7 +1460,7 @@ static u32 cfg80211_calculate_bitrate_he(struct rate_info *rate) + 5120, /* 0.833333... */ + }; + u32 rates_160M[3] = { 960777777, 907400000, 816666666 }; +- u32 rates_969[3] = { 480388888, 453700000, 408333333 }; ++ u32 rates_996[3] = { 480388888, 453700000, 408333333 }; + u32 rates_484[3] = { 229411111, 216666666, 195000000 }; + u32 rates_242[3] = { 114711111, 108333333, 97500000 }; + u32 rates_106[3] = { 40000000, 37777777, 34000000 }; +@@ -1485,7 +1485,7 @@ static u32 cfg80211_calculate_bitrate_he(struct rate_info *rate) + else if (rate->bw == RATE_INFO_BW_80 || + (rate->bw == RATE_INFO_BW_HE_RU && + rate->he_ru_alloc == NL80211_RATE_INFO_HE_RU_ALLOC_996)) +- result = rates_969[rate->he_gi]; ++ result = rates_996[rate->he_gi]; + else if (rate->bw == RATE_INFO_BW_40 || + (rate->bw == RATE_INFO_BW_HE_RU && + rate->he_ru_alloc == NL80211_RATE_INFO_HE_RU_ALLOC_484)) +-- +2.43.0 + diff --git a/queue-6.6/wifi-cfg80211-handle-2x996-ru-allocation-in-cfg80211.patch b/queue-6.6/wifi-cfg80211-handle-2x996-ru-allocation-in-cfg80211.patch new file mode 100644 index 00000000000..953b0337cbf --- /dev/null +++ b/queue-6.6/wifi-cfg80211-handle-2x996-ru-allocation-in-cfg80211.patch @@ -0,0 +1,45 @@ +From f651d5797d5ec4933159a02da72b4c84da7f6ebb Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 6 Jun 2024 10:06:53 +0800 +Subject: wifi: cfg80211: handle 2x996 RU allocation in + cfg80211_calculate_bitrate_he() + +From: Baochen Qiang + +[ Upstream commit bcbd771cd5d68c0c52567556097d75f9fc4e7cd6 ] + +Currently NL80211_RATE_INFO_HE_RU_ALLOC_2x996 is not handled in +cfg80211_calculate_bitrate_he(), leading to below warning: + +kernel: invalid HE MCS: bw:6, ru:6 +kernel: WARNING: CPU: 0 PID: 2312 at net/wireless/util.c:1501 cfg80211_calculate_bitrate_he+0x22b/0x270 [cfg80211] + +Fix it by handling 2x996 RU allocation in the same way as 160 MHz bandwidth. + +Fixes: c4cbaf7973a7 ("cfg80211: Add support for HE") +Signed-off-by: Baochen Qiang +Link: https://msgid.link/20240606020653.33205-3-quic_bqiang@quicinc.com +Signed-off-by: Johannes Berg +Signed-off-by: Sasha Levin +--- + net/wireless/util.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/net/wireless/util.c b/net/wireless/util.c +index 187e29a30c2af..7acd8d0db61a7 100644 +--- a/net/wireless/util.c ++++ b/net/wireless/util.c +@@ -1480,7 +1480,9 @@ static u32 cfg80211_calculate_bitrate_he(struct rate_info *rate) + if (WARN_ON_ONCE(rate->nss < 1 || rate->nss > 8)) + return 0; + +- if (rate->bw == RATE_INFO_BW_160) ++ if (rate->bw == RATE_INFO_BW_160 || ++ (rate->bw == RATE_INFO_BW_HE_RU && ++ rate->he_ru_alloc == NL80211_RATE_INFO_HE_RU_ALLOC_2x996)) + result = rates_160M[rate->he_gi]; + else if (rate->bw == RATE_INFO_BW_80 || + (rate->bw == RATE_INFO_BW_HE_RU && +-- +2.43.0 + diff --git a/queue-6.6/wifi-rtl8xxxu-8188f-limit-tx-power-index.patch b/queue-6.6/wifi-rtl8xxxu-8188f-limit-tx-power-index.patch new file mode 100644 index 00000000000..159318074b7 --- /dev/null +++ b/queue-6.6/wifi-rtl8xxxu-8188f-limit-tx-power-index.patch @@ -0,0 +1,69 @@ +From a3ac43ca8b53d859c31d5b19d5964335ecdea302 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 24 Jun 2024 16:00:37 +0200 +Subject: wifi: rtl8xxxu: 8188f: Limit TX power index + +From: Martin Kaistra + +[ Upstream commit d0b4b8ef083ca46d5d318e66a30fb80e0abbb90d ] + +TX power index is read from the efuse on init, the values get written to +the TX power registers when the channel gets switched. + +When the chip has not yet been calibrated, the efuse values are 0xFF, +which on some boards leads to USB timeouts for reading/writing registers +after the first frames have been sent. + +The vendor driver (v5.11.5-1) checks for these invalid values and sets +default values instead. Implement something similar in +rtl8188fu_parse_efuse(). + +Fixes: c888183b21f3 ("wifi: rtl8xxxu: Support new chip RTL8188FU") +Signed-off-by: Martin Kaistra +Reviewed-by: Ping-Ke Shih +Signed-off-by: Ping-Ke Shih +Link: https://patch.msgid.link/20240624140037.231657-1-martin.kaistra@linutronix.de +Signed-off-by: Sasha Levin +--- + .../wireless/realtek/rtl8xxxu/rtl8xxxu_8188f.c | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +diff --git a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188f.c b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188f.c +index 1e1c8fa194cb8..0466b8be5df01 100644 +--- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188f.c ++++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_8188f.c +@@ -713,9 +713,14 @@ static void rtl8188fu_init_statistics(struct rtl8xxxu_priv *priv) + rtl8xxxu_write32(priv, REG_OFDM0_FA_RSTC, val32); + } + ++#define TX_POWER_INDEX_MAX 0x3F ++#define TX_POWER_INDEX_DEFAULT_CCK 0x22 ++#define TX_POWER_INDEX_DEFAULT_HT40 0x27 ++ + static int rtl8188fu_parse_efuse(struct rtl8xxxu_priv *priv) + { + struct rtl8188fu_efuse *efuse = &priv->efuse_wifi.efuse8188fu; ++ int i; + + if (efuse->rtl_id != cpu_to_le16(0x8129)) + return -EINVAL; +@@ -729,6 +734,16 @@ static int rtl8188fu_parse_efuse(struct rtl8xxxu_priv *priv) + efuse->tx_power_index_A.ht40_base, + sizeof(efuse->tx_power_index_A.ht40_base)); + ++ for (i = 0; i < ARRAY_SIZE(priv->cck_tx_power_index_A); i++) { ++ if (priv->cck_tx_power_index_A[i] > TX_POWER_INDEX_MAX) ++ priv->cck_tx_power_index_A[i] = TX_POWER_INDEX_DEFAULT_CCK; ++ } ++ ++ for (i = 0; i < ARRAY_SIZE(priv->ht40_1s_tx_power_index_A); i++) { ++ if (priv->ht40_1s_tx_power_index_A[i] > TX_POWER_INDEX_MAX) ++ priv->ht40_1s_tx_power_index_A[i] = TX_POWER_INDEX_DEFAULT_HT40; ++ } ++ + priv->ofdm_tx_power_diff[0].a = efuse->tx_power_index_A.ht20_ofdm_1s_diff.a; + priv->ht20_tx_power_diff[0].a = efuse->tx_power_index_A.ht20_ofdm_1s_diff.b; + +-- +2.43.0 + diff --git a/queue-6.6/wifi-rtw89-8852b-fix-definition-of-kip-register-numb.patch b/queue-6.6/wifi-rtw89-8852b-fix-definition-of-kip-register-numb.patch new file mode 100644 index 00000000000..59c856b721e --- /dev/null +++ b/queue-6.6/wifi-rtw89-8852b-fix-definition-of-kip-register-numb.patch @@ -0,0 +1,38 @@ +From 3a5149e3edf218470d5661dfabf23209979e85d6 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 21 Jun 2024 20:36:17 +0800 +Subject: wifi: rtw89: 8852b: fix definition of KIP register number + +From: Kuan-Chung Chen + +[ Upstream commit 2f35712ab82683554c660bc2456f05785835efbe ] + +An incorrect definition caused DPK to fail to backup and +restore a set of KIP registers. Fixing this will improve +RX throughput from 902 to 997 Mbps. + +Fixes: 5b8471ace5b1 ("wifi: rtw89: 8852b: rfk: add DPK") +Signed-off-by: Kuan-Chung Chen +Signed-off-by: Ping-Ke Shih +Link: https://patch.msgid.link/20240621123617.6687-2-pkshih@realtek.com +Signed-off-by: Sasha Levin +--- + drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c b/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c +index 259df67836a0e..a2fa1d339bc21 100644 +--- a/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c ++++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c +@@ -20,7 +20,7 @@ + #define RTW8852B_RF_REL_VERSION 34 + #define RTW8852B_DPK_VER 0x0d + #define RTW8852B_DPK_RF_PATH 2 +-#define RTW8852B_DPK_KIP_REG_NUM 2 ++#define RTW8852B_DPK_KIP_REG_NUM 3 + + #define _TSSI_DE_MASK GENMASK(21, 12) + #define ADDC_T_AVG 100 +-- +2.43.0 + diff --git a/queue-6.6/wifi-rtw89-fix-array-index-mistake-in-rtw89_sta_info.patch b/queue-6.6/wifi-rtw89-fix-array-index-mistake-in-rtw89_sta_info.patch new file mode 100644 index 00000000000..c6de4ec4b5b --- /dev/null +++ b/queue-6.6/wifi-rtw89-fix-array-index-mistake-in-rtw89_sta_info.patch @@ -0,0 +1,44 @@ +From 90dc81a4c6dfdd68faed33917becf635fddccd90 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 4 Jul 2024 00:05:10 +0300 +Subject: wifi: rtw89: Fix array index mistake in rtw89_sta_info_get_iter() + +From: Aleksandr Mishin + +[ Upstream commit 85099c7ce4f9e64c66aa397cd9a37473637ab891 ] + +In rtw89_sta_info_get_iter() 'status->he_gi' is compared to array size. +But then 'rate->he_gi' is used as array index instead of 'status->he_gi'. +This can lead to go beyond array boundaries in case of 'rate->he_gi' is +not equal to 'status->he_gi' and is bigger than array size. Looks like +"copy-paste" mistake. + +Fix this mistake by replacing 'rate->he_gi' with 'status->he_gi'. + +Found by Linux Verification Center (linuxtesting.org) with SVACE. + +Fixes: e3ec7017f6a2 ("rtw89: add Realtek 802.11ax driver") +Signed-off-by: Aleksandr Mishin +Signed-off-by: Ping-Ke Shih +Link: https://patch.msgid.link/20240703210510.11089-1-amishin@t-argos.ru +Signed-off-by: Sasha Levin +--- + drivers/net/wireless/realtek/rtw89/debug.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/net/wireless/realtek/rtw89/debug.c b/drivers/net/wireless/realtek/rtw89/debug.c +index d162e64f60647..94fe921e9ff28 100644 +--- a/drivers/net/wireless/realtek/rtw89/debug.c ++++ b/drivers/net/wireless/realtek/rtw89/debug.c +@@ -3292,7 +3292,7 @@ static void rtw89_sta_info_get_iter(void *data, struct ieee80211_sta *sta) + case RX_ENC_HE: + seq_printf(m, "HE %dSS MCS-%d GI:%s", status->nss, status->rate_idx, + status->he_gi <= NL80211_RATE_INFO_HE_GI_3_2 ? +- he_gi_str[rate->he_gi] : "N/A"); ++ he_gi_str[status->he_gi] : "N/A"); + break; + } + seq_printf(m, " BW:%u", rtw89_rate_info_bw_to_mhz(status->bw)); +-- +2.43.0 + diff --git a/queue-6.6/wifi-virt_wifi-avoid-reporting-connection-success-wi.patch b/queue-6.6/wifi-virt_wifi-avoid-reporting-connection-success-wi.patch new file mode 100644 index 00000000000..5161acae81f --- /dev/null +++ b/queue-6.6/wifi-virt_wifi-avoid-reporting-connection-success-wi.patch @@ -0,0 +1,98 @@ +From c344bb48e08ec8f2d38335b031ccc1bcf59924d5 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 5 Jul 2024 10:37:56 +0800 +Subject: wifi: virt_wifi: avoid reporting connection success with wrong SSID + +From: En-Wei Wu + +[ Upstream commit b5d14b0c6716fad7f0c94ac6e1d6f60a49f985c7 ] + +When user issues a connection with a different SSID than the one +virt_wifi has advertised, the __cfg80211_connect_result() will +trigger the warning: WARN_ON(bss_not_found). + +The issue is because the connection code in virt_wifi does not +check the SSID from user space (it only checks the BSSID), and +virt_wifi will call cfg80211_connect_result() with WLAN_STATUS_SUCCESS +even if the SSID is different from the one virt_wifi has advertised. +Eventually cfg80211 won't be able to find the cfg80211_bss and generate +the warning. + +Fixed it by checking the SSID (from user space) in the connection code. + +Fixes: c7cdba31ed8b ("mac80211-next: rtnetlink wifi simulation device") +Reported-by: syzbot+d6eb9cee2885ec06f5e3@syzkaller.appspotmail.com +Signed-off-by: En-Wei Wu +Link: https://patch.msgid.link/20240705023756.10954-1-en-wei.wu@canonical.com +Signed-off-by: Johannes Berg +Signed-off-by: Sasha Levin +--- + drivers/net/wireless/virtual/virt_wifi.c | 19 ++++++++++++++++--- + 1 file changed, 16 insertions(+), 3 deletions(-) + +diff --git a/drivers/net/wireless/virtual/virt_wifi.c b/drivers/net/wireless/virtual/virt_wifi.c +index ba14d83353a4b..cf1eb41e282a9 100644 +--- a/drivers/net/wireless/virtual/virt_wifi.c ++++ b/drivers/net/wireless/virtual/virt_wifi.c +@@ -136,6 +136,8 @@ static struct ieee80211_supported_band band_5ghz = { + /* Assigned at module init. Guaranteed locally-administered and unicast. */ + static u8 fake_router_bssid[ETH_ALEN] __ro_after_init = {}; + ++#define VIRT_WIFI_SSID "VirtWifi" ++ + static void virt_wifi_inform_bss(struct wiphy *wiphy) + { + u64 tsf = div_u64(ktime_get_boottime_ns(), 1000); +@@ -146,8 +148,8 @@ static void virt_wifi_inform_bss(struct wiphy *wiphy) + u8 ssid[8]; + } __packed ssid = { + .tag = WLAN_EID_SSID, +- .len = 8, +- .ssid = "VirtWifi", ++ .len = strlen(VIRT_WIFI_SSID), ++ .ssid = VIRT_WIFI_SSID, + }; + + informed_bss = cfg80211_inform_bss(wiphy, &channel_5ghz, +@@ -213,6 +215,8 @@ struct virt_wifi_netdev_priv { + struct net_device *upperdev; + u32 tx_packets; + u32 tx_failed; ++ u32 connect_requested_ssid_len; ++ u8 connect_requested_ssid[IEEE80211_MAX_SSID_LEN]; + u8 connect_requested_bss[ETH_ALEN]; + bool is_up; + bool is_connected; +@@ -229,6 +233,12 @@ static int virt_wifi_connect(struct wiphy *wiphy, struct net_device *netdev, + if (priv->being_deleted || !priv->is_up) + return -EBUSY; + ++ if (!sme->ssid) ++ return -EINVAL; ++ ++ priv->connect_requested_ssid_len = sme->ssid_len; ++ memcpy(priv->connect_requested_ssid, sme->ssid, sme->ssid_len); ++ + could_schedule = schedule_delayed_work(&priv->connect, HZ * 2); + if (!could_schedule) + return -EBUSY; +@@ -252,12 +262,15 @@ static void virt_wifi_connect_complete(struct work_struct *work) + container_of(work, struct virt_wifi_netdev_priv, connect.work); + u8 *requested_bss = priv->connect_requested_bss; + bool right_addr = ether_addr_equal(requested_bss, fake_router_bssid); ++ bool right_ssid = priv->connect_requested_ssid_len == strlen(VIRT_WIFI_SSID) && ++ !memcmp(priv->connect_requested_ssid, VIRT_WIFI_SSID, ++ priv->connect_requested_ssid_len); + u16 status = WLAN_STATUS_SUCCESS; + + if (is_zero_ether_addr(requested_bss)) + requested_bss = NULL; + +- if (!priv->is_up || (requested_bss && !right_addr)) ++ if (!priv->is_up || (requested_bss && !right_addr) || !right_ssid) + status = WLAN_STATUS_UNSPECIFIED_FAILURE; + else + priv->is_connected = true; +-- +2.43.0 + diff --git a/queue-6.6/wifi-virt_wifi-don-t-use-strlen-in-const-context.patch b/queue-6.6/wifi-virt_wifi-don-t-use-strlen-in-const-context.patch new file mode 100644 index 00000000000..9fec099bf4d --- /dev/null +++ b/queue-6.6/wifi-virt_wifi-don-t-use-strlen-in-const-context.patch @@ -0,0 +1,56 @@ +From 6e7d10b67169355c4ca37f0c15d854555ee58145 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 9 Jul 2024 08:34:09 +0200 +Subject: wifi: virt_wifi: don't use strlen() in const context + +From: Johannes Berg + +[ Upstream commit 6e909f489191b365364e9d636dec33b5dfd4e5eb ] + +Looks like not all compilers allow strlen(constant) as +a constant, so don't do that. Instead, revert back to +defining the length as the first submission had it. + +Fixes: b5d14b0c6716 ("wifi: virt_wifi: avoid reporting connection success with wrong SSID") +Reported-by: kernel test robot +Closes: https://lore.kernel.org/oe-kbuild-all/202407090934.NnR1TUbW-lkp@intel.com/ +Closes: https://lore.kernel.org/oe-kbuild-all/202407090944.mpwLHGt9-lkp@intel.com/ +Signed-off-by: Johannes Berg +Signed-off-by: Sasha Levin +--- + drivers/net/wireless/virtual/virt_wifi.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +diff --git a/drivers/net/wireless/virtual/virt_wifi.c b/drivers/net/wireless/virtual/virt_wifi.c +index cf1eb41e282a9..fb4d95a027fef 100644 +--- a/drivers/net/wireless/virtual/virt_wifi.c ++++ b/drivers/net/wireless/virtual/virt_wifi.c +@@ -137,6 +137,7 @@ static struct ieee80211_supported_band band_5ghz = { + static u8 fake_router_bssid[ETH_ALEN] __ro_after_init = {}; + + #define VIRT_WIFI_SSID "VirtWifi" ++#define VIRT_WIFI_SSID_LEN 8 + + static void virt_wifi_inform_bss(struct wiphy *wiphy) + { +@@ -148,7 +149,7 @@ static void virt_wifi_inform_bss(struct wiphy *wiphy) + u8 ssid[8]; + } __packed ssid = { + .tag = WLAN_EID_SSID, +- .len = strlen(VIRT_WIFI_SSID), ++ .len = VIRT_WIFI_SSID_LEN, + .ssid = VIRT_WIFI_SSID, + }; + +@@ -262,7 +263,7 @@ static void virt_wifi_connect_complete(struct work_struct *work) + container_of(work, struct virt_wifi_netdev_priv, connect.work); + u8 *requested_bss = priv->connect_requested_bss; + bool right_addr = ether_addr_equal(requested_bss, fake_router_bssid); +- bool right_ssid = priv->connect_requested_ssid_len == strlen(VIRT_WIFI_SSID) && ++ bool right_ssid = priv->connect_requested_ssid_len == VIRT_WIFI_SSID_LEN && + !memcmp(priv->connect_requested_ssid, VIRT_WIFI_SSID, + priv->connect_requested_ssid_len); + u16 status = WLAN_STATUS_SUCCESS; +-- +2.43.0 + diff --git a/queue-6.6/x86-kconfig-add-as-instr64-macro-to-properly-evaluat.patch b/queue-6.6/x86-kconfig-add-as-instr64-macro-to-properly-evaluat.patch new file mode 100644 index 00000000000..4a901965ac0 --- /dev/null +++ b/queue-6.6/x86-kconfig-add-as-instr64-macro-to-properly-evaluat.patch @@ -0,0 +1,56 @@ +From 2e17c1a20049aecacf87dee479064fbbb6667506 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 12 Jun 2024 14:02:55 +0900 +Subject: x86/kconfig: Add as-instr64 macro to properly evaluate AS_WRUSS + +From: Masahiro Yamada + +[ Upstream commit 469169803d52a5d8f0dc781090638e851a7d22b1 ] + +Some instructions are only available on the 64-bit architecture. + +Bi-arch compilers that default to -m32 need the explicit -m64 option +to evaluate them properly. + +Fixes: 18e66b695e78 ("x86/shstk: Add Kconfig option for shadow stack") +Closes: https://lore.kernel.org/all/20240612-as-instr-opt-wrussq-v2-1-bd950f7eead7@gmail.com/ +Reported-by: Dmitry Safonov <0x7f454c46@gmail.com> +Signed-off-by: Masahiro Yamada +Signed-off-by: Borislav Petkov (AMD) +Tested-by: Dmitry Safonov <0x7f454c46@gmail.com> +Link: https://lore.kernel.org/r/20240612050257.3670768-1-masahiroy@kernel.org +Signed-off-by: Sasha Levin +--- + arch/x86/Kconfig.assembler | 2 +- + scripts/Kconfig.include | 3 ++- + 2 files changed, 3 insertions(+), 2 deletions(-) + +diff --git a/arch/x86/Kconfig.assembler b/arch/x86/Kconfig.assembler +index 8ad41da301e53..16d0b022d6fff 100644 +--- a/arch/x86/Kconfig.assembler ++++ b/arch/x86/Kconfig.assembler +@@ -26,6 +26,6 @@ config AS_GFNI + Supported by binutils >= 2.30 and LLVM integrated assembler + + config AS_WRUSS +- def_bool $(as-instr,wrussq %rax$(comma)(%rbx)) ++ def_bool $(as-instr64,wrussq %rax$(comma)(%rbx)) + help + Supported by binutils >= 2.31 and LLVM integrated assembler +diff --git a/scripts/Kconfig.include b/scripts/Kconfig.include +index 3ee8ecfb8c044..3500a3d62f0df 100644 +--- a/scripts/Kconfig.include ++++ b/scripts/Kconfig.include +@@ -33,7 +33,8 @@ ld-option = $(success,$(LD) -v $(1)) + + # $(as-instr,) + # Return y if the assembler supports , n otherwise +-as-instr = $(success,printf "%b\n" "$(1)" | $(CC) $(CLANG_FLAGS) -Wa$(comma)--fatal-warnings -c -x assembler-with-cpp -o /dev/null -) ++as-instr = $(success,printf "%b\n" "$(1)" | $(CC) $(CLANG_FLAGS) $(2) -Wa$(comma)--fatal-warnings -c -x assembler-with-cpp -o /dev/null -) ++as-instr64 = $(as-instr,$(1),$(m64-flag)) + + # check if $(CC) and $(LD) exist + $(error-if,$(failure,command -v $(CC)),C compiler '$(CC)' not found) +-- +2.43.0 + diff --git a/queue-6.6/x86-of-return-consistent-error-type-from-x86_of_pci_.patch b/queue-6.6/x86-of-return-consistent-error-type-from-x86_of_pci_.patch new file mode 100644 index 00000000000..527924bb7d5 --- /dev/null +++ b/queue-6.6/x86-of-return-consistent-error-type-from-x86_of_pci_.patch @@ -0,0 +1,45 @@ +From 7d14f7464259ff0b4c970012882e6bfc5ade4156 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 27 May 2024 15:55:35 +0300 +Subject: x86/of: Return consistent error type from x86_of_pci_irq_enable() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Ilpo Järvinen + +[ Upstream commit ec0b4c4d45cf7cf9a6c9626a494a89cb1ae7c645 ] + +x86_of_pci_irq_enable() returns PCIBIOS_* code received from +pci_read_config_byte() directly and also -EINVAL which are not +compatible error types. x86_of_pci_irq_enable() is used as +(*pcibios_enable_irq) function which should not return PCIBIOS_* codes. + +Convert the PCIBIOS_* return code from pci_read_config_byte() into +normal errno using pcibios_err_to_errno(). + +Fixes: 96e0a0797eba ("x86: dtb: Add support for PCI devices backed by dtb nodes") +Signed-off-by: Ilpo Järvinen +Signed-off-by: Borislav Petkov (AMD) +Link: https://lore.kernel.org/r/20240527125538.13620-1-ilpo.jarvinen@linux.intel.com +Signed-off-by: Sasha Levin +--- + arch/x86/kernel/devicetree.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/x86/kernel/devicetree.c b/arch/x86/kernel/devicetree.c +index 87d38f17ff5c9..c13c9cb40b9b4 100644 +--- a/arch/x86/kernel/devicetree.c ++++ b/arch/x86/kernel/devicetree.c +@@ -82,7 +82,7 @@ static int x86_of_pci_irq_enable(struct pci_dev *dev) + + ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); + if (ret) +- return ret; ++ return pcibios_err_to_errno(ret); + if (!pin) + return 0; + +-- +2.43.0 + diff --git a/queue-6.6/x86-pci-intel_mid_pci-fix-pcibios_-return-code-handl.patch b/queue-6.6/x86-pci-intel_mid_pci-fix-pcibios_-return-code-handl.patch new file mode 100644 index 00000000000..d1d6bf88996 --- /dev/null +++ b/queue-6.6/x86-pci-intel_mid_pci-fix-pcibios_-return-code-handl.patch @@ -0,0 +1,53 @@ +From 25cea44a601738628640799d908909b2f6849b17 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 27 May 2024 15:55:36 +0300 +Subject: x86/pci/intel_mid_pci: Fix PCIBIOS_* return code handling +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Ilpo Järvinen + +[ Upstream commit 724852059e97c48557151b3aa4af424614819752 ] + +intel_mid_pci_irq_enable() uses pci_read_config_byte() that returns +PCIBIOS_* codes. The error handling, however, assumes the codes are +normal errnos because it checks for < 0. + +intel_mid_pci_irq_enable() also returns the PCIBIOS_* code back to the +caller but the function is used as the (*pcibios_enable_irq) function +which should return normal errnos. + +Convert the error check to plain non-zero check which works for +PCIBIOS_* return codes and convert the PCIBIOS_* return code using +pcibios_err_to_errno() into normal errno before returning it. + +Fixes: 5b395e2be6c4 ("x86/platform/intel-mid: Make IRQ allocation a bit more flexible") +Signed-off-by: Ilpo Järvinen +Signed-off-by: Borislav Petkov (AMD) +Reviewed-by: Andy Shevchenko +Link: https://lore.kernel.org/r/20240527125538.13620-2-ilpo.jarvinen@linux.intel.com +Signed-off-by: Sasha Levin +--- + arch/x86/pci/intel_mid_pci.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/x86/pci/intel_mid_pci.c b/arch/x86/pci/intel_mid_pci.c +index 8edd622066044..722a33be08a18 100644 +--- a/arch/x86/pci/intel_mid_pci.c ++++ b/arch/x86/pci/intel_mid_pci.c +@@ -233,9 +233,9 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev) + return 0; + + ret = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi); +- if (ret < 0) { ++ if (ret) { + dev_warn(&dev->dev, "Failed to read interrupt line: %d\n", ret); +- return ret; ++ return pcibios_err_to_errno(ret); + } + + id = x86_match_cpu(intel_mid_cpu_ids); +-- +2.43.0 + diff --git a/queue-6.6/x86-pci-xen-fix-pcibios_-return-code-handling.patch b/queue-6.6/x86-pci-xen-fix-pcibios_-return-code-handling.patch new file mode 100644 index 00000000000..7d40f2eec7f --- /dev/null +++ b/queue-6.6/x86-pci-xen-fix-pcibios_-return-code-handling.patch @@ -0,0 +1,54 @@ +From 790d451b6ecb87a8c237feb1c965811bf93d14db Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 27 May 2024 15:55:37 +0300 +Subject: x86/pci/xen: Fix PCIBIOS_* return code handling +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Ilpo Järvinen + +[ Upstream commit e9d7b435dfaec58432f4106aaa632bf39f52ce9f ] + +xen_pcifront_enable_irq() uses pci_read_config_byte() that returns +PCIBIOS_* codes. The error handling, however, assumes the codes are +normal errnos because it checks for < 0. + +xen_pcifront_enable_irq() also returns the PCIBIOS_* code back to the +caller but the function is used as the (*pcibios_enable_irq) function +which should return normal errnos. + +Convert the error check to plain non-zero check which works for +PCIBIOS_* return codes and convert the PCIBIOS_* return code using +pcibios_err_to_errno() into normal errno before returning it. + +Fixes: 3f2a230caf21 ("xen: handled remapped IRQs when enabling a pcifront PCI device.") +Signed-off-by: Ilpo Järvinen +Signed-off-by: Borislav Petkov (AMD) +Reviewed-by: Juergen Gross +Link: https://lore.kernel.org/r/20240527125538.13620-3-ilpo.jarvinen@linux.intel.com +Signed-off-by: Sasha Levin +--- + arch/x86/pci/xen.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/x86/pci/xen.c b/arch/x86/pci/xen.c +index 652cd53e77f64..0f2fe524f60dc 100644 +--- a/arch/x86/pci/xen.c ++++ b/arch/x86/pci/xen.c +@@ -38,10 +38,10 @@ static int xen_pcifront_enable_irq(struct pci_dev *dev) + u8 gsi; + + rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi); +- if (rc < 0) { ++ if (rc) { + dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n", + rc); +- return rc; ++ return pcibios_err_to_errno(rc); + } + /* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/ + pirq = gsi; +-- +2.43.0 + diff --git a/queue-6.6/x86-platform-iosf_mbi-convert-pcibios_-return-codes-.patch b/queue-6.6/x86-platform-iosf_mbi-convert-pcibios_-return-codes-.patch new file mode 100644 index 00000000000..b0148b5e01f --- /dev/null +++ b/queue-6.6/x86-platform-iosf_mbi-convert-pcibios_-return-codes-.patch @@ -0,0 +1,54 @@ +From ffd677a90b0ee7bca06eb4c28a367b2136ac34be Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 27 May 2024 15:55:38 +0300 +Subject: x86/platform/iosf_mbi: Convert PCIBIOS_* return codes to errnos +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Ilpo Järvinen + +[ Upstream commit 7821fa101eab529521aa4b724bf708149d70820c ] + +iosf_mbi_pci_{read,write}_mdr() use pci_{read,write}_config_dword() +that return PCIBIOS_* codes but functions also return -ENODEV which are +not compatible error codes. As neither of the functions are related to +PCI read/write functions, they should return normal errnos. + +Convert PCIBIOS_* returns code using pcibios_err_to_errno() into normal +errno before returning it. + +Fixes: 46184415368a ("arch: x86: New MailBox support driver for Intel SOC's") +Signed-off-by: Ilpo Järvinen +Signed-off-by: Borislav Petkov (AMD) +Link: https://lore.kernel.org/r/20240527125538.13620-4-ilpo.jarvinen@linux.intel.com +Signed-off-by: Sasha Levin +--- + arch/x86/platform/intel/iosf_mbi.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/x86/platform/intel/iosf_mbi.c b/arch/x86/platform/intel/iosf_mbi.c +index fdd49d70b4373..c81cea208c2c4 100644 +--- a/arch/x86/platform/intel/iosf_mbi.c ++++ b/arch/x86/platform/intel/iosf_mbi.c +@@ -62,7 +62,7 @@ static int iosf_mbi_pci_read_mdr(u32 mcrx, u32 mcr, u32 *mdr) + + fail_read: + dev_err(&mbi_pdev->dev, "PCI config access failed with %d\n", result); +- return result; ++ return pcibios_err_to_errno(result); + } + + static int iosf_mbi_pci_write_mdr(u32 mcrx, u32 mcr, u32 mdr) +@@ -91,7 +91,7 @@ static int iosf_mbi_pci_write_mdr(u32 mcrx, u32 mcr, u32 mdr) + + fail_write: + dev_err(&mbi_pdev->dev, "PCI config access failed with %d\n", result); +- return result; ++ return pcibios_err_to_errno(result); + } + + int iosf_mbi_read(u8 port, u8 opcode, u32 offset, u32 *mdr) +-- +2.43.0 + diff --git a/queue-6.6/x86-shstk-make-return-uprobe-work-with-shadow-stack.patch b/queue-6.6/x86-shstk-make-return-uprobe-work-with-shadow-stack.patch new file mode 100644 index 00000000000..dd85751ffc0 --- /dev/null +++ b/queue-6.6/x86-shstk-make-return-uprobe-work-with-shadow-stack.patch @@ -0,0 +1,94 @@ +From 7b8c42e7501783c446e3dfe271bde36dbff65e3d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Wed, 12 Jun 2024 08:44:27 +0900 +Subject: x86/shstk: Make return uprobe work with shadow stack + +From: Jiri Olsa + +[ Upstream commit 1713b63a07a28a475de94664f783b4cfd2e4fa90 ] + +Currently the application with enabled shadow stack will crash +if it sets up return uprobe. The reason is the uretprobe kernel +code changes the user space task's stack, but does not update +shadow stack accordingly. + +Adding new functions to update values on shadow stack and using +them in uprobe code to keep shadow stack in sync with uretprobe +changes to user stack. + +Link: https://lore.kernel.org/all/20240611112158.40795-2-jolsa@kernel.org/ + +Acked-by: Andrii Nakryiko +Acked-by: Rick Edgecombe +Reviewed-by: Oleg Nesterov +Fixes: 488af8ea7131 ("x86/shstk: Wire in shadow stack interface") +Signed-off-by: Jiri Olsa +Signed-off-by: Masami Hiramatsu (Google) +Signed-off-by: Sasha Levin +--- + arch/x86/include/asm/shstk.h | 2 ++ + arch/x86/kernel/shstk.c | 11 +++++++++++ + arch/x86/kernel/uprobes.c | 7 ++++++- + 3 files changed, 19 insertions(+), 1 deletion(-) + +diff --git a/arch/x86/include/asm/shstk.h b/arch/x86/include/asm/shstk.h +index 42fee8959df7b..896909f306e30 100644 +--- a/arch/x86/include/asm/shstk.h ++++ b/arch/x86/include/asm/shstk.h +@@ -21,6 +21,7 @@ unsigned long shstk_alloc_thread_stack(struct task_struct *p, unsigned long clon + void shstk_free(struct task_struct *p); + int setup_signal_shadow_stack(struct ksignal *ksig); + int restore_signal_shadow_stack(void); ++int shstk_update_last_frame(unsigned long val); + #else + static inline long shstk_prctl(struct task_struct *task, int option, + unsigned long arg2) { return -EINVAL; } +@@ -31,6 +32,7 @@ static inline unsigned long shstk_alloc_thread_stack(struct task_struct *p, + static inline void shstk_free(struct task_struct *p) {} + static inline int setup_signal_shadow_stack(struct ksignal *ksig) { return 0; } + static inline int restore_signal_shadow_stack(void) { return 0; } ++static inline int shstk_update_last_frame(unsigned long val) { return 0; } + #endif /* CONFIG_X86_USER_SHADOW_STACK */ + + #endif /* __ASSEMBLY__ */ +diff --git a/arch/x86/kernel/shstk.c b/arch/x86/kernel/shstk.c +index 59e15dd8d0f86..19e4db582fb69 100644 +--- a/arch/x86/kernel/shstk.c ++++ b/arch/x86/kernel/shstk.c +@@ -577,3 +577,14 @@ long shstk_prctl(struct task_struct *task, int option, unsigned long arg2) + return wrss_control(true); + return -EINVAL; + } ++ ++int shstk_update_last_frame(unsigned long val) ++{ ++ unsigned long ssp; ++ ++ if (!features_enabled(ARCH_SHSTK_SHSTK)) ++ return 0; ++ ++ ssp = get_user_shstk_addr(); ++ return write_user_shstk_64((u64 __user *)ssp, (u64)val); ++} +diff --git a/arch/x86/kernel/uprobes.c b/arch/x86/kernel/uprobes.c +index 6c07f6daaa227..6402fb3089d26 100644 +--- a/arch/x86/kernel/uprobes.c ++++ b/arch/x86/kernel/uprobes.c +@@ -1076,8 +1076,13 @@ arch_uretprobe_hijack_return_addr(unsigned long trampoline_vaddr, struct pt_regs + return orig_ret_vaddr; + + nleft = copy_to_user((void __user *)regs->sp, &trampoline_vaddr, rasize); +- if (likely(!nleft)) ++ if (likely(!nleft)) { ++ if (shstk_update_last_frame(trampoline_vaddr)) { ++ force_sig(SIGSEGV); ++ return -1; ++ } + return orig_ret_vaddr; ++ } + + if (nleft != rasize) { + pr_err("return address clobbered: pid=%d, %%sp=%#lx, %%ip=%#lx\n", +-- +2.43.0 + diff --git a/queue-6.6/x86-xen-convert-comma-to-semicolon.patch b/queue-6.6/x86-xen-convert-comma-to-semicolon.patch new file mode 100644 index 00000000000..64cb0bef6f4 --- /dev/null +++ b/queue-6.6/x86-xen-convert-comma-to-semicolon.patch @@ -0,0 +1,46 @@ +From ceeefee49bd7d07e0062751abe59d3d8e0a714b0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 2 Jul 2024 11:10:10 +0800 +Subject: x86/xen: Convert comma to semicolon + +From: Chen Ni + +[ Upstream commit 349d271416c61f82b853336509b1d0dc04c1fcbb ] + +Replace a comma between expression statements by a semicolon. + +Fixes: 8310b77b48c5 ("Xen/gnttab: handle p2m update errors on a per-slot basis") +Signed-off-by: Chen Ni +Reviewed-by: Juergen Gross +Link: https://lore.kernel.org/r/20240702031010.1411875-1-nichen@iscas.ac.cn +Signed-off-by: Juergen Gross +Signed-off-by: Sasha Levin +--- + arch/x86/xen/p2m.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/x86/xen/p2m.c b/arch/x86/xen/p2m.c +index 9bdc3b656b2c4..4c2bf989edafc 100644 +--- a/arch/x86/xen/p2m.c ++++ b/arch/x86/xen/p2m.c +@@ -731,7 +731,7 @@ int set_foreign_p2m_mapping(struct gnttab_map_grant_ref *map_ops, + * immediate unmapping. + */ + map_ops[i].status = GNTST_general_error; +- unmap[0].host_addr = map_ops[i].host_addr, ++ unmap[0].host_addr = map_ops[i].host_addr; + unmap[0].handle = map_ops[i].handle; + map_ops[i].handle = INVALID_GRANT_HANDLE; + if (map_ops[i].flags & GNTMAP_device_map) +@@ -741,7 +741,7 @@ int set_foreign_p2m_mapping(struct gnttab_map_grant_ref *map_ops, + + if (kmap_ops) { + kmap_ops[i].status = GNTST_general_error; +- unmap[1].host_addr = kmap_ops[i].host_addr, ++ unmap[1].host_addr = kmap_ops[i].host_addr; + unmap[1].handle = kmap_ops[i].handle; + kmap_ops[i].handle = INVALID_GRANT_HANDLE; + if (kmap_ops[i].flags & GNTMAP_device_map) +-- +2.43.0 + diff --git a/queue-6.6/xdp-fix-invalid-wait-context-of-page_pool_destroy.patch b/queue-6.6/xdp-fix-invalid-wait-context-of-page_pool_destroy.patch new file mode 100644 index 00000000000..dcf8e3b3118 --- /dev/null +++ b/queue-6.6/xdp-fix-invalid-wait-context-of-page_pool_destroy.patch @@ -0,0 +1,142 @@ +From dfaa322552927da613eadba35e13edaa46e27c59 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 12 Jul 2024 09:51:16 +0000 +Subject: xdp: fix invalid wait context of page_pool_destroy() + +From: Taehee Yoo + +[ Upstream commit 59a931c5b732ca5fc2ca727f5a72aeabaafa85ec ] + +If the driver uses a page pool, it creates a page pool with +page_pool_create(). +The reference count of page pool is 1 as default. +A page pool will be destroyed only when a reference count reaches 0. +page_pool_destroy() is used to destroy page pool, it decreases a +reference count. +When a page pool is destroyed, ->disconnect() is called, which is +mem_allocator_disconnect(). +This function internally acquires mutex_lock(). + +If the driver uses XDP, it registers a memory model with +xdp_rxq_info_reg_mem_model(). +The xdp_rxq_info_reg_mem_model() internally increases a page pool +reference count if a memory model is a page pool. +Now the reference count is 2. + +To destroy a page pool, the driver should call both page_pool_destroy() +and xdp_unreg_mem_model(). +The xdp_unreg_mem_model() internally calls page_pool_destroy(). +Only page_pool_destroy() decreases a reference count. + +If a driver calls page_pool_destroy() then xdp_unreg_mem_model(), we +will face an invalid wait context warning. +Because xdp_unreg_mem_model() calls page_pool_destroy() with +rcu_read_lock(). +The page_pool_destroy() internally acquires mutex_lock(). + +Splat looks like: +============================= +[ BUG: Invalid wait context ] +6.10.0-rc6+ #4 Tainted: G W +----------------------------- +ethtool/1806 is trying to lock: +ffffffff90387b90 (mem_id_lock){+.+.}-{4:4}, at: mem_allocator_disconnect+0x73/0x150 +other info that might help us debug this: +context-{5:5} +3 locks held by ethtool/1806: +stack backtrace: +CPU: 0 PID: 1806 Comm: ethtool Tainted: G W 6.10.0-rc6+ #4 f916f41f172891c800f2fed +Hardware name: ASUS System Product Name/PRIME Z690-P D4, BIOS 0603 11/01/2021 +Call Trace: + +dump_stack_lvl+0x7e/0xc0 +__lock_acquire+0x1681/0x4de0 +? _printk+0x64/0xe0 +? __pfx_mark_lock.part.0+0x10/0x10 +? __pfx___lock_acquire+0x10/0x10 +lock_acquire+0x1b3/0x580 +? mem_allocator_disconnect+0x73/0x150 +? __wake_up_klogd.part.0+0x16/0xc0 +? __pfx_lock_acquire+0x10/0x10 +? dump_stack_lvl+0x91/0xc0 +__mutex_lock+0x15c/0x1690 +? mem_allocator_disconnect+0x73/0x150 +? __pfx_prb_read_valid+0x10/0x10 +? mem_allocator_disconnect+0x73/0x150 +? __pfx_llist_add_batch+0x10/0x10 +? console_unlock+0x193/0x1b0 +? lockdep_hardirqs_on+0xbe/0x140 +? __pfx___mutex_lock+0x10/0x10 +? tick_nohz_tick_stopped+0x16/0x90 +? __irq_work_queue_local+0x1e5/0x330 +? irq_work_queue+0x39/0x50 +? __wake_up_klogd.part.0+0x79/0xc0 +? mem_allocator_disconnect+0x73/0x150 +mem_allocator_disconnect+0x73/0x150 +? __pfx_mem_allocator_disconnect+0x10/0x10 +? mark_held_locks+0xa5/0xf0 +? rcu_is_watching+0x11/0xb0 +page_pool_release+0x36e/0x6d0 +page_pool_destroy+0xd7/0x440 +xdp_unreg_mem_model+0x1a7/0x2a0 +? __pfx_xdp_unreg_mem_model+0x10/0x10 +? kfree+0x125/0x370 +? bnxt_free_ring.isra.0+0x2eb/0x500 +? bnxt_free_mem+0x5ac/0x2500 +xdp_rxq_info_unreg+0x4a/0xd0 +bnxt_free_mem+0x1356/0x2500 +bnxt_close_nic+0xf0/0x3b0 +? __pfx_bnxt_close_nic+0x10/0x10 +? ethnl_parse_bit+0x2c6/0x6d0 +? __pfx___nla_validate_parse+0x10/0x10 +? __pfx_ethnl_parse_bit+0x10/0x10 +bnxt_set_features+0x2a8/0x3e0 +__netdev_update_features+0x4dc/0x1370 +? ethnl_parse_bitset+0x4ff/0x750 +? __pfx_ethnl_parse_bitset+0x10/0x10 +? __pfx___netdev_update_features+0x10/0x10 +? mark_held_locks+0xa5/0xf0 +? _raw_spin_unlock_irqrestore+0x42/0x70 +? __pm_runtime_resume+0x7d/0x110 +ethnl_set_features+0x32d/0xa20 + +To fix this problem, it uses rhashtable_lookup_fast() instead of +rhashtable_lookup() with rcu_read_lock(). +Using xa without rcu_read_lock() here is safe. +xa is freed by __xdp_mem_allocator_rcu_free() and this is called by +call_rcu() of mem_xa_remove(). +The mem_xa_remove() is called by page_pool_destroy() if a reference +count reaches 0. +The xa is already protected by the reference count mechanism well in the +control plane. +So removing rcu_read_lock() for page_pool_destroy() is safe. + +Fixes: c3f812cea0d7 ("page_pool: do not release pool until inflight == 0.") +Signed-off-by: Taehee Yoo +Reviewed-by: Jakub Kicinski +Link: https://patch.msgid.link/20240712095116.3801586-1-ap420073@gmail.com +Signed-off-by: Jakub Kicinski +Signed-off-by: Sasha Levin +--- + net/core/xdp.c | 4 +--- + 1 file changed, 1 insertion(+), 3 deletions(-) + +diff --git a/net/core/xdp.c b/net/core/xdp.c +index 5fe4c099f30a3..5ee3f8f165e5a 100644 +--- a/net/core/xdp.c ++++ b/net/core/xdp.c +@@ -126,10 +126,8 @@ void xdp_unreg_mem_model(struct xdp_mem_info *mem) + return; + + if (type == MEM_TYPE_PAGE_POOL) { +- rcu_read_lock(); +- xa = rhashtable_lookup(mem_id_ht, &id, mem_id_rht_params); ++ xa = rhashtable_lookup_fast(mem_id_ht, &id, mem_id_rht_params); + page_pool_destroy(xa->page_pool); +- rcu_read_unlock(); + } + } + EXPORT_SYMBOL_GPL(xdp_unreg_mem_model); +-- +2.43.0 + diff --git a/queue-6.6/xfrm-call-xfrm_dev_policy_delete-when-kill-policy.patch b/queue-6.6/xfrm-call-xfrm_dev_policy_delete-when-kill-policy.patch new file mode 100644 index 00000000000..5a673e43c83 --- /dev/null +++ b/queue-6.6/xfrm-call-xfrm_dev_policy_delete-when-kill-policy.patch @@ -0,0 +1,90 @@ +From d392914956e21a01547635e6bdcb7be3bbac8462 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 8 Jul 2024 09:58:12 +0300 +Subject: xfrm: call xfrm_dev_policy_delete when kill policy + +From: Jianbo Liu + +[ Upstream commit 89a2aefe4b084686c2ffc1ee939585111ea4fc0f ] + +xfrm_policy_kill() is called at different places to delete xfrm +policy. It will call xfrm_pol_put(). But xfrm_dev_policy_delete() is +not called to free the policy offloaded to hardware. + +The three commits cited here are to handle this issue by calling +xfrm_dev_policy_delete() outside xfrm_get_policy(). But they didn't +cover all the cases. An example, which is not handled for now, is +xfrm_policy_insert(). It is called when XFRM_MSG_UPDPOLICY request is +received. Old policy is replaced by new one, but the offloaded policy +is not deleted, so driver doesn't have the chance to release hardware +resources. + +To resolve this issue for all cases, move xfrm_dev_policy_delete() +into xfrm_policy_kill(), so the offloaded policy can be deleted from +hardware when it is called, which avoids hardware resources leakage. + +Fixes: 919e43fad516 ("xfrm: add an interface to offload policy") +Fixes: bf06fcf4be0f ("xfrm: add missed call to delete offloaded policies") +Fixes: 982c3aca8bac ("xfrm: delete offloaded policy") +Signed-off-by: Jianbo Liu +Reviewed-by: Cosmin Ratiu +Signed-off-by: Leon Romanovsky +Signed-off-by: Steffen Klassert +Signed-off-by: Sasha Levin +--- + net/xfrm/xfrm_policy.c | 5 ++--- + net/xfrm/xfrm_user.c | 1 - + 2 files changed, 2 insertions(+), 4 deletions(-) + +diff --git a/net/xfrm/xfrm_policy.c b/net/xfrm/xfrm_policy.c +index 0dde08e02887d..b699cc2ec35ac 100644 +--- a/net/xfrm/xfrm_policy.c ++++ b/net/xfrm/xfrm_policy.c +@@ -436,6 +436,8 @@ EXPORT_SYMBOL(xfrm_policy_destroy); + + static void xfrm_policy_kill(struct xfrm_policy *policy) + { ++ xfrm_dev_policy_delete(policy); ++ + write_lock_bh(&policy->lock); + policy->walk.dead = 1; + write_unlock_bh(&policy->lock); +@@ -1834,7 +1836,6 @@ int xfrm_policy_flush(struct net *net, u8 type, bool task_valid) + + __xfrm_policy_unlink(pol, dir); + spin_unlock_bh(&net->xfrm.xfrm_policy_lock); +- xfrm_dev_policy_delete(pol); + cnt++; + xfrm_audit_policy_delete(pol, 1, task_valid); + xfrm_policy_kill(pol); +@@ -1875,7 +1876,6 @@ int xfrm_dev_policy_flush(struct net *net, struct net_device *dev, + + __xfrm_policy_unlink(pol, dir); + spin_unlock_bh(&net->xfrm.xfrm_policy_lock); +- xfrm_dev_policy_delete(pol); + cnt++; + xfrm_audit_policy_delete(pol, 1, task_valid); + xfrm_policy_kill(pol); +@@ -2326,7 +2326,6 @@ int xfrm_policy_delete(struct xfrm_policy *pol, int dir) + pol = __xfrm_policy_unlink(pol, dir); + spin_unlock_bh(&net->xfrm.xfrm_policy_lock); + if (pol) { +- xfrm_dev_policy_delete(pol); + xfrm_policy_kill(pol); + return 0; + } +diff --git a/net/xfrm/xfrm_user.c b/net/xfrm/xfrm_user.c +index 444e58bc3f440..979f23cded401 100644 +--- a/net/xfrm/xfrm_user.c ++++ b/net/xfrm/xfrm_user.c +@@ -2348,7 +2348,6 @@ static int xfrm_get_policy(struct sk_buff *skb, struct nlmsghdr *nlh, + NETLINK_CB(skb).portid); + } + } else { +- xfrm_dev_policy_delete(xp); + xfrm_audit_policy_delete(xp, err ? 0 : 1, true); + + if (err != 0) +-- +2.43.0 + diff --git a/queue-6.6/xfrm-export-symbol-xfrm_dev_state_delete.patch b/queue-6.6/xfrm-export-symbol-xfrm_dev_state_delete.patch new file mode 100644 index 00000000000..73125927be1 --- /dev/null +++ b/queue-6.6/xfrm-export-symbol-xfrm_dev_state_delete.patch @@ -0,0 +1,35 @@ +From 00556274bdc3d819d564ebe46e12ef54b984da88 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 28 Jun 2024 10:46:25 +0200 +Subject: xfrm: Export symbol xfrm_dev_state_delete. + +From: Steffen Klassert + +[ Upstream commit 2d5317753e5f02a66e6d0afb9b25105d0beab1be ] + +This fixes a build failure if xfrm_user is build as a module. + +Fixes: 07b87f9eea0c ("xfrm: Fix unregister netdevice hang on hardware offload.") +Reported-by: Mark Brown +Tested-by: Leon Romanovsky +Signed-off-by: Steffen Klassert +Signed-off-by: Sasha Levin +--- + net/xfrm/xfrm_state.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/net/xfrm/xfrm_state.c b/net/xfrm/xfrm_state.c +index e5308bb75eea2..7692d587e59b8 100644 +--- a/net/xfrm/xfrm_state.c ++++ b/net/xfrm/xfrm_state.c +@@ -698,6 +698,7 @@ void xfrm_dev_state_delete(struct xfrm_state *x) + spin_unlock_bh(&xfrm_state_dev_gc_lock); + } + } ++EXPORT_SYMBOL_GPL(xfrm_dev_state_delete); + + void xfrm_dev_state_free(struct xfrm_state *x) + { +-- +2.43.0 + diff --git a/queue-6.6/xfrm-fix-netdev-reference-count-imbalance.patch b/queue-6.6/xfrm-fix-netdev-reference-count-imbalance.patch new file mode 100644 index 00000000000..4f47c1c2d05 --- /dev/null +++ b/queue-6.6/xfrm-fix-netdev-reference-count-imbalance.patch @@ -0,0 +1,42 @@ +From 7b32676f94c812187ac843d59c9181c49f533a80 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 8 Jul 2024 09:58:11 +0300 +Subject: xfrm: fix netdev reference count imbalance + +From: Jianbo Liu + +[ Upstream commit 9199b915e9fad7f5eff6160d24ff6b38e970107d ] + +In cited commit, netdev_tracker_alloc() is called for the newly +allocated xfrm state, but dev_hold() is missed, which causes netdev +reference count imbalance, because netdev_put() is called when the +state is freed in xfrm_dev_state_free(). Fix the issue by replacing +netdev_tracker_alloc() with netdev_hold(). + +Fixes: f8a70afafc17 ("xfrm: add TX datapath support for IPsec packet offload mode") +Signed-off-by: Jianbo Liu +Reviewed-by: Cosmin Ratiu +Signed-off-by: Leon Romanovsky +Signed-off-by: Steffen Klassert +Signed-off-by: Sasha Levin +--- + net/xfrm/xfrm_state.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/net/xfrm/xfrm_state.c b/net/xfrm/xfrm_state.c +index 7692d587e59b8..8a6e8656d014f 100644 +--- a/net/xfrm/xfrm_state.c ++++ b/net/xfrm/xfrm_state.c +@@ -1331,8 +1331,7 @@ xfrm_state_find(const xfrm_address_t *daddr, const xfrm_address_t *saddr, + xso->dev = xdo->dev; + xso->real_dev = xdo->real_dev; + xso->flags = XFRM_DEV_OFFLOAD_FLAG_ACQ; +- netdev_tracker_alloc(xso->dev, &xso->dev_tracker, +- GFP_ATOMIC); ++ netdev_hold(xso->dev, &xso->dev_tracker, GFP_ATOMIC); + error = xso->dev->xfrmdev_ops->xdo_dev_state_add(x, NULL); + if (error) { + xso->dir = 0; +-- +2.43.0 + diff --git a/queue-6.6/xfrm-fix-unregister-netdevice-hang-on-hardware-offlo.patch b/queue-6.6/xfrm-fix-unregister-netdevice-hang-on-hardware-offlo.patch new file mode 100644 index 00000000000..a6469f3d7e2 --- /dev/null +++ b/queue-6.6/xfrm-fix-unregister-netdevice-hang-on-hardware-offlo.patch @@ -0,0 +1,218 @@ +From 27e9d16a6bef5c95218546e3e74b556582a262e4 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 Jun 2024 08:47:24 +0200 +Subject: xfrm: Fix unregister netdevice hang on hardware offload. + +From: Steffen Klassert + +[ Upstream commit 07b87f9eea0c30675084d50c82532d20168da009 ] + +When offloading xfrm states to hardware, the offloading +device is attached to the skbs secpath. If a skb is free +is deferred, an unregister netdevice hangs because the +netdevice is still refcounted. + +Fix this by removing the netdevice from the xfrm states +when the netdevice is unregistered. To find all xfrm states +that need to be cleared we add another list where skbs +linked to that are unlinked from the lists (deleted) +but not yet freed. + +Fixes: d77e38e612a0 ("xfrm: Add an IPsec hardware offloading API") +Signed-off-by: Steffen Klassert +Signed-off-by: Sasha Levin +--- + include/net/xfrm.h | 36 +++++++------------------ + net/xfrm/xfrm_state.c | 61 +++++++++++++++++++++++++++++++++++++++++-- + 2 files changed, 69 insertions(+), 28 deletions(-) + +diff --git a/include/net/xfrm.h b/include/net/xfrm.h +index a3fd2cfed5e33..b280e7c460116 100644 +--- a/include/net/xfrm.h ++++ b/include/net/xfrm.h +@@ -176,7 +176,10 @@ struct xfrm_state { + struct hlist_node gclist; + struct hlist_node bydst; + }; +- struct hlist_node bysrc; ++ union { ++ struct hlist_node dev_gclist; ++ struct hlist_node bysrc; ++ }; + struct hlist_node byspi; + struct hlist_node byseq; + +@@ -1584,7 +1587,7 @@ int xfrm_state_check_expire(struct xfrm_state *x); + static inline void xfrm_dev_state_update_curlft(struct xfrm_state *x) + { + struct xfrm_dev_offload *xdo = &x->xso; +- struct net_device *dev = xdo->dev; ++ struct net_device *dev = READ_ONCE(xdo->dev); + + if (x->xso.type != XFRM_DEV_OFFLOAD_PACKET) + return; +@@ -1943,13 +1946,16 @@ int xfrm_dev_policy_add(struct net *net, struct xfrm_policy *xp, + struct xfrm_user_offload *xuo, u8 dir, + struct netlink_ext_ack *extack); + bool xfrm_dev_offload_ok(struct sk_buff *skb, struct xfrm_state *x); ++void xfrm_dev_state_delete(struct xfrm_state *x); ++void xfrm_dev_state_free(struct xfrm_state *x); + + static inline void xfrm_dev_state_advance_esn(struct xfrm_state *x) + { + struct xfrm_dev_offload *xso = &x->xso; ++ struct net_device *dev = READ_ONCE(xso->dev); + +- if (xso->dev && xso->dev->xfrmdev_ops->xdo_dev_state_advance_esn) +- xso->dev->xfrmdev_ops->xdo_dev_state_advance_esn(x); ++ if (dev && dev->xfrmdev_ops->xdo_dev_state_advance_esn) ++ dev->xfrmdev_ops->xdo_dev_state_advance_esn(x); + } + + static inline bool xfrm_dst_offload_ok(struct dst_entry *dst) +@@ -1970,28 +1976,6 @@ static inline bool xfrm_dst_offload_ok(struct dst_entry *dst) + return false; + } + +-static inline void xfrm_dev_state_delete(struct xfrm_state *x) +-{ +- struct xfrm_dev_offload *xso = &x->xso; +- +- if (xso->dev) +- xso->dev->xfrmdev_ops->xdo_dev_state_delete(x); +-} +- +-static inline void xfrm_dev_state_free(struct xfrm_state *x) +-{ +- struct xfrm_dev_offload *xso = &x->xso; +- struct net_device *dev = xso->dev; +- +- if (dev && dev->xfrmdev_ops) { +- if (dev->xfrmdev_ops->xdo_dev_state_free) +- dev->xfrmdev_ops->xdo_dev_state_free(x); +- xso->dev = NULL; +- xso->type = XFRM_DEV_OFFLOAD_UNSPECIFIED; +- netdev_put(dev, &xso->dev_tracker); +- } +-} +- + static inline void xfrm_dev_policy_delete(struct xfrm_policy *x) + { + struct xfrm_dev_offload *xdo = &x->xdo; +diff --git a/net/xfrm/xfrm_state.c b/net/xfrm/xfrm_state.c +index bda5327bf34df..e5308bb75eea2 100644 +--- a/net/xfrm/xfrm_state.c ++++ b/net/xfrm/xfrm_state.c +@@ -49,6 +49,7 @@ static struct kmem_cache *xfrm_state_cache __ro_after_init; + + static DECLARE_WORK(xfrm_state_gc_work, xfrm_state_gc_task); + static HLIST_HEAD(xfrm_state_gc_list); ++static HLIST_HEAD(xfrm_state_dev_gc_list); + + static inline bool xfrm_state_hold_rcu(struct xfrm_state __rcu *x) + { +@@ -214,6 +215,7 @@ static DEFINE_SPINLOCK(xfrm_state_afinfo_lock); + static struct xfrm_state_afinfo __rcu *xfrm_state_afinfo[NPROTO]; + + static DEFINE_SPINLOCK(xfrm_state_gc_lock); ++static DEFINE_SPINLOCK(xfrm_state_dev_gc_lock); + + int __xfrm_state_delete(struct xfrm_state *x); + +@@ -683,6 +685,40 @@ struct xfrm_state *xfrm_state_alloc(struct net *net) + } + EXPORT_SYMBOL(xfrm_state_alloc); + ++#ifdef CONFIG_XFRM_OFFLOAD ++void xfrm_dev_state_delete(struct xfrm_state *x) ++{ ++ struct xfrm_dev_offload *xso = &x->xso; ++ struct net_device *dev = READ_ONCE(xso->dev); ++ ++ if (dev) { ++ dev->xfrmdev_ops->xdo_dev_state_delete(x); ++ spin_lock_bh(&xfrm_state_dev_gc_lock); ++ hlist_add_head(&x->dev_gclist, &xfrm_state_dev_gc_list); ++ spin_unlock_bh(&xfrm_state_dev_gc_lock); ++ } ++} ++ ++void xfrm_dev_state_free(struct xfrm_state *x) ++{ ++ struct xfrm_dev_offload *xso = &x->xso; ++ struct net_device *dev = READ_ONCE(xso->dev); ++ ++ if (dev && dev->xfrmdev_ops) { ++ spin_lock_bh(&xfrm_state_dev_gc_lock); ++ if (!hlist_unhashed(&x->dev_gclist)) ++ hlist_del(&x->dev_gclist); ++ spin_unlock_bh(&xfrm_state_dev_gc_lock); ++ ++ if (dev->xfrmdev_ops->xdo_dev_state_free) ++ dev->xfrmdev_ops->xdo_dev_state_free(x); ++ WRITE_ONCE(xso->dev, NULL); ++ xso->type = XFRM_DEV_OFFLOAD_UNSPECIFIED; ++ netdev_put(dev, &xso->dev_tracker); ++ } ++} ++#endif ++ + void __xfrm_state_destroy(struct xfrm_state *x, bool sync) + { + WARN_ON(x->km.state != XFRM_STATE_DEAD); +@@ -848,6 +884,9 @@ EXPORT_SYMBOL(xfrm_state_flush); + + int xfrm_dev_state_flush(struct net *net, struct net_device *dev, bool task_valid) + { ++ struct xfrm_state *x; ++ struct hlist_node *tmp; ++ struct xfrm_dev_offload *xso; + int i, err = 0, cnt = 0; + + spin_lock_bh(&net->xfrm.xfrm_state_lock); +@@ -857,8 +896,6 @@ int xfrm_dev_state_flush(struct net *net, struct net_device *dev, bool task_vali + + err = -ESRCH; + for (i = 0; i <= net->xfrm.state_hmask; i++) { +- struct xfrm_state *x; +- struct xfrm_dev_offload *xso; + restart: + hlist_for_each_entry(x, net->xfrm.state_bydst+i, bydst) { + xso = &x->xso; +@@ -868,6 +905,8 @@ int xfrm_dev_state_flush(struct net *net, struct net_device *dev, bool task_vali + spin_unlock_bh(&net->xfrm.xfrm_state_lock); + + err = xfrm_state_delete(x); ++ xfrm_dev_state_free(x); ++ + xfrm_audit_state_delete(x, err ? 0 : 1, + task_valid); + xfrm_state_put(x); +@@ -884,6 +923,24 @@ int xfrm_dev_state_flush(struct net *net, struct net_device *dev, bool task_vali + + out: + spin_unlock_bh(&net->xfrm.xfrm_state_lock); ++ ++ spin_lock_bh(&xfrm_state_dev_gc_lock); ++restart_gc: ++ hlist_for_each_entry_safe(x, tmp, &xfrm_state_dev_gc_list, dev_gclist) { ++ xso = &x->xso; ++ ++ if (xso->dev == dev) { ++ spin_unlock_bh(&xfrm_state_dev_gc_lock); ++ xfrm_dev_state_free(x); ++ spin_lock_bh(&xfrm_state_dev_gc_lock); ++ goto restart_gc; ++ } ++ ++ } ++ spin_unlock_bh(&xfrm_state_dev_gc_lock); ++ ++ xfrm_flush_gc(); ++ + return err; + } + EXPORT_SYMBOL(xfrm_dev_state_flush); +-- +2.43.0 + diff --git a/queue-6.6/xprtrdma-fix-rpcrdma_reqs_reset.patch b/queue-6.6/xprtrdma-fix-rpcrdma_reqs_reset.patch new file mode 100644 index 00000000000..6d57a7cd04a --- /dev/null +++ b/queue-6.6/xprtrdma-fix-rpcrdma_reqs_reset.patch @@ -0,0 +1,85 @@ +From 9d9d179ef30f214817ba021874fbb39608f1d954 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 4 Jun 2024 15:45:23 -0400 +Subject: xprtrdma: Fix rpcrdma_reqs_reset() + +From: Chuck Lever + +[ Upstream commit acd9f2dd23c632568156217aac7a05f5a0313152 ] + +Avoid FastReg operations getting MW_BIND_ERR after a reconnect. + +rpcrdma_reqs_reset() is called on transport tear-down to get each +rpcrdma_req back into a clean state. + +MRs on req->rl_registered are waiting for a FastReg, are already +registered, or are waiting for invalidation. If the transport is +being torn down when reqs_reset() is called, the matching LocalInv +might never be posted. That leaves these MR registered /and/ on +req->rl_free_mrs, where they can be re-used for the next +connection. + +Since xprtrdma does not keep specific track of the MR state, it's +not possible to know what state these MRs are in, so the only safe +thing to do is release them immediately. + +Fixes: 5de55ce951a1 ("xprtrdma: Release in-flight MRs on disconnect") +Signed-off-by: Chuck Lever +Signed-off-by: Anna Schumaker +Signed-off-by: Sasha Levin +--- + net/sunrpc/xprtrdma/frwr_ops.c | 3 ++- + net/sunrpc/xprtrdma/verbs.c | 16 +++++++++++++++- + 2 files changed, 17 insertions(+), 2 deletions(-) + +diff --git a/net/sunrpc/xprtrdma/frwr_ops.c b/net/sunrpc/xprtrdma/frwr_ops.c +index ffbf99894970e..47f33bb7bff81 100644 +--- a/net/sunrpc/xprtrdma/frwr_ops.c ++++ b/net/sunrpc/xprtrdma/frwr_ops.c +@@ -92,7 +92,8 @@ static void frwr_mr_put(struct rpcrdma_mr *mr) + rpcrdma_mr_push(mr, &mr->mr_req->rl_free_mrs); + } + +-/* frwr_reset - Place MRs back on the free list ++/** ++ * frwr_reset - Place MRs back on @req's free list + * @req: request to reset + * + * Used after a failed marshal. For FRWR, this means the MRs +diff --git a/net/sunrpc/xprtrdma/verbs.c b/net/sunrpc/xprtrdma/verbs.c +index 4f71627ba39ce..cb909329a5039 100644 +--- a/net/sunrpc/xprtrdma/verbs.c ++++ b/net/sunrpc/xprtrdma/verbs.c +@@ -897,6 +897,8 @@ static int rpcrdma_reqs_setup(struct rpcrdma_xprt *r_xprt) + + static void rpcrdma_req_reset(struct rpcrdma_req *req) + { ++ struct rpcrdma_mr *mr; ++ + /* Credits are valid for only one connection */ + req->rl_slot.rq_cong = 0; + +@@ -906,7 +908,19 @@ static void rpcrdma_req_reset(struct rpcrdma_req *req) + rpcrdma_regbuf_dma_unmap(req->rl_sendbuf); + rpcrdma_regbuf_dma_unmap(req->rl_recvbuf); + +- frwr_reset(req); ++ /* The verbs consumer can't know the state of an MR on the ++ * req->rl_registered list unless a successful completion ++ * has occurred, so they cannot be re-used. ++ */ ++ while ((mr = rpcrdma_mr_pop(&req->rl_registered))) { ++ struct rpcrdma_buffer *buf = &mr->mr_xprt->rx_buf; ++ ++ spin_lock(&buf->rb_lock); ++ list_del(&mr->mr_all); ++ spin_unlock(&buf->rb_lock); ++ ++ frwr_mr_release(mr); ++ } + } + + /* ASSUMPTION: the rb_allreqs list is stable for the duration, +-- +2.43.0 +