From: Greg Kroah-Hartman Date: Tue, 17 Jan 2023 12:34:40 +0000 (+0100) Subject: 4.19-stable patches X-Git-Tag: v4.14.303~2 X-Git-Url: http://git.ipfire.org/gitweb.cgi?a=commitdiff_plain;h=0951e915c2ee7bb68bd3ea001df7a9e9a90a25e5;p=thirdparty%2Fkernel%2Fstable-queue.git 4.19-stable patches added patches: serial-tegra-change-lower-tolerance-baud-rate-limit-for-tegra20-and-tegra30.patch --- diff --git a/queue-4.19/serial-tegra-change-lower-tolerance-baud-rate-limit-for-tegra20-and-tegra30.patch b/queue-4.19/serial-tegra-change-lower-tolerance-baud-rate-limit-for-tegra20-and-tegra30.patch new file mode 100644 index 00000000000..077e83047c9 --- /dev/null +++ b/queue-4.19/serial-tegra-change-lower-tolerance-baud-rate-limit-for-tegra20-and-tegra30.patch @@ -0,0 +1,48 @@ +From b40de7469ef135161c80af0e8c462298cc5dac00 Mon Sep 17 00:00:00 2001 +From: Patrik John +Date: Tue, 23 Nov 2021 14:27:38 +0100 +Subject: serial: tegra: Change lower tolerance baud rate limit for tegra20 and tegra30 + +From: Patrik John + +commit b40de7469ef135161c80af0e8c462298cc5dac00 upstream. + +The current implementation uses 0 as lower limit for the baud rate +tolerance for tegra20 and tegra30 chips which causes isses on UART +initialization as soon as baud rate clock is lower than required even +when within the standard UART tolerance of +/- 4%. + +This fix aligns the implementation with the initial commit description +of +/- 4% tolerance for tegra chips other than tegra186 and +tegra194. + +Fixes: d781ec21bae6 ("serial: tegra: report clk rate errors") +Cc: stable +Signed-off-by: Patrik John +Link: https://lore.kernel.org/r/sig.19614244f8.20211123132737.88341-1-patrik.john@u-blox.com +Signed-off-by: Greg Kroah-Hartman +Signed-off-by: Greg Kroah-Hartman +--- + drivers/tty/serial/serial-tegra.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/tty/serial/serial-tegra.c ++++ b/drivers/tty/serial/serial-tegra.c +@@ -1443,7 +1443,7 @@ static struct tegra_uart_chip_data tegra + .fifo_mode_enable_status = false, + .uart_max_port = 5, + .max_dma_burst_bytes = 4, +- .error_tolerance_low_range = 0, ++ .error_tolerance_low_range = -4, + .error_tolerance_high_range = 4, + }; + +@@ -1454,7 +1454,7 @@ static struct tegra_uart_chip_data tegra + .fifo_mode_enable_status = false, + .uart_max_port = 5, + .max_dma_burst_bytes = 4, +- .error_tolerance_low_range = 0, ++ .error_tolerance_low_range = -4, + .error_tolerance_high_range = 4, + }; + diff --git a/queue-4.19/series b/queue-4.19/series index 68eaec6b9aa..4d6693813b2 100644 --- a/queue-4.19/series +++ b/queue-4.19/series @@ -474,3 +474,4 @@ efi-fix-null-deref-in-init-error-path.patch revert-usb-ulpi-defer-ulpi_register-on-ulpi_read_id-timeout.patch tty-serial-tegra-handle-rx-transfer-in-pio-mode-if-dma-wasn-t-started.patch serial-tegra-only-print-fifo-error-message-when-an-error-occurs.patch +serial-tegra-change-lower-tolerance-baud-rate-limit-for-tegra20-and-tegra30.patch